Control method, preceding-stage controller and power converter

Abstract

The embodiment of the invention discloses a control method, a preceding-stage controller and a power converter, and the method comprises the steps: receiving a detection signal, and outputting the detection signal through a backward-stage controller or a signal conversion module; judging whether the vehicle is in a burst mode; if yes, whether parameters of the detection signals meet corresponding preset judgment conditions or not is judged; and if the parameters of the detection signal meet the corresponding preset judgment conditions, exiting the burst mode. According to the embodiment of the invention, the preceding-stage controller directly obtains the existing circuit signal of the backward-stage controller as the detection signal, and the equivalent frequency, the positive pulse width and the trend of the level changing with the load of the detection signal are used as the judgment conditions of the backward-stage power circuit from no load to heavy load. According to the judgment result, the preceding-stage controller can exit the burst mode in advance and enter the bus voltage loop closed-loop control mode, the response time caused by mode switching is shortened, and therefore the amplitude of bus voltage drop is reduced.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of electronic technology, and in particular to a control method, a front-stage controller and a power converter. Background Art

[0002] Generally speaking, power supply equipment with power greater than or equal to 75W and outputting DC requires a two-stage combination of a front-stage power factor correction circuit (Power Factor Correction, PFC) and a rear-stage DC-DC circuit. In these applications, the standard requirements for energy efficiency are increasing. For the PFC controller, when the load is reduced, the voltage loop output of the PFC is reduced accordingly to reduce the input power of the PFC; when the output of the voltage loop is lower than a certain threshold, the PFC usually enters a burst mode (Burst Mode). In the burst mode, the PFC controller will be in a pulse width modulation (Pulse width modulation, PWM) intermittent wave state of the bus voltage open loop, and the PWM wave will skip one or more AC cycles according to the natural consumption of the bus voltage. In order to achieve lower total harmonic distortion (THD) and higher power factor, the bandwidth of the PFC loop is generally designed to be 5-20Hz. Then, when the PFC is in burst mode, if the subsequent DC-DC is suddenly loaded, the PFC loop adjusts to the threshold for exiting the burst mode and entering the normal working mode, and the bus voltage drops severely, which may cause the subsequent DC-DC to be in the Under Voltage Lock Out (UVLO) state, causing the load output to lose power.

[0003] The PFC controller and the subsequent DC-DC controller of the existing solution are independently designed, and generally have no universal communication interface or communication method. The PFC cannot know the loop working status of the subsequent DC-DC in advance and can only rely on bus voltage feedback. It first detects that the bus voltage drops to a certain extent, and then optimizes the bus voltage drop by improving the dynamic response of the control system loop. This method can optimize the degree of bus voltage drop, but because the change of bus voltage drop often lags seriously behind the dynamic load of the subsequent DC-DC load, the bus voltage will continue to drop during the loop adjustment period, resulting in a larger bus voltage drop. Summary of the invention

[0004] The main technical problem solved by the embodiments of the present invention is to provide a control method, a front-stage controller and a power converter, which can avoid the problem of a large drop in bus voltage caused by the front-stage controller being in burst mode and the front-stage controller exiting the burst mode lagging behind the bus voltage drop after the load of the subsequent power circuit switches from no-load to heavy-load.

[0005] In order to solve the above technical problems, a technical solution adopted in an embodiment of the present invention is: providing a control method, applied to a front-stage controller of a power converter, comprising: receiving a detection signal, the detection signal is output by a rear-stage controller or a signal conversion module; judging whether it is in a burst mode; if so, judging whether the parameters of the detection signal meet the corresponding preset judgment conditions; if the parameters of the detection signal meet the corresponding preset judgment conditions, exiting the burst mode.

[0006] In some embodiments, the determination of whether the parameters of the detection signal satisfy corresponding preset determination conditions includes: if the parameters of the detection signal continue to decrease, determining whether the parameters of the detection signal decrease to a corresponding first parameter threshold; and / or determining whether the rate of change of the parameters of the detection signal when decreasing reaches a corresponding first parameter change rate; if the parameters of the detection signal continue to increase, determining whether the parameters of the detection signal increase to a corresponding second parameter threshold; and / or determining whether the rate of change of the parameters of the detection signal when increasing reaches a corresponding second parameter change rate.

[0007] In some embodiments, the detection signal includes a drive signal generated by the post-stage controller or a feedback signal of the post-stage controller.

[0008] In some embodiments, the parameter of the detection signal includes at least one of an equivalent frequency of the detection signal, a positive pulse width of the detection signal, and a level of the detection signal.

[0009] In order to solve the above technical problems, another technical solution adopted in the embodiment of the present invention is: to provide a front-stage controller, comprising: a signal detection module for receiving a detection signal, when the parameters of the detection signal meet the corresponding preset judgment conditions, the signal detection module outputs a control signal; a loop control module for receiving the control signal, the loop control module is configured to exit the burst mode in response to the control signal.

[0010] In some embodiments, the signal detection module includes a frequency detection unit, a positive pulse width detection unit and a level detection unit. The frequency detection unit is used to output a first determination signal when the equivalent frequency of the detection signal meets the corresponding preset determination condition; the positive pulse width detection unit is used to output a second determination signal when the positive pulse width of the detection signal meets the corresponding preset determination condition; the level detection unit is used to output a third determination signal when the level of the detection signal meets the corresponding preset determination condition.

[0011] In some embodiments, the signal detection module further includes a logic combination and processing unit, and the logic combination and processing unit outputs the control signal according to the first determination signal, the second determination signal and the third determination signal.

[0012] In order to solve the above technical problems, another technical solution adopted in the embodiment of the present invention is: to provide a power converter, including: a front-stage power circuit; a rear-stage power circuit, the rear-stage power circuit is connected to the front-stage power circuit through a bus capacitor; a rear-stage controller, the rear-stage controller is connected to the rear-stage power circuit; and the front-stage controller as described above, the front-stage controller is respectively connected to the rear-stage controller and the front-stage power circuit.

[0013] In some embodiments, the power converter also includes a signal conversion module, which is connected between the post-stage controller and the front-stage controller, and is used to convert the drive signal output by the post-stage controller or the feedback signal of the post-stage controller into a detection signal.

[0014] In some embodiments, the post-stage controller includes an LLC resonant converter, an asymmetric resonant half-bridge flyback converter, a phase-shifted full-bridge, and a post-stage controller with optocoupler feedback.

[0015] The beneficial effects of the embodiments of the present invention are as follows: different from the prior art, the embodiments of the present invention enable the front-stage controller to directly obtain the existing circuit signal of the rear-stage controller as the detection signal, and use the equivalent frequency, positive pulse width and level change trend of the detection signal with the load as the judgment condition for the rear-stage power circuit to change from no-load to heavy-load. According to the judgment result, the front-stage controller can exit the burst mode in advance and enter the bus voltage loop closed-loop control mode, thereby reducing the response time caused by mode switching, thereby reducing the amplitude of the bus voltage drop. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a bus voltage waveform diagram of the front-stage controller of the existing power converter when exiting the burst mode;

[0017] Figure 2 It is a flow chart of a control method provided by an embodiment of the present invention;

[0018] Figure 3 It is a structural schematic diagram of a pre-stage controller provided by an embodiment of the present invention;

[0019] Figure 4 is a schematic structural diagram of a power converter provided by an embodiment of the present invention;

[0020] Figure 5is a bus voltage waveform diagram of a front-stage controller of a power converter provided in an embodiment of the present invention when exiting a burst mode;

[0021] Figure 6 It is a structural schematic diagram of a power converter whose post-stage controller is a resonant controller provided by an embodiment of the present invention;

[0022] Figure 7 It is a schematic structural diagram of another power converter in which the post-stage controller is a resonant controller provided in an embodiment of the present invention;

[0023] Figure 8 It is an equivalent frequency waveform diagram of the detection signal when the subsequent converter in the power converter is a resonant controller;

[0024] Fig. 9 It is a schematic structural diagram of a power converter whose rear-stage controller is an asymmetric resonant half-bridge flyback converter provided by an embodiment of the present invention;

[0025] Fig.10 It is an equivalent frequency waveform diagram of the detection signal when the rear-stage converter in the power converter is an asymmetric resonant half-bridge flyback converter;

[0026] Fig.11 It is a structural schematic diagram of a power converter whose rear-stage controller is a phase-shifted full-bridge provided in an embodiment of the present invention;

[0027] Fig.12 It is a positive pulse width waveform diagram of the detection signal when the subsequent converter in the power converter is a phase-shifted full-bridge;

[0028] Fig.13 It is a structural schematic diagram of a power converter having a post-stage controller with optocoupler feedback provided by an embodiment of the present invention;

[0029] Fig.14 It is the level waveform diagram of the detection signal when the subsequent converter in the power converter has optocoupler feedback. DETAILED DESCRIPTION

[0030] In order to facilitate the understanding of the present application, the present application is described in more detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that when an element is described as "fixed to" another element, it can be directly on another element or there can be one or more centered elements therebetween. When an element is described as "connected" to another element, it can be directly connected to another element or there can be one or more centered elements therebetween. The orientation or positional relationship indicated by the terms "upper", "lower", "inner", "outer", "bottom" and the like used in this specification is based on the orientation or positional relationship shown in the accompanying drawings, only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third" and the like are used only for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0031] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used in this specification and in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used in this specification includes any and all combinations of one or more of the related listed items.

[0032] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0033] The technical solution in this application will be described below in conjunction with the accompanying drawings.

[0034] Generally speaking, the PWM driving signals of the front-stage controller and the rear-stage controller are used to drive the front-stage power circuit and the rear-stage power circuit respectively. The bus capacitor is used as the carrier of energy exchange between the front-stage power circuit and the rear-stage power circuit, and its voltage value is the bus voltage.

[0035] When the output of the voltage loop is lower than a certain threshold, the PFC will generally enter a burst mode. In this mode, the PFC controller will be in a PWM intermittent wave state with the bus voltage loop open. The PWM wave will skip one or more AC cycles according to the natural consumption of the bus voltage. When the burst mode is turned off, the bus voltage loop stops working, and the loop output maintains the set minimum value. When the burst mode is turned on, the bus voltage loop works, but because it is higher than the bus set value, the output is clamped to the set minimum value, and the burst mode is exited when the threshold is reached.

[0036] Generally, when the subsequent load suddenly loads from no load (zero load or light load) to heavy load (or instantaneous large load exceeding the rated load), the output capacitor of the subsequent power circuit first provides instantaneous load extraction energy, and at the same time, the drop of the output voltage of the subsequent stage is fed back, and the voltage control loop of the subsequent controller starts to work, so that the subsequent power circuit can provide more energy, thereby maintaining the output voltage of the subsequent stage constant; on the other hand, the subsequent power circuit will extract the accumulated energy of the bus capacitor, causing the bus voltage to drop. Usually, the voltage loop bandwidth designed for the subsequent power circuit is relatively high, and can quickly respond to the voltage drop in the case of sudden loading from no load to heavy load.

[0037] However, due to the negative feedback behavior of the post-stage controller, the switch from no-load to heavy-load causes the bus voltage to drop far behind the moment when the load is suddenly loaded. That is, after the front-stage controller in burst mode detects that the bus voltage has dropped below the voltage threshold for exiting the burst mode, it exits the burst mode and is controlled by the bus voltage closed-loop of the front-stage controller. However, since the bandwidth of the front-stage controller is very low, the bus voltage will continue to drop during the adjustment of the bus voltage loop, eventually resulting in a larger bus voltage drop.

[0038] Figure 1 The bus voltage waveform of the front-stage controller of the existing power converter when exiting the burst mode is shown. It is not difficult to see that the moment when the front-stage bus voltage loop exits the burst mode lags far behind the moment when the rear-stage load changes from no-load to heavy-load.

[0039] In order to optimize the response speed of the front-stage controller when exiting the burst mode and timely suppress the amplitude of the bus voltage drop, the embodiment of the present invention provides a control method applied to the front-stage controller, and its flow chart is as follows: Figure 2 As shown, the method specifically comprises the following steps:

[0040] Step S100: receiving a detection signal.

[0041] The detection signal is output by the subsequent controller or the signal conversion module. In the embodiment of the present application, the detection signal includes a signal generated by the subsequent controller itself, such as one or more PWM drive signals; or a feedback signal of the subsequent controller, such as an optocoupler feedback signal. That is, the existing signal in the power converter is used as a detection signal to determine the trend of the subsequent load change.

[0042] Step S200: Determine whether it is in the burst mode.

[0043] The pre-controller usually relies on its internal logic and external signals to determine whether it is in burst mode. For example, the pre-controller continuously monitors the bus voltage and sets a voltage threshold. When the bus voltage drops below this threshold, the pre-controller enters burst mode, so the voltage threshold can be used as a basis for determining whether the pre-controller is in burst mode; the pre-controller may determine whether the load has changed dynamically by detecting changes in current or power. If the load current or power increases or decreases rapidly, the pre-controller enters burst mode, so the load current or power can be used as a basis for determining whether the pre-controller is in burst mode; in addition, there may be a status flag inside the pre-controller to record whether it has entered burst mode.

[0044] The internal status flag can be implemented through hardware circuits or software programming. In hardware circuits, the internal status flag is usually implemented through logic gate circuits, triggers, registers or other programmable logic devices (PLDs); in software programming, the internal status flag is usually implemented through variables or bit flags in the programming language.

[0045] If it is determined that the front-stage controller itself is in the burst mode, step S300 is executed.

[0046] Step S300: determine whether the parameters of the detection signal meet corresponding preset determination conditions.

[0047] In an embodiment of the present application, the parameters of the detection signal include at least one of the equivalent frequency of the detection signal, the positive pulse width of the detection signal, and the level of the detection signal, and the detection signal includes a drive signal generated by a post-stage controller and / or a feedback signal of the post-stage controller.

[0048] Therefore, the parameters for determining the trend of the subsequent load change include the equivalent frequency of the drive signal, the positive pulse width of the drive signal, the level of the drive signal, the equivalent frequency of the feedback signal, the positive pulse width of the feedback signal, and the level of the feedback signal.

[0049] In the embodiment of the present application, judging whether the parameters of the detection signal meet the corresponding preset judgment conditions includes:

[0050] If the parameter of the detection signal continues to decrease, determining whether the parameter of the detection signal decreases to a corresponding first parameter threshold; and / or determining whether a rate of change of the parameter of the detection signal when decreasing reaches a corresponding first parameter change rate;

[0051] If the parameter of the detection signal continues to increase, it is determined whether the parameter of the detection signal increases to a corresponding second parameter threshold; and / or it is determined whether the rate of change of the parameter of the detection signal when increasing reaches a corresponding second parameter change rate.

[0052] If the detection signal is a driving signal, the pre-set judgment condition is any one of the following conditions or any combination of multiple conditions:

[0053] 1) The equivalent frequency of the driving signal changes from high to low and reaches a preset first driving frequency threshold;

[0054] 2) The slope of the change of the equivalent frequency of the driving signal from high to low reaches a preset first driving frequency change rate;

[0055] 3) The equivalent frequency of the driving signal changes from low to high and reaches a preset second driving frequency threshold;

[0056] 4) The slope of the change of the equivalent frequency of the driving signal from low to high reaches a preset second driving frequency change rate;

[0057] 5) The positive pulse width of the driving signal changes from high to low and reaches a preset first driving width threshold;

[0058] 6) The slope of the positive pulse width of the driving signal changing from high to low reaches a preset first driving width change rate;

[0059] 7) The positive pulse width of the driving signal changes from low to high and reaches a preset second width frequency threshold;

[0060] 8) The slope of the positive pulse width of the driving signal changing from low to high reaches a preset second driving width change rate;

[0061] 9) The level of the driving signal changes from high to low and reaches a preset first driving level threshold;

[0062] 10) The slope of the driving signal level changing from high to low reaches a preset first driving level change rate;

[0063] 11) The level of the driving signal changes from low to high and reaches a preset second driving level threshold;

[0064] 12) The slope of the driving signal level changing from low to high reaches a preset second driving level change rate.

[0065] If the detection signal is a feedback signal, the pre-set judgment condition is any one of the following conditions or any combination of multiple conditions:

[0066] 1) The equivalent frequency of the feedback signal changes from high to low and reaches a preset first driving frequency threshold;

[0067] 2) The slope of the equivalent frequency of the feedback signal changing from high to low reaches a preset first driving frequency change rate;

[0068] 3) The equivalent frequency of the feedback signal changes from low to high and reaches a preset second driving frequency threshold;

[0069] 4) The slope of the change of the equivalent frequency of the feedback signal from low to high reaches the preset second driving frequency change rate;

[0070] 5) The positive pulse width of the feedback signal changes from high to low and reaches a preset first drive width threshold;

[0071] 6) The slope of the positive pulse width of the feedback signal changing from high to low reaches a preset first drive width change rate;

[0072] 7) The positive pulse width of the feedback signal changes from low to high and reaches a preset second width frequency threshold;

[0073] 8) The slope of the positive pulse width of the feedback signal changing from low to high reaches a preset second drive width change rate;

[0074] 9) The level of the feedback signal changes from high to low and reaches a preset first driving level threshold;

[0075] 10) The slope of the feedback signal level changing from high to low reaches a preset first drive level change rate;

[0076] 11) The level of the feedback signal changes from low to high and reaches a preset second driving level threshold;

[0077] 12) The slope of the feedback signal level changing from low to high reaches a preset second drive level change rate.

[0078] If it is determined that the parameters of the detection signal meet the corresponding preset determination conditions, step S400 is executed.

[0079] Step S400: exit the burst mode.

[0080] The front-end controller controls itself to exit the burst mode.

[0081] Different from the prior art, the implementation mode of the present invention enables the front-stage controller to directly obtain the existing circuit signal of the rear-stage controller as the detection signal, and utilizes the equivalent frequency, positive pulse width and level change trend of the detection signal with the load as the judgment condition for the rear-stage power circuit to change from no-load to heavy-load. According to the judgment result, the front-stage controller can exit the burst mode in advance and enter the bus voltage loop closed-loop control mode, thereby reducing the response time caused by mode switching, thereby reducing the amplitude of the bus voltage drop.

[0082] Based on the control method provided in the above embodiment, the embodiment of the present invention further provides a pre-stage controller, whose structural diagram is as follows: Figure 3As shown, the front-stage controller includes a signal detection module 110 and a loop control module 120 .

[0083] The signal detection module 110 is used to receive a detection signal. When the parameters of the detection signal meet the corresponding preset judgment conditions, the signal detection module 110 outputs a control signal. The loop control module 120 is used to receive a control signal. The loop control module 120 is configured to exit the burst mode in response to the control signal.

[0084] In the embodiment of the present application, the signal detection module 110 includes a frequency detection unit 111 , a positive pulse width detection unit 112 , a level detection unit 113 , and a logic combination and processing unit 114 .

[0085] The frequency detection unit 111 is used to output a first determination signal when the equivalent frequency of the detection signal meets the corresponding preset determination condition. Specifically, the frequency detection unit 111 is used to output a first determination signal when the equivalent frequency of the detection signal continues to decrease, when the equivalent frequency of the detection signal decreases to the corresponding first frequency threshold, and / or when the rate of change of the equivalent frequency of the detection signal when decreasing reaches the corresponding first frequency change rate; or when the equivalent frequency of the detection signal continues to increase, when the equivalent frequency of the detection signal increases to the corresponding second frequency threshold, and / or when the rate of change of the equivalent frequency of the detection signal when increasing reaches the corresponding second frequency change rate.

[0086] The positive pulse width detection unit 112 is used to output a second determination signal when the positive pulse width of the detection signal meets the corresponding preset determination condition. Specifically, the positive pulse width detection unit 112 is used to output a second determination signal when the positive pulse width of the detection signal continues to decrease, when the positive pulse width of the detection signal decreases to the corresponding first width threshold, and / or when the rate of change of the positive pulse width of the detection signal when decreasing reaches the corresponding first width change rate; or when the positive pulse width of the detection signal continues to increase, when the positive pulse width of the detection signal increases to the corresponding second width threshold, and / or when the rate of change of the positive pulse width of the detection signal when increasing reaches the corresponding second width change rate, output a second determination signal.

[0087] The level detection unit 113 is used to output a third determination signal when the level of the detection signal meets the corresponding preset determination condition. Specifically, the level detection unit 113 is used to output the third determination signal when the level of the detection signal continues to decrease, when the level of the detection signal decreases to the corresponding first level threshold, and / or when the rate of change of the level of the detection signal when decreasing reaches the corresponding first level change rate; or when the level of the detection signal continues to increase, when the level of the detection signal increases to the corresponding second level threshold, and / or when the rate of change of the level of the detection signal when increasing reaches the corresponding second level change rate, output the third determination signal.

[0088] The logic combination and processing unit 114 outputs a control signal to the loop control module 120 according to the first determination signal, the second determination signal, and the third determination signal. By way of example and not limitation, the logic combination and processing unit 114 is configured to perform an AND operation on the first determination signal, the second determination signal, and the third determination signal to output a control signal to the loop control module 120.

[0089] Based on the pre-stage controller provided in the above embodiment, the embodiment of the present invention provides a power converter, and its structural diagram is as follows: Figure 4 As shown, the power converter specifically includes a front-stage controller 100 , a rear-stage controller 200 , a signal conversion module 300 , a front-stage power circuit 400 and a rear-stage power circuit 500 .

[0090] Among them, the rear-stage power circuit 500 is connected to the front-stage power circuit 400 through the bus capacitor C0, the rear-stage controller 200 is respectively connected to the signal conversion module 300 and the rear-stage power circuit 500, and the front-stage controller 100 is respectively connected to the signal conversion module 300 and the front-stage power circuit 400. The signal conversion module 300 is used to convert the drive signal output by the rear-stage controller 400 or the feedback signal of the rear-stage controller into a detection signal, that is, the signal conversion module 300 is used to convert the rear-stage circuit signal into a digital signal that is used to indicate the change trend of the rear-stage load from no-load to heavy-load and can be received by the front-stage controller.

[0091] It should be noted that the types of front-stage controllers in the embodiments of the present application include but are not limited to power factor correction controllers and DC-DC controllers, and the types of post-stage controllers include but are not limited to LLC resonant converters, asymmetric resonant half-bridge flyback converters, phase-shifted full-bridge and post-stage controllers with optocoupler feedback.

[0092] Figure 5 FIG. 4 shows a bus voltage waveform diagram of the front-stage controller of the power converter provided by the embodiment of the present invention when exiting the burst mode. It is not difficult to see that Figure 1In comparison, the lag time between the moment when the front-stage bus voltage loop exits the burst mode and the moment when the rear-stage load changes from no-load to heavy-load is greatly shortened.

[0093] Different from the prior art, the implementation mode of the present invention enables the front-stage controller to directly obtain the existing circuit signal of the rear-stage controller as the detection signal, and utilizes the equivalent frequency, positive pulse width and level change trend of the detection signal with the load as the judgment condition for the rear-stage power circuit to change from no-load to heavy-load. According to the judgment result, the front-stage controller can exit the burst mode in advance and enter the bus voltage loop closed-loop control mode, thereby reducing the response time caused by mode switching, thereby reducing the amplitude of the bus voltage drop.

[0094] For a power converter composed of two-stage topology, the mainstream post-stage converter topologies can be divided into three categories according to the relationship between load and switching frequency changes:

[0095] Figure 6 A structural schematic diagram of a power converter whose post-stage controller is an LLC resonant controller provided in an embodiment of the present invention, wherein a PWM drive signal generated by the post-stage controller 200 is input to a signal conversion unit 300, and a detection signal is obtained after voltage division by the signal conversion unit 300. When the post-stage load increases, the equivalent frequency of the detection signal decreases.

[0096] Figure 7 Another embodiment of the present invention provides a schematic diagram of a power converter in which the post-stage controller is an LLC resonant controller. The detection signal is obtained by using the signal of the post-stage controller 200 through the peripheral circuit. In this case, the post-stage controller is often at the secondary side of the transformer, and the PWM signal needs to be isolated. Therefore, the Figure 7 The output signal of the gate driver 220 shown in FIG. 1 is input to the signal conversion unit 300 as a subsequent circuit signal. After voltage division by the signal conversion unit 300 , a detection signal is obtained. When the subsequent load increases, the equivalent frequency of the detection signal decreases.

[0097] Whether Figure 6 still Figure 7 In the circuit form shown in the figure, for the LLC resonant converter, when the load switches from no-load to heavy-load, due to the effect of output voltage feedback regulation, the drop of output voltage causes the loop regulation to reduce the switching frequency (i.e., the equivalent frequency of the PWM drive signal) from high frequency to low frequency to maintain the output voltage stability. Figure 8 shown.

[0098] Fig. 9A structural diagram of a power converter in which a post-stage controller is an asymmetric resonant half-bridge flyback converter provided in an embodiment of the present invention, wherein a PWM drive signal generated by the post-stage controller 200 is directly input to the front-stage controller 100 as a detection signal, and when the post-stage load increases, the equivalent frequency of the detection signal decreases.

[0099] For an asymmetric resonant half-bridge flyback converter, when the load at the rear stage switches from no-load to heavy-load, due to the effect of the output voltage feedback regulation, the drop of the output voltage causes the loop regulation to increase the switching frequency (i.e., the equivalent frequency of the PWM drive signal) from low frequency to high frequency to maintain the output voltage stability. Fig.10 shown.

[0100] Fig.11 A schematic diagram of a power converter structure in which a phase-shifted full-bridge power converter is provided in an embodiment of the present invention, G1 / G2 is used as a driving signal for the switch tube Q1 / switch tube Q2 of the leading arm, and G3 / G4 is used as a driving signal for the switch tube Q3 / switch tube Q4 of the lagging arm. Fig.12 It can be seen that the greater the change in the subsequent load, the greater the phase shift angle between the leading arm and the lagging arm (i.e., the greater the overlap interval of the conduction time between G1 and G4, G2 and G3). Take G1 and G4 as the subsequent circuit signal, and obtain the detected signal G14 through the signal processing circuit. The previous controller can determine whether the subsequent load changes from no-load to heavy-load by the change in the positive pulse width. In this embodiment, the positive pulse width of G14 increases as the subsequent load increases.

[0101] Similarly, G2 and G4 can also be used as the signals of the subsequent circuit. G2 and G4 are ANDed together through the signal processing circuit to obtain the detected signal G24. As the subsequent load of G24 increases, the positive pulse width decreases.

[0102] Fig.13 The schematic diagram of the structure of a power converter with a post-stage controller and optocoupler feedback provided by the embodiment of the present invention. The optocoupler feedback signal passes through the comparator U1 and the threshold voltage V ref2 After comparison, the detection signal is obtained. The voltage signal fed back by the optocoupler OC1 increases with the subsequent load, and triggers the comparator to flip after reaching a certain threshold, such as Fig.14 shown.

[0103] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Under the concept of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other changes in different aspects of the present application as above, which are not provided in detail for the sake of simplicity. Although the present application has been described in detail with reference to the aforementioned embodiments, a person of ordinary skill in the art should understand that the technical solutions described in the aforementioned embodiments can still be modified, or some of the technical features can be replaced by equivalents. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A control method, applied to a pre-stage controller of a power converter, characterized in that: include: Receiving a detection signal, wherein the detection signal is output by a subsequent controller or a signal conversion module; Determine whether it is in burst mode; If yes, determining whether the parameters of the detection signal meet corresponding preset determination conditions; If the parameters of the detection signal meet the corresponding preset determination conditions, the burst mode is exited.

2. The method according to claim 1, characterized in that The determining whether the parameters of the detection signal meet corresponding preset determination conditions includes: If the parameters of the detection signal continue to decrease, then Determining whether the parameter of the detection signal is reduced to a corresponding first parameter threshold; and / or, determining that a rate of change of a parameter of the detection signal when decreasing reaches a corresponding first parameter rate of change; If the parameter of the detection signal continues to increase, then Determining whether a parameter of the detection signal rises to a corresponding second parameter threshold; And / or, determining whether a rate of change of a parameter of the detection signal when increasing reaches a corresponding second parameter change rate.

3. The method according to claim 1, characterized in that The detection signal includes a driving signal generated by the post-stage controller or a feedback signal of the post-stage controller.

4. The method according to any one of claims 1 to 3, characterized in that: The parameters of the detection signal include at least one of an equivalent frequency of the detection signal, a positive pulse width of the detection signal, and a level of the detection signal.

5. A pre-stage controller, characterized in that: include: A signal detection module for receiving a detection signal, wherein when a parameter of the detection signal satisfies a corresponding preset determination condition, the signal detection module outputs a control signal; A loop control module is configured to receive the control signal, the loop control module being configured to exit the burst mode in response to the control signal.

6. The pre-stage controller according to claim 5, characterized in that: The signal detection module includes a frequency detection unit, a positive pulse width detection unit and a level detection unit. The frequency detection unit is used to output a first determination signal when the equivalent frequency of the detection signal meets the corresponding preset determination condition; The positive pulse width detection unit is used to output a second determination signal when the positive pulse width of the detection signal meets a corresponding preset determination condition; The level detection unit is used for outputting a third determination signal when the level of the detection signal meets a corresponding preset determination condition.

7. The pre-stage controller according to claim 6, characterized in that: The signal detection module also includes a logic combination and processing unit, The logic combination and processing unit outputs the control signal according to the first determination signal, the second determination signal and the third determination signal.

8. A power converter, characterized in that: include: Pre-stage power circuit; A rear-stage power circuit, wherein the rear-stage power circuit is connected to the front-stage power circuit via a bus capacitor; A post-stage controller, the post-stage controller is connected to the post-stage power circuit; And the front-stage controller as described in claim 6 or 7, the front-stage controller is connected to the rear-stage controller and the front-stage power circuit respectively.

9. The power converter according to claim 8, characterized in that: It also includes a signal conversion module, which is connected between the post-stage controller and the front-stage controller, and is used to convert the drive signal output by the post-stage controller or the feedback signal of the post-stage controller into a detection signal.

10. The power converter according to claim 8, characterized in that: The post-stage controller includes an LLC resonant converter, an asymmetric resonant half-bridge flyback converter, a phase-shifted full-bridge and a post-stage controller with optocoupler feedback.

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