Host transceiver circuit and communication system

Abstract

The present invention relates to the field of M-Bus communication technology of power collection terminal bus, and discloses a host transceiver circuit and a communication system, wherein the host transceiver circuit includes: a transmitting circuit, a transmitting gating circuit, a receiving circuit and an overvoltage detection circuit, wherein the transmitting circuit switches the output voltage level when receiving the output signal of the host, and outputs a stable voltage signal after stabilizing the power supply voltage; the transmitting gating circuit is used to switch the switch state based on the enable signal, so that the corresponding output terminal outputs a voltage signal; the receiving circuit is used to limit the voltage difference between the buses when the current of the bus increases, and outputs a first level signal to the host after processing the current signal; the overvoltage detection circuit outputs a second level signal when determining that the detection voltage signal is greater than the voltage threshold, so that the host stops outputting the transmitting gating circuit. The present invention can ensure the stability of the output voltage of the transmitting circuit, increase the number of slaves on the bus, and improve the reliability of the transceiver circuit.

Description

Technical Field

[0001] The present invention relates to the technical field of power collection terminal bus M-Bus communication, and in particular to a host transceiver circuit and a communication system. Background Art

[0002] In the M-Bus technical protocol, the voltage on the bus is required to be less than or equal to 42V when the number is transmitted (the slave is not communicating), and the bus voltage is greater than or equal to 12V when the number is empty (the slave is communicating), which is set as U1. The voltage requirement when the number is transmitted is greater than 10V when the number is empty, that is, when there is no slave, the voltage difference △U on the two buses should be greater than 22V and less than or equal to 42V. Since the bus needs to provide power to the slave, the signal sent by the slave to the host is represented by the change of current value. If the sampling resistor value is too large, then when the number of slaves on the bus increases, the voltage difference U between the two buses of the M-Bus will decrease sharply, and then no longer meet the voltage difference requirements in the technical protocol, affecting signal transmission. However, if the sampling resistor value is too small, the received current signal will be converted into a voltage signal through the sampling resistor, and its amplitude will be small and difficult to identify. Summary of the invention

[0003] Therefore, the technical problem to be solved by the present invention is to solve the problem of low load capacity of the M-Bus transceiver circuit in the prior art, thereby providing a host transceiver circuit and a communication system.

[0004] In order to achieve the above object, the present invention provides the following technical solutions:

[0005] In a first aspect, the present invention provides a host transceiver circuit, including: a transmitting circuit, a transmitting selection circuit, a receiving circuit and an overvoltage detection circuit, wherein the input end of the transmitting circuit inputs the output signal of the host, the output end of the transmitting circuit is connected to the input end of the transmitting selection circuit, and the power supply end of the transmitting circuit receives an external power supply voltage; when the transmitting circuit receives the output signal of the host, the transmitting circuit switches the output voltage level, and outputs a stably changing voltage signal after stabilizing the power supply voltage; the control end of the transmitting selection circuit receives the enable signal of the host, each output end of the transmitting selection circuit is respectively connected to a slave group and a bus, and the transmitting selection circuit is used to switch the switch state based on the enable signal so that its corresponding output end outputs a voltage signal, and The slave unit connected to the output end is put into the bus and outputs a current signal; the input end of the receiving circuit inputs the current signal of the bus, the first end of the receiving circuit is connected to the input end of the overvoltage detection circuit, the output end of the receiving circuit is connected to the input end of the host, the receiving circuit is used to limit the voltage difference between the buses when the current of the bus increases, and after processing the current signal, switches its own on-off state and outputs a first level signal to the host; the output end of the overvoltage detection circuit is connected to the detection end of the host, and the overvoltage detection circuit is used to compare the detection voltage signal of the first end of the receiving circuit with the voltage threshold; when the overvoltage detection circuit determines that the detection voltage signal is greater than the voltage threshold, the overvoltage detection circuit outputs a second level signal, so that the host stops outputting the enable signal.

[0006] The host transceiver circuit provided by the present invention has a transmitting circuit capable of performing voltage stabilization processing on the output signal of the host to ensure the stability of the host output voltage; a receiving circuit capable of limiting the voltage difference between the buses when the current of the buses increases to ensure that the voltage difference between the two buses changes less when the current on the buses increases, thereby increasing the number of slave groups connected to the buses; when the current on the buses exceeds the threshold value that the bus can withstand, the overvoltage detection circuit controls the host to stop outputting an enable signal according to the current on the buses, thereby limiting the number of slave groups put into operation, avoiding the number of slaves on the buses far exceeding the design standard that the buses can withstand, and improving the reliability of the host transceiver circuit.

[0007] In an optional embodiment, the sending circuit includes: a power protection circuit, an LDO output circuit, a bus protection circuit and a control and regulation circuit, wherein a first end of the power protection circuit receives an external power supply voltage, a second end of the power protection circuit is connected to the first end of the LDO output circuit, and the power protection circuit is used to limit the magnitude of the power supply current; the second end of the LDO output circuit is connected to the first end of the control and regulation circuit, and the third end of the LDO output circuit is connected to the second end of the control and regulation circuit; the second end of the control and regulation circuit is also connected to the first end of the bus protection circuit, and the input end of the control and regulation circuit inputs the output signal of the host; the second end of the bus protection circuit is connected to the input end of the sending enable circuit, and the bus protection circuit is used to limit the magnitude of the voltage input to the sending enable circuit; when the control and regulation circuit receives the output signal of the host, the control and regulation circuit is turned on, and by adjusting the resistance of the control and regulation circuit, the third end of the LDO output circuit switches the output voltage level and outputs a stable voltage signal.

[0008] The host transceiver circuit provided by the present invention utilizes an LDO output circuit to improve the stability of the output voltage, and outputs a stable voltage signal of a desired magnitude by adjusting the resistance value of the control adjustment circuit.

[0009] In an optional embodiment, the control and regulation circuit includes: a first optocoupler isolation circuit, a first switch circuit and a first voltage divider circuit, wherein the input end of the first optocoupler isolation circuit inputs the output signal of the host, and the output end of the first optocoupler isolation circuit is connected to the control end of the first switch circuit; the first end of the first switch circuit is connected to the first end of the first voltage divider circuit; the second end and the third end of the first voltage divider circuit are respectively connected to the second end and the third end of the LDO output circuit; when the first optocoupler isolation circuit receives the output signal of the host, the first optocoupler isolation circuit is turned on, the first switch circuit is turned on, and by adjusting the resistance value of the first voltage divider circuit, the third end of the LDO output circuit switches the output voltage level and outputs a stable voltage signal.

[0010] In an optional embodiment, the transmitting selection circuit includes multiple transmitting branch circuits; the input end of each transmitting branch circuit inputs a voltage signal, the output end of each transmitting branch circuit is connected to a bus and a slave unit, and the control end of each transmitting branch circuit receives an enable signal; the transmitting branch circuit is used to switch the switch state based on the enable signal, so that its output end outputs a voltage signal, and the slave unit connected to its output end is put into the bus and outputs a current signal.

[0011] The host transceiver circuit provided by the present invention has an output end of each sending branch circuit connected to a group of slaves through a bus, each sending branch circuit can be turned on according to an enable signal of the host, and a voltage signal output by the sending circuit is input into the connected slave group, so that the slave group starts to work. The slave group is selected by multiple sending branch circuits to avoid all slave groups being put into the bus, and to avoid the master station powering the bus for a long time, thereby reducing the power consumption of the whole machine.

[0012] In an optional embodiment, the sending branch circuit includes: a second switch unit and a third switch unit, wherein the first end of the second switch unit receives an enable signal, and the second end of the second switch unit is connected to the control end of the third switch unit; the first end of the third switch unit receives a voltage signal of the sending circuit, and the second end of the third switch unit is connected to a bus and a slave unit; when the second switch unit is turned on based on the enable signal, the third switch unit is turned on, so that the voltage signal at the first end of the third switch unit is output through the second end of the third switch unit.

[0013] In an optional embodiment, the second switch unit includes: a second optocoupler isolation circuit and a second switch circuit, wherein an enable signal is input into the input end of the second optocoupler isolation circuit, and the output end of the second optocoupler isolation circuit is connected to the control end of the second switch circuit; the first end of the second switch circuit is connected to the control end of the third switch unit; when the second optocoupler isolation circuit receives the enable signal, the second optocoupler isolation circuit is turned on, so that the second switch circuit is turned on.

[0014] In an optional embodiment, the receiving circuit includes: a first sampling circuit, a filtering circuit, an amplifying circuit, a second voltage dividing circuit, a first comparing circuit and a level conversion circuit, wherein the first end of the first sampling circuit collects the current signal of the bus, the second end of the first sampling circuit is connected to the first end of the filtering circuit and the input end of the overvoltage detection circuit, and the first sampling circuit is used to convert the current signal of the bus into a sampling voltage signal; the second end of the filtering circuit is connected to the input end of the amplifying circuit, and the filtering circuit is used to filter out interference in the sampling voltage signal; the output end of the amplifying circuit is connected to the first end of the second voltage dividing circuit, and the amplifying circuit is used to amplify the filtered sampling voltage signal; the negative input end of the first comparing circuit receives the first reference voltage, the output end of the first comparing circuit is connected to the input end of the level conversion circuit, and the first comparing circuit is used to output a third level signal when the sampling voltage signal after voltage division is greater than the first reference voltage; the output end of the level conversion circuit is connected to the input end of the host, and the level conversion circuit is used to output the first level signal based on the third level signal.

[0015] In an optional embodiment, the first sampling circuit includes a sampling resistor; the resistance of the sampling resistor is less than or equal to the ratio of the minimum voltage difference between the buses to the maximum current of the buses when the signal is empty, and the power of the sampling resistor is greater than or equal to a preset multiple of the product of the square of the bus current and the resistance of the sampling resistor.

[0016] In the host transceiver circuit provided by the present invention, the sampling resistor uses a low-resistance resistor, which can ensure that when the current on the bus increases, the voltage difference between the two buses changes slightly, thereby increasing the number of slaves.

[0017] In an optional embodiment, the filtering circuit includes: a magnetic bead, a bandpass filtering unit and a high-frequency filtering unit, wherein the first end of the magnetic bead is connected to the second end of the first sampling circuit, the second end of the magnetic bead is connected to the first end of the bandpass filtering unit, and the magnetic bead is used to filter out high-frequency noise in the sampling voltage; the second end of the bandpass filtering unit is connected to the first end of the high-frequency filtering unit and the input end of the amplifier circuit, the third end of the bandpass filtering unit is connected to the second end of the high-frequency filtering unit and then grounded, and the bandpass filtering unit is used to filter out the pulse signal in the sampling voltage; the high-frequency filtering unit is used to filter out the high-frequency signal in the pulse signal.

[0018] The host transceiver circuit provided by the present invention performs multiple filtering on the sampled voltage through magnetic beads, a bandpass filter unit and a high-frequency filter unit, thereby effectively filtering out high-frequency noise and improving the quality of the sampled voltage.

[0019] In an optional embodiment, the overvoltage detection circuit includes: a third voltage divider circuit and a second comparison circuit, wherein the first end of the third voltage divider circuit collects the detection voltage signal of the first end of the receiving circuit, the second end of the third voltage divider circuit is connected to the positive input end of the second comparison circuit, and the third voltage divider circuit is used to divide the detection voltage; the negative input end of the second comparison circuit receives the second reference voltage, and the output end of the second comparison circuit is connected to the detection end of the host; when the second comparison circuit determines that the detection voltage signal is greater than the second reference voltage, the second comparison circuit outputs a second level signal, so that the host stops outputting the enable signal.

[0020] In a second aspect, the present invention provides a communication system, comprising: a host, multiple slave groups and the host transceiver circuit of the first aspect, wherein the input end of the sending circuit inputs the output signal of the host, the output end of the overvoltage detection circuit is connected to the detection end of the host, and the output end of the receiving circuit is connected to the input end of the host; the control end of the sending selection circuit receives the enable signal of the host; the control end of each slave group is connected to an output end of the sending selection circuit through a bus; when the host needs to communicate with the corresponding slave group, the host outputs an output signal and an enable signal, so that after the corresponding slave group is put into the bus and outputs a current signal, the host receives the first level signal output by the receiving circuit.

[0021] The communication system provided by the present invention and the host transceiver circuit provided by the present invention, the sending circuit can perform voltage stabilization processing on the output signal of the host to ensure the stability of the host output voltage; the receiving circuit can limit the voltage difference between the buses when the current of the bus increases, to ensure that when the current on the bus increases, the voltage difference between the two buses changes less, thereby increasing the number of slave groups connected to the bus; when the current on the bus exceeds the threshold value that it can withstand, the overvoltage detection circuit controls the host to stop outputting the enable signal according to the current size on the bus, thereby limiting the number of slave groups put into use, avoiding the number of slaves on the bus far exceeding the design standard that the bus can withstand, and improving the reliability of the communication system. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0023] Figure 1 is a composition diagram of a specific example of a host transceiver circuit according to an embodiment of the present invention;

[0024] Figure 2 is a structural diagram of a specific circuit of a sending circuit according to an embodiment of the present invention;

[0025] Figure 3 is a composition diagram of another specific example of a host transceiver circuit according to an embodiment of the present invention;

[0026] Figure 4 is a structural diagram of a specific circuit of a sending branch circuit according to an embodiment of the present invention;

[0027] Figure 5 is a structural diagram of a specific circuit of a receiving circuit according to an embodiment of the present invention;

[0028] Figure 6 is a structural diagram of a specific circuit of an overvoltage detection circuit according to an embodiment of the present invention;

[0029] Figure 7 is a composition diagram of a specific example of a communication system according to an embodiment of the present invention. DETAILED DESCRIPTION

[0030] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0031] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0032] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can also be the internal connection of two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0033] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0034] In the M-Bus technical protocol, the voltage requirement on the bus when transmitting a number (the slave is not communicating) is less than or equal to 42V, and the bus voltage is greater than or equal to 12V when the number is empty (the slave is communicating), which is set to U1. The voltage requirement when transmitting a number is greater than 10V when the number is empty, that is, when there is no slave, the voltage difference ΔU on the two buses should be greater than 22V and less than or equal to 42V. Since the bus needs to provide power to the slave, the signal sent by the slave to the host is represented by the change in current value. If the sampling resistor is too large, then when the number of slaves on the bus increases, the voltage difference ΔU between the two buses of the M-Bus will decrease sharply, and then no longer meet the voltage difference requirement in the technical protocol, affecting signal transmission. However, if the sampling resistor is too small, the received current signal will be converted into a voltage signal through the sampling resistor, and its amplitude will be small and difficult to identify. Based on this, this embodiment provides a host transceiver circuit that communicates using the M-Bus bus protocol, such as Figure 1 As shown, it includes: a sending circuit 1, a sending selection circuit 2, a receiving circuit 3 and an overvoltage detection circuit 4.

[0035] like Figure 1 As shown, the input end of the sending circuit 1 inputs the output signal of the host, the output end of the sending circuit 1 is connected to the input end of the sending selection circuit 2, and the power supply end of the sending circuit 1 receives the external power supply voltage.

[0036] Specifically, Figure 1 In the example, when the sending circuit 1 receives the output signal of the host, the sending circuit 1 switches the output voltage level, and outputs a stable voltage signal after stabilizing the power supply voltage. The sending circuit 1 includes a voltage stabilizing structure, which can be an electronic switch circuit, a voltage follower circuit, a voltage stabilizer, etc.

[0037] Figure 1 In the embodiment, the control end of the transmission selection circuit 2 receives the enable signals (CTRL_SW1~CTRL_SWn) of multiple hosts, and each output end of the transmission selection circuit 2 is connected to a slave group (#1~#n) and a bus (M-Bus+ and M-Bus-).

[0038] Specifically, Figure 1 In the example, the transmission selection circuit 2 is used to switch the switch state based on the enable signal, so that the corresponding output terminal outputs a voltage signal, and the slave unit connected to the output terminal is put into the bus and outputs a current signal. For example, when the host outputs the output enable signal CTRL_SW1, it means that the slave unit #1 needs to start working, and the transmission selection circuit 2 controls the circuit between the input terminal and the output terminal connected to the slave unit #1 to be turned on, so that the voltage signal output by the transmission circuit 1 is input to the slave unit #1.

[0039] It should be noted that the slave unit in this embodiment may be a plurality of water meters. When any slave unit receives the voltage signal output by the transmitting circuit 1, the water meter in the slave unit starts to read the water.

[0040] Figure 1 In the embodiment, the input end of the receiving circuit 3 inputs the current signal of the bus, the first end of the receiving circuit 3 is connected to the input end of the overvoltage detection circuit 4, and the output end of the receiving circuit 3 is connected to the input end of the host.

[0041] Specifically, Figure 1 In the embodiment, the receiving circuit 3 is used to limit the voltage difference between the buses when the current of the bus increases, and after filtering, amplifying, comparing and other processing of the current signal, switches its on / off state and outputs a first level signal to the host. When the bus current increases, the internal resistance of the receiving circuit 3 is small. When the number of slaves added to the bus increases, the bus current increases, and the voltage difference between the buses changes less, thereby increasing the number of slaves that can be added to the bus.

[0042] Figure 1In the embodiment, the output end of the overvoltage detection circuit 4 is connected to the detection end of the host, and the overvoltage detection circuit 4 is used to compare the detection voltage signal of the first end of the receiving circuit 3 with the voltage threshold.

[0043] Specifically, Figure 1 In the embodiment, when the overvoltage detection circuit 4 determines that the detection voltage signal is greater than the voltage threshold, it indicates that the current on the bus is too high and greater than the threshold current that the bus can withstand. At this time, the overvoltage detection circuit 4 outputs a second level signal, causing the host to stop outputting the enable signal, controlling the transmission selection circuit 2 to close all output terminals, and all slave units to exit operation. Therefore, when the transmission selection circuit 2 fails and mistakenly puts multiple slave units into operation, causing the number of slave units on the bus to far exceed the design standard, the overvoltage detection circuit 4 can detect the fault in time, control the slave units to exit the bus in time, and protect the bus from being damaged by large current.

[0044] The host transceiver circuit provided in this embodiment has a transmitting circuit 1 that can stabilize the output signal of the host to ensure the stability of the host output voltage; the receiving circuit 3 can limit the voltage difference between the buses when the current of the bus increases, to ensure that when the current on the bus increases, the voltage difference between the two buses changes less, thereby increasing the number of slave groups connected to the bus; when the current on the bus exceeds the threshold value that it can withstand, the overvoltage detection circuit 4 controls the host to stop outputting the enable signal according to the current on the bus, thereby limiting the number of slave groups put into use, avoiding the number of slaves on the bus far exceeding the design standard that the bus can withstand, and improving the reliability of the host transceiver circuit.

[0045] In some optional embodiments, such as Figure 2 As shown, the sending circuit 1 includes: a power protection circuit 11, an LDO output circuit 12, a bus protection circuit 13 and a control and regulation circuit 14, wherein a first end of the power protection circuit 11 receives an external power supply voltage, and a second end of the power protection circuit 11 is connected to a first end of the LDO output circuit 12; a second end of the LDO output circuit 12 is connected to a first end of the control and regulation circuit 14, and a third end of the LDO output circuit 12 is connected to a second end of the control and regulation circuit 14; a third end of the control and regulation circuit 14 is connected to a first end of the bus protection circuit 13, and an input end of the control and regulation circuit 14 inputs an output signal TX_UART_MBUS of the host; a second end of the bus protection circuit 13 (i.e., an end outputting MBUS+) is connected to an input end of the sending selection circuit 2.

[0046] Specifically, Figure 2In the embodiment, the power protection circuit 11 is used to limit the power current; the bus protection circuit 13 is used to limit the current input to the transmission selection circuit 2; when the control and regulation circuit 14 receives the output signal TX_UART_MBUS of the host, the control and regulation circuit 14 is turned on, and by adjusting the resistance value of the internal resistance of the control and regulation circuit 14, the third end of the LDO output circuit 12 switches the output voltage level and outputs a stable voltage signal to the bus protection circuit 13.

[0047] Specifically, Figure 2 In the embodiment, the control and regulation circuit 14 includes: a first optocoupler isolation circuit 141, a first switch circuit 142 and a first voltage divider circuit 143, wherein the input end of the first optocoupler isolation circuit 141 inputs the output signal TX_UART_MBUS of the host, and the output end of the first optocoupler isolation circuit 141 is connected to the control end of the first switch circuit 142; the first end of the first switch circuit 142 is connected to the first end of the first voltage divider circuit 143; the second end and the third end of the first voltage divider circuit 143 are respectively connected to the second end and the third end of the LDO output circuit 12.

[0048] Specifically, Figure 2 In the figure, the first optical coupler isolation circuit 141 includes a resistor R26, a capacitor C15, and an optical coupler U5. The first switch circuit 142 includes resistors R27 and R28, a capacitor C14, and a transistor V4. The first voltage divider circuit 143 includes resistors R23, R24 and R25, and a capacitor C13. The external power supply 36V provides power to the M-Bus bus through the power protection circuit 11 and the LDO output circuit 12 and communicates through the sending selection circuit 2. The ADJ pin of the LDO output circuit 12 is the adjustment port, and its feedback voltage is V REF , the leakage current is I ADJ , the output voltage V of the LDO output circuit 12 out =V REF × (1 + R24 / R23) + I ADJ ×R24, when R24 is much larger than R23, the output voltage V out Slightly smaller than the input voltage V of the LDO output circuit 12 IN , to ensure that when there is no communication, V4 is not conducting, V out ≈35V.

[0049] Specifically, Figure 2 In the example, when the host outputs the output signal TX_UART_MBUS, after the resistor R26 limits the current and the capacitor C15 filters, the optocoupler U5 is turned on, and the high-level signal turns on the transistor V4. Since R24 and R25 are connected in parallel, the output voltage V out ≈V REF×(1+(R24×R25) / (R23×(R24+R25))+I ADJ × (R24 × R25) / (R24 + R25), by adjusting the value of R25, the output voltage of the LDO output circuit 12 can be controlled to 23V. When the transistor V4 is turned off, the LDO continues to output 35V to realize the output of the host signal.

[0050] Optionally, Figure 2 In the embodiment, the power protection circuit 11 includes a resettable fuse R38 , and the bus protection circuit 13 includes a TVS tube D4 and a thermistor RT2 , which are used to protect the M-Bus bus and the LDO output circuit 12 .

[0051] In some optional embodiments, such as Figure 3 As shown, the transmission selection circuit 2 includes multiple transmission branch circuits (21~2n); the input end of each transmission branch circuit inputs the voltage signal MBUS+, the output end of each transmission branch circuit is connected to the bus and a slave group, and the control end of each transmission branch circuit receives an enable signal (CTRL_SW1~CTRL_SWn).

[0052] Specifically, Figure 2 In the example, the sending branch circuit is used to switch the switch state based on the enable signal so that its output terminal outputs a voltage signal U MBUS+ , and the slave unit connected to its output terminal is put into the bus and outputs a current signal. For example, when the host starts communicating, the sending circuit 1 outputs a voltage signal U MBUS+ To each sending branch circuit, when it is necessary to work from unit #1, the host outputs the output enable signal CTRL_SW1 to the sending branch circuit 21, so that the sending branch circuit 21 is turned on, and other sending branch circuits remain in the off state, then the sending branch circuit 21 will output the voltage signal U MBUS+ The bus input is sent to slave unit #1 to put it into the bus and start working.

[0053] In some optional embodiments, such as Figure 4 As shown, taking the sending branch circuit 21 as an example, the sending branch circuit 21 includes: a second switch unit 211 and a third switch unit 212, wherein the first end of the second switch unit 211 receives the enable signal CTRL_SW1, the second end of the second switch unit 211 is connected to the control end of the third switch unit 212; the first end of the third switch unit 212 is connected to the voltage signal U of the receiving sending circuit 1 MBUS+ , the second end (i.e., MBUS1+ end) of the third switch unit 212 is connected to the bus and a slave group #1; when the second switch unit 211 is turned on based on the enable signal CTRL_SW1, the third switch unit 212 is turned on, so that the voltage signal U at the first end of the third switch unit 212MBUS+ The signal is outputted through the second terminal of the third switch unit 212 .

[0054] Specifically, Figure 4 In the embodiment, the second switch unit 211 includes: a second optocoupler isolation circuit 2111 and a second switch circuit 2112, wherein an enable signal CTRL_SW1 is input to an input end of the second optocoupler isolation circuit 2111, and an output end of the second optocoupler isolation circuit 2111 is connected to a control end of the second switch circuit 2112; a first end of the second switch circuit 2112 is connected to a control end of the third switch unit 212; when the second optocoupler isolation circuit 2111 receives the enable signal CTRL_SW1, the second optocoupler isolation circuit 2111 is turned on, so that the second switch circuit 2112 is turned on.

[0055] Specifically, Figure 4 In the embodiment, the second optical coupler isolation circuit 2111 includes an optical coupler U3 and a resistor R21, the second switch circuit 2112 includes resistors R23 and R22, a capacitor C12, and a transistor V3, and the third switch unit 212 includes a relay K1. When there is an enable signal CTRL_SW1, the optical coupler U3 is turned on, so that after the second switch circuit 2112 is turned on, the relay K1 is energized to control the contact to close, so that the voltage signal MBUS+ is input to the slave group #1 through the MBUS1+ terminal and the bus.

[0056] In some optional embodiments, such as Figure 5 As shown, the receiving circuit 3 includes: a first sampling circuit 31 , a filtering circuit 32 , an amplifying circuit 33 , a second voltage dividing circuit 34 , a first comparing circuit 35 and a level converting circuit 36 ​​.

[0057] Figure 5 In the example, the first terminal of the first sampling circuit 31 collects the current signal I of the bus. MBUS- The second end of the first sampling circuit 31 is connected to the first end of the filter circuit 32 and the input end of the overvoltage detection circuit 4. The first sampling circuit 31 is used to convert the current signal of the bus into a sampling voltage signal.

[0058] Optionally, the first sampling circuit may include a sampling resistor, which is used to collect the current on the bus, and based on the voltage drop generated by the current, convert it into a sampling voltage signal and input it into the filter circuit. The sampling resistor is selected to be a resistor with small resistance and high power, and its resistance is less than or equal to the ratio of the minimum voltage difference of the bus to the maximum current of the bus when the number is empty, and the power of the first sampling circuit 31 is greater than or equal to 2 times the product of the square of the bus current and the resistance of the first sampling circuit 31, so as to ensure that the sampling resistor will not be damaged when the maximum current is passed through the bus for a long time; the reduction of the resistance of the sampling resistor can also reduce the power consumption of the M-Bus bus, reduce the change of its own parameters caused by the heating of the sampling resistor, and the first sampling circuit no longer needs an additional power supply, thereby reducing the cost.

[0059] Figure 5 In the embodiment, the second end of the filter circuit 32 is connected to the input end of the amplifier circuit 33, and the filter circuit 32 is used to filter out the valid signal on the bus and filter out the interference signal.

[0060] Specifically, Figure 5 In the figure, the filtering circuit 32 includes: a magnetic bead L2, a bandpass filtering unit 321 and a high-frequency filtering unit 322, wherein the first end of the magnetic bead L2 is connected to the second end of the first sampling circuit 31, the second end of the magnetic bead L2 is connected to the first end of the bandpass filtering unit 321, and the magnetic bead L2 is used to filter out the high-frequency noise in the sampling voltage; the second end of the bandpass filtering unit 321 is connected to the first end of the high-frequency filtering unit 322 and the input end of the amplifier circuit 33, the third end of the bandpass filtering unit 321 is connected to the second end of the high-frequency filtering unit 322 and then grounded, and the bandpass filtering unit 321 is used to filter out the pulse signal in the sampling voltage; the high-frequency filtering unit 322 is used to filter out the high-frequency signal in the pulse signal.

[0061] Specifically, Figure 5 In the embodiment, the bandpass filter unit 321 includes resistors R35 and R37, capacitors C17 and C20, and the high frequency filter unit 322 includes capacitor C18.

[0062] Figure 5 In the embodiment, the output end of the amplifier circuit 33 is connected to the first end of the second voltage divider circuit 34, and the amplifier circuit 33 is used to amplify the filtered sampling voltage signal.

[0063] Specifically, Figure 5 In the figure, the amplifier circuit 33 includes an operational amplifier U6A, resistors R30 and R31, and the second voltage divider circuit 34 includes resistors R32 and R29, and a capacitor C16. The operational amplifier U6A amplifies the sampling voltage signal in the form of a pulse signal at the positive input terminal by a preset multiple and inputs it to the second voltage divider circuit 34. The signal is divided by resistors R32 and R29 and filtered by capacitor C16 and then input to the positive input terminal of the first comparison circuit 35.

[0064] Figure 5 In the embodiment, the negative input terminal of the first comparison circuit 35 receives the first reference voltage, the output terminal of the first comparison circuit 35 is connected to the input terminal of the level conversion circuit 36, and the first comparison circuit 35 is used to output a third level signal when the sampled voltage signal after voltage division is greater than the first reference voltage.

[0065] Specifically, Figure 5In the figure, the first reference voltage in the first comparison circuit 35 is obtained by dividing the 5V power supply through resistors R39 and R41, and is input to the negative input terminal of the operational amplifier U6B. The operational amplifier U6B compares the sampling voltage input at the positive input terminal with the first reference voltage. When the sampling voltage is greater than the first reference voltage, the operational amplifier U6B outputs a high-level third-level signal, otherwise it outputs a low-level signal.

[0066] Figure 5 In the embodiment, the output end of the level conversion circuit 36 ​​is connected to the input end of the host, and the level conversion circuit 36 ​​is used to output the first level signal based on the third level signal.

[0067] Specifically, Figure 5 In the figure, the level conversion circuit 36 ​​includes resistors R36, R43, R33, R34, R40 and R42, capacitors C19 and C22, transistors V5 and V6, and optocoupler U7. When the operational amplifier U6B outputs a high level, the transistor V6 is turned on, the optocoupler U7 is turned on, so that V5 is turned on, a path is formed between the input end of the host and the ground, and a low level signal is received; when the operational amplifier U6B outputs a low level, the transistor V6 is turned off, the optocoupler U7 is turned off, so that V5 is turned off, and the input end of the host receives a high level signal.

[0068] In some optional embodiments, such as Figure 6 As shown, the overvoltage detection circuit 4 includes: a third voltage divider circuit 41 and a second comparison circuit 42, wherein the first end of the third voltage divider circuit 41 collects the detection voltage signal of the first end of the receiving circuit 3, the second end of the third voltage divider circuit 41 is connected to the positive input end of the second comparison circuit 42, and the third voltage divider circuit 41 is used to divide the detection voltage signal; the negative input end of the second comparison circuit 42 receives the second reference voltage, and the output end of the second comparison circuit 42 is connected to the detection end of the host.

[0069] Specifically, Figure 6 In the embodiment, the second reference voltage is 5V voltage obtained by dividing the voltage through resistors R46 and R47, capacitor C23 plays a filtering role, the second comparison circuit 42 also includes resistors R44, R45 and R48, diode D5 and operational amplifier U8A, the third voltage divider circuit 41 is composed of capacitor C24, voltage zener diode D6 and resistors R49 and R50, capacitor C24 and voltage zener diode D6 are used to prevent the negative input terminal voltage of operational amplifier U8A from being too large to damage operational amplifier U8A. The detection voltage signal U of the first end of the receiving circuit 3 MBUS- After being divided by resistors R49 and R50, it is input to the inverting input terminal of the operational amplifier U8A. When the current on the bus increases, the detection voltage signal U obtained by the third voltage divider circuit 41 is MBUS- The operational amplifier U8A detects the voltage signal UMBUS- Compared with the second reference voltage, when the operational amplifier U8A determines that the detection voltage signal U MBUS- When it is greater than the second reference voltage, it outputs a low-level second level signal, causing the diode D5 to conduct. After receiving the second level signal, the detection end of the host stops outputting the enable signal, controls the release of the relays in all the sending branch circuits, and controls all the slave units to exit the bus.

[0070] This embodiment provides a communication system, such as Figure 7 As shown, it includes: a host 5, multiple slave groups (#1~#n) and the host transceiver circuit of the above embodiments and any optional implementation methods thereof, wherein the input end of the sending circuit 1 inputs the output signal of the host 5, the output end of the overvoltage detection circuit 4 is connected to the detection end of the host 5, and the output end of the receiving circuit 3 is connected to the input end of the host 5; the control end of the sending selection circuit 2 receives the enable signal of the host 5; and the control end of each slave group is connected to an output end of the sending selection circuit 2 through a bus.

[0071] Specifically, Figure 7 When the host 5 needs to communicate with the corresponding slave group, the host 5 outputs an output signal and an enable signal, so that after the corresponding slave group is put into the bus and outputs a current signal, the host receives the first level signal output by the receiving circuit 3 to complete the communication with the slave.

[0072] Optionally, in this embodiment, each slave unit may be composed of a plurality of water meters. When the slave unit is put into the bus, each water meter in the slave unit starts to be read.

[0073] The communication system provided in this embodiment and the host transceiver circuit provided in the present invention, the sending circuit can stabilize the output signal of the host to ensure the stability of the host output voltage; the receiving circuit can limit the voltage difference between the buses when the current of the bus increases, to ensure that when the current on the bus increases, the voltage difference between the two buses changes less, thereby increasing the number of slave groups connected to the bus; when the current on the bus exceeds the threshold value that it can withstand, the overvoltage detection circuit controls the host to stop outputting the enable signal according to the current size on the bus, only one slave group will be turned on at a time, and the slave group will be disconnected after the enable signal is turned off, thereby limiting the number of slave groups put into use, avoiding the number of slaves on the bus from far exceeding the design standard that the bus can withstand, and improving the reliability of the communication system.

[0074] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A host transceiver circuit, characterized in that: include: Transmitting circuit, transmitting gating circuit, receiving circuit and overvoltage detection circuit, wherein: The input end of the transmitting circuit inputs the output signal of the host, the output end of the transmitting circuit is connected to the input end of the transmitting selection circuit, and the power supply end of the transmitting circuit receives the external power supply voltage; when the transmitting circuit receives the output signal of the host, the transmitting circuit switches the output voltage level, and outputs a stably changing voltage signal after stabilizing the power supply voltage; The control end of the transmission gating circuit receives the enable signal of the host, each output end of the transmission gating circuit is connected to a slave group and a bus respectively, and the transmission gating circuit is used to switch the switch state based on the enable signal so that the corresponding output end outputs the voltage signal and the slave group connected to the output end is put into the bus and outputs the current signal; The input end of the receiving circuit inputs the current signal of the bus, the first end of the receiving circuit is connected to the input end of the overvoltage detection circuit, the output end of the receiving circuit is connected to the input end of the host, the receiving circuit is used to limit the voltage difference between the buses when the current of the bus increases, and after processing the current signal, switch its own on-off state and output a first level signal to the host; The output end of the overvoltage detection circuit is connected to the detection end of the host, and the overvoltage detection circuit is used to compare the detection voltage signal of the first end of the receiving circuit with the voltage threshold; when the overvoltage detection circuit determines that the detection voltage signal is greater than the voltage threshold, the overvoltage detection circuit outputs a second level signal, so that the host stops outputting the enable signal; The receiving circuit comprises: a first sampling circuit; The first end of the first sampling circuit collects the current signal of the bus, the second end of the first sampling circuit is connected to the input end of the overvoltage detection circuit, and the first sampling circuit is used to convert the current signal of the bus into a sampled voltage signal; The first sampling circuit includes a sampling resistor; The resistance of the sampling resistor is less than or equal to the ratio of the minimum voltage difference between the buses to the maximum current of the buses when the number is empty, and the power of the sampling resistor is greater than or equal to a preset multiple of the product of the square of the bus current and the resistance of the sampling resistor; When the number of slaves connected to the bus increases so that the bus current rises, the sampling resistor is used to limit the voltage difference change between the buses.

2. The host transceiver circuit according to claim 1, characterized in that: The sending circuit includes: a power protection circuit, an LDO output circuit, a bus protection circuit and a control and regulation circuit, wherein: The first end of the power protection circuit receives an external power supply voltage, the second end of the power protection circuit is connected to the first end of the LDO output circuit, and the power protection circuit is used to limit the current of the external power supply; The second end of the LDO output circuit is connected to the first end of the control and regulation circuit, and the third end of the LDO output circuit is connected to the second end of the control and regulation circuit; The second end of the control and regulation circuit is also connected to the first end of the bus protection circuit, and the input end of the control and regulation circuit inputs the output signal of the host; The second end of the bus protection circuit is connected to the input end of the transmission gating circuit, and the bus protection circuit is used to limit the voltage input to the transmission gating circuit; When the control and regulation circuit receives the output signal of the host, the control and regulation circuit is turned on, and by adjusting the resistance of the control and regulation circuit, the third end of the LDO output circuit switches the output voltage level and outputs a stable voltage signal.

3. The host transceiver circuit according to claim 2, characterized in that: The control and regulation circuit includes: a first optical coupling isolation circuit, a first switch circuit and a first voltage divider circuit, wherein: The input end of the first optical coupling isolation circuit inputs the output signal of the host, and the output end of the first optical coupling isolation circuit is connected to the control end of the first switch circuit; The first end of the first switch circuit is connected to the first end of the first voltage divider circuit; The second end and the third end of the first voltage divider circuit are connected to the second end and the third end of the LDO output circuit respectively; When the first optocoupler isolation circuit receives the output signal of the host, the first optocoupler isolation circuit is turned on, the first switch circuit is turned on, and the resistance value of the first voltage divider circuit is adjusted so that the third end of the LDO output circuit switches the output voltage level and outputs a stable voltage signal.

4. The host transceiver circuit according to claim 1, characterized in that: The transmission gating circuit includes a plurality of transmission branch circuits; The input end of each of the sending branch circuits inputs the voltage signal, the output end of each of the sending branch circuits is connected to the bus and a slave unit, and the control end of each of the sending branch circuits receives the enable signal; The sending branch circuit is used to switch the switch state based on the enable signal, so that its output end outputs the voltage signal, and the slave unit connected to its output end is put into the bus and outputs a current signal.

5. The host transceiver circuit according to claim 4, characterized in that: The sending branch circuit includes: a second switch unit and a third switch unit, wherein: The first end of the second switch unit receives the enable signal, and the second end of the second switch unit is connected to the control end of the third switch unit; The first end of the third switch unit receives the voltage signal of the sending circuit, and the second end of the third switch unit is connected to the bus and a slave unit; When the second switch unit is turned on based on the enable signal, the third switch unit is turned on, so that the voltage signal at the first end of the third switch unit is output through the second end of the third switch unit.

6. The host transceiver circuit according to claim 5, characterized in that: The second switch unit includes: a second optical coupling isolation circuit and a second switch circuit, wherein: The input end of the second optical coupling isolation circuit inputs the enable signal, and the output end of the second optical coupling isolation circuit is connected to the control end of the second switch circuit; The first end of the second switch circuit is connected to the control end of the third switch unit; When the second optocoupler isolation circuit receives the enable signal, the second optocoupler isolation circuit is turned on, so that the second switch circuit is turned on.

7. The host transceiver circuit according to claim 1, characterized in that: The receiving circuit further includes: a filtering circuit, an amplifying circuit, a second voltage dividing circuit, a first comparing circuit and a level converting circuit, wherein: The second end of the first sampling circuit is connected to the first end of the filter circuit, the second end of the filter circuit is connected to the input end of the amplifier circuit, and the filter circuit is used to filter out interference in the sampled voltage signal; The output end of the amplifier circuit is connected to the first end of the second voltage divider circuit, and the amplifier circuit is used to amplify the filtered sampling voltage signal; The negative input terminal of the first comparison circuit receives a first reference voltage, the output terminal of the first comparison circuit is connected to the input terminal of the level conversion circuit, and the first comparison circuit is used to output a third level signal when the sampled voltage signal after voltage division is greater than the first reference voltage; The output end of the level conversion circuit is connected to the input end of the host, and the level conversion circuit is used to output the first level signal based on the third level signal.

8. The host transceiver circuit according to claim 7, characterized in that: The filter circuit includes: magnetic beads, a bandpass filter unit and a high-frequency filter unit, wherein: The first end of the magnetic bead is connected to the second end of the first sampling circuit, the second end of the magnetic bead is connected to the first end of the bandpass filtering unit, and the magnetic bead is used to filter out high-frequency noise in the sampling voltage; The second end of the bandpass filter unit is connected to the first end of the high-frequency filter unit and the input end of the amplifier circuit, the third end of the bandpass filter unit is connected to the second end of the high-frequency filter unit and then grounded, and the bandpass filter unit is used to filter out the pulse signal in the sampled voltage; The high-frequency filtering unit is used to filter out the high-frequency signal in the pulse signal.

9. The host transceiver circuit according to claim 1, characterized in that: The overvoltage detection circuit comprises: a third voltage divider circuit and a second comparison circuit, wherein: The first end of the third voltage divider circuit collects the detection voltage signal of the first end of the receiving circuit, the second end of the third voltage divider circuit is connected to the positive input end of the second comparison circuit, and the third voltage divider circuit is used to divide the detection voltage; The negative input terminal of the second comparison circuit receives a second reference voltage, and the output terminal of the second comparison circuit is connected to the detection terminal of the host; when the second comparison circuit determines that the detection voltage signal is greater than the second reference voltage, the second comparison circuit outputs a second level signal, so that the host stops outputting the enable signal.

10. A communication system, characterized in that: include: A host, a plurality of slave units, and a host transceiver circuit according to any one of claims 1 to 9, wherein: The input end of the sending circuit inputs the output signal of the host, the output end of the overvoltage detection circuit is connected to the detection end of the host, and the output end of the receiving circuit is connected to the input end of the host; The control end of the transmission gating circuit receives an enable signal of the host; The control end of each slave unit is connected to an output end of the transmission gating circuit through a bus; When the host needs to communicate with the corresponding slave group, the host outputs an output signal and an enable signal, so that after the corresponding slave group is put into the bus and outputs a current signal, the host receives the first level signal output by the receiving circuit.

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