Pulse sequence type sensor pixel unit, pulse sequence type sensor and equipment

Abstract

The embodiment of the invention discloses a pulse sequence type sensor pixel unit, a pulse sequence type sensor and equipment, and the pulse sequence type sensor pixel unit comprises a pulse generation module, a counting module and a reading module. The pulse generation module is used for converting the received optical signal into a pulse signal and sending the pulse signal to the counting module; the counting module is used for receiving the pulse signal through a first input end or a second input end, executing counting according to the overturning condition of the signal input by the first input end, and controlling the counting module to execute resetting according to the signal input by the second input end; the read-out module is used for reading and outputting the counting result in the counting module according to the control of a read-out control signal; according to the embodiment of the invention, lossless compression of output data is realized, the amount of data output by the pixel unit can be reduced under the same frame rate, and a higher frame rate can be realized under the same data bandwidth.

Description

Technical Field

[0001] The present disclosure relates to sensor technology, and in particular to a pulse sequence sensor pixel unit, a pulse sequence sensor and a device. Background Art

[0002] Image sensors have been widely used in digital cameras, mobile phones, medical treatment, automobiles, drones, machine recognition and other fields. In particular, the rapid development of complementary metal oxide semiconductor (CMOS) image sensor technology has led to higher requirements for the output image quality of image sensors. CMOS image sensors can be divided into two categories based on the signal acquisition method: one method is to set the exposure time for the pixel and then measure the change in voltage signal; the second method is to set the voltage change for the pixel and then measure the exposure time. This type of image sensor is called a pulse sequence image sensor. Summary of the invention

[0003] According to one aspect of an embodiment of the present disclosure, there is provided a pulse sequence sensor pixel unit, comprising: a pulse generating module, a counting module and a readout module;

[0004] The pulse generating module is used to convert the received optical signal into a pulse signal and send the pulse signal to the counting module;

[0005] The counting module is used to receive the pulse signal through the first input terminal or the second input terminal, perform counting according to the flipping of the signal inputted from the first input terminal, and control the counting module to perform resetting according to the signal inputted from the second input terminal;

[0006] The readout module is used to read and output the counting result in the counting module according to the control of the readout control signal.

[0007] Optionally, it also includes: a connection module;

[0008] The connection module is used to determine the first connection mode or the second connection mode according to the counting result output by the readout module last time; wherein, in the first connection mode, the pulse generating module is connected to the first input end of the counting module, and in the second connection mode, the pulse generating module is connected to the second input end of the counting module.

[0009] Optionally, the connection module includes: a first switch, a second switch, a third switch and a fourth switch;

[0010] In the first connection mode, when the first switch and the third switch are closed, the second switch and the fourth switch are opened, the external reset signal is input into the second input end of the counting module through the first switch, and the pulse signal is input into the first input end of the counting module through the third switch;

[0011] In the second connection mode, when the second switch and the fourth switch are closed, the first switch and the third switch are opened, the pulse signal is input into the second input end of the counting module through the second switch, and the external clock signal is input into the first input end of the counting module through the fourth switch.

[0012] Optionally, the connection module further includes: a state identification module;

[0013] The state identification module is used to switch from the first connectivity mode to the second connectivity mode in response to the counting result output by the readout module last time reaching a first preset condition; and to switch from the second connectivity mode to the first connectivity mode in response to the counting result output by the readout module last time reaching a second preset condition.

[0014] Optionally, in response to the connectivity module being in the first connectivity mode, the counting module receives the pulse signal through the first input terminal, and at intervals of a preset period, according to the control of the readout control signal of the readout module, determines the counting result to be output to the readout module based on the number of flips of the pulse signal recorded within the preset period.

[0015] Optionally, the counting module receives an external reset signal through a second input terminal, and after outputting the counting result, performs a reset according to the control of the external reset signal.

[0016] Optionally, in response to the connectivity module being in the second connectivity mode, an external clock signal is received through the first input terminal, and according to the control of the read control signal of the read module, a counting result corresponding to the number of flips of the external clock signal accumulated in the counting module is output to the read module.

[0017] Optionally, the counting module receives the pulse signal through a second input terminal, and after outputting the counting result, performs a reset according to the control of the pulse signal.

[0018] Optionally, the readout module is used to determine the state of the readout control signal based on the pulse signal, and in response to the state of the readout control signal being a readout state, control the readout module to read the counting result of the counting module.

[0019] Optionally, the pulse generating module comprises: a photodiode, a reset transistor, a comparator and a delay circuit;

[0020] The photodiode has a positive electrode connected to the ground and a negative electrode connected to the source of the reset transistor and is used to output a charge signal; when the reset transistor is disconnected, the photodiode receives the light signal within the exposure time to generate photoelectric charge; when the reset transistor is closed, the reset is performed;

[0021] The reset transistor has a source connected to the photodiode, a drain connected to the power module, and a gate connected to the delay circuit; it is used to close or open according to the control of the pulse signal sent by the delay circuit, and control whether the photodiode and the power module are connected by closing or opening the reset transistor;

[0022] The comparator receives a reference signal at its positive input terminal and a charge signal outputted from the cathode of the photodiode at its negative input terminal, determines a comparison signal based on a comparison result between the reference signal and the charge signal, and inputs the comparison signal into the delay circuit via its output terminal;

[0023] The delay circuit is used to delay the comparison signal for a preset time length and send the obtained pulse signal to the counting module and the reset transistor.

[0024] According to another aspect of an embodiment of the present disclosure, a pulse train sensor is provided, comprising: a plurality of pulse train sensor pixel units described in any one of the above embodiments.

[0025] According to another aspect of the embodiments of the present disclosure, there is provided an electronic device, comprising: a processor, and a memory connected to the processor in communication, and further comprising the pulse train sensor pixel unit described in any of the above embodiments or the pulse train sensor described in the above embodiments;

[0026] The memory stores computer-executable instructions;

[0027] The processor executes the computer-executable instructions stored in the memory to control the pulse train sensor pixel unit or the pulse train sensor to operate.

[0028] Optionally, the electronic device is included in any one of the following: a pulse camera, a high-speed camera, an audio / video player, a navigation device, a fixed-position terminal, an entertainment unit, a smart phone, a communication device, a device in a motor vehicle, a camera, a sports or wearable camera, a detection device, a flight device, a medical device, a security device.

[0029] Based on the pulse sequence sensor pixel unit, pulse sequence sensor and device provided by the above embodiments of the present disclosure, the pulse sequence sensor pixel unit includes: a pulse generating module, a counting module and a readout module; the pulse generating module is used to convert the received light signal into a pulse signal and send the pulse signal to the counting module; the counting module is used to receive the pulse signal through the first input terminal or the second input terminal, perform counting according to the signal flipping condition input by the first input terminal, and control the counting module to perform resetting according to the signal input by the second input terminal; the readout module is used to read and output the counting result in the counting module according to the control of the readout control signal; in this embodiment, the number of signals input to the first input terminal is accumulated through the counting module, and the accumulated counting result is output through the readout module instead of the original pulse sequence, so as to realize lossless compression output data, reduce the amount of data output by the pixel unit at the same frame rate, and realize a higher frame rate at the same data bandwidth.

[0030] The technical solution of the present disclosure is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The accompanying drawings, which constitute a part of the specification, illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0032] The present disclosure may be more clearly understood from the following detailed description with reference to the accompanying drawings, in which:

[0033] Figure 1 is a schematic structural diagram of a pulse sequence sensor pixel unit provided by an exemplary embodiment of the present disclosure;

[0034] Figure 2-1 is a schematic structural diagram of a pulse sequence sensor pixel unit provided by another exemplary embodiment of the present disclosure;

[0035] Figure 2-2 is a circuit diagram of a pulse sequence sensor pixel unit in a working mode provided by an exemplary embodiment of the present disclosure;

[0036] Figure 2-3 is a schematic diagram of signal timing corresponding to a pulse sequence sensor pixel unit in a working mode provided by an exemplary embodiment of the present disclosure;

[0037] Figure 2-4 is a circuit diagram of a pulse sequence sensor pixel unit in another working mode provided by an exemplary embodiment of the present disclosure;

[0038] Figure 2-5is a schematic diagram of signal timing corresponding to a pulse sequence sensor pixel unit in another working mode provided by another exemplary embodiment of the present disclosure;

[0039] Figure 3 is a circuit diagram of a pulse generating module in a pulse sequence sensor pixel unit provided by an exemplary embodiment of the present disclosure;

[0040] Figure 4 A block diagram of an electronic device according to an embodiment of the present disclosure is illustrated. DETAILED DESCRIPTION

[0041] Below, the exemplary embodiments according to the present disclosure will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all the embodiments of the present disclosure, and it should be understood that the present disclosure is not limited to the exemplary embodiments described here.

[0042] It should be noted that the relative arrangement of components and steps, the numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present disclosure unless specifically stated otherwise.

[0043] Those skilled in the art can understand that the terms "first" and "second" in the embodiments of the present disclosure are only used to distinguish different steps, devices or modules, etc., and neither represent any specific technical meaning nor indicate the necessary logical order between them.

[0044] It should also be understood that in the embodiments of the present disclosure, “plurality” may refer to two or more than two, and “at least one” may refer to one, two, or more than two.

[0045] It should also be understood that any component, data or structure mentioned in the embodiments of the present disclosure can generally be understood as one or more, unless explicitly limited or otherwise indicated in the context.

[0046] In addition, the term "and / or" in this disclosure is only a description of the association relationship of associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this disclosure generally indicates that the previous and next associated objects are in an "or" relationship. The data referred to in this disclosure may include unstructured data such as text, images, and videos, and may also be structured data.

[0047] It should also be understood that the description of the various embodiments in the present disclosure focuses on the differences between the various embodiments, and the same or similar aspects thereof can be referenced to each other, and for the sake of brevity, they will not be described one by one.

[0048] At the same time, it should be understood that for the convenience of description, the sizes of the various parts shown in the drawings are not drawn according to the actual proportional relationship.

[0049] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the present disclosure, its application, or uses.

[0050] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered as part of the specification.

[0051] It should be noted that like reference numerals and letters refer to similar items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0052] In the process of realizing the present disclosure, the inventors found that the pulse sequence image sensor in the prior art directly outputs the pulse sequence to the outside, and the pulse sequence is encoded by the off-chip processor to reflect the color grayscale value of the pixel signal. The pulse sequence generated by the pixel unit consists of 0 and 1, and the light intensity is reflected by the number of 0s between every two 1s. When the light intensity is weaker, the number of 0s between two 1s in the pulse sequence is more, the information is relatively sparse, and too much bandwidth is occupied; on the other hand, the upper limit of the speed of full-line scanning limits the upper limit of the frame rate.

[0053] Figure 1 Schematic diagram of the structure of a pulse sequence sensor pixel unit provided by an exemplary embodiment of the present disclosure. Figure 1 As shown, the pulse sequence sensor pixel unit (hereinafter referred to as pixel unit) provided in this embodiment includes: a pulse generating module 11, a counting module 12 and a reading module 13;

[0054] The pulse generating module 11 is used for converting the received optical signal into a pulse signal and sending the pulse signal to the counting module 12 .

[0055] Optionally, the main components in the pulse generating module 11 may be photoelectric conversion elements (for example, elements such as photodiodes that can convert light energy into electrical energy), which implement photoelectric conversion through the photoelectric conversion elements and obtain electric charges based on the conversion; and, an element for resetting the photoelectric conversion element may also be provided in the pulse generating module 11, and the photoelectric conversion element is reset through the resetting element.

[0056] The counting module 12 is used to receive a pulse signal through the first input terminal or the second input terminal, perform counting according to the flipping of the signal input at the first input terminal, and control the counting module to perform resetting according to the signal input at the second input terminal.

[0057] In this embodiment, the counting module 12 can be implemented by any counter or counting circuit that can realize the counting function in the prior art. For example, the counting module can be any one of digital circuit modules such as a counter, a frequency divider, a digital memory, a register, a latch, etc. The present disclosure does not limit the specific circuit structure of the counting module 12; in this embodiment, the first input terminal is the counting input terminal (input), and the counting module 12 counts the signal input by the first input terminal; and the second input terminal is the reset terminal (reset), and the counting module 12 performs a reset according to the signal input by the second input terminal.

[0058] The readout module 13 is used to read and output the counting result in the counting module according to the control of the readout control signal.

[0059] Optionally, the counting result is binary data of a preset number of bits, or data recorded by other counting methods of a preset number of bits; wherein the preset number of bits can be set according to the actual application scenario, and counting is performed by binary counting data and other methods, and only the number of signals input to the first input terminal of the counting module 12 is output without outputting the original pulse sequence, thereby achieving lossless compression output data, reducing the amount of data output by the pixel unit at the same frame rate, and achieving a higher frame rate at the same data bandwidth.

[0060] The pulse sequence sensor pixel unit provided in the above embodiment of the present disclosure includes: a pulse generating module, a counting module and a readout module; the pulse generating module is used to convert the received light signal into a pulse signal and send the pulse signal to the counting module; the counting module is used to receive the pulse signal through the first input terminal or the second input terminal, perform counting according to the signal flipping condition inputted from the first input terminal, and control the counting module to perform resetting according to the signal inputted from the second input terminal; the readout module is used to read and output the counting result in the counting module according to the control of the readout control signal; in this embodiment, the number of signals inputted to the first input terminal is accumulated through the counting module, and the accumulated counting result is outputted through the readout module instead of the original pulse sequence, so as to realize lossless compression output data, reduce the amount of data outputted by the pixel unit at the same frame rate, and realize a higher frame rate at the same data bandwidth.

[0061] Figure 2-1 FIG. 1 is a schematic diagram of a structure of a pulse sequence sensor pixel unit provided by another exemplary embodiment of the present disclosure. Figure 2-1 As shown, the pulse sequence sensor pixel unit provided by the embodiment of the present disclosure further includes: a connection module 14;

[0062] The connection module 14 is used to determine the first connection mode or the second connection mode according to the counting result output by the reading module last time.

[0063] In the first connection mode, the pulse generating module is connected to the first input end of the counting module, and in the second connection mode, the pulse generating module 11 is connected to the second input end of the counting module 12 .

[0064] In the present embodiment, since the counting module 12 counts the signal input into the first input terminal, the present embodiment realizes that the counting module directly counts the number of pulse signals generated by the pulse generating module 11 through the control of the connecting module (the first connection mode). The first connection mode is more suitable for counting light signals with stronger light intensity. By directly counting the pulse signals, within the same time, when the light intensity is stronger, the counting result is larger, and when the light intensity is weaker, the counting result is smaller. Therefore, the first connection mode is more suitable for counting the pulse signals corresponding to the light signals with stronger light intensity. Alternatively, a pulse signal is used as a reset signal (the second connection mode) to realize counting of existing signals of known frequency within a pulse signal. In the second connection mode, each pulse signal can be expressed by the counting result output each time in the counting module, so as to realize expression of light signals with relatively weak light intensity (the pulse sequence generated by the pixel unit is composed of 0 and 1, and the light intensity is reflected by the number of 0s between each two 1s. The weaker the light intensity, the greater the number of 0s between two 1s in the pulse sequence). By counting the number of known signals corresponding to each pulse signal, the intensity of the light signal corresponding to the pulse signal can be known. The larger the counting result corresponding to the pulse signal, the weaker the light intensity corresponding to the pulse signal, and the smaller the counting result corresponding to the pulse signal, the stronger the light intensity corresponding to the pulse signal.

[0065] In some optional embodiments, such as Figure 2-1 As shown, the connection module 14 includes: a first switch 141, a second switch 142, a third switch 143 and a fourth switch 144. The first switch 141, the second switch 142, the third switch 143 and the fourth switch 144 are connected in parallel to form a switch array; the first switch 141 and the third switch 143 control the conduction of the first input end of the counting module 12, and the second switch 142 and the fourth switch 144 control the conduction of the second input end of the counting module 12.

[0066] like Figure 2-2 As shown, when the connection module 14 is in the first connection mode, when the first switch 141 and the third switch 143 are closed, the second switch 142 and the fourth switch 144 are disconnected, and the external reset signal is input into the second input end of the counting module 12 through the first switch 141, and the pulse signal is input into the first input end of the counting module 12 through the third switch 143.

[0067] In this embodiment, the external reset signal is connected to the second input terminal of the counting module 12 through the first switch 141. The external reset signal has a preset period and outputs a high level at every preset time interval to control the counting module 12 to perform reset. The pulse signal is connected to the first input terminal of the counting module 12 through the third switch 143. After each reset, the counting module 12 restarts counting the number of pulse signals input to the first input terminal to determine the number of pulse signals included in the preset period as the counting result.

[0068] Optionally, in response to the connectivity module 14 being in the first connectivity mode, the counting module 12 receives a pulse signal through the first input terminal, and at intervals of a preset period, according to the control of the readout control signal of the readout module 13, determines the counting result based on the number of flips of the pulse signal recorded within the preset period and outputs it to the readout module.

[0069] This embodiment realizes that the number of pulse signals received in each preset period is recorded by the counting module 12. The number can be determined by the number of flips of the pulse signal. For example, the data in the counting module 12 is incremented by one every time the pulse signal flips twice (usually recording two flips from low level to high level and then from high level to low level). In the first connection mode, when the counting module works, such as Figure 2-2 As shown, the input terminal (first input terminal) is connected to the pulse generating module, and the reset terminal (second input terminal) is connected to the external reset (Read_DN) signal. The Read_DN signal is used to indicate that the reading of the counting module is completed. It rises at the falling edge of the readout control (Read_EN) signal, and the signal width is equal to the Read_EN signal. When the pulse generating module receives light, the counting module counts the number of flips of the pulse signal. Every time it flips twice, the count of the counting module is increased by one, and the photoelectric collection components (for example, photodiodes) in the pulse generating module 11 are reset (after resetting, the next pulse signal is collected).

[0070] Optionally, the counting module 12 receives an external reset signal through the second input terminal, and after outputting the counting result, performs a reset according to the control of the external reset signal.

[0071] When pixel pulse frequency encoding is performed on the pixel array (including multiple rows and columns of pixel units) in the pulse array sensor, the readout method of the pixel array is synchronous readout, that is, the entire pixel array is scanned and read out at a fixed frequency; when the row scan signal reaches a row of pixel units in the pixel array, the Read_EN signal is set to a high level, the counting module stops counting, and the pixel unit outputs the counting result through the readout module; after the readout is completed, the Read_EN signal is set to a low level, the counting module is reset, and the cycle is repeated.

[0072] Figure 2-3FIG. 1 is a schematic diagram of the signal timing corresponding to a pulse sequence sensor pixel unit in a working mode provided by an exemplary embodiment of the present disclosure. Figure 2-3 As shown, in this example, for ease of understanding, only a partial timing diagram of the read control signal Read_EN, the external reset signal Read_DN, the comparison signal S1 and the pulse signal DC in an example case, as well as the counting result output by the counting module are shown, which is only used to understand the relationship between the signals and is not used to limit the specific timing of the signals disclosed in the present invention; based on Figure 2-3 As shown in the timing diagram, the external reset signal is triggered after the control signal is read out, and the pulse signal has a certain delay relative to the comparison signal.

[0073] The original pulse sequence provided in the prior art reflects the light intensity through the pulse interval, and the minimum time of the pulse interval is the time for a complete scan and readout of the array. For strong light that is sufficient to cause the pixel unit to generate multiple pulse signals within a scan time, it exceeds the range that the original pulse sequence can describe, and the prior art cannot process such strong light. The embodiment of the present disclosure encodes the pulse frequency through a counting module in the pixel unit, and can record the number of pulse signals generated by the pixel unit within a scan time, thereby achieving the technical effect of describing a light signal with a stronger light intensity.

[0074] like Figure 2-4 As shown, when the connection module 14 is in the second connection mode, when the second switch 142 and the fourth switch 144 are closed, the first switch 141 and the third switch 143 are disconnected, and the pulse signal is input into the second input end of the counting module 12 through the second switch 142, and the external clock signal is input into the first input end of the counting module 12 through the fourth switch 144.

[0075] In this embodiment, the pulse signal is connected to the second input terminal of the counting module 12 through the second switch 142. At this time, the pulse signal is used as the reset signal of the counting module 12. Whenever the pulse signal outputs a high level (the output is 1), the counting module 12 performs a reset. The external clock signal is connected to the first input terminal of the counting module 12 through the fourth switch. After each reset, the counting module 12 restarts to count the number of clock signals input to the first input terminal, and determines the number of external clock signals corresponding to the pulse signal as the counting result. The counting result can determine the time interval for the generation of the pulse signal.

[0076] In this embodiment, a coding mode automatic control module can be used inside or outside the sensor chip to detect the counting result output by the readout module, and automatically control the switching between the first connection mode and the second connection mode according to the detection result.

[0077] Optionally, in response to the connectivity module 14 being in the second connectivity mode, an external clock signal is received through the first input terminal, and a counting result corresponding to the number of flips of the external clock signal accumulated in the counting module is output to the readout module according to the control of the readout control signal of the readout module.

[0078] This embodiment realizes counting the pulse width time corresponding to each pulse signal through the counting module, and the counting result represents the number of flips of the external clock signal with a fixed frequency in each pulse signal; for example, every time the external clock signal flips twice (usually recording two flips from low level to high level and then from high level to low level), the data in the counting module is increased by one. In the second connection mode, when the counting module works, such as Figure 2-4 As shown, the reset terminal (second input terminal) is connected to the pulse signal output by the pulse generating module, and the input terminal (first input terminal) of the counting module 12 is connected to an external clock signal clk of a fixed frequency provided externally. When the pulse generating module receives light, the counting module 12 counts the number of flips of the external clock signal. When a pulse signal is generated, the counting module 12 stops counting according to the control of the pulse signal, and the pixel unit sends a read request to the peripheral circuit. After the request is completed, the peripheral circuit sets the read control signal Read_EN to a high level, and reads out its counting result and pixel coordinates. At this time, the counting result of the counting module 12 is the time interval from the last reset to the generation of the current pulse signal.

[0079] Optionally, the counting module 12 receives a pulse signal through the second input terminal, and after outputting the counting result, performs a reset according to the control of the pulse signal.

[0080] After the counting module outputs the counting result, the read control signal Read_EN is set to a low level, the pulse generating module and the counting module are reset, and the next pulse signal continues to be counted, and the cycle continues.

[0081] Optionally, the readout module 13 is used to determine the state of the readout control signal based on the pulse signal, and in response to the state of the readout control signal being the readout state, control the readout module 13 to read the counting result of the counting module 12 .

[0082] In this embodiment, the readout mode of the pixel array (including pixel units of multiple rows and columns) in the pulse array sensor is asynchronous readout, that is, the pixel unit outputs its counting result and pixel coordinates only when a pulse signal is generated. The original pulse sequence provided in the prior art represents the pulse interval by the number of zero levels. The wider the interval, the wider the output data bit width. The counting result after the pixel unit provided in this embodiment encodes the pulse signal is a binary number with a fixed number of bits. The data bit width is fixed, which compresses the data volume. For example, the pulse interval that the original pulse sequence needs to be represented by 100 zeros only needs to be output as 01100100 after binary encoding by an 8-bit counting module, which greatly compresses the output data volume.

[0083] Figure 2-5 FIG. 1 is a schematic diagram of the signal timing corresponding to a pulse sequence sensor pixel unit in another working mode provided by another exemplary embodiment of the present disclosure. Figure 2-5 As shown, in this example, for ease of understanding, only a partial timing diagram of the read control signal Read_EN, the external clock signal clk, the comparison signal S1 and the pulse signal DC in an example case, as well as the counting result output by the counting module are shown, which is only used to understand the relationship between the signals and is not used to limit the specific timing of the signals disclosed in the present invention; based on Figure 2-5 As shown in the timing diagram, the read control signal is synchronized with the comparison signal, the pulse signal has a certain delay relative to the comparison signal, and the counting result accumulates the number of flips of the external clock signal between the two high levels output by the pulse signal.

[0084] Optionally, in an optional example, the connection module 14 further includes: a state identification module (not shown in the figure);

[0085] The state recognition module is used to switch from the first connection mode to the second connection mode in response to the counting result last output by the readout module 13 reaching the first preset condition; and to switch from the second connection mode to the first connection mode in response to the counting result last output by the readout module reaching the second preset condition.

[0086] Optionally, the first preset condition may be that the number of counting results exceeding a first ratio among multiple groups of counting results is less than or equal to 1; the second preset condition may be that the number of counting results exceeding a second ratio among multiple groups of counting results is less than or equal to 1; optionally, the first ratio and the second ratio may be the same or different.

[0087] Optionally, in some optional examples, the first switch 141 and the third switch 143 can be N-type transistors, and the corresponding second switch 142 and the fourth switch 144 can be P-type transistors (or, the first switch 141 and the third switch 143 can be P-type transistors, and the corresponding second switch 142 and the fourth switch 144 can be N-type transistors); the corresponding state recognition module outputs a corresponding high level or low level according to the condition recognition to achieve control over the opening and closing of each switch. For example, when the state recognition module recognizes that the counting result reaches the first preset condition, a low level is output to the first switch 141, the second switch 142, the third switch 143 and the fourth switch 144; the P-type transistor is controlled to be turned on and the N-type transistor is turned off to achieve switching from the first connection mode to the second connection mode; for another example, when the state recognition module recognizes that the counting result reaches the second preset condition, a high level is output to the first switch 141, the second switch 142, the third switch 143 and the fourth switch 144; the P-type transistor is controlled to be turned off and the N-type transistor is controlled to be turned on to achieve switching from the second connection mode to the first connection mode.

[0088] In this embodiment, whether the connection mode needs to be adjusted is determined by the counting result. When in the first connection mode, when it is detected that the counting results of the multiple sets of counting results output by the readout module exceed the first ratio (for example: 50%, 60%, etc., the specific ratio can be selected according to the actual scene) are less than or equal to 1, since the counting result represents the number of pulse signals generated in a fixed time interval, the data is less than or equal to 1, indicating that no pulse signal is generated in the time interval or only one pulse signal is generated, and the data exceeding the first ratio in the multiple sets of counting results is less than or equal to 1, that is, it indicates that the light intensity is weak, and the first connection mode is switched to the second connection mode. When in the second connection mode, when it is detected that the counting results of the multiple sets of counting results output by the readout module exceed the second ratio (for example: 50%, 60%, etc., the specific ratio can be selected according to the actual scene) are less than or equal to 1, since the counting result represents the time interval between two pulses, the smaller the time interval, the stronger the light intensity, and the counting result is less than or equal to 1, indicating that the time interval between two pulses is small, when the counting results exceeding the second ratio in the multiple sets of technical results are less than or equal to 1, it indicates that the light intensity is strong, and the second connection mode is switched to the first connection mode.

[0089] Figure 3 FIG. 1 is a circuit diagram of a pulse generating module in a pulse sequence sensor pixel unit provided by an exemplary embodiment of the present disclosure. Figure 3 As shown, the pulse generating module 11 includes: a photodiode 111, a reset transistor 112, a comparator 113 and a delay circuit 114;

[0090] The photodiode 111 has a positive electrode connected to the ground and a negative electrode connected to the source of the reset transistor 112 and is used to output a charge signal; when the reset transistor 112 is disconnected, it receives a light signal within the exposure time to generate photoelectric charge; when the reset transistor 112 is closed, it performs a reset.

[0091] A photodiode is a photodetector that can convert light into current or voltage signals depending on how it is used. The die often uses a PN junction with photosensitive characteristics, which is very sensitive to changes in light, has unidirectional conductivity, and changes electrical properties when the light intensity is different. Therefore, the light intensity can be used to change the voltage or current in the circuit.

[0092] The reset transistor 112 has a source connected to the photodiode 111, a drain connected to the power module Vdd, and a gate connected to the delay circuit 114; it is used to close or open according to the control of the pulse signal sent by the delay circuit 114, and to control whether the photodiode 111 and the power module Vdd are connected by closing or opening the reset transistor 112.

[0093] Optionally, the reset transistor 112 is closed or opened according to the control of the pulse signal output by the delay circuit 114. For example, when the pulse signal is at a high level, the reset transistor 112 is closed to control the photodiode 111 to reset (the reset signal is the voltage signal of the voltage module); when the pulse signal is at a low level, the reset transistor 112 is opened to control the photodiode 111 to stop resetting and start collecting light signals.

[0094] The comparator 113 receives a reference signal at its positive input terminal and a charge signal outputted from the cathode of the photodiode 111 at its negative input terminal, determines a comparison signal based on a comparison result between the reference signal Vth and the charge signal, and inputs the comparison signal into the delay circuit 114 through its output terminal.

[0095] Optionally, the charge signal and the reference signal Vth are compared by a comparator 113. When the charge signal is smaller than the reference signal Vth, the comparison signal output from the output end is a high level; when the charge signal is larger than the reference signal Vth, the comparison signal output from the output end is a low level; optionally, the reference signal Vth is a voltage signal that is smaller than the power module voltage Vdd.

[0096] The delay circuit 114 is used to delay the comparison signal for a preset time length and send the obtained pulse signal to the counting module 12 and the reset transistor 112 .

[0097] Optionally, the delay circuit 114 can be a circuit such as an inverting delay chain that implements a preset time delay. The present embodiment does not limit the circuit structure of the delay circuit 114, as long as the delay function can be implemented. The specific preset time can be set according to the actual application situation. The delay circuit 114 in the present embodiment is only used for delay and does not perform any other processing on the comparison signal. Therefore, the pulse signal output from the delay circuit 114 and the comparison signal output from the comparator 113 only have a timing delay.

[0098] In this embodiment, after the photodiode 111 stops resetting, it starts to expose and collect light signals, and the voltage Vpd of the photodiode starts to drop from the reset voltage Vdd. When the voltage Vpd of the photodiode drops to the reference signal Vth, the comparison signal S1 output by the comparator 113 becomes a high level, generating a pulse, and a high-level pulse signal is obtained after delay processing by the delay circuit 114. At this time, the reset transistor 112 is closed to reset the photodiode 111, and the cycle continues.

[0099] According to another aspect of the embodiments of the present disclosure, a pulse sequence sensor is provided, comprising: a plurality of pulse sequence sensor pixel units as described in any of the above embodiments.

[0100] The electronic device provided by the present disclosure may be incorporated into any of the following: pulse cameras, high-speed cameras, audio / video players, navigation devices, fixed-position terminals, entertainment units, smart phones, communication devices, devices in motor vehicles, cameras, sports or wearable cameras, detection equipment, flight equipment, medical equipment, security equipment, etc.

[0101] The electronic device provided by the present disclosure can be applied to any of the following: pulse cameras, high-speed cameras, audio / video players, navigation equipment, fixed-position terminals, entertainment units, smart phones, communication equipment, equipment in motor vehicles, cameras, sports or wearable cameras, detection equipment, flight equipment, medical equipment, security equipment, etc.

[0102] Below, reference Figure 4 The electronic device according to the embodiment of the present disclosure is described. The electronic device may be any one or both of the first device and the second device, or a stand-alone device independent of them, and the stand-alone device may communicate with the first device and the second device to receive the collected input signals from them.

[0103] Figure 4 A block diagram of an electronic device according to an embodiment of the present disclosure is illustrated.

[0104] like Figure 4 As shown, the electronic device includes one or more processors and memory.

[0105] The processor may be a central processing unit (CPU) or other forms of processing units having data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device to perform desired functions.

[0106] The memory may store one or more computer program products, and the memory may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, a random access memory (RAM) and / or a cache memory (cache), etc. The non-volatile memory may include, for example, a read-only memory (ROM), a hard disk, a flash memory, etc. One or more computer program products may be stored on the computer-readable storage medium, and the processor may run the computer program product to implement the workflow of the pulse train sensor pixel unit of each embodiment of the present disclosure described above and / or other desired functions.

[0107] In one example, the electronic device may further include: an input device and an output device, and these components are interconnected via a bus system and / or other forms of connection mechanisms (not shown).

[0108] In addition, the input device may also include, for example, a keyboard, a mouse, and the like.

[0109] The output device can output various information to the outside, including determined distance information, direction information, etc. The output device can include, for example, a display, a speaker, a printer, a communication network and a remote output device connected thereto, and the like.

[0110] Of course, to simplify, Figure 4 Only some of the components related to the present disclosure in the electronic device are shown, and components such as a bus, an input / output interface, etc. are omitted. In addition, according to specific application situations, the electronic device may further include any other appropriate components.

[0111] In addition to the above-mentioned methods and devices, an embodiment of the present disclosure may also be a computer program product, which includes computer program instructions, which, when executed by a processor, enable the processor to execute the workflow of the pulse sequence sensor pixel unit according to various embodiments of the present disclosure described in the above part of this specification.

[0112] The computer program product may be written in any combination of one or more programming languages ​​to write program code for performing the operations of the disclosed embodiments, including object-oriented programming languages ​​such as Java, C++, etc., and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, as a separate software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0113] In addition, an embodiment of the present disclosure may also be a computer-readable storage medium having computer program instructions stored thereon, which, when executed by a processor, enables the processor to execute the steps in the workflow of the pulse sequence sensor pixel unit according to various embodiments of the present disclosure described in the above part of this specification.

[0114] The computer readable storage medium can adopt any combination of one or more readable media. The readable medium can be a readable signal medium or a readable storage medium. The readable storage medium can include, for example, but is not limited to, a system, device or device of electricity, magnetism, light, electromagnetic, infrared, or semiconductor, or any combination of the above. More specific examples (non-exhaustive list) of readable storage media include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0115] The basic principles of the present disclosure are described above in conjunction with specific embodiments. However, it should be noted that the advantages, strengths, effects, etc. mentioned in the present disclosure are only examples and not limitations, and it cannot be considered that these advantages, strengths, effects, etc. are required by each embodiment of the present disclosure. In addition, the specific details disclosed above are only for the purpose of illustration and ease of understanding, and are not limitations. The above details do not limit the present disclosure to the necessity of adopting the above specific details to be implemented.

[0116] Each embodiment in this specification is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the system embodiment, since it basically corresponds to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0117] The block diagrams of the devices, apparatuses, equipment, and systems involved in this disclosure are only illustrative examples and are not intended to require or imply that they must be connected, arranged, and configured in the manner shown in the block diagrams. As will be appreciated by those skilled in the art, these devices, apparatuses, equipment, and systems can be connected, arranged, and configured in any manner. Words such as "including," "comprising," "having," and the like are open words, referring to "including but not limited to," and can be used interchangeably therewith. The words "or" and "and" used herein refer to the words "and / or," and can be used interchangeably therewith, unless the context clearly indicates otherwise. The word "such as" used herein refers to the phrase "such as but not limited to," and can be used interchangeably therewith.

[0118] The method and apparatus of the present disclosure may be implemented in many ways. For example, the method and apparatus of the present disclosure may be implemented by software, hardware, firmware, or any combination of software, hardware, and firmware. The above order of steps for the method is for illustration only, and the steps of the method of the present disclosure are not limited to the order specifically described above, unless otherwise specifically stated. In addition, in some embodiments, the present disclosure may also be implemented as a program recorded in a recording medium, which includes machine-readable instructions for implementing the method according to the present disclosure. Therefore, the present disclosure also covers a recording medium storing a program for executing the method according to the present disclosure.

[0119] It should also be noted that in the apparatus, device and method of the present disclosure, each component or each step can be decomposed and / or recombined. Such decomposition and / or recombination should be regarded as equivalent solutions of the present disclosure.

[0120] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of the present disclosure. Therefore, the present disclosure is not intended to be limited to the aspects shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

[0121] The above description has been given for the purpose of illustration and description. In addition, this description is not intended to limit the embodiments of the present disclosure to the forms disclosed herein. Although multiple example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, changes, additions and sub-combinations thereof.

Claims

1. A pulse train sensor pixel unit, characterized in that: include: Pulse generation module, counting module and readout module; The pulse generating module is used to convert the received optical signal into a pulse signal and send the pulse signal to the counting module; The counting module is used to receive the pulse signal through the first input terminal or the second input terminal, perform counting according to the flipping of the signal inputted from the first input terminal, and control the counting module to perform resetting according to the signal inputted from the second input terminal; The readout module is used to read and output the counting result in the counting module according to the control of the readout control signal.

2. The pixel unit according to claim 1, characterized in that: Also includes: Connect modules; The connection module is used to determine the first connection mode or the second connection mode according to the counting result output by the readout module last time; wherein, in the first connection mode, the pulse generating module is connected to the first input end of the counting module, and in the second connection mode, the pulse generating module is connected to the second input end of the counting module.

3. The pixel unit according to claim 2, characterized in that: The connection module includes: a first switch, a second switch, a third switch and a fourth switch; In the first connection mode, when the first switch and the third switch are closed, the second switch and the fourth switch are opened, the external reset signal is input into the second input end of the counting module through the first switch, and the pulse signal is input into the first input end of the counting module through the third switch; In the second connection mode, when the second switch and the fourth switch are closed, the first switch and the third switch are opened, the pulse signal is input into the second input end of the counting module through the second switch, and the external clock signal is input into the first input end of the counting module through the fourth switch.

4. The pixel unit according to claim 3, characterized in that: The connection module also includes: a state identification module; The state identification module is used to switch from the first connectivity mode to the second connectivity mode in response to the counting result output by the readout module last time reaching a first preset condition; and to switch from the second connectivity mode to the first connectivity mode in response to the counting result output by the readout module last time reaching a second preset condition.

5. The pixel unit according to any one of claims 2 to 4, characterized in that: In response to the connectivity module being in the first connectivity mode, the counting module receives the pulse signal through the first input terminal, and at intervals of a preset period, according to the control of the readout control signal of the readout module, determines the counting result to be output to the readout module based on the number of flips of the pulse signal recorded within the preset period.

6. The pixel unit according to claim 5, characterized in that: The counting module receives an external reset signal through a second input terminal, and after outputting the counting result, performs a reset according to the control of the external reset signal.

7. The pixel unit according to any one of claims 2 to 4, characterized in that: In response to the connectivity module being in the second connectivity mode, an external clock signal is received through the first input terminal, and according to the control of the readout control signal of the readout module, a counting result corresponding to the number of flips of the external clock signal accumulated in the counting module is output to the readout module.

8. The pixel unit according to claim 7, characterized in that: The counting module receives the pulse signal through the second input terminal, and after outputting the counting result, performs a reset according to the control of the pulse signal.

9. The pixel unit according to claim 7 or 8, characterized in that: The readout module is used to determine the state of the readout control signal based on the pulse signal, and in response to the state of the readout control signal being a readout state, control the readout module to read the counting result of the counting module.

10. The pixel unit according to any one of claims 1 to 9, characterized in that: The pulse generating module comprises: a photodiode, a reset transistor, a comparator and a delay circuit; The photodiode has a positive electrode connected to the ground and a negative electrode connected to the source of the reset transistor and is used to output a charge signal; when the reset transistor is disconnected, the photodiode receives the light signal within the exposure time to generate photoelectric charge; when the reset transistor is closed, the reset is performed; The reset transistor has a source connected to the photodiode, a drain connected to the power module, and a gate connected to the delay circuit; it is used to close or open according to the control of the pulse signal sent by the delay circuit, and control whether the photodiode and the power module are connected by closing or opening the reset transistor; The comparator receives a reference signal at its positive input terminal and a charge signal outputted from the cathode of the photodiode at its negative input terminal, determines a comparison signal based on a comparison result between the reference signal and the charge signal, and inputs the comparison signal into the delay circuit via its output terminal; The delay circuit is used to delay the comparison signal for a preset time length and send the obtained pulse signal to the counting module and the reset transistor.

11. A pulse train sensor, characterized in that: include: A plurality of pulse train sensor pixel units as described in any one of claims 1-10.

12. An electronic device, characterized in that: include: A processor, and a memory connected to the processor in communication, further comprising the pulse train sensor pixel unit according to any one of claims 1 to 10 or the pulse train sensor according to claim 11; The memory stores computer-executable instructions; The processor executes the computer-executable instructions stored in the memory to control the pulse train sensor pixel unit or the pulse train sensor to operate.

13. The electronic device according to claim 12, characterized in that: The electronic device is included in any of the following: pulse camera, high-speed camera, audio / video player, navigation equipment, fixed position terminal, entertainment unit, smart phone, communication equipment, equipment in motor vehicle, camera, sports or wearable camera, detection equipment, flight equipment, medical equipment, security equipment.

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