Electronic module with printed circuit board cover structure

Abstract

An electronic module is provided. The electronic module includes a printed circuit board (PCB) stack defining a plurality of first bond pads on a first surface. The electronic module also includes a plurality of walls. The first end of each wall is mounted to a plurality of first bond pads. The plurality of walls extend outwardly from the first surface and define an interior cavity between opposing surfaces of the plurality of walls. The electronic module also includes a top plate attached to a second end of each wall. A top plate extends over the interior cavity parallel to the first surface. The interior cavity is an enclosed space defined by the first surface, a third surface defined by the top plate, and opposing surfaces of the plurality of walls.

Description

[0001] Related Applications

[0002] This application claims the benefit of U.S. Provisional Application No. 63 / 510,559, filed on June 27, 2023, entitled “PCB AIR CAVITY,” which is hereby incorporated by reference. Technical Field

[0003] The present invention relates to an electronic module and a method for manufacturing an electronic module or a circuit board, and in particular to an electronic module with a cover structure. Background Art

[0004] Most modules use an overmold to protect the die and / or other components mounted on a printed circuit board (PCB) substrate. The overmold encapsulates the die and / or other components and protects these components from the external environment. The overmold, which is usually a thermoplastic, is usually softened to mold itself onto the component and bonded to the PCB substrate. This overmold can dissipate high-frequency (e.g., radio frequency (RF)) signals radiated to and from the die / components encapsulated by the overmold, affecting the gain and overall performance of these components. Therefore, for modules with high-frequency components, it is usually desirable to use a cover structure to cover and protect the components instead of an overmold. The cover structure is a self-supporting structure that defines an internal cavity and is mounted around the components to be protected on the PCB substrate so that the components are arranged in the internal cavity. The internal cavity provided by the cover structure creates an air space around the components, which has lower dissipation, higher gain and better performance for high-frequency signals to or from those components. These cover structures are integral structures made of metal, ceramic or coated plastic. Summary of the invention

[0005] An embodiment of an electronic module is provided. The electronic module includes a printed circuit board (PCB) stack, the PCB stack including at least one conductive layer and a plurality of non-conductive layers. The PCB stack has a first surface and a second surface opposite to the first surface. The PCB stack also defines a plurality of first bonding pads on the first surface. The electronic module also includes a plurality of walls. Each wall defines a first end and a second end opposite to the first end. The first end of each wall is mounted to the plurality of first bonding pads. The plurality of walls extend outwardly from the first surface and define an internal cavity between the opposing surfaces of the plurality of walls. The electronic module also includes a top plate attached to the second end of each wall. The top plate extends on the internal cavity parallel to the first surface. The top plate defines a third surface opposite to the first surface of the PCB stack. The top plate also defines a fourth surface opposite to the third surface. The internal cavity is a closed space defined by the first surface of the top plate, the third surface, and the opposing surfaces of the plurality of walls. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Understanding that the drawings depict only exemplary embodiments and are not therefore to be considered limiting of scope, exemplary embodiments will be described with additional specificity and detail through use of the accompanying drawings, in which:

[0007] Figure 1 is a cross-sectional cutaway view of an exemplary panel having a cover structure produced using PCB manufacturing techniques;

[0008] Figure 2 is used for Figure 1 A cross-sectional view of an exemplary PCB base plate of a panel;

[0009] Figure 3 It is available for Figure 1 A perspective view of an exemplary wall in a cover structure of FIG.

[0010] Figure 4 yes Figure 3 a cross-sectional view of a wall;

[0011] Figure 5 Can be used in Figure 1 A perspective view of an exemplary top plate in a cover structure of FIG.

[0012] Figure 6 It is available for Figure 1 A perspective view of an exemplary cover structure in a panel of FIG.

[0013] Figure 7 A plurality of dies are mounted on it. Figure 2 A cross-sectional view of the PCB base plate;

[0014] Figure 8 is a cross-sectional view of an exemplary panel, wherein Figure 6 The cover structure is mounted to Figure 7 PCB base plate;

[0015] Fig. 9 Is installed to Figure 7 A cross-sectional view of another exemplary panel of a cover structure of a PCB base plate; and

[0016] Fig.10 Is installed to Figure 7 A cross-sectional view of another exemplary panel of a cover structure for a PCB base plate. DETAILED DESCRIPTION

[0017] Figure 11 is a cross-sectional view of an exemplary panel 100 having a cover structure 110 that is produced using printed circuit board (PCB) manufacturing techniques that are capable of efficiently constructing and integrating integrated circuit features and components therein. The panel 100 is configured to be cut into a plurality of identical modules 101 around lines 104, which can then be used individually in electronic devices. Any number of modules 101 can be manufactured in a single panel 100.

[0018] Panel 100 includes a PCB base 102 as a base substrate. PCB base 102 can be a PCB stack. The PCB stack includes a plurality of non-conductive layers bonded together and at least one conductive layer between adjacent non-conductive layers. Each conductive layer is composed of a conductive material, typically copper, patterned to form one or more circuit features, such as circuit traces. The conductive layers are separated by corresponding insulating (non-conductive) layers. Vias extend through the non-conductive layers to electrically couple different conductive layers to each other or to bonding pads on the outer surface of the PCB stack. It should be noted that Figure 1 The number of non-conductive layers and conductive layers shown in the drawings is merely a design choice, and a fewer or greater number of non-conductive layers and conductive layers may be used. One or more dies 108 may be mounted to the first surface 204 of the PCB substrate 102 .

[0019] The panel 100 also has a cover structure 110 mounted to the PCB base plate 102. The cover structure 110 is a self-supporting component that defines a plurality of internal cavities 112 therein. The cover structure 110 is disposed around the plurality of tube cores 108 to protect the tube cores 108 from external environmental influences. Each tube core 108 is disposed within the internal cavity 112 to provide improved wireless signal performance for the tube core 108. The cover structure 110 is composed of a plurality of walls 114 and a roof 116. In one example, the walls 114 and / or the roof 116 can be formed of a non-conductive material having one or more circuit features formed therein or thereon. Figure 1 In the example shown, vias are included in walls 114 and top plate 116 to electrically couple a plurality of bond pads on an outer surface of top plate 116 with circuit features in PCB base plate 102. Internal cavity 112 may be filled with a gas, such as air.

[0020] Figure 1 Panel 100 is shown after final lamination, so that each non-conductive layer therein is cured to a solid state. Prior to lamination, one or more non-conductive layers in panel 100 may initially consist of a prepreg, which is a fiber reinforcement material impregnated or coated with a resin binder, consolidated and partially cured to an intermediate semi-solid product. Lamination cures the prepreg to a solid state.

[0021] Figure 2 FIG. 1 is a cross-sectional view of an exemplary PCB bottom plate 102. In one example, the PCB bottom plate 102, the wall 114, and the top plate 116 of the panel 100 are formed separately and then assembled to form Figure 1 Panel 100 is shown, and thus, PCB base plate 102 can be formed prior to assembly with walls 114 and top plate 116. PCB base plate 102 can be formed using any suitable technique including lamination and / or additive processes (e.g., printing). One or more circuit features, such as circuit traces and vias, can be formed in or on PCB base plate 102 along with other features such as one or more heat blocks or semiconductor dies. Figure 1 In the example shown, a plurality of identical modules 101 are included on the panel 100. Thus, multiple instances of the same circuit and corresponding features can be produced on the panel 100, with appropriate areas 104 between them to allow for cutting. In other examples, a single module can be produced on the panel 100 and, accordingly, in the PCB base plate 102. The PCB base plate 102 can be formed into a fully cured state before being assembled with the wall 114 and the top plate 116.

[0022] In one example, for each module 101, the PCB base plate 102 may include a plurality of die bonding pads 208 on a first surface 204 thereof for mounting the cover structure on the PCB base plate 102. For each module 101, the PCB base plate 102 may also include a heat block 206 configured to transfer heat from the die bonding pads 208 on the first surface 204 to a second surface (back side) 210 of the PCB base plate 102. Any suitable heat block may be used, including a solid copper block.

[0023] Figure 3 is a perspective view of an exemplary wall 114. A plurality of walls 114 may be assembled with the PCB bottom plate 102 and the top plate 116 to form Figure 1 The panel 100 of FIG. 100. In one example, the wall 114 has a rectangular prism geometry that defines a first major face 304 and a second major face 306 opposite the first major face 304. The wall 114 also defines a first (e.g., bottom) end 308 and a second (e.g., top) end 310. Finally, the wall 114 defines two other side faces 312, 314.

[0024] A plurality of walls 114 are assembled with the PCB bottom plate 102 and the top plate 116 to form one or more internal cavities 112. When the PCB bottom plate 102 and the top plate form the "bottom" and "top" of each internal cavity 112, the walls 114 are arranged to surround the "sides" of each internal cavity 112. For example, in order to form an internal cavity 112 having a rectangular shape, four walls 114 can be arranged to form the four side walls of the internal cavity 112. By appropriately arranging the walls 114, shapes other than rectangles can be formed. The walls 114 are oriented so that the main faces 304, 306 face the internal cavity 112 and define the internal cavity. The first ("bottom") end 308 is mounted to the PCB bottom plate 102, and the second ("top") end 310 is mounted to the top plate 116. The side faces 314, 312 abut the side faces 314, 312 of the adjacent walls 114 in the panel 100. Wall 114 may have bonding pads 316 on top end 310 and bottom end 308 for mounting wall 114 to top plate 116 and PCB bottom plate 102, respectively. Although bonding pads 316 are shown here as elongated strips, a plurality of smaller circular pads may be used in place of the elongated strips.

[0025] Some walls 114 may be configured to be cut into two parts along the plane 104 to form different walls of two different modules 101. In such an example, the first major face 304 may face the first interior cavity 112 on the first module 101, and the second major face 306 may face the second interior cavity 112 on the second module 101. If the wall 114 is disposed on the edge of the panel 100 or between two interior cavities 112 on the same module 101, the wall 114 may not be cut.

[0026] Walls 114 may be formed in any suitable manner and have any suitable dimensions. Each wall 114 may be formed in any suitable manner, such as by suitable machining and / or cutting as described below. Walls 114 may also have circuit features formed therein, such as vias extending from a bonding pad at bottom end 308 to a bonding pad 316 at top end 310. Such vias may be formed in any suitable manner, including by drilling a hole (e.g., mechanically or laser drilling) through wall 114 and then plating and / or filling the hole with a conductive material.

[0027] Figure 44 is a cross-sectional view of an exemplary wall 114 formed as a PCB stackup having a plurality of non-conductive layers 402. To manufacture the wall 114, a PCB stackup panel including a plurality of walls 114 may be formed. The PCB stackup may be formed in any suitable manner, including via lamination and / or additive processes (e.g., printing). The PCB stackup may be formed to have a thickness corresponding to a desired height of the wall 114 from a first (e.g., bottom) end 308 to a second (e.g., top) end 310. Any circuit features may be formed during or after the PCB stackup is formed. The PCB stackup may then be cut to form the plurality of walls 114.

[0028] exist Figure 4 In the example shown, vias are formed in the wall 114 when the PCB stackup is manufactured. In this example, each non-conductive layer has a conductive micro via 404 formed therethrough. The micro via 404 through each non-conductive layer 402 is electrically coupled to the micro via 404 of the adjacent layer 402 to form a composite via through the wall 114 from the bottom end 308 to the top end 310. Each non-conductive layer 402 and micro via 404 can be formed in any suitable manner, such as a via process involving successive lamination of the corresponding non-conductive layers. Although Figure 4 The example shown shows each micro via 404 stacked vertically aligned to form a composite via, but the micro vias 404 do not need to be vertically aligned. For example, horizontal circuit features can be formed in any given layer of the wall 114, and micro vias that electrically couple adjacent layers can be formed at any appropriate location along the horizontal circuit features. The circuit features can be used to include other circuit features in the wall 114, such as an antenna. In this way, the micro vias 404 can be dispersed throughout the wall 114, but still allow composite electrical coupling from the top to the bottom of the wall 114 if desired. The walls 114 can be formed into their final (e.g., fully cured) state before being assembled with the PCB base plate 102 and the top plate 116.

[0029] Figure 5 1 is a perspective view of an exemplary top plate 116. The top plate 116 can be formed into its final (e.g., fully cured) state prior to being assembled with the walls 114. The top plate 116 can be a planar structure configured to be mounted to the top ends 310 of the walls 114. The top plate 116 defines a first surface 502 and a second surface 504 opposite the first surface 502. The first surface 206 can be planar and configured to be mounted to the top ends 310 of the plurality of walls 114. Figure 5The top plate 116 is shown in an inverted orientation, with the first surface 502 mounted to the top ends 310 of the walls 114 facing upward. In one example, the first surface 206 can define a plurality of bonding pads 506 that can be mounted to the top ends 310 of the plurality of walls 114. Although the bonding pads 506 are shown here as strips, a plurality of smaller circular pads can be used instead of strip pads. The top plate 116 can have any suitable thickness and can be formed from any suitable material.

[0030] In one example, the top plate 116 is a rigid sheet of non-conductive material. In another example, the top plate 116 is formed as a PCB stackup, in which a planar member having multiple non-conductive layers stacked on top of each other is formed. One or more circuit features, such as circuit traces, transmission lines, and vias, can be formed in or on the top plate 116 along with other features of, for example, one or more heat blocks or semiconductor dies. For example, one or more vias can be made to pass through the top plate 116 to electrically couple with vias in one or more walls 114. Bonding pads can be formed on the second surface 504 of the top plate 116 to electrically couple with circuit features in the top plate 116. In one example, one or more antennas can be made on the second surface 504 of the top plate 116 or in the top plate 116. The top plate 116 can be configured to be cut along the line 104 after being assembled with the wall 114 and the PCB bottom plate 102 to form different modules 101 as described above.

[0031] Figure 6 1 is a perspective view of an exemplary cover structure 110 formed by mounting a plurality of walls 114 to a top plate 116. Top ends 310 of the plurality of walls 114 may be aligned with bonding pads 506 on a first surface 502 of the top plate 116 and configured to define one or more interior cavities 112 as described above. Conductive glue may be placed between the top ends 310 (e.g., bonding pads 316) of the walls 114 and the bonding pads 506 on the first surface 502. The conductive glue may be sintered to physically bond the walls 114 to the top plate 116 and form the cover structure 110. In examples where the walls 114 have vias extending therethrough, the sintered conductive glue may also electrically couple the vias in the walls 114 to circuit features in the top plate 116. In other examples, non-conductive glue or other adhesives may be used in place of or in conjunction with the conductive glue to bond the walls 114 to the top plate 116.

[0032] exist Figure 1In the example shown, the panel 100 includes a plurality of identical modules 101 positioned thereon. Thus, a plurality of identical instances of walls 114 and internal cavities 112 may be created on the cover structure 110, with appropriate areas 104 therebetween to allow for cutting. In other examples, a single module may be created on the panel 100 and, correspondingly, on the cover structure 110. Each internal cavity 112 may have any suitable shape and size, and the walls 114 may have any suitable height and width.

[0033] Figure 7 is a cross-sectional view of PCB substrate 102 having die 108 mounted on die bond pads 208 and thermally coupled to heat block 206. Die 108 may be mounted and wire bonded to first surface 204 of PCB substrate 102, if desired.

[0034] Figure 8 8 is a cross-sectional view of the cover structure 110 mounted to the PCB base plate 102. The cover structure 110 can be mounted to the PCB base plate 102 by aligning the bottom end 308 of the wall 114 (e.g., the bonding pad on the bottom end 308) with the bonding pad on the first surface 702 of the PCB base plate 102 and placing solder 802 therebetween. The solder 802 can then be reflowed to physically bond the cover structure 110 to the PCB base plate 102. Advantageously, by using a conductive glue 804 for the bond between the top plate 116 and the wall 114, and using solder 802 for the bond between the wall 114 and the PCB base plate 102, the bond between the top plate 116 and the wall 114 can remain solid (i.e., not reflowed) during the reflow of the solder 802. In other examples, a conductive glue or a non-conductive adhesive can be used to bond the cover structure 110 to the PCB base plate 102.

[0035] The panel 100 can then be cut along the lines 104 to form a plurality of individual modules 101, each having a cover mounted to the PCB substrate to form an enclosed cavity around one or more dies 108. In an example, the cover structure 110 has the same lateral dimensions as the PCB substrate 102, so that a single cover structure 110 is mounted to the PCB substrate 102. In other examples, multiple cover structures 110 can be mounted to a single PCB substrate 102. In such other examples, each cover structure can cover a different area of ​​the PCB substrate 102, for example, mounted in a strip across the first surface 204 of the PCB substrate 102.

[0036] like Figure 8As shown, vias 806 in wall 114 can be electrically coupled to circuit features in PCB bottom plate 102 and vias 808 in top plate 116. Vias 808 can extend through top plate 116 from interior surface 502 to exterior surface 504 of top plate 116 and terminate at pads 810 on exterior surface 504 of top plate 116. This allows electrical coupling to circuit features in PCB bottom plate 102 at the exterior surface of the cover of module 101.

[0037] Advantageously, electrically coupling the module 101 to the PCB base plate 102 via the outer surface 504 of the cover provides more external surface area with which external electrical coupling can be performed. This allows the external electrical coupling bonding pads to be disposed on the outer surface 504 of the cover, rather than on the back side of the PCB base plate 102. This in turn makes the back side of the PCB base plate 102 more conducive to heat transfer, thereby allowing, for example, a larger heat sink to be mounted to the back side and thermally coupled to the die 108 in the internal cavity. This allows the resulting module 101 to be mounted to the PCB in a flip chip manner, wherein the outer surface 504 of the cover has external signal connections thereon and is mounted to the PCB with the back side facing away from the PCB, and can be used to mount a heat sink to the PCB.

[0038] Fig. 9 9 is a cross-sectional view of another example panel 900 having a plurality of modules 901. Panel 900 may be constructed in a similar manner to panel 100 by forming a cover structure 910 and mounting the cover structure 910 to a PCB substrate 102 to form panel 900. However, Fig. 9 The cover structure 910 is used with Figure 1 The cover structure 110 is formed by a different process, and the cover structure 910 is formed by a single PCB stack including walls 914 and a top plate 916.

[0039] To form the cover structure 910, a planar PCB stackup may be formed having a height of the cover structure 910 from the wall end 908 to the outer surface 909. Material is then removed from the side of the PCB stackup opposite the outer surface 909 to form one or more internal cavities 912 in the cover structure 910. In one example, the "de-capping" process described in US 10,321,560 and US 10,772,220 may be used to form a dummy core in the PCB stackup in an area corresponding to the internal cavity 912. As described in these patents, the dummy core may then be removed to form the wall portion 914, the top plate 916, and the internal cavity 912. U.S. Patent No. 10,321,560, entitled "Dummy Core Plus Plating Resist Restriction Resin Process and Structure" and U.S. Patent No. 10,772,220, entitled "Dummy Core Restriction Resin Process and Structure", are incorporated herein by reference. In another example, the cover structure 910 may be formed by forming a PCB stackup and then removing material by mechanical milling to create one or more internal cavities 912 .

[0040] One or more circuit features may be formed in the cap structure 910 during or after the construction of the PCB stackup during a decapping process or a machining milling process. For example, a through hole 908 may be formed by drilling through the PCB stackup from the wall end 908 through the cap structure 910 to the outer surface 909, and the cap structure 910 may be formed from the PCB stackup after the PCB stackup is fully cured. Alternatively, micro vias may be formed in one or more layers of the PCB stackup and in a manner similar to that described with respect to FIG. Figure 4 The walls 114 in FIG. 1 are electrically coupled together in a manner similar to that described above to form a composite via.

[0041] Once formed, the cover structure 910 may be formed as described above with respect to Figure 8 The same method discussed above is mounted to the PCB base plate 102 to form the panel 900. Fig. 9 In the example discussed, the wall 914 is secured to the top plate 916 via a cured prepreg 905 that is part of the PCB stackup used to form the cover structure 910. Thus, when the cover structure 910 is soldered to the PCB base plate 102, the bond between the wall 114 and the top plate 916 remains secure.

[0042] exist Fig. 9In the example shown, the panel 900 includes a plurality of identical modules 901 thereon. Thus, multiple instances of identical walls and internal cavities 912 may be generated throughout the cover structure 910, with appropriate areas therebetween to allow for cutting. The panel 900 may be cut along lines 904 to form the plurality of modules 901. In other examples, a single module may be generated on the panel 900 and, correspondingly, on the cover structure 910. Each internal cavity 912 may have any appropriate shape and size, and the walls may have any appropriate height and width.

[0043] The vias 906 in the cover structure 910 can be electrically coupled to circuit features in the PCB base plate 102 by being soldered to bonding pads on the PCB base plate 102. The vias 906 can terminate at bonding pads 920 on the outer surface 909 of the cover structure 910. This allows for electrical coupling to circuit features in the PCB base plate 102 at the outer surface of the cover of the module 901.

[0044] Fig.10 is a cross-sectional view of another exemplary panel 1000, wherein a plurality of modules 1001, 1002 are defined. The panel 1000 can be Figure 2-8 The process described can also be formed by referring to Fig. 9 The panel 1000 illustrates that modules 1001, 1002 that are different from each other can be produced on the same panel 1000. For example, module 1001 has additional walls 1014, thereby defining two internal cavities 1012, while module 1002 has a single internal cavity 1012. The board 1000 also illustrates that one or more dies 1018 can be mounted on the inner surface 1004 of the top plate 116. Circuit traces and / or vias passing through the cover structure 1010 can electrically couple the die 1018 to circuit features in the PCB bottom plate 102, and / or to bonding pads 1020 on the outer surface 1009 of the cover structure 1010.

[0045] In one example, a module may be constructed according to the methods described herein to produce a single module having multiple internal cavities that are stacked “vertically” (i.e., in a direction perpendicular to the first surface 204 of the PCB base plate 102) on top of each other.

[0046] In another example, a plurality of holes are formed through the cover structure as liquid passages into and out of the internal cavity. The hole can be formed in any suitable manner, such as by machining and in any suitable position of the cover structure (e.g., top plate 116 or wall 114). A pump can be used to pump liquid into and out of the internal cavity through the hole to cool any tube core 108 in the internal cavity. In these examples, the combination between the wall 114, the top plate 116 and the PCB bottom plate 102 can be waterproof, for example, by being made with a conductive adhesive in a waterproof manner. Any liquid suitable for cooling the tube core on the PCB can be used.

[0047] The structures and methods described herein enable efficient manufacture and assembly of covers for modules by utilizing PCB manufacturing processes to generate the cover and base PCB and mount them together. In addition, these processes enable electrical functionality to be built into the cover, such as mounting and electrical coupling of dies via the outer surface of the cover electrically coupled to the PCB base and mounted to the inner surface of the cover. Advantageously, the electrical coupling on the outer surface of the cover structure thus enables a larger heat sink to be mounted to the "bottom" side (PCB base side) of the module.

[0048] Furthermore, by constructing the cover structure and the PCB base from common materials, the coefficient of thermal expansion (CTE) value of the cover is close to the CTE value of the PCB base, which helps reduce solder crack failures between the cover and the PCB base as the module reacts to various thermal cycles.

[0049] Vias may also be integrated into the lid, wall, or top plate to provide shielding of the interior cavity. In an example, one or more surfaces (of the lid structure described herein) defining the interior cavity may be plated (e.g., via chemical and / or electrolytic plating) with metal to provide electromagnetic shielding for the cavity or circuit traces.

Claims

1. An electronic module, comprising: a printed circuit board (PCB) stackup, the PCB stackup comprising at least one conductive layer and a plurality of non-conductive layers, the PCB stackup having a first surface and a second surface opposite the first surface, the PCB stackup defining a plurality of first bonding pads on the first surface; a plurality of walls, each wall defining a first end and a second end opposite the first end, the first end of each wall being mounted to a plurality of the first bonding pads, the plurality of walls extending outwardly from the first surface and defining an interior cavity between opposing surfaces of the plurality of walls; as well as A top plate attached to the second end of each wall, the top plate extending above the internal cavity parallel to the first surface, the top plate defining a third surface opposite to the first surface of the PCB stack, the top plate defining a fourth surface opposite to the third surface, wherein the internal cavity is an enclosed space defined by the first surface, the third surface of the top plate, and the opposing surfaces of the plurality of walls.

2. The electronic module according to claim 1, wherein: The plurality of non-conductive layers of the PCB laminate are formed of a cured resin.

3. The electronic module of claim 1, comprising a semiconductor die mounted to the first surface of the PCB stack within the internal cavity.

4. The electronic module according to claim 1, wherein: The top plate defines a plurality of third bonding pads on the third surface, wherein the top plate is attached to the second end of each wall by a conductive adhesive that bonds the plurality of third bonding pads to the second end of each wall.

5. The electronic module according to claim 1, wherein: The top plate is attached to the second end of each wall using a curing resin.

6. The electronic module according to claim 1, wherein: A plurality of the walls include at least one conductive via extending from a first end to a second end of a wall of the plurality of walls, at least one of the conductive vias being coupled to at least one circuit feature of at least one conductive layer of the PCB stack and coupled to at least one circuit feature of the top plate.

7. The electronic module according to claim 6, wherein: The circuit feature of the top plate includes at least one conductive via extending from the third surface to the fourth surface, the at least one conductive via of the top plate being electrically coupled to at least one conductive via in the plurality of walls.

8. The electronic module according to claim 7, wherein: The top plate includes a plurality of fourth bonding pads on a fourth surface, the plurality of fourth bonding pads being electrically coupled to at least one conductive via in the top plate.

9. The electronic module of claim 6, comprising a semiconductor die mounted to the third surface of the top plate, wherein: Circuit features of the top plate include traces electrically coupling the semiconductor die to at least one conductive via in the plurality of walls.

10. The electronic module according to claim 6, wherein: Each wall is a PCB stackup including a plurality of non-conductive layers, each non-conductive layer defining pads thereon and conductive vias extending from the pads to pads of an adjacent non-conductive layer.

11. The electronic module according to claim 1, wherein: The top plate is a PCB stack including at least one conductive layer and a plurality of non-conductive layers.

12. The electronic module of claim 1, comprising an antenna in or on the top plate, the antenna being electrically coupled to a die disposed in the interior cavity.

13. The electronic module according to claim 1, wherein: A plurality of apertures are defined in one or more of the wall or the top plate to circulate liquid into and out of the interior cavity.

14. A method for manufacturing an electronic module, the method comprising: forming a PCB stackup including at least one conductive layer and a plurality of non-conductive layers, the PCB stackup having a first surface and a second surface opposite the first surface, the PCB stackup defining a plurality of first bonding pads on the first surface; generating a plurality of walls, each wall defining a first end and a second end opposite the first end, the first end of each wall being mounted to the plurality of first bonding pads, the plurality of walls extending outwardly from the first surface and defining an interior cavity between opposing surfaces of the plurality of walls; mounting a second end of each of the plurality of walls to a top plate to form a cover structure, the top plate defining a third surface and a fourth surface opposite the third surface, wherein the plurality of walls are mounted such that the top plate extends across the interior cavity, wherein the third surface faces the interior cavity; as well as The cover structure is mounted to the PCB stack by bonding the first end of each wall to a plurality of first bonding pads such that the interior cavity is an enclosed space defined by the first surface of the PCB stack, the third surface of the top plate, and opposing surfaces of the plurality of walls.

15. The method of claim 14, comprising mounting a semiconductor die to a first surface of a PCB stack before mounting the cover structure to the PCB stack, wherein: The semiconductor die is disposed in the interior cavity after mounting the lid structure to the PCB stack.

16. The method according to claim 14, wherein: Mounting the second end of each wall to the top plate includes bonding a plurality of third bonding pads on a third surface of the top plate to the second end of each wall with a conductive adhesive.

17. The method according to claim 14, comprising: forming at least one circuit feature in at least one conductive layer of the PCB stackup; forming at least one circuit feature in or on the top plate; as well as forming at least one conductive via in at least one wall of the plurality of walls from a first end to a second end of the at least one wall, wherein bonding the first end of each wall to the plurality of first bonding pads comprises electrically coupling at least one conductive via to at least one circuit feature of the PCB stackup, Wherein mounting the second end of each wall to the top plate includes electrically coupling at least one conductive via to at least one circuit feature of the top plate.

18. The method according to claim 17, wherein: The at least one circuit feature of the top plate includes at least one conductive via extending from the third surface to the fourth surface.

19. The method according to claim 18, wherein: The top plate includes a plurality of fourth bonding pads on a fourth surface, the plurality of fourth bonding pads being electrically coupled to at least one conductive via in the top plate.

20. The method of claim 17, comprising mounting the semiconductor die to a top plate, the at least one circuit feature of the top plate comprising at least one trace electrically coupling the semiconductor die to at least one conductive via in at least one wall.

21. The method according to claim 17, wherein: Generating a plurality of walls and forming at least one conductive via in at least one of the walls comprises: providing a first non-conductive layer having a first side and a second side opposite the first side; forming a first conductive via through the non-conductive layer from the first side to the second side; laminating a second non-conductive layer to the first non-conductive layer to form a PCB stack-up; and Forming a second conductive via through the second non-conductive layer includes electrically coupling the second conductive via to the first conductive via, thereby forming at least one conductive via in the at least one wall as a composite of the first conductive via through the first non-conductive layer and the second conductive via through the second non-conductive layer.

22. The method according to claim 17, wherein: Forming at least one conductive via in at least one wall includes drilling through at least one wall to create a hole extending from the first end to the second end, and plating the hole with a conductive material.

23. The method of claim 17, comprising: A plurality of non-conductive layers are laminated together with at least one conductive layer, wherein forming at least one circuit feature in or on the top plate includes forming at least one circuit feature in the at least one conductive layer.

24. A method for manufacturing a circuit board, the method comprising: forming a first PCB stackup including at least one conductive layer and a plurality of non-conductive layers, the first PCB stackup having a first surface and a second surface opposite the first surface, the first PCB stackup defining a plurality of first bonding pads on the first surface; forming a second PCB stackup including at least one conductive layer and a plurality of non-conductive layers, the second PCB stackup having a third surface and a fourth surface opposite to the third surface; forming an internal cavity in the third surface of the second PCB stack; as well as The second PCB stack is mounted to the first PCB stack by bonding the third surface of the second PCB stack to the plurality of first bonding pads such that the interior cavity is an enclosed space defined by the first surface of the PCB stack and the second PCB stack.

25. The method according to claim 24, wherein: Forming the internal cavity recess includes decapping the second PCB stack.

26. The method according to claim 24, wherein: Forming the internal cavity includes machining away material from the third surface of the second PCB stack-up.

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