Display substrate, display mother board, display panel and display device

Abstract

The invention provides a display substrate. The display substrate comprises a display area, a binding area, a binding pair area, a side edge area, a first corner area and a second corner area, a substrate base plate; a gate driving circuit; a plurality of first signal lines located in the side region, the first corner region and the second corner region; wherein the multiple first signal lines comprise initial signal lines and initial signal leads, the initial signal leads are located on the sides, close to the gate drive circuit, of the initial signal lines, and the initial signal lines and the initial signal leads extend in the second direction and are electrically connected through first connecting lines in the second corner area; an anti-static structure is arranged on the plurality of first signal lines, the anti-static structure is located on at least one of a first position and a second position, and the first position comprises the joint of the initial signal line, the initial signal lead and the first connecting line; and the second position comprises parts of the plurality of first signal lines, which are positioned on one side, close to the binding pair region, of the row where the first-stage shift register unit is positioned.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display substrate, a display motherboard, a display panel and a display device. Background Art

[0002] At present, through the blocking exposure and partial exposure process, a mask pattern can be reused to expose display substrate areas of multiple sizes on the same display motherboard, thereby forming display substrates of multiple sizes on the same display motherboard at the same time. In this way, the research and development cost of the mask can be saved. However, the small-sized display substrate obtained in this way will lack an anti-static unit, which will lead to a weak anti-static ability of the display substrate. Summary of the invention

[0003] In view of the above problems, the present disclosure provides a display substrate, a display motherboard, a display panel and a display device.

[0004] According to a first aspect of the present disclosure, a display substrate is provided, comprising:

[0005] A display area, a binding area, a binding pair area, a side area, a first corner area, and a second corner area, wherein the side area and the display area are arranged along a first direction, the binding pair area, the display area, and the binding area are arranged in sequence along a second direction, the first direction and the second direction intersect, the first corner area is located between the side area and the binding pair area, and at least partially surrounds a first corner of the display area, and the second corner area is located between the side area and the binding area, and at least partially surrounds a second corner of the display area;

[0006] substrate substrate;

[0007] A gate driving circuit disposed on the substrate and located in the side area, the gate driving circuit comprising a cascaded multi-stage shift register unit;

[0008] A plurality of first signal lines disposed on the substrate and located in the side area, the first corner area, and the second corner area;

[0009] Wherein, the plurality of first signal lines are located on a side of the gate driving circuit away from the display area;

[0010] The plurality of first signal lines include a start signal line and a start signal lead line, the start signal lead line is located on a side of the start signal line close to the gate drive circuit, the start signal line and the start signal lead line both extend along the second direction, and are electrically connected at the second corner region through a first connection line;

[0011] An anti-static structure is provided on the multiple first signal lines, and the anti-static structure is located at at least one of a first position and a second position, the first position includes the connection between the starting signal line, the starting signal lead and the first connecting line, and the second position includes the multiple first signal lines located at a side of the row where the first-stage shift register unit is located close to the binding pair area.

[0012] According to an embodiment of the present disclosure, the anti-static structure located at the first position includes:

[0013] a first welding structure, at the connection between the starting signal line and the first connecting line, the first welding structure welds the starting signal line and the first connecting line together; and / or,

[0014] A second welding structure is provided at the connection between the starting signal lead wire and the first connecting wire, and the second welding structure welds the starting signal lead wire and the first connecting wire together.

[0015] According to an embodiment of the present disclosure, the display substrate includes a first conductive layer, a second conductive layer located on a side of the first conductive layer away from the base substrate, and a third conductive layer located on a side of the second conductive layer away from the second conductive layer;

[0016] Wherein, the display substrate further comprises a first transfer structure located in the third conductive layer, the start signal line is located in the first conductive layer, and the first connection line is located in the second conductive layer;

[0017] The starting signal line includes a first connection portion and a signal line body, the orthographic projection of the first connection portion on the base substrate at least partially overlaps with the orthographic projection of the first adapter structure on the base substrate, and, in the overlapping area, the first connection portion is electrically connected to the first adapter structure through at least one first via hole;

[0018] The orthographic projection of the first connecting line on the base substrate at least partially overlaps with the orthographic projection of the first adapter structure on the base substrate, and, in the overlapping area, the first connecting line is electrically connected to the first adapter structure through at least one second via hole;

[0019] The orthographic projection of the first fusion structure on the base substrate partially overlaps with the orthographic projection of the first connecting portion on the base substrate, the orthographic projection of the signal line body on the base substrate, and the orthographic projection of the first connecting line on the base substrate, and, in the overlapping area, the first fusion structure fuses the first connecting portion, the signal line body, and the first connecting line together.

[0020] According to an embodiment of the present disclosure, the first connecting wire includes a second connecting portion and a connecting wire body, the orthographic projection of the second connecting portion on the base substrate at least partially overlaps with the orthographic projection of the first adapter structure on the base substrate, and, in the overlapping area, the second connecting portion is electrically connected to the first adapter structure through the second via hole, and the first fusion structure includes:

[0021] a first fusion portion, wherein the orthographic projection of the first fusion portion on the base substrate partially overlaps with the orthographic projection of the first connection portion on the base substrate and the orthographic projection of the second connection portion on the base substrate, and, in the overlapping area, the first fusion portion fuses the first connection portion and the second connection portion together; and / or

[0022] A second fusion portion, wherein the orthographic projection of the second fusion portion on the base substrate partially overlaps with the orthographic projection of the signal line body on the base substrate and the orthographic projection of the connecting line body on the base substrate, and, in the overlapping area, the second fusion portion fuses the signal line body and the connecting line body together.

[0023] According to an embodiment of the present disclosure, the orthographic projection of the first fusion portion on the base substrate and the orthographic projection of the second fusion portion on the base substrate are located on the same side of the orthographic projection of the second connection portion on the base substrate, and the orthographic projection of the first fusion portion on the base substrate and the orthographic projection of the second fusion portion on the base substrate are arranged at intervals.

[0024] According to an embodiment of the present disclosure, the display substrate further comprises a second transfer structure located in the third conductive layer, and the start signal lead is located in the first conductive layer;

[0025] The start signal lead includes a third connection portion and a lead body, the orthographic projection of the third connection portion on the base substrate at least partially overlaps with the orthographic projection of the second transfer structure on the base substrate, and, in the overlapping area, the third connection portion and the second transfer structure are electrically connected through at least one third via hole;

[0026] The orthographic projection of the first connecting line on the base substrate at least partially overlaps with the orthographic projection of the second transfer structure on the base substrate, and, in the overlapping area, the first connecting line and the second transfer structure are electrically connected through at least one fourth via hole;

[0027] The orthographic projection of the second welding structure on the base substrate partially overlaps with the orthographic projection of the second connecting portion on the base substrate, the orthographic projection of the lead body on the base substrate, and the orthographic projection of the first connecting line on the base substrate, and, in the overlapping area, the second welding structure fuses the second connecting portion, the lead body, and the first connecting line together.

[0028] According to an embodiment of the present disclosure, the first connecting wire further includes a fourth connecting portion and a connecting wire body, the orthographic projection of the fourth connecting portion on the base substrate at least partially overlaps with the orthographic projection of the second adapter structure on the base substrate, and, in the overlapping area, the fourth connecting portion is electrically connected to the second adapter structure, and the second fusion structure includes:

[0029] a third fusion portion, wherein the orthographic projection of the third fusion portion on the substrate substrate partially overlaps with the orthographic projection of the third connection portion on the substrate substrate and the orthographic projection of the fourth connection portion on the substrate substrate, and, in the overlapping area, the third fusion portion 1 fuses the third connection portion and the fourth connection portion together; and / or

[0030] A fourth welding portion, wherein the orthographic projection of the fourth welding portion on the base substrate partially overlaps with the orthographic projection of the lead body on the base substrate and the orthographic projection of the connecting wire body on the base substrate, and, in the overlapping area, the fourth welding portion welds the lead body and the connecting wire body together.

[0031] According to an embodiment of the present disclosure, the orthographic projection of the third fusion portion on the base substrate and the orthographic projection of the fourth fusion portion on the base substrate are located on different sides of the orthographic projection of the third connection portion on the base substrate, and the orthographic projection of the third fusion portion on the base substrate and the orthographic projection of the fourth fusion portion on the base substrate are arranged at intervals.

[0032] According to an embodiment of the present disclosure, the materials of the first welding structure and the second welding structure include solid welding materials, the first welding structure welds the starting signal line and the first connecting line together through at least one first welding hole, and the second welding structure welds the starting signal lead and the first connecting line together through at least one second welding hole, and the aperture of at least one first welding hole and at least one second welding hole is less than or equal to the line width of the first connecting line.

[0033] According to an embodiment of the present disclosure, an orthographic projection of at least one of the first welding holes and at least one of the second welding holes on the base substrate at least partially overlaps with an orthographic projection of the first connecting line on the base substrate.

[0034] According to an embodiment of the present disclosure, the materials of the first welding structure and the second welding structure include solid welding material or liquid welding material, the first welding structure welds the starting signal line and the first connecting line together through a third welding hole, and the second welding structure welds the starting signal lead and the first connecting line together through a fourth welding hole, and the apertures of the third welding hole and the fourth welding hole are larger than the line width of the first connecting line.

[0035] According to an embodiment of the present disclosure, the orthographic projections of the third welding hole and the fourth welding hole on the base substrate are spaced apart from the orthographic projection of the first connecting line on the base substrate.

[0036] According to an embodiment of the present disclosure, at least one of the first fusion bonding structure and the second fusion bonding structure is in contact with a surface of the first connection line that is away from the base substrate.

[0037] According to an embodiment of the present disclosure, the display substrate further includes:

[0038] A plurality of third connection lines and at least one fourth connection line disposed on the base substrate and located in the side area;

[0039] Wherein, the plurality of third connection lines extend along the second direction, the at least one fourth connection line extends along the first direction, and the plurality of third connection lines are located on a side of the gate drive circuit away from the start signal lead;

[0040] At least one stage of shift register unit comprises a first input terminal, the first input terminals of the first N stages of shift register units are electrically connected to the plurality of third connection lines, and the first input terminals of shift register units of different stages are electrically connected to different third connection lines;

[0041] The start signal line is electrically connected to the plurality of third connection lines through the at least one fourth connection line, and N is a positive integer.

[0042] According to an embodiment of the present disclosure, the anti-static structure located at the second position includes: a partition structure, on the plurality of first signal lines, a portion located at a side of the partition structure close to the binding pair area and a portion located at a side of the partition structure close to the binding area are separated by the partition structure;

[0043] The start signal lead is fused with at least one of the fourth connection wires through a third fusion structure, and at least one of the fourth connection wires is fused with a plurality of the third connection wires through a fourth fusion structure;

[0044] The partition structure, the third welding structure and the fourth welding structure are located within a preset range.

[0045] According to an embodiment of the present disclosure, the display substrate further includes:

[0046] A frame sealant is disposed on the base substrate, the orthographic projection of the partition structure on the base substrate is located in the side area, and the orthographic projection of the frame sealant on the base substrate covers the orthographic projection of the partition structure on the base substrate.

[0047] According to an embodiment of the present disclosure, the display substrate further comprises a plurality of invalid shift register units, and in the second direction, the plurality of invalid shift register units are located on a side of the gate driving circuit close to the binding pair region;

[0048] The partition structure, the third fusion structure and the fourth fusion structure are located between two adjacent invalid shift register units in the second direction.

[0049] According to a second aspect of the present disclosure, a display motherboard is provided, the display motherboard comprising a first substrate area and a second substrate area, the first substrate area being used to prepare the above-mentioned display substrate;

[0050] The first substrate region and the second substrate region have different sizes in the third direction, and the second substrate region includes a first sub-region and a second sub-region at least partially surrounding the first sub-region;

[0051] The first substrate region includes a fourth conductive layer, the second substrate region includes a fifth conductive layer, and the fourth conductive layer and the fifth conductive layer are in the same layer and made of the same material;

[0052] The pattern of the fourth conductive layer is the same as the pattern of the portion of the fifth conductive layer located in the first sub-region.

[0053] According to a third aspect of the present disclosure, a display panel is provided, comprising the above-mentioned display substrate.

[0054] According to a fourth aspect of the present disclosure, a display device is provided, comprising the above-mentioned display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] The above contents and other objects, features and advantages of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0056] Figure 1 Schematically showing a plan view of a display motherboard in a pair of proportions;

[0057] Figure 2 A partial plan view of a display substrate in a pair of ratios is schematically shown;

[0058] Figure 3 Schematically showing an overall plan view of a display substrate in a pair of ratios;

[0059] Figure 4 Schematically shows a plan view of a display substrate according to an embodiment of the present disclosure;

[0060] Figure 5 A plan view schematically shows the location of an anti-static structure according to an embodiment of the present disclosure;

[0061] Figure 6 schematically illustrates a plan view of a first position according to an embodiment of the present disclosure;

[0062] Figure 7 One of the plan views of a first fusion structure according to an embodiment of the present disclosure is schematically shown;

[0063] Figure 8 One of the plan views of a second fusion structure according to an embodiment of the present disclosure is schematically shown;

[0064] Fig. 9 Schematically shows a plan view of a first welding hole according to an embodiment of the present disclosure;

[0065] Fig.10 Schematically shows a plan view of a second welding hole according to an embodiment of the present disclosure;

[0066] Fig.11 A second plan view schematically shows a first welding structure according to an embodiment of the present disclosure;

[0067] Fig.12 A second plan view schematically shows a second welding structure according to an embodiment of the present disclosure;

[0068] Fig.13 Schematically shows a plan view of a third welding hole according to an embodiment of the present disclosure;

[0069] Fig.14 Schematically shows a plan view of a fourth welding hole according to an embodiment of the present disclosure;

[0070] Fig.15 The third plan view schematically shows the first welding structure according to an embodiment of the present disclosure:

[0071] Fig.16 The third plan view schematically shows the second welding structure according to the embodiment of the present disclosure:

[0072] Fig.17 The equivalent circuit diagram of the shift register unit according to the embodiment of the present disclosure is schematically shown;

[0073] Fig.18 One of the schematic diagrams of a display motherboard according to an embodiment of the present disclosure is schematically shown;

[0074] Fig.19 A plan view schematically shows the positions of the third welding structure and the fourth welding structure according to an embodiment of the present disclosure;

[0075] Fig. 20 A plan view schematically shows the location of a partition structure according to an embodiment of the present disclosure;

[0076] Fig.21 A plan view schematically shows a frame sealant and a partition structure according to an embodiment of the present disclosure;

[0077] Fig. 22 The second plan view of the display motherboard according to the embodiment of the present disclosure is schematically shown. DETAILED DESCRIPTION

[0078] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0079] It should be noted that in the drawings, the size and relative size of the elements may be exaggerated for the purpose of clarity and / or description. Thus, the size and relative size of each element are not necessarily limited to the size and relative size shown in the drawings. In the specification and drawings, the same or similar reference numerals indicate the same or similar parts.

[0080] When an element is described as being "on" another element, "connected to" another element, or "bound to" another element, the element may be directly on the other element, directly connected to the other element, or directly bound to the other element, or there may be an intermediate element. However, when an element is described as being "directly on" another element, "directly connected to" another element, or "directly bound to" another element, there is no intermediate element. Other terms and / or expressions used to describe the relationship between elements should be interpreted in a similar manner, for example, "between..." versus "directly between...", "adjacent" versus "directly adjacent" or "on..." versus "directly on...", etc. In addition, the term "connection" may refer to a physical connection, an electrical connection, a communication connection, and / or a fluid connection. In addition, the X-axis, the Y-axis, and the Z-axis are not limited to the three axes of a rectangular coordinate system, and may be interpreted in a broader sense. For example, the X-axis, the Y-axis, and the Z-axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purpose of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z such as XYZ, XYY, YZ, and ZZ. As used herein, the term "and / or" includes any and all combinations of one or more of the listed associated items.

[0081] It should be noted that, although the terms "first", "second", etc. may be used herein to describe various parts, components, elements, regions, layers and / or parts, these parts, components, elements, regions, layers and / or parts should not be limited by these terms. Instead, these terms are used to distinguish one part, component, element, region, layer and / or part from another. Thus, for example, the first part, first member, first element, first region, first layer and / or first part discussed below may be referred to as the second part, second member, second element, second region, second layer and / or second part without departing from the teachings of the present disclosure.

[0082] For ease of description, spatial relational terms, such as "upper", "lower", "left", "right", etc., may be used herein to describe the relationship of one element or feature to another element or feature as shown in the figure. It should be understood that the spatial relational terms are intended to cover other different orientations of the device in use or operation in addition to the orientation described in the figure. For example, if the device in the figure is turned upside down, elements described as "below" or "beneath" other elements or features will be oriented "above" or "above" the other elements or features.

[0083] As used herein, the terms "substantially," "about," "approximately," "roughly," and other similar terms are used as terms of approximation rather than as terms of degree, and they are intended to account for the inherent deviations in measured or calculated values ​​that would be recognized by one of ordinary skill in the art. Taking into account factors such as process fluctuations, measurement problems, and errors associated with the measurement of a particular quantity (i.e., limitations of the measurement system), "about" or "approximately" as used herein include the stated value and mean that the particular value is within an acceptable range of deviation as determined by one of ordinary skill in the art. For example, "approximately" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the stated value.

[0084] It should be noted that, in this article, "the same layer" refers to a layer structure formed by using the same film-forming process to form a film layer for forming a specific pattern, and then using the same mask to pattern the film layer through a single composition process. Depending on the specific pattern, a single composition process may include multiple exposure, development or etching processes, and the specific pattern in the formed layer structure may be continuous or discontinuous. That is, multiple elements, components, structures and / or parts located in the "same layer" are made of the same material and are formed through the same composition process. Usually, multiple elements, components, structures and / or parts located in the "same layer" have approximately the same thickness.

[0085] Those skilled in the art should understand that, in this article, unless otherwise specified, the expression "height" or "thickness" refers to the dimension of the surface of each film layer arranged perpendicular to the display substrate, that is, the dimension along the light emitting direction of the display substrate, or the dimension along the normal direction of the display device.

[0086] Figure 1 Schematically showing a plan view of a display motherboard in a pair of ratios, Figure 2 A partial plan view of a display substrate in a pair of ratios is schematically shown, Figure 3 The entire plan view of the display substrate in a pair of ratios is schematically shown.

[0087] In a pair of ratios, a display motherboard is provided, referring to Figure 1 The display motherboard in the comparative example includes a plurality of substrate regions 100, and different substrate regions 100 are used to form display substrates of different sizes. For example, the plurality of substrate regions 100 include a first substrate region 110 and a second substrate region 120. In the third direction, the size of the first substrate region 110 is smaller than the size of the second substrate region 120. For example, the third direction may refer to Figure 1In the horizontal direction of the substrate, that is, the width of the first substrate region 110 is smaller than the width of the second substrate region 120. In this way, after cutting along the first substrate region 110, a display substrate with a first width (hereinafter also referred to as a first display substrate) can be obtained, and after cutting along the second substrate region 120, a display substrate with a second width (hereinafter also referred to as a second display substrate) can be obtained, that is, by cutting a display motherboard, display substrates of two widths can be formed, thereby saving the research and development cost of the mask.

[0088] It should be noted that the above-mentioned cutting step may refer to a rough cutting step performed on the display motherboard. Optionally, in addition to the rough cutting step, a fine cutting step may also be performed, for example, some unnecessary components may be removed or some unnecessary signal lines may be cut off.

[0089] In this comparative example, a mask pattern can be reused to pattern the same film layer on the first substrate region 110 and the second substrate region 120. Exemplarily, the display motherboard includes a first film layer 130, and the first film layer 130 may include a plurality of signal lines. The first film layer 130 is taken as an example to illustrate the composition of the reuse of a mask pattern. First, a conductive material and a photoresist for preparing the first film layer 130 are formed in the first substrate region 110 and the second substrate region 120. Afterwards, the same mask pattern is reused to expose the photoresist on the first substrate region 110 and the second substrate region 120, wherein when the second substrate region 120 is exposed, the complete pattern of the first mask pattern can be used for exposure, and when the first substrate region 110 is exposed, a part of the pattern in the first mask plate pattern can be shielded, so as to expose the first substrate region 110 using the local pattern on the first mask plate. Afterwards, by developing, the desired photolithography patterns can be formed on the photoresists of the first substrate region 110 and the second substrate region 120, respectively. Then, based on the photolithography patterns on the first substrate region 110 and the second substrate region 120 , the conductive material is etched to form the first film layer 130 required in the first substrate region 110 and the second substrate region 120 .

[0090] In this exposure mode, the first film layer 130 formed on the second substrate region 120 is a complete pattern, while the first film layer 130 formed on the first substrate region 110 is an incomplete pattern. Therefore, it is necessary to further process the first film layer 130. For example, the redundant signal lines in the first film layer 130 can be cut off or removed, and some signal lines can also be overlapped, so as to ensure that each signal line on the final display substrate can transmit electrical signals as required.

[0091] However, the display substrate obtained by the above method may have some missing components. For example, anti-static units can be formed on the four corners of the upper left and upper right (two corners on the second display substrate close to the binding area), the lower left and the lower right (two corners on the second display substrate close to the binding area) of the second display substrate, and the anti-static unit can release the static electricity on the signal line electrically connected to it to the ground line in time, thereby preventing excessive static electricity accumulation on the signal line. On the first display substrate, the anti-static units on the upper left and upper right (two corners on the first display substrate close to the binding area) will be cut off, resulting in the lack of anti-static protection on the upper left and upper right corners of the first display substrate. It should be noted that the left, right, top and bottom can be the left, right, top and bottom of the display substrate (screen) viewed by the human eye during display.

[0092] Moreover, in the first display substrate formed in the above manner, some signal lines on the upper left and upper right sides are exposed due to incomplete coverage by the encapsulation layer 150, and the exposed signal lines are very likely to be exposed to static electricity. Figure 2 , a plurality of signal lines 140 are arranged at the upper left corner of the display substrate, wherein four signal lines 140 on the left are not effectively covered by the encapsulation layer 150 and are exposed.

[0093] Reference Figure 3 The four exposed signal lines 140 include a start signal line 141 for providing a start signal to a gate drive circuit, and the start signal line 141 is electrically connected to the gate drive circuit through a start signal lead 142. The start signal line 141 and the start signal lead 142 both extend along the second direction Y, and are electrically connected at the lower left and lower right corners of the first display substrate through a connection line 160 extending along the first direction X, and the first direction X intersects with the second direction Y. For example, the start signal line 141 and the start signal lead 142 are in the same layer and are provided with the same material, the connection line 160 and the start signal line 141 are located in different film layers, and the three are electrically connected through corresponding connection holes. As mentioned above, there is a risk that the starting signal line 141 is not fully covered by the packaging layer and is exposed (hereinafter this position is also referred to as the exposure risk position LD). The starting signal line 141 extends from the upper end to the lower end of the display substrate, which makes the starting signal line 141 longer. There is an inflection point GD at the connection between the starting signal line 141 and the starting signal lead 142. Therefore, once static electricity is introduced into the exposed starting signal line 141, the introduced static electricity is likely to accumulate in large quantities at the connection between the starting signal line 141 and the starting signal lead 142 (that is, the inflection point GD), which makes it very easy for static electricity to be released at the inflection point GD, and then causes nearby signal lines, transfer structures or related components to be broken down by static electricity.

[0094] In view of this, an embodiment of the present disclosure provides a display substrate. A display motherboard used to prepare the display substrate may include a plurality of substrate regions, and different substrate regions are used to prepare display substrates of different sizes.

[0095] The display substrate in the embodiment of the present disclosure includes: a display area, a binding area, a binding pair area, a side area, a first corner area and a second corner area. The side area and the display area are arranged along a first direction, the binding pair area, the display area and the binding area are arranged in sequence along a second direction, the first direction and the second direction intersect, the first corner area is located between the side area and the binding pair area, and at least partially surrounds the first corner of the display area, and the second corner area is located between the side area and the binding area, and at least partially surrounds the second corner of the display area.

[0096] The display substrate in the embodiment of the present disclosure further includes: a base substrate, a gate driving circuit disposed on the base substrate and located in the side region, and a plurality of first signal lines disposed on the base substrate and located in the side region, the first corner region, and the second corner region. The gate driving circuit includes a cascaded multi-stage shift register unit.

[0097] Among them, the plurality of first signal lines are located on a side of the gate drive circuit away from the display area. The plurality of first signal lines include a start signal line and a start signal lead, the start signal lead is located on a side of the start signal line close to the gate drive circuit, the start signal line and the start signal lead both extend along the second direction, and are electrically connected in the second corner area through a first connecting line. An antistatic structure is provided on the plurality of first signal lines, the antistatic structure is located on at least one of a first position and a second position, the first position includes the connection between the start signal line, the start signal lead and the first connecting line, and the second position includes a portion of the plurality of first signal lines located on one side of the row where the first-stage shift register unit is located close to the binding pair area.

[0098] For display substrates of different sizes prepared by reusing mask patterns, even if some sizes of display substrates lack some anti-static units, the above-mentioned anti-static structure can improve the problem of static electricity accumulation at the connection between the start signal line (and / or the start signal lead) and the first connecting line, thereby reducing the risk of static electricity breakdown at the connection between the start signal line (and / or the start signal lead) and the first connecting line, thereby improving the product yield of the display substrate under this preparation scheme.

[0099] Combine the following Figures 4 to 22 The display substrate in the embodiment of the present disclosure is described in detail.

[0100] Figure 4 A plan view of a display substrate according to an embodiment of the present disclosure is schematically shown.

[0101] See also Figure 4, the display substrate of the embodiment of the present disclosure includes: a display area AA, a binding area DP, a binding area DPO, a side area CB, a first corner area GJ1 and a second corner area GJ2, the side area CB and the display area AA are arranged along a first direction X, the binding area DPO, the display area AA and the binding area DP are arranged in sequence along a second direction Y, the first direction X and the second direction Y intersect, the first corner area GJ1 is located between the side area CB and the binding area DPO, and at least partially surrounds the first corner of the display area AA, the second corner area GJ2 is located between the side area CB and the binding area DP, and at least partially surrounds the second corner of the display area AA. For example, the second direction Y can be Figure 4 The vertical direction in the first direction X can be Figure 4 The horizontal direction in the horizontal direction, that is, the second direction Y and the first direction X are perpendicular to each other.

[0102] In the embodiment of the present disclosure, the display area AA may have various shapes. For example, the display area AA may be provided in various shapes such as a polygon (e.g., a rectangle) of a closed shape including straight edges, a circle, an ellipse, etc. including curved edges, and a semicircle, a semiellipse, etc. including straight edges and curved edges. In the embodiment of the present disclosure, the display area AA is provided as an area having a quadrilateral shape including straight edges, and it should be understood that this is merely an exemplary embodiment of the present disclosure, and not a limitation of the present disclosure.

[0103] The binding area DP and the binding area DPO can be set on the opposite sides of the display area AA. For example, the binding area DP and the binding area DPO are set on the upper and lower sides of the display area AA, so that the binding area DPO, the display area AA and the binding area DP are arranged in sequence along the second direction Y.

[0104] The display substrate may include two side regions CB, which are arranged on opposite sides of the display area AA and are located on different sides of the display area AA from the binding area DP and the binding pair area DPO. For example, the two side regions CB are located on the left and right sides of the display area AA, so that the side regions CB and the display area AA are arranged along the first direction X.

[0105] The shape of the display area AA may include a rectangle, and the rectangular display area AA has four corners, wherein the first corner may refer to the corner of the display area AA close to the binding area DPO, and the second corner may refer to the corner of the display area AA close to the binding area DP. Figure 4, the first corner may refer to the upper left corner or the upper right corner of the display area AA, and the second corner may refer to the lower left corner or the lower right corner of the display area AA. The first corner area GJ1 may surround the periphery of the first corner, and the second corner area GJ2 may surround the periphery of the second corner area GJ2. The display substrate may further include at least a plurality of signal lines (such as the first signal line mentioned below) located in the side area CB and a binding pad PAD located in the binding area DP. The plurality of signal lines may extend from the side area CB to the second corner area GJ2, and then extend through the second corner area GJ2 to the binding area DP to be electrically connected to the binding pad PAD in the binding area DP.

[0106] The display substrate may further include a base substrate 200 and a plurality of pixel units P disposed on the base substrate 200 and located in the display area AA, and the plurality of pixel units P may be arranged in an array along the second direction Y and the first direction X. Each pixel unit P may include a plurality of sub-pixels PX, for example, the pixel unit P may include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3. Exemplarily, the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may be set as a red sub-pixel, a green sub-pixel, and a blue sub-pixel, but the embodiments of the present disclosure are not limited thereto.

[0107] The display substrate further includes a plurality of gate lines GL and a plurality of data lines DL disposed on the base substrate 200 and at least located in the display area AA. The gate lines GL extend along the first direction X, and the data lines DL extend along the second direction Y. Exemplarily, one sub-pixel PX is connected to one data line DL and one gate line GL, sub-pixels PX in the same row are connected to the same gate line GL, sub-pixels PX in different rows are connected to different gate lines GL, sub-pixels PX in the same column are connected to the same data line DL, and sub-pixels PX in different columns are connected to different data lines DL.

[0108] The display substrate in the embodiment of the present disclosure further includes: a gate driving circuit 210 disposed on the base substrate 200 and located in the side area CB, and the gate driving circuit 210 includes a cascade of multiple shift register units.

[0109] exist Figure 4 In the embodiment shown, the gate driving circuit 210 is respectively located on the left and right sides of the display area AA. It should be noted that the left and right sides may be the left and right sides of the display substrate (screen) viewed by human eyes during display. The display substrate also includes a driving chip (not shown in the figure), which may be located in the binding area DP.

[0110] The driving chip includes a data driving circuit, which is used to sequentially latch the input data according to the first clock signal and convert the latched data into an analog signal before inputting it to each data line DL of the display substrate. The gate driving circuit 210 is usually implemented by a shift register unit, which converts the second clock signal into an on / off voltage and outputs it to each gate line GL of the display substrate.

[0111] It should be noted that although Figure 4 , the gate driving circuit 210 is shown to be located at the left and right sides of the display area AA, but the embodiments of the present disclosure are not limited thereto, and the gate driving circuit 210 may be located at any suitable position on the display substrate.

[0112] Optionally, each level of shift register unit is connected to a gate line GL, and the shift register units at each level output scanning signals in turn in order to achieve line-by-line scanning of the pixel unit. In some embodiments, each level of shift register unit can also be connected to multiple gate lines. In this way, it can adapt to the development trend of high resolution and narrow frame of display substrate.

[0113] Figure 5 The plan view schematically shows the location of the anti-static structure according to an embodiment of the present disclosure.

[0114] See also Figure 4 and Figure 5 , the display substrate in the embodiment of the present disclosure further includes: a plurality of first signal lines 220 disposed on the base substrate 200 and located in the side area CB, the first corner area GJ1 and the second corner area GJ2. The plurality of first signal lines 220 are located on the side of the gate drive circuit 210 away from the display area AA. The plurality of first signal lines 220 include a start signal line STV and a start signal lead STVY, the start signal lead STVY is located on the side of the start signal line STV close to the gate drive circuit 210, the start signal line STV and the start signal lead STVY both extend along the second direction Y, and are electrically connected in the second corner area GJ2 through the first connection line 230.

[0115] In an embodiment of the present disclosure, both the start signal line STV and the start signal lead STVY extend along the second direction Y from the first corner area GJ1 through the side area CB to the second corner area GJ2. The start signal line STV and the start signal lead STVY are in the same layer and are provided with the same material, and the first connection line 230 and the start signal line STV and the start signal lead STVY are located in different film layers. For example, the first connection line 230 is located in the second conductive layer, and the start signal line STV and the start signal lead STVY are located in the first conductive layer. The first connection line 230 at least partially overlaps with the start signal line STV, and the overlapping portion of the two is electrically connected through a connection hole. The first connection line 230 also at least partially overlaps with the start signal lead STVY, and the overlapping portion of the two is electrically connected through a connection hole.

[0116] The start signal line STV is located outside the start signal lead STVY, and the start signal line STV is electrically connected to the bonding pad PAD in the bonding area DP through the adapter line 240, and then electrically connected to the driver chip through the bonding pad PAD. The start signal lead STVY is electrically connected to the gate drive circuit 210, specifically, to the first N-stage shift register unit in the gate drive circuit 210, thereby providing a start signal for the first N-stage shift register unit.

[0117] Reference Figure 5 In an embodiment of the present disclosure, an anti-static structure E is provided on the plurality of first signal lines 220, and the anti-static structure E is located at at least one of a first position 251 and a second position 252, the first position includes a connection between a start signal line STV, a start signal lead STVY and a first connection line 230, for example, near a connection hole between at least one of the start signal line STV and the start signal lead STVY and the first connection line 230, and the second position includes a portion of the plurality of first signal lines 220 located on a side of a row of first-stage shift register units close to a binding pair area DPO, for example, on the start signal line STV and the start signal lead STVY, above a row of first-stage shift register units.

[0118] In the embodiment of the present disclosure, the first position 251 is also the position on the start signal line STV and the start signal lead STVY where static electricity easily accumulates. The anti-static structure E is provided at this position, which can directly improve the problem of static electricity accumulation. For example, the anti-static structure E may include a structure capable of reducing the connection impedance at the connection. For example, near the connection hole between the start signal line STV (and / or the start signal lead STVY) and the first connection line 230, the start signal line STV (and / or the start signal lead STVY) and the first connection line 230 are welded by additional conductive material. In this way, the contact area between the start signal line STV (and / or the start signal lead STVY) and the first connection line 230 can be increased, thereby reducing the connection impedance between the start signal line STV (and / or the start signal lead STVY) and the first connection line 230, and then directly improving the problem of static electricity accumulation at the connection between the start signal line STV (and / or the start signal lead STVY) and the first connection line 230.

[0119] The second position 252, that is, the area on the start signal line STV and the start signal lead STVY close to the exposed risk position, is provided with an anti-static structure E in this area, which can reduce the static electricity introduced from the outside to the start signal line STV and the start signal lead STVY. For example, at the second position 252, the start signal line STV (and / or the start signal lead STVY) is cut off, so that the part of the start signal line STV (and / or the start signal lead STVY) located at the exposed risk position is insulated from other parts, thereby blocking the static electricity transmission path, and then indirectly improving the problem of static electricity accumulation at the connection between the start signal line STV (and / or the start signal lead STVY) and the first connection line 230.

[0120] In the embodiment of the present disclosure, the anti-static structure E can be located at the first position 251 to reduce the connection impedance between the start signal line STV (and / or the start signal lead STVY) and the first connection line 230; or, the anti-static structure E can be located at the second position 252 to reduce the static electricity introduced from the outside to the start signal line STV (and / or the start signal lead STVY); or, the anti-static structure E can be located at the first position 251 and the second position 252 at the same time, so that the static electricity introduced from the outside to the start signal line STV (and / or the start signal lead STVY) can be reduced, and the connection impedance between the start signal line STV (and / or the start signal lead STVY) and the first connection line 230 can be reduced, thereby better achieving the electrostatic protection effect.

[0121] In this way, for display substrates of different sizes prepared by reusing mask patterns, even if some sizes of display substrates lack some anti-static units, the above-mentioned anti-static structure E can also improve the problem of static electricity accumulation at the connection between the start signal line STV (and / or the start signal lead STVY) and the first connection line 230, thereby reducing the risk of static electricity breakdown at the connection between the start signal line STV (and / or the start signal lead STVY) and the first connection line 230, and improving the product yield of the display substrate under this preparation scheme.

[0122] The display substrate of the embodiment of the present disclosure is further described below.

[0123] Figure 6 A plan view schematically illustrates a first position according to an embodiment of the present disclosure.

[0124] See also Figures 4 to 6 In some specific embodiments, the antistatic structure E located at the first position 251 includes: a first welding structure E11 and / or a second welding structure E12. In other words, the antistatic structure E located at the first position 251 may include only the first welding structure E11; or, the antistatic structure E located at the first position 251 may include only the second welding structure E12, or, the antistatic structure E located at the first position 251 may include both the first welding structure E11 and the second welding structure E12. For the sake of clarity, unless otherwise specified, the display substrate of the embodiment of the present disclosure is described by taking the antistatic structure E located at the first position 251 including both the first welding structure E11 and the second welding structure E12 as an example.

[0125] At the connection between the start signal line STV and the first connection line 230, the first welding structure E11 welds the start signal line STV and the first connection line 230 together to reduce the connection impedance between the start signal line STV and the first connection line 230. At the connection between the start signal lead line STVY and the first connection line 230, the second welding structure E12 welds the start signal lead line STVY and the first connection line 230 together to reduce the connection impedance between the start signal lead line STVY and the first connection line 230.

[0126] In the embodiment of the present disclosure, a via hole can be formed at the connection between the start signal line STV and the first connection line 230 by laser, and then, a welding material is filled into the via hole and heated to form a first welding structure E11. The welding material has conductivity, so that the filled welding material can conduct the start signal line STV and the first connection line 230. Through the first welding structure E11, the conductive area of ​​the start signal line STV and the first connection line 230 can be additionally increased on the basis of the existing conductive structure of the start signal line STV and the first connection line 230, thereby reducing the connection impedance between the start signal line STV and the first connection line 230.

[0127] Accordingly, a via hole can be formed at the connection between the start signal lead STVY and the first connection line 230 by laser, and then, a welding material is filled into the via hole and heated to form a second welding structure E12. The welding material has conductivity, so that the filled welding material can conduct the start signal lead STVY and the first connection line 230. Through the first welding structure E11, the conductive area of ​​the start signal lead STVY and the first connection line 230 can be additionally increased on the basis of the existing conductive structure of the start signal lead STVY and the first connection line 230, thereby reducing the connection impedance between the start signal lead STVY and the first connection line 230.

[0128] Optionally, at least one of the first welding structure E11 and the second welding structure E12 may be made of a welding material with good conductivity, thereby facilitating to reduce the connection impedance between the start signal line STV and the first connection line 230 to a large extent. For example, the welding material may include tungsten and silver.

[0129] Optionally, the first welding structure E11 and the second welding structure E12 are made of the same material, and the first welding structure E11 and the second welding structure E12 can be formed simultaneously, thereby simplifying the preparation process.

[0130] In some specific embodiments, the display substrate includes a first conductive layer 261 , a second conductive layer 262 located on a side of the first conductive layer 261 away from the base substrate 200 , and a third conductive layer 263 located on a side of the second conductive layer 262 away from the second conductive layer 262 .

[0131] In an embodiment of the present disclosure, the first conductive layer 261 may include a gate metal layer, and the second conductive layer 262 may include a source-drain electrode layer. The display substrate also includes a plurality of transistors, each of which includes a first electrode, a second electrode and a gate electrode, wherein one of the first electrode and the second electrode is a source electrode and the other is a drain electrode. The gate electrodes of at least some of the transistors are located in the gate metal layer, and the first electrode and the second electrode of at least some of the transistors are located in the source-drain electrode layer. The third conductive layer 263 may be any conductive film layer located on the side of the source-drain electrode layer away from the base substrate 200, which may be determined according to actual needs, and the embodiments of the present disclosure are not limited to this. For example, the display substrate of the embodiment of the present disclosure may be applied to a liquid crystal display panel, and the third conductive layer 263 may include a pixel electrode layer for setting a pixel electrode or a common electrode layer for setting a common electrode, etc.

[0132] The display substrate further includes a first transfer structure 2631 located in the third conductive layer 263, the start signal line STV is located in the first conductive layer 261, and the first connection line 230 is located in the second conductive layer 262. The start signal line STV includes a first connection portion L1 and a signal line body S1. It should be noted that a portion of the signal line body S1 is covered by the first connection line 230 (specifically, the second connection portion L2 to be mentioned below). Figure 6 The portion of the signal line body S1 is not shown in the figure. The orthographic projection of the first connection portion L1 on the base substrate 200 at least partially overlaps with the orthographic projection of the first adapter structure 2631 on the base substrate 200, and, in the overlapping area, the first connection portion L1 is electrically connected to the first adapter structure 2631 through at least one first via V1. The orthographic projection of the first connection line 230 on the base substrate 200 at least partially overlaps with the orthographic projection of the first adapter structure 2631 on the base substrate 200, and, in the overlapping area, the first connection line 230 is electrically connected to the first adapter structure 2631 through at least one second via V2. The orthographic projection of the first welding structure E11 on the base substrate 200 partially overlaps with the orthographic projection of the first connecting portion L1 on the base substrate 200, the orthographic projection of the signal line body S1 on the base substrate 200, and the orthographic projection of the first connecting line 230 on the base substrate 200, and, in the overlapping area, the first welding structure E11 welds the first connecting portion L1, the signal line body S1 and the first connecting line 230 together.

[0133] In the embodiment of the present disclosure, an insulating layer is provided between the first conductive layer 261 and the third conductive layer 263 and between the first conductive layer 261 and the second conductive layer 262. The first via hole V1 penetrates the insulating layer between the first conductive layer 261 and the third conductive layer 263 and exposes the first connection portion L1. The first via hole V1 is filled with a conductive material. One end of the conductive material in the first via hole V1 is connected to the first transfer structure 2631, and the other end is connected to the first connection portion L1, so that the first transfer structure 2631 can be electrically connected to the first connection portion L1 through the conductive material in the first via hole V1. Optionally, the conductive material in the first via hole V1 and the first transfer structure 2631 form an integral structure. The second via hole V2 penetrates the insulating layer between the second conductive layer 262 and the third conductive layer 263 and exposes the first connection line 230. The second via hole V2 is filled with a conductive material. One end of the conductive material in the second via hole V2 is connected to the first transfer structure 2631, and the other end is connected to the first connection line 230, so that the first transfer structure 2631 can be electrically connected to the first connection line 230 through the conductive material in the second via hole V2. Optionally, the conductive material in the second via hole V2 and the first transfer structure 2631 form an integrated structure.

[0134] Optionally, the first connection portion L1 is electrically connected to the first adapter structure 2631 through a plurality of first via holes V1, and the plurality of first via holes V1 are arranged in an array along the first direction X and the second direction Y. Figure 6 , the first connection portion L1 is electrically connected to the first adapter structure 2631 through six first vias V1, and the six first vias V1 are arranged in three rows and two columns along the first direction X and the second direction Y. The first connection line 230 is electrically connected to the first adapter structure 2631 through a plurality of second vias V2, and the plurality of second vias V2 are arranged in an array along the first direction X and the second direction Y. For example, referring to Figure 6 The first connection line 230 is electrically connected to the first adapter structure 2631 through six second via holes V2, and the six second via holes V2 are arranged in three rows and two columns along the first direction X and the second direction Y.

[0135] Optionally, the orthographic projection of the first welding structure E11 on the base substrate 200 overlaps with the edge of the orthographic projection of the first connecting portion L1 on the base substrate 200, and the orthographic projection of the first welding structure E11 on the base substrate 200 is spaced apart from the orthographic projections of the first via hole V1 and the second via hole V2 on the base substrate 200. In this way, sufficient welding space can be reserved for the first welding structure E11, thereby reducing the impact of the first welding structure E11 on the existing structure.

[0136] In some specific embodiments, the first connecting line 230 includes a second connecting portion L2 and a connecting line body S2, the orthographic projection of the second connecting portion L2 on the base substrate 200 at least partially overlaps with the orthographic projection of the first adapter structure 2631 on the base substrate 200, and, in the overlapping area, the second connecting portion L2 is electrically connected to the first adapter structure 2631 through the second via V2.

[0137] Optionally, the orthographic projection of the second connection portion L2 on the base substrate 200 at least partially overlaps with the orthographic projection of the signal line body S1 on the base substrate 200, wherein the orthographic projection of the second connection portion L2 on the base substrate 200 and the orthographic projection of the first connection portion L1 on the base substrate 200 can be arranged along the second direction Y, the orthographic projections of the plurality of first vias V1 on the base substrate 200 are located within the orthographic projection of the first connection portion L1 on the base substrate 200, and the orthographic projections of the plurality of second vias V2 on the base substrate 200 are located within the orthographic projection of the second connection portion L2 on the base substrate 200.

[0138] Optionally, the plurality of first via holes V1 and the plurality of second via holes V2 are arranged in an array along the first direction X and the second direction Y. For example, referring to Figure 6 The six first via holes V1 and the six second via holes V2 are arranged in six rows and two columns along the first direction X and the second direction Y.

[0139] The first fusion structure E11 includes: a first fusion portion E111 and / or a second fusion portion E112. The orthographic projection of the first fusion portion E111 on the base substrate 200 partially overlaps with the orthographic projection of the first connection portion L1 on the base substrate 200 and the orthographic projection of the second connection portion L2 on the base substrate 200, and, in the overlapping area, the first fusion portion E111 fuses the first connection portion L1 and the second connection portion L2 together. The orthographic projection of the second fusion portion E112 on the base substrate 200 partially overlaps with the orthographic projection of the signal line body S1 on the base substrate 200 and the orthographic projection of the connection line body S2 on the base substrate 200, and, in the overlapping area, the second fusion portion E112 fuses the signal line body S1 and the connection line body S2 together.

[0140] In the embodiments of the present disclosure, the first welding structure E11 may include only the first welding portion E111, or the first welding structure E11 may include only the second welding portion E112, or the first welding structure E11 may include both the first welding portion E111 and the second welding portion E112. For the sake of clarity, unless otherwise specified, the embodiments of the present disclosure are described below by taking the first welding structure E11 including both the first welding portion E111 and the second welding portion E112 as an example.

[0141] In the embodiment of the present disclosure, the orthographic projection of the first fusion portion E111 on the substrate 200 and the orthographic projection of the second fusion portion E112 on the substrate 200 may be located on the same side or different sides of the orthographic projection of the second connection portion L2 on the substrate 200. Exemplarily, the shape of the second connection portion L2 includes a rectangle, and the orthographic projection of the first fusion portion E111 on the substrate 200 and the orthographic projection of the second fusion portion E112 on the substrate 200 may be located on opposite sides of the orthographic projection of the second connection portion L2 on the substrate 200. For example, in the first direction X, one of the orthographic projection of the first fusion portion E111 on the substrate 200 and the orthographic projection of the second fusion portion E112 on the substrate 200 is located on a side of the orthographic projection of the second connection portion L2 on the substrate 200 away from the display area AA, and the other is located on a side of the orthographic projection of the second connection portion L2 on the substrate 200 close to the display area AA. Alternatively, the orthographic projection of the first fusion portion E111 on the substrate 200 and the orthographic projection of the second fusion portion E112 on the substrate 200 may be located on two adjacent sides of the orthographic projection of the second connection portion L2 on the substrate 200. For example, one of the orthographic projection of the first fusion portion E111 on the substrate 200 and the orthographic projection of the second fusion portion E112 on the substrate 200 is located on a side of the orthographic projection of the second connection portion L2 on the substrate 200 close to the binding pair area DPO, and the other is located on a side of the orthographic projection of the second connection portion L2 on the substrate 200 close to the display area AA. The specifics may be determined according to actual needs, and the embodiments of the present disclosure are not listed one by one.

[0142] In some specific embodiments, the orthographic projection of the first welding portion E111 on the base substrate 200 and the orthographic projection of the second welding portion E112 on the base substrate 200 are located on the same side of the orthographic projection of the second connection portion L2 on the base substrate 200, and the orthographic projection of the first welding portion E111 on the base substrate 200 and the orthographic projection of the second welding portion E112 on the base substrate 200 are arranged at an interval.

[0143] For example, in the first direction X, the connecting wire body S2 is connected to the side of the second connecting portion L2 close to the display area AA, and the orthographic projections of the first welding portion E111 and the second welding portion E112 on the base substrate 200 are both located on the side of the orthographic projection of the second connecting portion L2 on the base substrate 200 close to the display area AA. Figure 6, the first welding part E111 and the second welding part E112 are both located on the right side of the second connection part L2, wherein the first welding part E111 is located at the upper right corner of the second connection part L2, and the second welding part E112 is located directly below the first welding part E111. In this way, on the one hand, the effective welding of the first welding part E111 and the second welding part E112 can be ensured, and on the other hand, the first welding part E111 and the second welding part E112 can be ensured to maintain a sufficient distance from other signal lines to prevent the first welding part E111 and the second welding part E112 from being short-circuited with other signal lines.

[0144] Optionally, the shape of the second connection portion L2 may include a rectangle, and the orthographic projection of the first fusion portion E111 on the base substrate 200 overlaps with a rectangular corner of the orthographic projection of the second connection portion L2 on the base substrate 200 .

[0145] In some specific embodiments, the display substrate further includes a second transfer structure 2632 located in the third conductive layer 263 , and the start signal lead STVY is located in the first conductive layer 261 .

[0146] The start signal lead STVY includes a third connection portion L3 and a lead body S3. It should be noted that a portion of the lead body S3 is covered by the first connection line 230 (specifically, the fourth connection portion L4 mentioned below). Figure 6 The lead body S3 is not shown in the figure. The orthographic projection of the third connection portion L3 on the substrate substrate 200 at least partially overlaps with the orthographic projection of the second adapter structure 2632 on the substrate substrate 200, and, in the overlapping area, the third connection portion L3 and the second adapter structure 2632 are electrically connected through at least one third via V3. The orthographic projection of the first connection line 230 on the substrate substrate 200 at least partially overlaps with the orthographic projection of the second adapter structure 2632 on the substrate substrate 200, and, in the overlapping area, the first connection line 230 and the second adapter structure 2632 are electrically connected through at least one fourth via V4. The orthographic projection of the second welding structure E12 on the base substrate 200 partially overlaps with the orthographic projection of the second connection portion L2 on the base substrate 200, the orthographic projection of the lead body S3 on the base substrate 200, and the orthographic projection of the first connection line 230 on the base substrate 200, and, in the overlapping area, the second welding structure E12 welds the second connection portion L2, the lead body S3 and the first connection line 230 together.

[0147] In the embodiment of the present disclosure, the third via hole V3 penetrates the insulating layer between the first conductive layer 261 and the third conductive layer 263, and exposes the third connection portion L3. The third via hole V3 is filled with a conductive material. One end of the conductive material in the third via hole V3 is connected to the second transfer structure 2632, and the other end is connected to the third connection portion L3, so that the second transfer structure 2632 can be electrically connected to the third connection portion L3 through the conductive material in the third via hole V3. Optionally, the conductive material in the third via hole V3 and the second transfer structure 2632 form an integral structure. The fourth via hole V4 penetrates the insulating layer between the second conductive layer 262 and the third conductive layer 263, and exposes the first connection line 230. The fourth via hole V4 is filled with a conductive material. One end of the conductive material in the fourth via hole V4 is connected to the second transfer structure 2632, and the other end is connected to the first connection line 230, so that the second transfer structure 2632 can be electrically connected to the first connection line 230 through the conductive material in the fourth via hole V4. Optionally, the conductive material in the fourth via hole V4 and the second transfer structure 2632 form an integrated structure.

[0148] Optionally, the third connection portion L3 is electrically connected to the second adapter structure 2632 through a plurality of third vias V3, and the plurality of third vias V3 are arranged in an array along the first direction X and the second direction Y. Figure 6 The third connection portion L3 is electrically connected to the second adapter structure 2632 through four third vias V3, and the four third vias V3 are arranged in two rows and two columns along the first direction X and the second direction Y. The first connection line 230 is electrically connected to the second adapter structure 2632 through a plurality of fourth vias V4, and the plurality of fourth vias V4 are arranged in an array along the first direction X and the second direction Y. For example, referring to Figure 6 The first connection line 230 is electrically connected to the second adapter structure 2632 through four fourth via holes V4, and the four fourth via holes V4 are arranged in two rows and two columns along the first direction X and the second direction Y.

[0149] Optionally, the orthographic projection of the second welding structure E12 on the base substrate 200 overlaps with the edge of the orthographic projection of the third connection portion L3 on the base substrate 200, and the orthographic projection of the second welding structure E12 on the base substrate 200 is spaced apart from the orthographic projections of the first via hole V1 and the second via hole V2 on the base substrate 200. In this way, sufficient welding space can be reserved for the second welding structure E12, thereby reducing the impact of the second welding structure E12 on the existing structure.

[0150] In some specific embodiments, the first connecting line 230 also includes a fourth connecting portion L4 and a connecting line body S2, the orthographic projection of the fourth connecting portion L4 on the base substrate 200 at least partially overlaps with the orthographic projection of the second adapter structure 2632 on the base substrate 200, and, in the overlapping area, the fourth connecting portion L4 is electrically connected to the second adapter structure 2632.

[0151] Optionally, the orthographic projection of the fourth connection portion L4 on the base substrate 200 at least partially overlaps with the orthographic projection of the lead body S3 on the base substrate 200, wherein the orthographic projection of the third connection portion L3 on the base substrate 200 and the orthographic projection of the fourth connection portion L4 on the base substrate 200 can be arranged along the second direction Y, and the orthographic projections of the plurality of third vias V3 on the base substrate 200 are located within the orthographic projection of the third connection portion L3 on the base substrate 200, and the orthographic projections of the plurality of fourth vias V4 on the base substrate 200 are located within the orthographic projection of the fourth connection portion L4 on the base substrate 200.

[0152] Optionally, the plurality of third via holes V3 and the plurality of fourth via holes V4 are arranged in an array along the first direction X and the second direction Y. For example, referring to Figure 6 The four third via holes V3 and the four fourth via holes V4 are arranged in four rows and two columns along the first direction X and the second direction Y.

[0153] The second fusion structure E12 includes: a third fusion portion E121 and / or a fourth fusion portion E122. The orthographic projection of the third fusion portion E121 on the base substrate 200 partially overlaps with the orthographic projection of the third connection portion L3 on the base substrate 200 and the orthographic projection of the fourth connection portion L4 on the base substrate 200, and, in the overlapping area, the third fusion portion E121 fuses the third connection portion L3 and the fourth connection portion L4 together. The orthographic projection of the fourth fusion portion E122 on the base substrate 200 partially overlaps with the orthographic projection of the lead body S3 on the base substrate 200 and the orthographic projection of the connection line body S2 on the base substrate 200, and, in the overlapping area, the fourth fusion portion E122 fuses the lead body S3 and the connection line body S2 together.

[0154] In the embodiment of the present disclosure, the second welding structure E12 may include only the third welding part E121, or the second welding structure E12 may include only the fourth welding part E122, or the second welding structure E12 may include both the third welding part E121 and the fourth welding part E122. For the sake of clarity, unless otherwise specified, the following description will take the second welding structure E12 including both the third welding part E121 and the fourth welding part E122 as an example to describe the embodiment of the present disclosure.

[0155] In the embodiment of the present disclosure, the orthographic projection of the third fusion portion E121 on the substrate substrate 200 and the orthographic projection of the fourth fusion portion E122 on the substrate substrate 200 may be located on the same side or different sides of the orthographic projection of the fourth connection portion L4 on the substrate substrate 200. Exemplarily, the shape of the fourth connection portion L4 includes a rectangle, and the orthographic projection of the third fusion portion E121 on the substrate substrate 200 and the orthographic projection of the fourth fusion portion E122 on the substrate substrate 200 may be located on opposite sides of the orthographic projection of the fourth connection portion L4 on the substrate substrate 200. For example, in the first direction X, one of the orthographic projection of the third fusion portion E121 on the substrate substrate 200 and the orthographic projection of the fourth fusion portion E122 on the substrate substrate 200 is located on a side of the orthographic projection of the fourth connection portion L4 on the substrate substrate 200 away from the bonding pair area DPO, and the other is located on a side of the orthographic projection of the fourth connection portion L4 on the substrate substrate 200 close to the bonding pair area DPO. Alternatively, the orthographic projection of the third welding portion E121 on the base substrate 200 and the orthographic projection of the fourth welding portion E122 on the base substrate 200 may be located on the same side of the orthographic projection of the fourth connection portion L4 on the base substrate 200. For example, the orthographic projection of the third welding portion E121 on the base substrate 200 and the orthographic projection of the fourth welding portion E122 on the base substrate 200 are both located on a side of the orthographic projection of the fourth connection portion L4 on the base substrate 200 close to the display area AA.

[0156] In some specific embodiments, the orthographic projection of the third fusion portion E121 on the base substrate 200 and the orthographic projection of the fourth fusion portion E122 on the base substrate 200 are located on different sides of the orthographic projection of the third connection portion L3 on the base substrate 200, and the orthographic projection of the third fusion portion E121 on the base substrate 200 and the orthographic projection of the fourth fusion portion E122 on the base substrate 200 are arranged at intervals.

[0157] In the embodiment of the present disclosure, the orthographic projection of the third fusion portion E121 on the base substrate 200 and the orthographic projection of the fourth fusion portion E122 on the base substrate 200 may be located on two adjacent sides of the orthographic projection of the fourth connection portion L4 on the base substrate 200. For example, the orthographic projection of the third fusion portion E121 on the base substrate 200 is located on the side of the orthographic projection of the fourth connection portion L4 on the base substrate 200 close to the display area AA, and the orthographic projection of the fourth fusion portion E122 on the base substrate 200 is located on the side of the orthographic projection of the fourth connection portion L4 on the base substrate 200 close to the binding area DP. Figure 6, the third welding part E121 is located on the right side of the fourth connection part L4, the connecting wire body S2 is connected to the lower part of the fourth connection part L4, wherein the fourth welding part E122 is located below the fourth connection part L4. In this way, on the one hand, the effective welding of the third welding part E121 and the fourth welding part E122 can be ensured, and on the other hand, the third welding part E121 and the fourth welding part E122 can be ensured to maintain a sufficient distance from other signal lines to prevent the third welding part E121 and the fourth welding part E122 from being short-circuited with other signal lines.

[0158] Optionally, the shape of the fourth fusion portion E122 may include a rectangle, and the orthographic projection of the third fusion portion E121 on the base substrate 200 overlaps with the rectangular corner of the orthographic projection of the fourth connection portion L4 on the base substrate 200 .

[0159] Figure 7 One of the plan views schematically shows a first fusion structure according to an embodiment of the present disclosure, Figure 8 One of the plan views schematically shows a second fusion structure according to an embodiment of the present disclosure, Fig. 9 Schematically shows a plan view of a first welding hole according to an embodiment of the present disclosure, Fig.10 The plan view of the second welding hole according to the embodiment of the present disclosure is schematically shown. Figure 7 (and Figure 8 ) shows the surface of the starting signal line (and the starting signal lead) facing away from the substrate 200, Fig. 9 (and Fig.10 ) shows the surface of the starting signal line (and the starting signal lead) close to the base substrate 200.

[0160] Combined with reference Figures 7 to 10 In some specific embodiments, the materials of the first welding structure E11 and the second welding structure E12 include solid welding materials, the first welding structure E11 welds the starting signal line STV and the first connecting line 230 together through at least one first welding hole VR1, and the second welding structure E12 welds the starting signal lead STVY and the first connecting line 230 together through at least one second welding hole VR2, and the apertures of at least one first welding hole VR1 and at least one second welding hole VR2 are less than or equal to the line width of the first connecting line 230.

[0161] In the embodiment of the present disclosure, the materials of the first welding structure E11 and the second welding structure E12 are the same, and both materials may include metal powder. For example, the materials of the first welding structure E11 and the second welding structure E12 both include tungsten powder. The first welding hole and the second welding hole may be formed by a first laser. For example, the wavelength of the first laser may be 900nm to 1200nm, for example, 1064nm. The apertures of the first welding hole and the second welding hole formed by this laser are relatively small. For example, the apertures of the first welding hole and the second welding hole are less than or equal to 10μm.

[0162] In the embodiment of the present disclosure, the first welding structure E11 welds the start signal line STV and the first connection line 230 together through a plurality of first welding holes VR1. Specifically, the first connection portion L1 and the second connection portion L2 are arranged along the second direction Y, and the connection line body S2 and the second connection portion L2 are arranged along the first direction X. In the second direction Y, a first welding hole VR1 is formed at the junction of the first connection portion L1 and the second connection portion L2, and in the first direction X, another first welding hole VR1 is formed at the junction of the connection line body S2 and the second connection portion L2. The first laser can be used to punch holes from the back side of the display substrate to form the first welding hole VR1 and the second welding hole VR2. For example, the first welding hole VR1 formed at the junction of the first connection portion L1 and the second connection portion L2 passes through the first connection portion L1 and exposes a portion of the second connection portion L2, and the first welding hole VR1 formed at the junction of the connection line body S2 and the second connection portion L2 passes through the signal line body S1 and exposes a portion of the connection line body S2.

[0163] Afterwards, tungsten powder is filled in the two first welding holes VR1 to conduct the first connection part L1 and the second connection part L2, and to conduct the signal line body S1 and the connection line body S2. Subsequently, the tungsten powder in the two first welding holes VR1 is heated to be welded, thereby forming the first welding part E111 and the second welding part E112. Since the aperture of the first welding hole VR1 is less than or equal to 10 μm, the space occupied by the formed first welding part E111 and the second welding part E112 is also small, for example, the diameter of either the first welding part E111 or the second welding part E112 is less than or equal to 10 μm.

[0164] In the embodiment of the present disclosure, the second welding structure E12 welds the start signal lead STVY and the first connection line 230 together through a plurality of second welding holes VR2. Specifically, the third connection part L3 and the fourth connection part L4 are arranged along the second direction Y. In the second direction Y, a second welding hole VR2 is formed at the junction of the third connection part L3 and the fourth connection part L4, and the second welding hole VR2 penetrates the third connection part L3 and partially exposes the fourth connection part L4. Also, the connection line body S2 and the fourth connection part L4 are arranged along the second direction Y. In the second direction Y, a second welding hole VR2 is formed at the junction of the connection line body S2 and the fourth connection part L4, and the second welding hole VR2 penetrates the lead line body S3 and partially exposes the connection line body S2.

[0165] Afterwards, tungsten powder is filled in the two second welding holes VR2 to conduct the third connection part L3 and the fourth connection part L4, and the lead wire body S3 and the connection wire body S2. Subsequently, the tungsten powder in the two second welding holes VR2 is heated to be welded, thereby forming the third welding part E121 and the fourth welding part E122. Since the aperture of the second welding hole VR2 is less than or equal to 10 μm, the space occupied by the formed third welding part E121 and the fourth welding part E122 is also small, for example, the diameter of any one of the third welding part E121 and the fourth welding part E122 is less than or equal to 10 μm.

[0166] In some specific embodiments, the orthographic projection of at least one first welding hole VR1 and at least one second welding hole VR2 on the base substrate 200 at least partially overlaps with the orthographic projection of the first connection line 230 on the base substrate 200 .

[0167] In the embodiment of the present disclosure, the first fusion hole VR1 formed may penetrate the first connection portion L1 and the signal line body S1, and expose the surface of the first connection line 230 close to the base substrate 200. For example, the two first fusion holes VR1 respectively expose the surface of the second connection portion L2 close to the base substrate 200 and the surface of the connection line body S2 close to the base substrate 200. The second fusion hole VR2 formed may penetrate the third connection portion L3 and the lead body S3, and expose the surface of the first connection line 230 close to the base substrate 200. For example, the two second fusion holes VR2 respectively expose the surface of the fourth connection portion L4 close to the base substrate 200 and the surface of the connection line body S2 close to the base substrate 200.

[0168] Fig.11 The second plan view schematically shows a first welding structure according to an embodiment of the present disclosure. Fig.12The second plan view schematically shows a second welding structure according to an embodiment of the present disclosure. Fig.13 Schematically shows a plan view of a third welding hole according to an embodiment of the present disclosure, Fig.14 Schematically shows a plan view of a fourth welding hole according to an embodiment of the present disclosure, Fig.15 A third plan view schematically shows a first welding structure according to an embodiment of the present disclosure, Fig.16 The third plan view of the second welding structure according to the embodiment of the present disclosure is schematically shown. Figures 11 to 16 The starting signal line (or starting signal lead) shown is the surface of the starting signal line (or starting signal lead) facing away from the base substrate 200 .

[0169] Combined with reference Figures 11 to 16 In some specific embodiments, the materials of the first welding structure E11 and the second welding structure E12 include solid welding materials or liquid welding materials. The first welding structure E11 welds the starting signal line STV and the first connecting line 230 together through the third welding hole VR3, and the second welding structure E12 welds the starting signal lead STVY and the first connecting line 230 together through the fourth welding hole VR4. The apertures of the third welding hole VR3 and the fourth welding hole VR4 are larger than the line width of the first connecting line 230.

[0170] In some other implementation examples, the apertures of the third welding hole VR3 and the fourth welding hole VR4 may be no larger than the line width of the first connection line 230 , but the apertures of the third welding hole VR3 and the fourth welding hole VR4 are larger than the apertures of the first welding hole VR1 and the second welding hole VR2 .

[0171] In the embodiment of the present disclosure, the materials of the first welding structure E11 and the second welding structure E12 are the same. Optionally, the materials of both may include solid welding materials, for example, the materials of the first welding structure E11 and the second welding structure E12 both include tungsten powder. Optionally, the first welding structure E11 and the second welding structure E12 may both include liquid welding materials, for example, the materials of the first welding structure E11 and the second welding structure E12 both include silver solution, for example, printing ink (INK) containing silver.

[0172] The first welding hole VR1 and the second welding hole VR2 can be formed by a second laser, and the second laser can include a pulsed laser, such as a picosecond laser or a femtosecond laser. The wavelength of the second laser can be 400nm to 600nm, for example, 532nm. The apertures of the first welding hole VR1 and the second welding hole VR2 formed by this laser are relatively large, for example, the apertures of the first welding hole VR1 and the second welding hole VR2 are greater than or equal to 10μm.

[0173] Different from the aforementioned embodiment, since the first welding hole VR1 and the second welding hole VR2 with larger apertures can be formed by the second laser, the materials of the first welding structure E11 and the second welding structure E12 can use liquid welding materials in addition to solid welding materials. This is because the larger aperture allows the liquid welding material to be fully heated, so that the liquid welding material can reach the expected degree of solidification to achieve welding.

[0174] First, the preparation process of the solid welding material used for the first welding structure E11 and the second welding structure E12 in this embodiment is described below.

[0175] In an embodiment of the present disclosure, the first welding structure E11 welds the start signal line STV and the first connecting line 230 together through a plurality of third welding holes VR3. Specifically, the first connecting portion L1 and the second connecting portion L2 are arranged along the second direction Y, and the connecting line body S2 and the second connecting portion L2 are arranged along the first direction X. In the second direction Y, a third welding hole VR3 is formed at the junction of the first connecting portion L1 and the second connecting portion L2, and, in the first direction X, another third welding hole VR3 is formed at the junction of the connecting line body S2 and the second connecting portion L2.

[0176] Different from the above-mentioned embodiment, the second laser can selectively peel off the film layer from the display substrate without damaging other film layers. For example, the insulating layer between the first connection part L1 and the second connection part L2 can be selectively peeled off without damaging the first connection part L1 and the second connection part L2 (or the connection line body S2). Therefore, in this embodiment, the third welding hole VR3 formed at the junction of the first connection part L1 and the second connection part L2 can only expose the surface of one side of the first connection part L1 (for example, the surface away from the side of the base substrate 200), rather than passing through the first connection part L1. Optionally, the third welding hole VR3 formed at the junction of the first connection part L1 and the second connection part L2 is arranged adjacent to the second connection part L2.

[0177] Accordingly, the third welding hole VR3 formed at the junction of the connecting wire body S2 and the second connecting portion L2 only exposes the surface of one side of the signal wire body S1 (for example, the surface away from the base substrate 200), rather than penetrating the signal wire body S1. Optionally, the third welding hole VR3 formed at the junction of the connecting wire body S2 and the second connecting portion L2 is disposed adjacent to the connecting wire body S2.

[0178] In some specific embodiments, the first welding structure E11 contacts the surface of the first connection line 230 on the side away from the base substrate 200. For example, after forming two third welding holes VR3, tungsten powder is filled in the two third welding holes VR3, and the tungsten powder covers the surface of the first connection part L1 on the side away from the base substrate 200 and the surface of the second connection part L2 on the side away from the base substrate 200, thereby connecting the first connection part L1 and the second connection part L2, and the tungsten powder covers the surface of the first connection part L1 on the side away from the base substrate 200 and the surface of the connection line body S2 on the side away from the base substrate 200, thereby connecting the signal line body S1 and the connection line body S2. Then, the tungsten powder in the two third welding holes VR3 is heated to be welded, thereby forming the first welding part E111 and the second welding part E112. Since the aperture of the first welding hole VR1 is greater than or equal to 10 μm, the space occupied by the formed first welding portion E111 and the second welding portion E112 is larger. Compared with the aforementioned embodiment, the connection area between the first welding portion E111 and the second welding portion E112 in this embodiment is larger, which can further reduce the connection impedance, thereby having a better improvement effect on static electricity accumulation.

[0179] In an embodiment of the present disclosure, the second welding structure E12 welds the start signal lead STVY and the first connecting line 230 together through a plurality of fourth welding holes VR4. Specifically, the third connecting part L3 and the fourth connecting part L4 are arranged along the second direction Y, and the connecting line body S2 and the fourth connecting part L4 are arranged along the second direction Y. In the second direction Y, a fourth welding hole VR4 is formed at the junction of the third connecting part L3 and the fourth connecting part L4, and, in the second direction Y, another fourth welding hole VR4 is formed at the junction of the connecting line body S2 and the fourth connecting part L4.

[0180] Different from the above-mentioned embodiment, the second laser can selectively peel off the film layer from the display substrate without damaging other film layers. For example, the insulating layer between the third connection part L3 and the fourth connection part L4 can be selectively peeled off without damaging the third connection part L3 and the fourth connection part L4 (or the connection line body S2). Therefore, in this embodiment, the second welding hole VR2 formed at the junction of the third connection part L3 and the fourth connection part L4 can only expose one side surface of the third connection part L3 (for example, the side surface facing away from the base substrate 200) instead of penetrating the third connection part L3. Optionally, the fourth welding hole VR4 formed at the junction of the third connection part L3 and the fourth connection part L4 is arranged adjacent to the fourth connection part L4.

[0181] Accordingly, the fourth welding hole VR4 formed at the junction of the connecting wire body S2 and the fourth connecting portion L4 only exposes one side surface of the lead body S3 (for example, the side surface of the lead body S3 and / or the side surface facing away from the substrate 200), rather than penetrating the lead body S3. Optionally, the second welding hole VR2 formed at the junction of the connecting wire body S2 and the fourth connecting portion L4 is disposed adjacent to the connecting wire body S2.

[0182] In some specific embodiments, the second welding structure E12 contacts the surface of the first connection line 230 away from the base substrate 200. For example, after forming two fourth welding holes VR4, tungsten powder is filled in the two fourth welding holes VR4, and the tungsten powder covers the surface of the third connection part L3 away from the base substrate 200 and the surface of the fourth connection part L4 away from the base substrate 200, thereby connecting the third connection part L3 and the fourth connection part L4, and the tungsten powder covers the side surface (and / or the surface away from the base substrate 200) of the lead body S3 and the surface of the connection line body S2 away from the base substrate 200, thereby connecting the lead body S3 and the connection line body S2. Subsequently, the tungsten powder in the two fourth welding holes VR4 is heated to be welded, thereby forming the third welding part E121 and the fourth welding part E122. Since the aperture of the fourth welding hole VR4 is greater than or equal to 10 μm, the space occupied by the formed third welding portion E121 and the fourth welding portion E122 is larger. Compared with the aforementioned embodiment, the connection area between the third welding portion E121 and the fourth welding portion E122 in this embodiment is larger, which can further reduce the connection impedance, and thus has a better improvement effect on static electricity accumulation.

[0183] In some specific embodiments, each of the first welding structure E11 and the second welding structure E12 contacts a surface of the first connection line 230 facing away from the base substrate 200 .

[0184] In this embodiment, the preparation process of the first welding structure E11 and the second welding structure E12 using liquid welding material is described below.

[0185] In an embodiment of the present disclosure, the first welding structure E11 welds the start signal line STV and the first connecting line 230 together through a plurality of third welding holes VR3. Specifically, the first connecting portion L1 and the second connecting portion L2 are arranged along the second direction Y, and the connecting line body S2 and the second connecting portion L2 are arranged along the first direction X. In the second direction Y, a third welding hole VR3 is formed at the junction of the first connecting portion L1 and the second connecting portion L2, and, in the first direction X, another third welding hole VR3 is formed at the junction of the connecting line body S2 and the second connecting portion L2.

[0186] The second laser can selectively peel off the film layer from the display substrate without damaging other film layers. For example, the insulating layer between the first connection part L1 and the second connection part L2 can be selectively peeled off without damaging the first connection part L1 and the second connection part L2 (or the connection line body S2). Therefore, in this embodiment, the third welding hole VR3 formed at the junction of the first connection part L1 and the second connection part L2 can only expose the surface of the first connection part L1 on the side away from the base substrate 200. Optionally, the third welding hole VR3 formed at the junction of the first connection part L1 and the second connection part L2 is arranged adjacent to the second connection part L2.

[0187] Accordingly, the third welding hole VR3 formed at the junction of the connecting wire body S2 and the second connecting portion L2 only exposes the surface of the signal wire body S1 on the side away from the base substrate 200. Optionally, the third welding hole VR3 formed at the junction of the connecting wire body S2 and the second connecting portion L2 is arranged adjacent to the connecting wire body S2.

[0188] Afterwards, silver solution is filled in the two first welding holes VR1, and the silver solution covers the surface of the first connection part L1 on the side away from the base substrate 200 and the surface of the second connection part L2 on the side away from the base substrate 200, thereby connecting the first connection part L1 and the second connection part L2, and the silver solution covers the surface of the signal line body S1 on the side away from the base substrate 200 and the surface of the connection line body S2 on the side away from the base substrate 200, thereby connecting the signal line body S1 and the connection line body S2. Then, the silver solution in the two third welding holes VR3 is heated to be welded, thereby forming the third welding part E121 and the fourth welding part E122. The heating temperature can be 150°C to 250°C, for example, 200°C, and the heating time can be 4s to 12s, for example, 8s. Compared with the above-mentioned embodiment, the excess silver solution can be removed by laser, thereby preventing the first welding part E111 and the second welding part E112 formed in the end from being short-circuited with other signal lines.

[0189] In an embodiment of the present disclosure, the second welding structure E12 welds the start signal lead STVY and the first connecting line 230 together through a plurality of fourth welding holes VR4. Specifically, the third connecting part L3 and the fourth connecting part L4 are arranged along the second direction Y, and the connecting line body S2 and the fourth connecting part L4 are arranged along the second direction Y. In the second direction Y, a fourth welding hole VR4 is formed at the junction of the third connecting part L3 and the fourth connecting part L4, and, in the second direction Y, another fourth welding hole VR4 is formed at the junction of the connecting line body S2 and the fourth connecting part L4.

[0190] The second laser can selectively peel off the film layer from the display substrate without damaging other film layers. For example, the insulating layer between the third connection part L3 and the fourth connection part L4 can be selectively peeled off without damaging the third connection part L3 and the fourth connection part L4 (or the connection line body S2). Therefore, in this embodiment, the fourth welding hole VR4 formed at the junction of the third connection part L3 and the fourth connection part L4 can only expose the surface of the third connection part L3 away from the base substrate 200. Optionally, the fourth welding hole VR4 formed at the junction of the third connection part L3 and the fourth connection part L4 is arranged adjacent to the fourth connection part L4.

[0191] That is, in the embodiment of the present disclosure, the orthographic projections of the third welding hole VR3 and the fourth welding hole VR4 on the base substrate 200 are spaced apart from the orthographic projection of the first connection line 230 on the base substrate 200 .

[0192] Accordingly, the fourth welding hole VR4 formed at the junction of the connecting wire body S2 and the fourth connecting portion L4 only exposes the side surface of the lead body S3 (for example, the side surface of the lead body S3 and / or the surface facing away from the substrate 200). Optionally, the fourth welding hole VR4 formed at the junction of the connecting wire body S2 and the fourth connecting portion L4 is arranged adjacent to the connecting wire body S2.

[0193] Afterwards, silver solution is filled in the two fourth welding holes VR4, and the silver solution covers the surface of the third connection part L3 on the side away from the base substrate 200 and the surface of the fourth connection part L4 on the side away from the base substrate 200, thereby connecting the third connection part L3 and the fourth connection part L4, and the silver solution covers the side surface (and / or the surface on the side away from the base substrate 200) of the lead body S3 and the surface of the connection line body S2 on the side away from the base substrate 200, thereby connecting the lead body S3 and the connection line body S2. Subsequently, the silver solution in the two fourth welding holes VR4 is heated to be welded, thereby forming the third welding part E121 and the fourth welding part E122. Compared with the aforementioned embodiment, the excess silver solution can be removed by laser, thereby preventing the finally formed third welding part E121 and the fourth welding part E122 from being short-circuited with other signal lines.

[0194] Through the anti-static structure E at the first position 251 , the anti-static effect can be improved from 14-15KV before improvement (ie, without any anti-static structure E in the embodiments of the present disclosure) to 25-29KV.

[0195] Hereinafter, the anti-static structure E at the second position 252 in the embodiment of the present disclosure will be described.

[0196] Fig.17 The equivalent circuit diagram of the shift register unit according to the embodiment of the present disclosure is schematically shown. Fig.18 One of the schematic diagrams of a display motherboard according to an embodiment of the present disclosure is schematically shown. Fig.19 The plan view schematically shows the locations of the third welding structure and the fourth welding structure according to the embodiment of the present disclosure.

[0197] Let's combine Fig.17 , firstly, the circuit of the shift register unit GOA involved in the embodiment of the present disclosure is introduced.

[0198] The shift register unit GOA in the embodiment of the present disclosure includes a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a ninth transistor M9, a tenth transistor M10, an eleventh transistor M11, a twelfth transistor M12, a thirteenth transistor M13, a fourteenth transistor M14, a fifteenth transistor M15, a sixteenth transistor M16, a seventeenth transistor M17 and a capacitor C.

[0199] A gate of the first transistor M1 is connected to the first input terminal SR, a first end of the first transistor M1 is connected to the pull-up point PU, and a second end of the first transistor M1 is connected to the first voltage terminal VGL.

[0200] The gate of the second transistor M2 is connected to the data input terminal INPUT, the first end of the second transistor M2 is connected to the data input terminal INPUT, and the second end of the second transistor M2 is connected to the pull-up point PU.

[0201] A gate of the third transistor M3 is connected to the pull-up point reset terminal RST PU, a first terminal of the third transistor M3 is connected to the pull-up point PU, and a second terminal of the third transistor M3 is connected to the first voltage terminal VGL.

[0202] The gate of the sixteenth transistor M16 is connected to the pull-up point PU, the first end of the sixteenth transistor M16 is connected to the clock signal end CLK, and the second end of the sixteenth transistor M16 is connected to the first output end OUTPUT;

[0203] The gate of the fourth transistor M4 is connected to the first pull-down point PD1, the first end of the fourth transistor M4 is connected to the first end of the third transistor M3, and the second end of the fourth transistor M4 is connected to the second voltage end VGL;

[0204] The gate of the fifth transistor M5 is connected to the second pull-down point PD2, the first end of the fifth transistor M5 is connected to the first end of the fourth transistor M4, and the second end of the fifth transistor M5 is connected to the second voltage end VGL;

[0205] The gate of the sixth transistor M6 is connected to the third voltage terminal VDDO, the first terminal of the sixth transistor M6 is connected to the third voltage terminal VDDO, and the second terminal of the sixth transistor M6 is connected to the third pull-down point PD CN1;

[0206] The gate of the seventh transistor M7 is connected to the pull-up point PU, the first end of the seventh transistor M7 is connected to the second end of the sixth transistor M6, and the second end of the seventh transistor M7 is connected to the second voltage end VGL;

[0207] The gate of the eighth transistor M8 is connected to the second end of the sixth transistor M6, the first end of the eighth transistor M8 is connected to the third voltage end VDDO, and the second end of the eighth transistor M8 is connected to the first pull-down point PD1;

[0208] The gate of the ninth transistor M9 is connected to the pull-up point PU, the first end of the ninth transistor M9 is connected to the second end of the eighth transistor M8, and the second end of the ninth transistor M9 is connected to the second voltage end VGL;

[0209] The gate of the tenth transistor M10 is connected to the fourth voltage terminal VDDE, the first terminal of the tenth transistor M10 is connected to the fourth voltage terminal VDDE, and the second terminal of the tenth transistor M10 is connected to the fourth pull-down point PD CN2;

[0210] The gate of the eleventh transistor M11 is connected to the pull-up point PU, the first end of the eleventh transistor M11 is connected to the second end of the tenth transistor M10, and the second end of the eleventh transistor M11 is connected to the second voltage end VGL;

[0211] The gate of the twelfth transistor M12 is connected to the second end of the tenth transistor M10, the first end of the twelfth transistor M12 is connected to the fourth voltage end VDDE, and the second end of the twelfth transistor M12 is connected to the second pull-down point PD2;

[0212] The gate of the thirteenth transistor M13 is connected to the pull-up point PU, the first end of the thirteenth transistor M13 is connected to the second end of the twelfth transistor M12, and the second end of the thirteenth transistor M13 is connected to the second voltage end VGL;

[0213] A gate of the seventeenth transistor M17 is connected to the reset voltage terminal RESET, a first terminal of the seventeenth transistor M17 is connected to the first output terminal OUTPUT, and a second terminal of the seventeenth transistor M17 is connected to the second voltage terminal VGL;

[0214] A gate of the fifteenth transistor M15 is connected to the first pull-down point PD1, a first end of the fifteenth transistor M15 is connected to a first end of the seventeenth transistor M17, and a second end of the fifteenth transistor M15 is connected to the second voltage end VGL;

[0215] A gate of the fourteenth transistor M14 is connected to the second pull-down point PD2, a first end of the fourteenth transistor M14 is connected to a first end of the fifteenth transistor M15, and a second end of the fourteenth transistor M14 is connected to the second voltage end VGL;

[0216] A first end of the capacitor C is connected to the pull-up point PU, and a second end of the capacitor C is connected to the first output end OUTPUT.

[0217] In the embodiments of the present disclosure, any transistor in the shift register unit GOA can be an N-type transistor or a P-type transistor, which can be selected according to actual conditions; the first end of the transistor is a source or a drain, and the second end of the transistor is a drain or a source corresponding to the first end.

[0218] Reference Fig.18 The display motherboard includes a plurality of first substrate regions 300 arranged along the third direction and the fourth direction, and the start signal line and the start signal lead on the display motherboard extend along the fourth direction. For part of the first substrate region 300, after cutting (e.g., a rough cutting step and / or a fine cutting step) with the third direction as the cutting line, a part of the signal line will be cut off, referring to Fig.19 As shown in the middle cutting line QL.

[0219] To ensure that the start input end of the first N-stage shift register unit GOA in the gate driving circuit 210 can normally receive the start signal, therefore, in the embodiment of the present disclosure, the start input end of the first N-stage shift register unit GOA needs to be re-soldered with the SVT signal line and the start signal lead STVY.

[0220] Reference Fig.19 Specifically, the display substrate further includes: a plurality of third connection lines 310 and at least one fourth connection line 320 disposed on the base substrate 200 and located in the side area CB. The plurality of third connection lines 310 extend along the second direction Y, the at least one fourth connection line 320 extends along the first direction X, and the plurality of third connection lines 310 are located on the side of the gate driving circuit 210 away from the start signal lead STVY. At least one level of shift register unit GOA includes a first input terminal SR, the first input terminal SR of the first N levels of shift register unit GOA is electrically connected to the plurality of third connection lines 310, and the first input terminals SR of different levels of shift register units GOA are electrically connected to different third connection lines 310. The start signal lead STVY is electrically connected to the plurality of third connection lines 310 through at least one fourth connection line 320. N is a natural number.

[0221] The first N-stage shift register unit GOA may refer to the first three-stage shift register unit GOA, and the fourth connection line 320 may be provided in the same layer and the same material as the first connection line 230. For example, the fourth connection line 320 is located in the second conductive layer 262. The first input terminal SR of the first three-stage shift register unit GOA can be electrically connected to the start signal lead STVY through the bridge of the fourth connection line 320, so as to transmit the start signal on the start signal lead STVY to the first input terminal SR of the first three-stage shift register unit GOA.

[0222] It should be noted that in the embodiments of the present disclosure, the shift register units GOA in the gate drive circuit 210 are all valid shift register units GOA, that is, the shift register units GOA of the gate drive circuit 210 can output scan signals in sequence according to a cascade relationship when the display substrate is working.

[0223] Fig. 20 A plan view schematically shows the location of a partition structure according to an embodiment of the present disclosure.

[0224] Combined with reference Fig.19 and Fig. 20 In some specific embodiments, the display substrate further includes a ground signal line GND, a common voltage signal line VCOM, a plurality of clock signal lines CLKL and a first voltage signal line VGLL, at least one of the plurality of clock signal lines CLKL is electrically connected to the clock signal terminal CLK in the shift register unit GOA, and the first voltage signal line VGLL is electrically connected to the second voltage terminal VGL in the shift register unit GOA. In the first direction X, the start signal line STV is located between the common voltage signal line VCOM and the clock signal line CLKL.

[0225] In some specific embodiments, the anti-static structure E located at the second position 252 includes: a partition structure E21, and on the plurality of first signal lines 220, a portion located on the partition structure E21 close to the binding pair area DPO and a portion located on the partition structure E21 close to the binding area DP are separated by the partition structure E21. The start signal lead STVY is fused with at least one fourth connection line 320 through the third welding structure R1, and at least one fourth connection line 320 is fused with multiple third connection lines 310 through the fourth welding structure R2. The partition structure E21, the third welding structure R1, and the fourth welding structure R2 are located within a preset range, and the preset range is less than or equal to the range defined by the laser operation window.

[0226] In the embodiments of the present disclosure, the preparation method of the third welding structure R1 and the fourth welding structure R2 can be the same as the preparation method of the first welding structure E11 and the second welding structure E12. Therefore, the morphology of the third welding structure R1 and the fourth welding structure R2 can be determined with reference to the first welding structure E11 and the second welding structure E12. Therefore, the embodiments of the present disclosure will not be repeated here.

[0227] The laser operation window is configured so that the portion located within the laser operation window can be formed by the same laser cutting (or welding) process. For example, when the redundant signal line is cut, the partition structure E21 can be formed at the second position 252. In this way, compared with the welding structure in the aforementioned embodiment, the partition structure E21 does not need to add additional process steps, thereby simplifying the preparation process.

[0228] Fig.21 The plan view of the frame sealing adhesive and the partition structure according to the embodiment of the present disclosure is schematically shown.

[0229] Reference Fig.21 In some specific embodiments, the display substrate further includes: a frame sealant F disposed on the base substrate 200. The orthographic projection of the partition structure E21 on the base substrate 200 is located in the side area CB, and the orthographic projection of the frame sealant F on the base substrate 200 covers the orthographic projection of the partition structure E21 on the base substrate 200. In this way, it can be ensured that the partition structure E21 is covered by the frame sealant F, and the partition structure E21 will not be exposed by the frame sealant F due to fluctuations in the coating process of the frame sealant F. In this way, the static electricity introduced by the start signal line STV exposed by the frame sealant F can be blocked, thereby better improving the static electricity accumulation problem at the connection between the start signal line STV and the start signal lead STVY.

[0230] For example, the frame sealant F includes two first parts extending along the first direction X, two second parts extending along the second direction Y, and four corner parts located between the first parts and the second parts. The two first parts, the two second parts and the four corner parts can enclose a closed structure, which surrounds the periphery of the display area AA. Among them, the two first parts are respectively located in the binding area DP and the binding area DPO, and the two second parts are located in the side area CB. Optionally, in the second direction Y, the spacing between the second part and the binding area DPO can be set to 2800μm~3700μm, the spacing between the third welding structure R1 and the fourth welding structure R2 and the binding area DPO can be set to 5400μm, and the spacing between the partition structure E21 and the binding area DPO can be set to 3700~5400μm.

[0231] In some specific embodiments, the display substrate further includes a plurality of invalid shift register units DGOA, and the plurality of invalid shift register units DGOA are located on one side of the gate driving circuit 210 close to the bonding pair region DPO in the second direction Y. The partition structure E21, the third welding structure R1, and the fourth welding structure R2 are located between two adjacent invalid shift register units DGOA in the second direction Y.

[0232] For example, refer to Fig. 20 , two shift register units are arranged above the first-stage shift register unit GOA, and the related signal lines of these shift register units are cut off. Therefore, when the display substrate is working, these shift register units will not output scanning signals to the display area AA. Therefore, the embodiment of the present disclosure refers to these shift register units as invalid shift register units DGOA. In the embodiment of the present disclosure, the partition structure E21, the third welding structure R1 and the fourth welding structure R2 are arranged between the two invalid shift register units DGOA, so as to ensure that the first-stage shift register unit GOA can be electrically connected to the corresponding signal line, and the partition structure E21, the third welding structure R1 and the fourth welding structure R2 will not affect the existing structure.

[0233] It should be noted that the above is described using the start signal line STV, the start signal lead STVY and the anti-static structure E located on one side of the display area AA as an example. In some embodiments, the start signal line STV, the start signal lead STVY and the anti-static structure E may be provided on both opposite sides of the display area AA. The start signal line STV, the start signal lead STVY and the anti-static structure E on the opposite sides of the display area AA may be substantially the same, so the embodiments of the present disclosure will not be repeated herein.

[0234] Through the anti-static structure E at the second position 252 , the anti-static effect can be improved from 14-15 KV before improvement (ie, without any anti-static structure E in the embodiments of the present disclosure) to 19-25 KV.

[0235] In some specific embodiments, an anti-static structure E can be set at the first position 251 and the second position 252 at the same time. In this embodiment, the anti-static effect can be improved from 14~15KV before improvement (that is, no anti-static structure E in any of the embodiments of the present disclosure is set) to 23~29KV.

[0236] Fig. 22 The second plan view of the display motherboard according to the embodiment of the present disclosure is schematically shown.

[0237] Reference Fig. 22At least some embodiments of the present disclosure further provide a display motherboard, which includes a first substrate area 300 and a second substrate area 400, wherein the first substrate area 300 is used to prepare the above-mentioned display substrate.

[0238] The first substrate region 300 and the second substrate region 400 have different sizes in the third direction, for example, the third direction is the same direction as the first direction X. The second substrate region 400 includes a first sub-region 410 and a second sub-region 420 that at least partially surrounds the first sub-region 410. The first sub-region 410 includes a fourth conductive layer 510, and the first substrate region 300 includes a fifth conductive layer 520. The fourth conductive layer 510 and the fifth conductive layer 520 are in the same layer and are made of the same material. The pattern of the fourth conductive layer 510 is the same as the pattern of the portion of the fifth conductive layer 520 located in the first sub-region 410.

[0239] In an embodiment of the present disclosure, the first substrate region 300 and the second substrate region 400 have different sizes in the third direction, so the two regions can be used to prepare display substrates of different sizes. Optionally, the first substrate region 300 and the second substrate region 400 have the same size in the fourth direction, and the third direction and the fourth direction intersect. Exemplarily, the third direction may refer to the horizontal direction in the figure, and the fourth direction may refer to the vertical direction in the figure, that is, the third direction and the fourth direction are perpendicular to each other.

[0240] The fourth conductive layer 510 and the fifth conductive layer 520 can be prepared based on the same mask pattern, but the difference is that the fifth conductive layer 520 is prepared based on the complete mask pattern, while the fourth conductive layer 510 is prepared based on the pattern after partial shielding of the mask pattern. In this way, the same mask pattern can be reused to expose the first substrate area 300 and the second substrate area 400, that is, a mask pattern can be reused to prepare display substrates of two sizes, thereby saving the research and development cost of the mask.

[0241] At least some embodiments of the present disclosure also provide a display panel, which includes the display substrate described above, and has a display area, a binding area, a binding area, a side area, and related structures therein. For example, the display panel may be a liquid crystal display panel.

[0242] At least some embodiments of the present disclosure also provide a display device, which may include any device or product with a display function. For example, the display device may be a smart phone, a mobile phone, an e-book reader, a desktop computer (PC), a laptop PC, a netbook PC, a personal digital assistant (PDA), a portable multimedia player (PMP), a digital audio player, a mobile medical device, a camera, a wearable device (such as a head-mounted device, an electronic clothing, an electronic bracelet, an electronic necklace, an electronic accessory, an electronic tattoo, or a smart watch), a television, etc.

[0243] It should be understood that the display device according to the embodiment of the present disclosure has all the characteristics and advantages of the above-mentioned display substrate and display panel PAN. For details, please refer to the above description, which will not be repeated here.

Claims

1. A display substrate, wherein: include: A display area, a binding area, a binding pair area, a side area, a first corner area, and a second corner area, wherein the side area and the display area are arranged along a first direction, the binding pair area, the display area, and the binding area are arranged in sequence along a second direction, the first direction and the second direction intersect, the first corner area is located between the side area and the binding pair area, and at least partially surrounds a first corner of the display area, and the second corner area is located between the side area and the binding area, and at least partially surrounds a second corner of the display area; substrate substrate; A gate driving circuit disposed on the substrate and located in the side area, the gate driving circuit comprising a cascaded multi-stage shift register unit; A plurality of first signal lines disposed on the substrate and located in the side area, the first corner area, and the second corner area; Wherein, the plurality of first signal lines are located on a side of the gate driving circuit away from the display area; The plurality of first signal lines include a start signal line and a start signal lead line, the start signal lead line is located on a side of the start signal line close to the gate drive circuit, the start signal line and the start signal lead line both extend along the second direction, and are electrically connected at the second corner region through a first connection line; An anti-static structure is provided on the multiple first signal lines, and the anti-static structure is located at at least one of a first position and a second position, the first position includes the connection between the starting signal line, the starting signal lead and the first connecting line, and the second position includes the multiple first signal lines located at a side of the row where the first-stage shift register unit is located close to the binding pair area.

2. The display substrate according to claim 1, wherein: The anti-static structure located at the first position includes: a first welding structure, at the connection between the starting signal line and the first connecting line, the first welding structure welds the starting signal line and the first connecting line together; and / or, A second welding structure is provided at the connection between the starting signal lead wire and the first connecting wire, and the second welding structure welds the starting signal lead wire and the first connecting wire together.

3. The display substrate according to claim 2, wherein: The display substrate comprises a first conductive layer, a second conductive layer located on a side of the first conductive layer away from the base substrate, and a third conductive layer located on a side of the second conductive layer away from the second conductive layer; Wherein, the display substrate further comprises a first transfer structure located in the third conductive layer, the start signal line is located in the first conductive layer, and the first connection line is located in the second conductive layer; The starting signal line includes a first connection portion and a signal line body, the orthographic projection of the first connection portion on the base substrate at least partially overlaps with the orthographic projection of the first adapter structure on the base substrate, and, in the overlapping area, the first connection portion is electrically connected to the first adapter structure through at least one first via hole; The orthographic projection of the first connecting line on the base substrate at least partially overlaps with the orthographic projection of the first adapter structure on the base substrate, and, in the overlapping area, the first connecting line is electrically connected to the first adapter structure through at least one second via hole; The orthographic projection of the first fusion structure on the base substrate partially overlaps with the orthographic projection of the first connecting portion on the base substrate, the orthographic projection of the signal line body on the base substrate, and the orthographic projection of the first connecting line on the base substrate, and, in the overlapping area, the first fusion structure fuses the first connecting portion, the signal line body, and the first connecting line together.

4. The display substrate according to claim 3, wherein: The first connecting line includes a second connecting portion and a connecting line body, the orthographic projection of the second connecting portion on the base substrate at least partially overlaps with the orthographic projection of the first adapter structure on the base substrate, and, in the overlapping area, the second connecting portion is electrically connected to the first adapter structure through the second via hole, and the first fusion structure includes: a first fusion portion, wherein the orthographic projection of the first fusion portion on the base substrate partially overlaps with the orthographic projection of the first connection portion on the base substrate and the orthographic projection of the second connection portion on the base substrate, and, in the overlapping area, the first fusion portion fuses the first connection portion and the second connection portion together; and / or A second fusion portion, wherein the orthographic projection of the second fusion portion on the base substrate partially overlaps with the orthographic projection of the signal line body on the base substrate and the orthographic projection of the connecting line body on the base substrate, and, in the overlapping area, the second fusion portion fuses the signal line body and the connecting line body together.

5. The display substrate according to claim 4, wherein: The orthographic projection of the first fusion portion on the base substrate and the orthographic projection of the second fusion portion on the base substrate are located on the same side of the orthographic projection of the second connection portion on the base substrate, and the orthographic projection of the first fusion portion on the base substrate and the orthographic projection of the second fusion portion on the base substrate are arranged at intervals.

6. The display substrate according to claim 3, wherein: The display substrate further comprises a second transfer structure located in the third conductive layer, and the start signal lead is located in the first conductive layer; The start signal lead includes a third connection portion and a lead body, the orthographic projection of the third connection portion on the base substrate at least partially overlaps with the orthographic projection of the second transfer structure on the base substrate, and, in the overlapping area, the third connection portion and the second transfer structure are electrically connected through at least one third via hole; The orthographic projection of the first connecting line on the base substrate at least partially overlaps with the orthographic projection of the second transfer structure on the base substrate, and, in the overlapping area, the first connecting line and the second transfer structure are electrically connected through at least one fourth via hole; The orthographic projection of the second welding structure on the base substrate partially overlaps with the orthographic projection of the second connecting portion on the base substrate, the orthographic projection of the lead body on the base substrate, and the orthographic projection of the first connecting line on the base substrate, and, in the overlapping area, the second welding structure fuses the second connecting portion, the lead body, and the first connecting line together.

7. The display substrate according to claim 6, wherein: The first connecting wire further includes a fourth connecting portion and a connecting wire body, the orthographic projection of the fourth connecting portion on the base substrate at least partially overlaps with the orthographic projection of the second adapter structure on the base substrate, and, in the overlapping area, the fourth connecting portion is electrically connected to the second adapter structure, and the second fusion structure includes: a third fusion portion, wherein the orthographic projection of the third fusion portion on the substrate substrate partially overlaps with the orthographic projection of the third connection portion on the substrate substrate and the orthographic projection of the fourth connection portion on the substrate substrate, and, in the overlapping area, the third fusion portion 1 fuses the third connection portion and the fourth connection portion together; and / or A fourth welding portion, wherein the orthographic projection of the fourth welding portion on the base substrate partially overlaps with the orthographic projection of the lead body on the base substrate and the orthographic projection of the connecting wire body on the base substrate, and, in the overlapping area, the fourth welding portion welds the lead body and the connecting wire body together.

8. The display substrate according to claim 7, wherein: The orthographic projection of the third fusion portion on the base substrate and the orthographic projection of the fourth fusion portion on the base substrate are located on different sides of the orthographic projection of the third connection portion on the base substrate, and the orthographic projection of the third fusion portion on the base substrate and the orthographic projection of the fourth fusion portion on the base substrate are arranged at intervals.

9. The display substrate according to claim 2, wherein: The materials of the first welding structure and the second welding structure include solid welding materials. The first welding structure welds the starting signal line and the first connecting line together through at least one first welding hole. The second welding structure welds the starting signal lead and the first connecting line together through at least one second welding hole. The aperture of at least one of the first welding holes and at least one of the second welding holes is less than or equal to the line width of the first connecting line.

10. The display substrate according to claim 9, wherein: The orthographic projections of at least one of the first welding holes and at least one of the second welding holes on the base substrate at least partially overlap with the orthographic projections of the first connecting line on the base substrate.

11. The display substrate according to claim 2, wherein: The materials of the first welding structure and the second welding structure include solid welding material or liquid welding material. The first welding structure welds the starting signal line and the first connecting line together through a third welding hole. The second welding structure welds the starting signal lead and the first connecting line together through a fourth welding hole. The apertures of the third welding hole and the fourth welding hole are larger than the line width of the first connecting line.

12. The display substrate according to claim 11, wherein: The orthographic projections of the third welding hole and the fourth welding hole on the base substrate are arranged at intervals from the orthographic projection of the first connecting line on the base substrate.

13. The display substrate according to claim 11, wherein: At least one of the first fusion structure and the second fusion structure is in contact with a surface of the first connection line facing away from the base substrate.

14. The display substrate according to claim 1, wherein: The display substrate further comprises: A plurality of third connection lines and at least one fourth connection line disposed on the base substrate and located in the side area; Wherein, the plurality of third connection lines extend along the second direction, the at least one fourth connection line extends along the first direction, and the plurality of third connection lines are located on a side of the gate drive circuit away from the start signal lead; At least one stage of shift register unit comprises a first input end, the first input end of the first N stages of shift register units is electrically connected to the plurality of third connection lines, and the first input ends of shift register units of different stages are electrically connected to different third connection lines; The start signal line is electrically connected to the plurality of third connection lines through the at least one fourth connection line, and N is a positive integer.

15. The display substrate according to claim 14, wherein: The anti-static structure located at the second position includes: a partition structure, on the plurality of first signal lines, a portion located at a side of the partition structure close to the binding pair area and a portion located at a side of the partition structure close to the binding area are separated by the partition structure; The start signal lead is fused with at least one of the fourth connection wires through a third fusion structure, and at least one of the fourth connection wires is fused with a plurality of the third connection wires through a fourth fusion structure; The partition structure, the third welding structure and the fourth welding structure are located within a preset range.

16. The display substrate according to claim 15, wherein: The display substrate further comprises: A frame sealant is disposed on the base substrate, the orthographic projection of the partition structure on the base substrate is located in the side area, and the orthographic projection of the frame sealant on the base substrate covers the orthographic projection of the partition structure on the base substrate.

17. The display substrate according to claim 15, wherein: The display substrate further comprises a plurality of invalid shift register units, and in the second direction, the plurality of invalid shift register units are located on a side of the gate driving circuit close to the binding pair area; The partition structure, the third fusion structure and the fourth fusion structure are located between two adjacent invalid shift register units in the second direction.

18. A display motherboard, comprising a first substrate area and a second substrate area, wherein the first substrate area is used to prepare the display substrate according to any one of claims 1 to 17; The first substrate region and the second substrate region have different sizes in the third direction, and the second substrate region includes a first sub-region and a second sub-region at least partially surrounding the first sub-region; The first substrate region includes a fourth conductive layer, the second substrate region includes a fifth conductive layer, and the fourth conductive layer and the fifth conductive layer are in the same layer and made of the same material; in, The pattern of the fourth conductive layer is the same as the pattern of the portion of the fifth conductive layer located in the first sub-region.

19. A display panel, wherein: The invention comprises the display substrate as claimed in any one of claims 1 to 17.

20. A display device, wherein: Comprising the display panel as claimed in claim 19.

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