Mainboard controller function verification method, device and equipment and readable storage medium

Abstract

The invention provides a mainboard controller function verification method, device and equipment and a readable storage medium, and the method comprises the steps: constructing a programmable logic object based on the function of a to-be-verified mainboard controller; controlling the programmable logic object to send a connection signal to the channel switcher, and determining that a first mainboard in a plurality of mainboards triggers hot insertion, so that the programmable logic object is connected with the first mainboard; controlling the programmable logic object to send a removal signal to the channel switcher, and determining that a second mainboard in the plurality of mainboards triggers hot removal, so that the programmable logic object and the second mainboard are disconnected; under the condition that the programmable logic object is connected with the first mainboard and disconnected with the second mainboard, it is determined that the mainboard controller has the function of being connected with the multiple mainboards.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a method and device for verifying the function of a motherboard controller, an electronic device, and a computer-readable storage medium. Background Art

[0002] Integrated circuits are core components of modern electronic technology. Therefore, it is necessary to verify the functions of integrated circuits so that the manufactured integrated circuits meet the requirements, such as verifying the functions of baseboard management controllers (BMCs).

[0003] Currently, a BMC is usually installed on a motherboard, and verification begins after the BMC is taped out. That is, after the BMC is manufactured, it is verified whether the BMC has the relevant functions of interacting with the motherboard.

[0004] However, as technology develops, multiple motherboards can work together, and the current verification scheme cannot verify the interaction between a single BMC and multiple motherboards. Summary of the invention

[0005] The embodiments of the present application provide a method, device, electronic device and computer-readable storage medium for verifying the function of a motherboard controller to solve the problem in the prior art that the interaction between a single BMC and multiple motherboards cannot be verified.

[0006] In a first aspect, an embodiment of the present application provides a method for verifying the function of a motherboard controller, the method comprising:

[0007] Based on the function of the motherboard controller to be verified, a programmable logic object is constructed; the motherboard controller is used to control multiple motherboards, and the programmable logic object is used to implement the function of the motherboard controller; the programmable logic object and the multiple motherboards are connected through a channel switch;

[0008] Controlling the programmable logic object to send a connection signal to the channel switch, determining that a first mainboard among a plurality of mainboards triggers hot plugging, so that the programmable logic object is connected to the first mainboard; the connection signal carries identification information of the first mainboard;

[0009] Controlling the programmable logic object to send a removal signal to the channel switch, determining that a second mainboard among the plurality of mainboards triggers hot removal, so as to disconnect the programmable logic object from the second mainboard; the removal signal carries identification information of the second mainboard;

[0010] When the programmable logic object is connected to the first mainboard and disconnected from the second mainboard, it is determined that the mainboard controller has a function of connecting to a plurality of mainboards.

[0011] In a second aspect, an embodiment of the present application provides a mainboard controller function verification device, the device comprising:

[0012] An object construction module, used to construct a programmable logic object based on the function of a motherboard controller to be verified; the motherboard controller is used to control multiple motherboards, and the programmable logic object is used to implement the function of the motherboard controller; the programmable logic object and the multiple motherboards are connected via a channel switch;

[0013] a mainboard connection module, used to control the programmable logic object to send a connection signal to the channel switch, and determine that a first mainboard among the multiple mainboards triggers hot plugging, so that the programmable logic object is connected to the first mainboard; the connection signal carries identification information of the first mainboard;

[0014] a motherboard disconnection module, used to control the programmable logic object to send a removal signal to the channel switch, and determine that a second motherboard among the multiple motherboards triggers hot removal, so as to disconnect the programmable logic object from the second motherboard; the removal signal carries identification information of the second motherboard;

[0015] A function verification module is used to determine whether the mainboard controller has the function of connecting to multiple mainboards when the programmable logic object is connected to the first mainboard and disconnected from the second mainboard.

[0016] In a third aspect, an embodiment of the present application provides an electronic device, comprising: a processor, a communication interface, a memory, and a communication bus; wherein the processor, the communication interface, and the memory communicate with each other via the communication bus;

[0017] Memory, used to store computer programs;

[0018] The processor is used to implement the steps in the mainboard controller function verification method described in the first aspect when executing the program stored in the memory.

[0019] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps in the mainboard controller function verification method described in the first aspect above.

[0020] Compared with the prior art, this application has the following advantages:

[0021] In the embodiment of the present application, a programmable logic object is constructed based on the function of the motherboard controller to be verified, the motherboard controller is used to control multiple motherboards, the programmable logic object and the multiple motherboards are connected through a channel switcher, the programmable logic object is controlled to send a connection signal to the channel switcher, it is determined that the first motherboard among the multiple motherboards triggers hot insertion, so that the programmable logic object and the first motherboard are connected, the programmable logic object is controlled to send a removal signal to the channel switcher, it is determined that the second motherboard among the multiple motherboards triggers hot removal, so that the programmable logic object and the second motherboard are disconnected, and when the programmable logic object is connected to the first motherboard and disconnected from the second motherboard, it is determined that the motherboard controller has the function of connecting multiple motherboards. The function of a single motherboard controller connecting and controlling multiple motherboards can be conveniently verified. In addition, by constructing a programmable logic object to simulate the motherboard controller, it is not necessary to perform functional verification after the motherboard controller is manufactured. Verification is performed directly based on the programmable logic object, so that verification efficiency is improved and cost is reduced.

[0022] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for describing the embodiments are briefly introduced below.

[0024] Figure 1 A step diagram of a method for verifying the function of a motherboard controller provided in an embodiment of the present application;

[0025] Figure 2 A schematic diagram of a channel switch connection provided in an embodiment of the present application;

[0026] Figure 3 A step diagram of another method for verifying the function of a motherboard controller provided in an embodiment of the present application;

[0027] Figure 4 A schematic diagram of system verification provided in an embodiment of the present application;

[0028] Figure 5 A structural diagram of verifying a programmable logic object when there is no channel switch provided in an embodiment of the present application;

[0029] Figure 6 A structural diagram of a programmable logic object based on a channel switch provided in an embodiment of the present application;

[0030] Figure 7A structural diagram of another programmable logic object based on a channel switch provided in an embodiment of the present application;

[0031] Figure 8 A schematic diagram of a mainboard controller function verification device provided in an embodiment of the present application;

[0032] Fig. 9 A block diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0033] The exemplary embodiments of the present application will be described in detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present application are shown in the accompanying drawings, it should be understood that the present application can also be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided in order to enable a more thorough understanding of the present application and to fully convey the scope of the present application to those skilled in the art.

[0034] As the computing performance of the CPUs installed in servers becomes stronger and stronger, the number of CPU pins and channels increases, and a single motherboard with two CPUs may become a thing of the past. Instead, dual or even multiple motherboards are equipped with a single CPU. The computing performance of a single CPU can already unleash the full potential of multiple motherboards. For example, a dual-motherboard server has two motherboards in the server chassis, each motherboard is equipped with one (or two) CPUs and a complete system. This is different from traditional servers. In order to ensure computing power requirements, traditional servers usually place two CPUs on one motherboard. However, with the development of CPU technology, a single CPU can already meet the computing power requirements of a single or even multiple motherboards.

[0035] Figure 1 A method for verifying the function of a motherboard controller provided in an embodiment of the present application includes:

[0036] Step 101, constructing a programmable logic object based on the function of a motherboard controller to be verified; the motherboard controller is used to control multiple motherboards, and the programmable logic object is used to implement the function of the motherboard controller; the programmable logic object and the multiple motherboards are connected via a channel switch;

[0037] In the embodiment of the present application, since a single CPU can already meet the computing power requirements of a single or even multiple motherboards, multiple motherboards can be included in a single server. When the server is controlled by a motherboard controller such as a BMC, multiple motherboards in the server can be controlled by a single motherboard controller.

[0038] In order to avoid the need to verify the functions of the motherboard controller after the motherboard controller is taped out, a programmable logic object can be constructed based on the functions of the motherboard controller to be verified. The programmable logic object can be a programmable array logic (PAL), a generic array logic (GAL), a field programmable gate array (FPGA), etc. The programmable logic object is a semi-custom circuit. Users can configure the internal logic circuit of the programmable logic object through software programming, define the input and output interface, internal logic and timing, etc. according to needs, realize a complex digital circuit system, and then realize specific functions, such as realizing the various functions of the BMC.

[0039] The programmable logic object built based on the functions of the motherboard controller to be verified can replace the motherboard controller after tape-out for verification.

[0040] The channel switcher can be a multiplexer (MUX) based on the high-speed serial computer expansion bus standard (PCIE, peripheral component interconnect express). MUX is a digital integrated circuit that can select a signal channel through circuit switching. It is used to select one of the outputs based on multiple input signals and can be used to switch PCIE signals of different channels. Therefore, there is a hot-swap requirement for system engineering.

[0041] The programmable logic object and multiple main boards are connected through a channel switch, and each main board is connected to the main board controller through different channels.

[0042] Figure 2 is a schematic diagram of a channel switch connection provided in an embodiment of the present application; Figure 2 The programmable logic object 201 in the embodiment is connected to the first main board 203 and the second main board 204 through the channel switch 202. The programmable logic object 201 can send a connection signal or a removal signal to the channel switch 202 to connect or disconnect the programmable logic object 201 with different main boards. It can be understood that Figure 2 The number of motherboards shown is only indicative and there may be more motherboards.

[0043] Step 102, controlling the programmable logic object to send a connection signal to the channel switch, determining that a first mainboard among a plurality of mainboards triggers hot plugging, so that the programmable logic object is connected to the first mainboard; the connection signal carries identification information of the first mainboard;

[0044] In an embodiment of the present application, the programmable logic object can be controlled to send a connection signal to the channel switcher, and then switch to a different mainboard to control the programmable logic object to connect to a different mainboard. The connection signal carries the identification information of the mainboard, which is used to determine the mainboard to switch to, for example, the identification information of the first mainboard, which can be any one of multiple mainboards. Among them, the identification information can be the channel number corresponding to different mainboards.

[0045] When the channel switcher switches to the channel corresponding to the first motherboard, the first motherboard triggers the hot plug process, and it can be confirmed that the programmable logic object and the first motherboard are successfully connected. The hot plug process refers to the motherboard connecting to a new device without shutting down the system or cutting off the power supply. The hot plug process may include the motherboard detecting the connection of the motherboard controller through interrupts and polling, starting device enumeration to identify the type and configuration of the device, and loading the driver, etc. The specific content of triggering the hot plug process is not specifically limited here.

[0046] Step 103, controlling the programmable logic object to send a removal signal to the channel switch, determining that a second mainboard among the multiple mainboards triggers hot removal, so as to disconnect the programmable logic object from the second mainboard; the removal signal carries identification information of the second mainboard;

[0047] In the embodiment of the present application, similarly, the programmable logic object sends a removal signal to the channel switch, and the removal signal also carries identification information, such as identification information of the second mainboard, and the second mainboard can be any one of the multiple mainboards. When it is determined that the second mainboard triggers the hot removal process, it can be confirmed that the programmable logic object is disconnected from the second mainboard.

[0048] Among them, the hot removal process refers to the motherboard removing the connected device without shutting down the system or cutting off the power. The hot removal process may include the operating system stopping all access to the motherboard controller, including file transfer, device control, etc. When all access is stopped, the operating system can release device-related resources such as memory and ports. The specific content of the hot removal triggered is not specifically limited here.

[0049] Step 104: when the programmable logic object is connected to the first mainboard and disconnected from the second mainboard, determine that the mainboard controller has a function of connecting to multiple mainboards.

[0050] In an embodiment of the present application, when the programmable logic object is connected to the first motherboard and disconnected from the second motherboard, it is determined that the motherboard controller has the function of connecting to multiple motherboards, thereby completing the functional verification of the motherboard controller connecting to multiple motherboards.

[0051] In summary, in the embodiment of the present application, by constructing a programmable logic object based on the function of the motherboard controller to be verified, the motherboard controller is used to control multiple motherboards, the programmable logic object and the multiple motherboards are connected through a channel switcher, the programmable logic object is controlled to send a connection signal to the channel switcher, and the first motherboard among the multiple motherboards is determined to trigger hot insertion, so that the programmable logic object and the first motherboard are connected, and the programmable logic object is controlled to send a removal signal to the channel switcher, and the second motherboard among the multiple motherboards is determined to trigger hot removal, so that the programmable logic object and the second motherboard are disconnected. When the programmable logic object is connected to the first motherboard and disconnected from the second motherboard, it is determined that the motherboard controller has the function of connecting multiple motherboards. It is possible to conveniently verify the function of a single motherboard controller connecting and controlling multiple motherboards. In addition, by constructing a programmable logic object to simulate the motherboard controller, it is not necessary to perform functional verification after the motherboard controller is manufactured. Verification is performed directly based on the programmable logic object, so that verification efficiency is improved and cost is reduced.

[0052] Figure 3 Another method for verifying the function of a motherboard controller provided in an embodiment of the present application includes:

[0053] Step 301, constructing a programmable logic object based on the function of a motherboard controller to be verified; the motherboard controller is used to control multiple motherboards, and the programmable logic object is used to implement the function of the motherboard controller; the programmable logic object and the multiple motherboards are connected via a channel switch;

[0054] Step 302, controlling the programmable logic object to send a connection signal to the channel switch, determining that a first mainboard among a plurality of mainboards triggers hot plugging, so that the programmable logic object is connected to the first mainboard; the connection signal carries identification information of the first mainboard;

[0055] Step 303, controlling the programmable logic object to send a removal signal to the channel switch, determining that a second mainboard among the multiple mainboards triggers hot removal, so as to disconnect the programmable logic object from the second mainboard; the removal signal carries identification information of the second mainboard;

[0056] Step 304: when the programmable logic object is connected to the first motherboard and disconnected from the second motherboard, determine that the motherboard controller has a function of connecting to multiple motherboards.

[0057] For details of the above steps 301-304, please refer to Figure 1 The embodiments are not described in detail here.

[0058] Optionally, the method further includes:

[0059] In a case where the programmable logic object is connected to the first mainboard, determining a preset communication protocol and a first type of interface;

[0060] Based on the preset communication protocol and the first type of interface, controlling the programmable logic object to send an interaction request to the first mainboard;

[0061] When the programmable logic object receives the motherboard data returned by the first motherboard, it is determined that there is a first communication link based on the first type of interface between the programmable logic object and the first motherboard; the motherboard data is generated by the first motherboard in response to the interaction request.

[0062] In an embodiment of the present application, the preset communication protocol may be a Management Component Transport Protocol (MCTP), a Network Controller Sideband Interface (NCSI) protocol, and others, which are not limited here.

[0063] The first type of interface can be a PCIE interface. Based on a preset communication protocol, the programmable logic object is controlled to send an interaction request to the first mainboard through the first type of interface. The interaction request can be used to obtain mainboard data. The mainboard data can be parameters, configurations and other data of some mainboard components.

[0064] When the first mainboard generates mainboard data in response to the interaction request and returns the mainboard data to the programmable logic object, that is, when the programmable logic object receives the mainboard data returned by the first mainboard, it is determined that the programmable logic object and the first mainboard have a first communication link based on a first type of interface.

[0065] This verifies that the programmable logic object and the first mainboard can exchange data through the first communication link, or that the programmable logic object can monitor the first mainboard based on the first communication link, that is, the programmable logic object has the function of monitoring the first mainboard based on the first communication link.

[0066] Optionally, the method further includes:

[0067] In the case where the programmable logic object and the second mainboard are disconnected, determining a preset communication protocol and a second type of interface;

[0068] Based on the preset communication protocol and the second type interface, controlling the programmable logic object to send an interaction request to the second mainboard;

[0069] When the programmable logic object receives the motherboard data returned by the second motherboard, it is determined that there is a second communication link based on the second type of interface between the programmable logic object and the second motherboard.

[0070] In the embodiment of the present application, the preset communication protocol may be the MCTP protocol, the NCSI protocol and others, which are not limited here. The second type of interface may be an integrated circuit bus (IIC, Inter-Integrated Circuit) interface.

[0071] When the programmable logic object and the second mainboard are disconnected, based on the above preset communication protocol, the programmable logic object is controlled to send an interaction request to the first mainboard through the second type interface. Similarly, when the second mainboard generates mainboard data in response to the interaction request and returns the mainboard data to the programmable logic object, that is, when the programmable logic object receives the mainboard data returned by the second mainboard, it is determined that there is a second communication link based on the second type interface between the programmable logic object and the second mainboard.

[0072] This verifies that the programmable logic object and the second mainboard can exchange data through the second communication link, or that the programmable logic object can monitor the second mainboard based on the second communication link, that is, the programmable logic object has the function of monitoring the second mainboard based on the second communication link.

[0073] It is understandable that before performing functional verification, related functions need to be developed. If the motherboard is to be switched through a channel switch, it is necessary to develop out-of-band switching PCIE MUX functions for the firmware of the programmable logic object, where out-of-band means monitoring, configuring and controlling the device through a dedicated management channel independent of the main network management system; as well as function development based on the first communication link and the second communication link.

[0074] Optionally, the step 301 of constructing a programmable logic object based on the function of the mainboard controller to be verified includes:

[0075] Sub-step 3011, based on the function of the mainboard controller to be verified, determining the number of resources corresponding to the function; the number of resources represents the amount of hardware resources required to implement the function;

[0076] Sub-step 3012, determining a target number of the preset integrated circuits according to the resource quantity and resource parameters of the preset integrated circuits; preset integrated circuits with different resource parameters correspond to different sizes of hardware resource quantities;

[0077] Sub-step 3013, constructing a programmable logic object based on the functions and the target number of preset integrated circuits.

[0078] In the application embodiment, the programmable logic object may be a semi-custom circuit, which generally includes resources such as programmable logic blocks, input and output blocks, wiring resources, clock management modules, embedded storage units, digital signal processing modules, etc. Therefore, if the function of a motherboard controller such as a BMC is to be simulated, a corresponding and sufficient number of resources is required, that is, the amount of hardware resources required to implement the function.

[0079] Different types of integrated circuits have different resources. The amount of hardware resources of the current preset integrated circuit can be determined based on the resource parameters of the selected preset integrated circuit, and then the target number of required preset integrated circuits can be determined. Finally, a programmable logic object is constructed based on the functions and the target number of preset integrated circuits.

[0080] Since the programmable logic object needs to be constantly disconnected from the current motherboard and connected to the new motherboard, the programmable logic object itself meets the support of the hot-swap function, so it is necessary to pre-develop the programmable logic object with the hot-swap function. And since the resources of a single integrated circuit may not be able to support the full function of the motherboard controller, more than one, for example, two integrated circuits may be used to construct the programmable logic object. Then the hot-swap function of the programmable logic object may include the hot-swap function of the first integrated circuit (PCIE ep0) and the second integrated circuit (PCIE ep1), respectively. The first integrated circuit may be responsible for processing the video graphics array (VGA), MCTP, H2B (H2B to BMC) interface, and the second integrated circuit may be responsible for processing the universal serial bus (USB) interface.

[0081] The programmable logic object can support the motherboard root endpoint (RC, Root Complex) to PCIE ep0 reset signal (PERST) when it is valid, VGA hardware reset at the same time, in addition, the programmable logic object monitors the reset signal to ARM (a processor architecture) interrupt, the programmable logic object firmware reset and initialize MCTP, H2B, Joint Photographic Experts Group (JPEG, Joint Photographic Experts Group).

[0082] The programmable logic object can also support the USB motherboard and USB device hardware reset when the motherboard RC gives the PCIE ep1 PERST reset signal valid, and support the programmable logic object to detect the reset signal to ARM interrupt, programmable logic object firmware reset and initialize the USB device.

[0083] In implementing the embodiments of the present application, the number of resources corresponding to the function is determined based on the function of the mainboard controller to be verified; the target number of preset integrated circuits is determined according to the number of resources and the resource parameters of the preset integrated circuits; and a programmable logic object is constructed based on the functions and the target number of preset integrated circuits. When verifying the mainboard controller, appropriate integrated circuits can be selected according to relevant verification functions, and the number of integrated circuits can be determined, thereby accurately constructing a programmable logic object for simulating the mainboard controller, thereby improving the accuracy and efficiency of the mainboard controller function verification.

[0084] The method further comprises:

[0085] When the programmable logic object is connected to the first mainboard, determining that the programmable logic object has completed initialization;

[0086] When the programmable logic object is disconnected from the second mainboard, acquiring a reset signal and level information of the reset signal;

[0087] When the level information indicates that the reset signal is at a low level, it is determined that the programmable logic object is in a reset state.

[0088] In the embodiment of the present application, when the programmable logic object and the first mainboard are switched to be connected, it is determined that the programmable logic object has completed initialization, and further it is determined that the programmable logic object and the first mainboard are successfully connected.

[0089] Whether the initialization is successful can be determined by obtaining the hardware indicator light signal. The device usually has an indicator light to show its status, and a specific signal may be generated after the initialization is completed. The device log can be obtained to identify the operations and events recorded in the log to determine whether there are errors or warnings in the initialization. The status and configuration information of the programmable logic object can be checked based on the management tool to determine whether the initialization is successful. The relevant documents of the server or system can be referred to to determine different initialization success flag information and judgment methods, which are not specifically limited here.

[0090] When the programmable logic object and the second main board are disconnected, a reset signal and level information of the reset signal are obtained. When the level information indicates that the reset signal is at a low level, it is determined that the programmable logic object is in a reset state, and further it is determined that the programmable logic object and the second main board have been disconnected.

[0091] Optionally, the step of controlling the programmable logic object to send a connection signal to the channel switch to determine that a first motherboard among the multiple motherboards triggers hot insertion includes:

[0092] Controlling the programmable logic object to send a connection signal to the channel switch; the channel switch is used to receive and respond to the connection signal to connect the programmable logic object and the first main board; the first main board is used to obtain characteristic information of the programmable logic object after the connection;

[0093] The driver information loaded by the first mainboard is obtained, and when the driver information corresponds to the programmable logic object, it is determined that the first mainboard has triggered hot insertion; the driver information is information of the driver loaded by the first mainboard based on the characteristic information.

[0094] In an embodiment of the present application, after the programmable logic object sends a connection signal to the channel switch, the channel switch connects the programmable logic object to the first mainboard. After the connection, the first mainboard can obtain the characteristic information of the programmable logic object, and based on the characteristic information of the programmable logic object, load the corresponding driver, which is used for communication between the programmable logic object and the first mainboard. Different characteristic information corresponds to different drivers, and the characteristic information can be information such as manufacturer information, device identification code, device type and model, firmware version, etc.

[0095] When the driver information corresponds to the programmable logic object, it is determined that the first mainboard has correctly triggered the hot plug, thereby verifying the interaction function between the operating system of the server and the mainboard controller.

[0096] It is understandable that before verifying the interactive function between the operating system and the motherboard controller, the server operating system can be developed and the corresponding PCIE driver can be designed. The firmware of the PCIE device (programmable logic object) can also be developed so that the PCIE hot plug is supported at the firmware level. In addition, the function verification process related to the server operating system can also be carried out, such as installing the operating system operating system, installing the driver, verifying whether the interrupt can be received under the operating system, when the PCIE device is inserted / removed, the operating system can detect the hot plug request event, verify the hot plug request, when the PCIE device cannot be hot plugged normally, the operating system can provide a corresponding error handling mechanism, when processing the PCIE device insertion / removal, it can identify the newly inserted device and load the corresponding driver, provide a notification mechanism to describe the change of the PCIE device state, can handle the plug and unplug command from the operating system, realize the processing logic of the hot plug event, and support the devices of the video graphics array (VGA, Video Graphics Array) interface and the universal serial bus (USB, Universal SerialBus) interface.

[0097] Figure 4 is a schematic diagram of system verification provided by an embodiment of the present disclosure; Figure 4 It includes programmable logic object design 401, programmable logic object software development 402, hardware board design 403, basic input and output system software development 404 and server operating system development 405, which together constitute system verification 40.

[0098] Among them, the hardware board design 403 includes the development of cables between the mainboard and the programmable logic object, which is used to verify the PCIE hot plug function and add the design of PCIE MUX. The basic input and output system (BIOS) software development 404 mainly includes the hot plug function adaptation of VGA and USB. After PCIE enumeration, USB hot plug will not cause the BI operating system to crash. After PCIE enumeration, VGA hot plug will not cause the BI operating system to crash. When the computer is turned on, the USB host controller is in place. After PCIE enumeration, the USB host controller can work normally after hot plugging first and hot plugging. When the computer is turned on, the VGA controller is in place. After PCIE enumeration, the VGA can display the picture normally after hot plugging first and hot plugging. When the computer is turned on, the USB host controller is not in place. After PCIE enumeration and hot plugging, the USB host controller can work normally. When the computer is turned on, the VGA controller is not in place. After PCIE enumeration and hot plugging, the VGA can display the picture normally. The contents of other parts will not be repeated here.

[0099] Figure 5 It is a structural diagram of verifying a programmable logic object when there is no channel switch provided in an embodiment of the present application; Figure 5 The system includes a first programmable logic object 501 and a second programmable logic object 502, a first main board 503 and a second main board 504. Figure 5 In the embodiment, the first programmable logic object 501 is connected to the second main board 504 through a multi-channel input / output interface (MICO), and the second programmable logic object 502 is connected to the first main board 503 through the MICO interface.

[0100] Based on Figure 5When hot-plugging the structure, it is necessary to construct the PCIE in-place signal and the corresponding partial management signals, and the complex programmable logic device (CPLD) needs to be modified and the FPGA adapted. The hot switching of VGA and USB cannot be performed at the same time. When verifying the PCIE switching of dual motherboards, two systems are used, and system A (corresponding to the first motherboard 503) and system B (corresponding to the second motherboard 504) work at the same time. After normal startup, hot-plug the two systems at the same time, unplug systems A and B from the MCIO of the Y-type cable connecting the FPGA card of the system, and after the hot-plug step, insert the MCIO end of the Y-type cable of system A into the MCIO connector of the FPGA card of system B, and insert the MCIO end of the Y-type cable of system B into the MCIO connector of the FPGA card of system A, and continue with the standard PCIE hot-plug process, such as Figure 5 This solution verifies the hot-swap function and does not require the PCIE MUX to be prepared in advance.

[0101] Figure 6 is a structural diagram of a programmable logic object based on a channel switch provided in an embodiment of the present application; Figure 6 In the embodiment, the programmable logic object is composed of a first integrated circuit 601 and a second integrated circuit 602, and also includes a channel switch 603, a first main board 604 and a second main board 605. Through the channel switch 503, the first integrated circuit 601 and the second integrated circuit 602 can be controlled to be connected to the first main board 604 and the second main board 605 respectively, and the specific connection relationship is not repeated. Among them, the channel switch 603 may include a PCIE MUX and a clock MUX, and the MUX has different channels A, B, and C.

[0102] Figure 7 is a structural diagram of another programmable logic object based on a channel switch provided in an embodiment of the present application; Figure 7 The programmable logic object 701, the first main board 702, the second main board 703, and the first channel switch 704, the second channel switch 705, and the third channel switch 706 are included. Through the operation of multiple channel switches, the programmable logic object 701 can be connected to the first main board 702 or the second main board 703. Among them, EP1 is used to transmit VGA signals, EP2 is used to transmit USB signals, and EP3 is used to transmit MCTP signals.

[0103] In addition, after the user connects the programmable logic object and the target motherboard through the channel switch, the user can send a channel fixation signal to the channel switch, so that the channel switch can not respond to the connection signal or the disconnection signal, and thus the user can no longer arbitrarily change the target motherboard connected and controlled by the programmable logic object based on the specific switch, thereby improving the stability of the motherboard control. After receiving the fixation release signal, the channel switch can respond to the signal and continue to respond to the connection signal or the disconnection signal, and the user can still continue to change the target motherboard connected and controlled by the programmable logic object, thereby improving the flexibility of the motherboard control.

[0104] In summary, in the implementation of the present application, a programmable logic object is constructed based on the function of the motherboard controller to be verified, the motherboard controller is used to control multiple motherboards, the programmable logic object and the multiple motherboards are connected through a channel switcher, the programmable logic object is controlled to send a connection signal to the channel switcher, it is determined that the first motherboard among the multiple motherboards triggers hot insertion, so that the programmable logic object and the first motherboard are connected, the programmable logic object is controlled to send a removal signal to the channel switcher, it is determined that the second motherboard among the multiple motherboards triggers hot removal, so that the programmable logic object and the second motherboard are disconnected, and when the programmable logic object is connected to the first motherboard and disconnected from the second motherboard, it is determined that the motherboard controller has the function of connecting multiple motherboards. The function of a single motherboard controller connecting and controlling multiple motherboards can be conveniently verified. In addition, by constructing a programmable logic object to simulate the motherboard controller, it is not necessary to perform functional verification after the motherboard controller is manufactured. Verification is performed directly based on the programmable logic object, so that verification efficiency is improved and cost is reduced.

[0105] Figure 8 : is a schematic diagram of a motherboard controller function verification device provided by an embodiment of the present application, the device comprising:

[0106] The object construction module 801 is used to construct a programmable logic object based on the function of the motherboard controller to be verified; the motherboard controller is used to control multiple motherboards, and the programmable logic object is used to implement the function of the motherboard controller; the programmable logic object and the multiple motherboards are connected through a channel switch;

[0107] The mainboard connection module 802 is used to control the programmable logic object to send a connection signal to the channel switch, and determine that a first mainboard among the multiple mainboards triggers hot insertion, so that the programmable logic object is connected to the first mainboard; the connection signal carries the identification information of the first mainboard;

[0108] The motherboard disconnection module 803 is used to control the programmable logic object to send a removal signal to the channel switch, and determine that the second motherboard among the multiple motherboards triggers hot removal, so as to disconnect the programmable logic object from the second motherboard; the removal signal carries the identification information of the second motherboard;

[0109] The function verification module 804 is used to determine whether the motherboard controller has the function of connecting to multiple motherboards when the programmable logic object is connected to the first motherboard and disconnected from the second motherboard.

[0110] Optionally, the device further comprises:

[0111] A first interface module, configured to determine a preset communication protocol and a first type of interface when the programmable logic object is connected to the first mainboard;

[0112] A first interaction module, configured to control the programmable logic object to send an interaction request to the first mainboard based on the preset communication protocol and the first type interface;

[0113] The first link module is used to determine that there is a first communication link based on the first type of interface between the programmable logic object and the first mainboard when the programmable logic object receives mainboard data returned by the first mainboard; the mainboard data is generated by the first mainboard in response to the interaction request.

[0114] Optionally, the device further comprises:

[0115] A second interface module, configured to determine a preset communication protocol and a second type of interface when the programmable logic object and the second mainboard are disconnected;

[0116] A second interaction module, configured to control the programmable logic object to send an interaction request to the second mainboard based on the preset communication protocol and the second type interface;

[0117] A second link module is used to determine that there is a second communication link based on the second type interface between the programmable logic object and the second mainboard when the programmable logic object receives the mainboard data returned by the second mainboard.

[0118] Optional, object building blocks, including:

[0119] A resource quantity submodule, used to determine the resource quantity corresponding to the function of the mainboard controller to be verified based on the function of the mainboard controller to be verified; the resource quantity represents the amount of hardware resources required to implement the function;

[0120] A preset quantity submodule, used to determine the target quantity of the preset integrated circuits according to the resource quantity and the resource parameters of the preset integrated circuits; preset integrated circuits with different resource parameters correspond to different sizes of hardware resource quantities;

[0121] The integrated construction submodule is used to construct a programmable logic object based on the preset integrated circuits of the functions and the target number.

[0122] Optionally, the device further comprises:

[0123] an initialization module, configured to determine that the programmable logic object has completed initialization when the programmable logic object is connected to the first mainboard;

[0124] a reset module, configured to obtain a reset signal and level information of the reset signal when the programmable logic object is disconnected from the second mainboard;

[0125] The state module is used to determine that the programmable logic object is in a reset state when the level information indicates that the reset signal is at a low level.

[0126] Optional, motherboard connection module, including:

[0127] a feature acquisition submodule, used to control the programmable logic object to send a connection signal to the channel switch; the channel switch is used to receive and respond to the connection signal to connect the programmable logic object and the first main board; the first main board is used to acquire feature information of the programmable logic object after the connection;

[0128] A driver loading submodule is used to obtain driver program information loaded by the first mainboard, and when the driver program information corresponds to the programmable logic object, determine that the first mainboard has triggered hot insertion; the driver program information is information of a driver program loaded by the first mainboard based on the feature information.

[0129] In the embodiment of the present application, by acquiring the configuration data of the hardware resources to be allocated, the configuration data is stored in the memory through the baseboard management controller; the hardware resources to be allocated are used to be allocated to multiple root ports of the central processing unit, and the configuration data is used to characterize the demand for hardware resources by the root port; after the basic input and output system is started, the basic input and output system acquires the configuration data in the memory; the basic input and output system writes the configuration data into the register of the central processing unit, and based on the configuration data, the register allocates the hardware resources to be allocated to the multiple root ports of the central processing unit. The configuration data of the hardware resources to be allocated can be acquired in advance, and the configuration data is written into the memory of the baseboard management controller. After the basic input and output system is started, the basic input and output system acquires the configuration data, and finally the register of the central processing unit acquires the configuration data, and then the root port of the central processing unit is allocated resources. It can avoid the situation that the root port resources are insufficient after the root port is connected to the device, further avoid the need to restart to complete the reallocation of resources, and improve the efficiency of resource allocation.

[0130] The present application also provides an electronic device, such as Fig. 9 As shown, it includes a processor 901 , a communication interface 902 , a memory 903 and a communication bus 904 , wherein the processor 901 , the communication interface 902 , and the memory 903 communicate with each other via the communication bus 904 .

[0131] The memory 903 is used to store computer programs.

[0132] When the processor 901 is used to execute the program stored in the memory 903, the following steps are implemented: based on the function of the motherboard controller to be verified, a programmable logic object is constructed; the motherboard controller is used to control multiple motherboards, and the programmable logic object is used to implement the function of the motherboard controller; the programmable logic object and the multiple motherboards are connected through a channel switch;

[0133] Controlling the programmable logic object to send a connection signal to the channel switch, determining that a first mainboard among a plurality of mainboards triggers hot plugging, so that the programmable logic object is connected to the first mainboard; the connection signal carries identification information of the first mainboard;

[0134] Controlling the programmable logic object to send a removal signal to the channel switch, determining that a second mainboard among the plurality of mainboards triggers hot removal, so as to disconnect the programmable logic object from the second mainboard; the removal signal carries identification information of the second mainboard;

[0135] When the programmable logic object is connected to the first mainboard and disconnected from the second mainboard, it is determined that the mainboard controller has a function of connecting to a plurality of mainboards.

[0136] Among them, the processor 901 can also implement other steps in the above-mentioned mainboard controller function verification method, which will not be repeated here.

[0137] The communication bus mentioned in the above electronic device can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The communication bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, only one thick line is used in the figure, but it does not mean that there is only one bus or one type of bus.

[0138] The communication interface is used for communication between the above electronic device and other devices.

[0139] The memory may include a random access memory (RAM) or a non-volatile memory, such as at least one disk memory. Optionally, the memory may also be at least one storage device located away from the aforementioned processor.

[0140] The above-mentioned processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

[0141] In another embodiment provided in the present application, a computer-readable storage medium is provided, in which instructions are stored. When the computer-readable storage medium is run on a computer, the computer executes the mainboard controller function verification method described in the above embodiment.

[0142] In another embodiment provided in the present application, a computer program product including instructions is also provided, which, when executed on a computer, enables the computer to execute the mainboard controller function verification method described in the above embodiment.

[0143] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from a website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrated. The available medium may be a magnetic medium, (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive Solid State Disk (SSD)), etc.

[0144] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0145] Each embodiment in this specification is described in a related manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. For the embodiments of the device, electronic device, computer-readable storage medium and computer program products containing instructions, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiments.

[0146] The above description is only a preferred embodiment of the present application and is not intended to limit the protection scope of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application are included in the protection scope of the present application.

Claims

1. A method for verifying the function of a motherboard controller, characterized in that: The method comprises: Based on the function of the motherboard controller to be verified, a programmable logic object is constructed; the motherboard controller is used to control multiple motherboards, and the programmable logic object is used to implement the function of the motherboard controller; the programmable logic object and the multiple motherboards are connected through a channel switch; Controlling the programmable logic object to send a connection signal to the channel switch, determining that a first mainboard among a plurality of mainboards triggers hot plugging, so that the programmable logic object is connected to the first mainboard; the connection signal carries identification information of the first mainboard; Controlling the programmable logic object to send a removal signal to the channel switch, determining that a second mainboard among the plurality of mainboards triggers hot removal, so as to disconnect the programmable logic object from the second mainboard; the removal signal carries identification information of the second mainboard; When the programmable logic object is connected to the first mainboard and disconnected from the second mainboard, it is determined that the mainboard controller has a function of connecting to a plurality of mainboards.

2. The method according to claim 1, characterized in that The method further comprises: In a case where the programmable logic object is connected to the first mainboard, determining a preset communication protocol and a first type of interface; Based on the preset communication protocol and the first type of interface, controlling the programmable logic object to send an interaction request to the first mainboard; When the programmable logic object receives the motherboard data returned by the first motherboard, it is determined that there is a first communication link based on the first type of interface between the programmable logic object and the first motherboard; the motherboard data is generated by the first motherboard in response to the interaction request.

3. The method according to claim 1, characterized in that The method further comprises: In the case where the programmable logic object and the second mainboard are disconnected, determining a preset communication protocol and a second type of interface; Based on the preset communication protocol and the second type interface, controlling the programmable logic object to send an interaction request to the second mainboard; When the programmable logic object receives the motherboard data returned by the second motherboard, it is determined that there is a second communication link based on the second type of interface between the programmable logic object and the second motherboard.

4. The method according to claim 1, characterized in that: The step of constructing a programmable logic object based on the function of the mainboard controller to be verified includes: Based on the function of the mainboard controller to be verified, determining the number of resources corresponding to the function; the number of resources represents the amount of hardware resources required to implement the function; Determining a target number of the preset integrated circuits according to the resource quantity and resource parameters of the preset integrated circuits; preset integrated circuits with different resource parameters correspond to different amounts of hardware resources; A programmable logic object is constructed based on the functions and the target number of preset integrated circuits.

5. The method according to claim 1, characterized in that The method further comprises: When the programmable logic object is connected to the first mainboard, determining that the programmable logic object has completed initialization; When the programmable logic object is disconnected from the second mainboard, acquiring a reset signal and level information of the reset signal; When the level information indicates that the reset signal is at a low level, it is determined that the programmable logic object is in a reset state.

6. The method according to claim 1, characterized in that The step of controlling the programmable logic object to send a connection signal to the channel switch to determine that a first motherboard among the plurality of motherboards triggers hot insertion comprises: Controlling the programmable logic object to send a connection signal to the channel switch; the channel switch is used to receive and respond to the connection signal to connect the programmable logic object and the first main board; the first main board is used to obtain characteristic information of the programmable logic object after the connection; The driver information loaded by the first mainboard is obtained, and when the driver information corresponds to the programmable logic object, it is determined that the first mainboard has triggered hot insertion; the driver information is information of the driver loaded by the first mainboard based on the characteristic information.

7. The method according to claim 1, characterized in that The method further comprises: When the basic input / output system on the mainboard has completed enumeration and a universal serial bus device has been removed, obtaining status information of the basic input / output system to determine that the basic input / output system is in a normal operating state; When the basic input / output system completes enumeration and the video graphics array device is removed, respectively obtaining status information of the basic input / output system and the video graphics array device to determine that the basic input / output system and the video graphics array device are in a normal operating state; When the basic input / output system completes enumeration, the universal serial bus device main controller is in place, and a universal serial bus device is removed and inserted, obtaining status information of the universal serial bus device main controller to determine that the universal serial bus device main controller is in a normal operating state; When the basic input / output system completes enumeration, the universal serial bus device main controller is not in place, and a universal serial bus device is inserted, obtaining status information of the universal serial bus device main controller to determine that the universal serial bus device main controller is in a normal operating state; When the basic input and output system completes enumeration, the video graphics array device controller is not in place, and the video graphics array device is inserted, the status information of the video graphics array device is obtained to determine that the video graphics array device is in a normal operating state.

8. A motherboard controller function verification device, characterized in that: The device comprises: An object construction module, used to construct a programmable logic object based on the function of a motherboard controller to be verified; the motherboard controller is used to control multiple motherboards, and the programmable logic object is used to implement the function of the motherboard controller; the programmable logic object and the multiple motherboards are connected via a channel switch; a mainboard connection module, used to control the programmable logic object to send a connection signal to the channel switch, and determine that a first mainboard among the multiple mainboards triggers hot plugging, so that the programmable logic object is connected to the first mainboard; the connection signal carries identification information of the first mainboard; a motherboard disconnection module, used to control the programmable logic object to send a removal signal to the channel switch, and determine that a second motherboard among the multiple motherboards triggers hot removal, so as to disconnect the programmable logic object from the second motherboard; the removal signal carries identification information of the second motherboard; A function verification module is used to determine whether the mainboard controller has the function of connecting to multiple mainboards when the programmable logic object is connected to the first mainboard and disconnected from the second mainboard.

9. An electronic device, characterized in that: include: Memory, used to store computer programs; A processor, configured to execute the computer program to implement the mainboard controller function verification method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: Used to store computer programs; wherein when the computer programs are executed by a processor, the mainboard controller function verification method as described in any one of claims 1 to 7 is implemented.

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