Inter-integrated circuit (I2C) interface with device addresses for device configuration

Abstract

The invention relates to an inter-integrated circuit (I2C) interface with device addresses for device configuration. A device is configured with a plurality of device addresses and a plurality of dedicated device configurations, wherein each device address is associated with a dedicated device configuration. The device includes an inter-integrated circuit (I2C) communication interface configured to receive a serial data line (SDA) signal including an address frame identifying a target device for communicating with a master device and a dedicated device configuration of the target device. The device includes processing circuitry configured to decode an address frame to identify a target device. Based on the device being a target device, the processing circuitry is configured to decode the address frame to identify a dedicated device configuration corresponding to one of a plurality of dedicated device configurations of the device, and the processing circuitry is configured to configure the device according to the dedicated device configuration identified based on the address frame.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This patent application claims the patent application entitled “INTER-INTEGRATED CIRCUIT (I 2 C) INTERFACE WITH DEVICE ADDRESS USED FOR DEVICE CONFIGURATION (Inter-integrated circuit with device address used for device configuration) 2 C) interface)" which is expressly incorporated herein by reference. Technical Field

[0003] The present disclosure generally relates to integrated circuits (I 2 C) interface, and more specifically, relates to an I2C interface having a device address for device configuration. 2 C interface. Background Art

[0004] Integrated Circuit (I 2 C) bus is a synchronous, multi-master / multi-slave (controller / target), packet-switched, single-ended, serial communications bus. 2 The I C bus is widely used to attach low-speed peripheral integrated circuits (ICs) to processors and microcontrollers for short-distance intra-board communications. 2 The C bus enables a microcontroller to control a network of device chips with two general-purpose input / output (I / O) pins and software. For example, to communicate, the I 2 C devices use two bidirectional open-collector or open-drain lines: a serial data line (SDA) and a serial clock line (SCL), which are pulled up through resistors. Summary of the invention

[0005] In some embodiments, an I 2 The C system includes a first device and a second device, wherein the first device includes: a first processing circuit; and a first I 2 C communication interface, which is configured to generate a first SDA signal based on an instruction received from a first processing circuit, wherein the first SDA signal includes a first address frame, the first address frame identifying a first target device address of a first target device for communicating with the first device and a first dedicated device configuration of the first target device; the second device is configured with a plurality of device addresses and a plurality of dedicated device configurations, wherein each device address of the plurality of device addresses is associated with one of the plurality of dedicated device configurations, wherein the second device includes: a second I 2C communication interface, which is configured to receive a first SDA signal; and a second processing circuit, which is configured to decode the first address frame to determine whether the second device corresponds to the first target device address, wherein based on the second device corresponding to the first target device address, the second processing circuit is configured to decode the first address frame to identify a first dedicated device configuration corresponding to one of a plurality of dedicated device configurations indicated by the first address frame, and wherein the second processing circuit is configured to configure the second device according to the first dedicated device configuration identified based on the first address frame.

[0006] In some embodiments, an I2C configured with multiple device addresses and multiple dedicated device configurations 2 The C device includes at least one memory, an I 2 C communication interface, and processing circuitry, the at least one memory being configured to store a plurality of device addresses and a plurality of dedicated device configurations, wherein each device address of the plurality of device addresses is associated with one of the plurality of dedicated device configurations; the I 2 The C communication interface is configured to receive an SDA signal from a master device, wherein the SDA signal includes an address frame, the address frame identifying a target device address of a target device for communicating with the master device and a dedicated device configuration of the target device; the processing circuit is configured to decode the address frame to determine whether one of the plurality of device addresses corresponds to the target device address, wherein the processing circuit is configured to decode the address frame to determine a dedicated device configuration corresponding to one of the plurality of dedicated device configurations indicated by the address frame, and wherein based on one of the plurality of device addresses corresponding to the target device address, the processing circuit is configured to configure the I C communication interface according to the dedicated device configuration determined from the address frame. 2 C device.

[0007] In some embodiments, a configuration I 2 The method of a C device includes receiving an SDA signal from a master device, wherein the SDA signal includes an address frame, the address frame identifying a target device address of a target device for communicating with the master device and a dedicated device configuration of the target device; decoding the address frame to determine an I 2 C device corresponds to the target device address; decoding the address frame to determine whether one of the multiple device addresses of the I 2 which device address among a plurality of device addresses of the C device corresponds to the dedicated device configuration indicated by the address frame; and configuring the I C device according to the dedicated device configuration identified from the address frame based on one device address among the plurality of device addresses corresponding to the target device address. 2 C device. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Embodiments are described herein with reference to the accompanying drawings.

[0009] Figure 1 I according to one or more embodiments is shown 2 C system;

[0010] Figure 2 A signal diagram showing an SDA signal and a clock signal according to one or more embodiments;

[0011] Figure 3 illustrates a communication exchange using SDA signals according to one or more embodiments;

[0012] Figure 4 illustrates a communication exchange using SDA signals according to one or more embodiments;

[0013] Figure 5 illustrates a communication exchange using SDA signals according to one or more embodiments;

[0014] Figure 6 illustrates a communication exchange using SDA signals according to one or more embodiments; and

[0015] Figure 7 A communication exchange using SDA signals is shown in accordance with one or more implementations. DETAILED DESCRIPTION

[0016] In the following, the details are set forth to provide a more comprehensive explanation of the example embodiments. However, it will be apparent to those skilled in the art that the embodiments may be practiced without these specific details. In other examples, well-known structures and devices are shown in block diagram form or as schematic diagrams rather than in detail to avoid obscuring the embodiments. In addition, unless otherwise specifically stated, the features of the different embodiments described below may be combined with each other.

[0017] In addition, equivalent or similar elements or elements having equivalent or similar functions are indicated by equivalent or similar reference numerals in the following description. Since identical or functionally equivalent elements are given the same reference numerals in the drawings, repeated descriptions of elements having the same reference numerals may be omitted. Therefore, descriptions provided for elements having the same or similar reference numerals may be interchangeable.

[0018] It should be understood that when an element is referred to as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or there may be intervening elements. Conversely, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements. Other words used to describe the relationship between elements should be interpreted in a similar manner (e.g., "between" versus "directly between," "adjacent" versus "directly adjacent," etc.).

[0019] In the embodiments described herein or shown in the drawings, any direct electrical connection or coupling (e.g., any connection or coupling without additional intermediate elements) may also be achieved by an indirect connection or coupling (e.g., a connection or coupling with one or more additional intermediate elements, or vice versa), as long as the general purpose of the connection or coupling is essentially maintained (e.g., transmitting a certain signal or transmitting a certain information). Features from different embodiments may be combined to form additional embodiments. For example, unless otherwise stated, changes or modifications described with respect to one embodiment in the embodiments may also apply to other embodiments.

[0020] As used herein, the terms "substantially" and "approximately" mean "within reasonable tolerances of manufacturing and measurement." For example, the terms "substantially" and "approximately" may be used herein to illustrate small manufacturing tolerances or other factors (e.g., within 5%) that are considered acceptable in the industry without departing from aspects of the embodiments described herein. For example, a resistor having an approximate resistance value may actually have a resistance within 5% of the approximate resistance value. As another example, a signal having an approximate signal value may actually have a signal value within 5% of the approximate signal value.

[0021] In the present disclosure, expressions including ordinal numbers such as "first", "second", etc. can modify various elements. However, such elements are not limited by such expressions. For example, such expressions do not limit the order and / or importance of elements. On the contrary, such expressions are only used for the purpose of distinguishing elements from other elements. For example, a first box and a second box indicate different boxes, although both are boxes. For another example, without departing from the scope of the present disclosure, a first element may be referred to as a second element, and similarly, a second element may also be referred to as a first element.

[0022] A "sensor" may refer to a component that converts a characteristic to be measured into an electrical sensor signal (e.g., a current signal or a voltage signal). For example, the characteristic to be measured may include a magnetic field, an electric field, an electromagnetic wave (e.g., a radio wave), pressure, temperature, force, current, or voltage, but is not limited thereto. A sensor device may be connected to an I 2 The C bus communicates with a controller (eg, a microcontroller). The communication may include transmitting a read command, a write command, or data from the controller to the sensor device, or transmitting sensor data from the sensor device to the controller.

[0023] I 2The C communication protocol uses a clock transmitted on a serial clock line (SCL) and a data signal transmitted on a serial data (SDA) line with seven-bit (7-bit) addressing. The controller generates the clock and initiates communication with the target device (slave device). Each target device receives the clock and responds to the controller when addressed by the controller (master device). The seven-bit addressing is provided as an address frame and represents the device address of the target device that the controller wants to communicate with. For example, the controller can initially be in transfer mode by setting a start condition, which is followed by the seven-bit address of the target device that the controller wants to communicate with, and the seven-bit address is followed by a single read / write command bit indicating whether the controller wants to write (0) to the target device or read (1) from the target device. If I 2 C bus corresponding to the seven-bit address, the target device will respond with an acknowledge (ACK) bit. The controller then continues in either transmit mode or receive mode (depending on the read / write command bits sent), and the target device continues in the complementary mode (receive or transmit, respectively).

[0024] A start condition is typically indicated by a high-to-low signal transition of the SDA signal on the SDA line with SCL high, while a stop condition is typically indicated by a low-to-high signal transition of the SDA signal on the SDA line with SCL high. All other signal transitions on the SDA line occur with SCL set low. 2 A C transaction may include multiple messages. The controller may terminate the message with a stop condition at the end of the transaction, or the controller may send another start condition to maintain access to the I for another message. 2 C bus control. Therefore, the start condition and the stop condition set by the controller can act as a message delimiter (e.g., a message frame delimiter) and are different from the address bit, the read / write command bit, and the data bit. Therefore, the start condition and the stop condition can define a communication frame.

[0025] The sensor device may be programmed with multiple configurations that may be selected from to set the configuration of the sensor device. Typically, an interrupt pin is used in conjunction with a configurable trigger option. For example, the controller and the sensor device may each include a corresponding interrupt pin, and the corresponding interrupt pins may be connected via an interrupt signal line. In addition to the I 2 In addition to the SCL and SDA lines of the I C bus, an interrupt pin and interrupt line are provided. The interrupt pin requires an additional pad and additional bond at each device, and a separate wire is required to connect the controller and the sensor device. In order for the controller to set the configuration of the sensor device, the controller usually transmits an interrupt on the interrupt line. The configurability of the configurable trigger options can be obtained via the I 2 C bus or interrupt line or write configuration commands.

[0026] Therefore, additional hardware, additional communication workload, and additional current consumption are required to trigger the configuration to be implemented at the sensor device, resulting in higher costs and faster power resource consumption. For example, for a sensor device that operates based on a limited power source (such as a battery), the additional current consumption for performing interrupts and configuration triggering may result in a shorter duration of operability before the limited power source can be recharged. In some cases, the limited power source may not be rechargeable. Therefore, in these cases, the additional current consumption may result in a shorter life of the sensor device.

[0027] Therefore, some embodiments disclosed herein relate to an I 2 C system, the I 2 The C system encodes the configuration information in the address frame of the data signal (e.g., SDA signal) transmitted on the SDA line. Therefore, the address frame is used to identify the target device for communicating with the controller. In addition, the address frame is used to identify and trigger the dedicated device configuration of the target device. No interruption is required to set the dedicated device configuration of the target device (e.g., sensor device), which eliminates the need for interrupt pins and additional wires for transmitting interrupts. Therefore, the current consumption of the controller and the target device can be reduced. In addition, in the case where the interrupt pin and additional wire are not required, the hardware of the controller and the target device can be simplified and made smaller, which can reduce manufacturing costs. For example, the controller can be integrated in a semiconductor chip that needs one less pin and less processing power to generate an interrupt. Similarly, the target device can be integrated in another semiconductor chip that needs one less pin and less processing power to process the interrupt. In addition, simplifying the manufacture of the controller and the target device can reduce CO2 emissions generated during manufacturing. By encoding the configuration information in the address frame of the data signal transmitted on the SDA line, the overall communication workload can be reduced, which can again reduce the total current consumption compared to that used when using an interrupt pin to trigger the configuration of the target device.

[0028] Figure 1 I according to one or more embodiments is shown 2 C system 100. I 2 The C system 100 includes a first device 102 (eg, an I 2 C master device, such as a microcontroller, and a second device 104 (e.g., I 2 C slave device, such as a sensor device).

[0029] The first device 102 may include a first processing circuit 106 (eg, including at least one processor), a memory 108, and a first I 2C communication interface 110, the memory 108 stores the device addresses of one or more slave devices, the first I 2 The C communication interface 110 is configured to generate a first SDA signal based on the instruction received from the first processing circuit 106 and the clock signal for transmission on SCL. Each device address stored in the memory 108 can be associated with a corresponding dedicated device configuration of the slave device. The first SDA signal includes a first address frame that identifies a first target device address for communication with the first device 102 and a first dedicated device configuration of the first target device. The first dedicated device configuration encoded in the first address frame can be used to trigger the implementation or setting of the first dedicated device configuration of the first target device.

[0030] The first device 102 may transmit a first address frame during a first communication frame. In addition, the first device 102 may transmit a subsequent address frame (e.g., a second address frame) via a first SDA signal during a subsequent communication frame (e.g., a second communication frame). The subsequent address frame may identify a second target device and a second dedicated device configuration of the second target device for communicating with the first device 102. The second target device may be the same as the first target device, or the second target device may be different from the first target device. The second dedicated device configuration may be the same as the first dedicated device configuration, or the second dedicated device configuration may be different from the first dedicated device configuration. Therefore, for each communication frame, the first device 102 may transmit an address frame identifying a corresponding target device and a corresponding device configuration of the corresponding target device.

[0031] The second device 104 may be configured with a plurality of device addresses and a plurality of dedicated device configurations. In other words, when any one of the addresses of the second device 104 is received in an address frame transmitted from the first device 102, the second device 104 may be enabled for communication with the first device 102. In addition, the second device 104 may be configured according to one or more of the plurality of dedicated device configurations. The second device 104 may be triggered to enable, implement, or otherwise set one or more of the plurality of dedicated device configurations based on the dedicated device configuration specified in the address frame received from the first device 102. Enabling the dedicated device configuration may include enabling or disabling one or more components of the second device 104, enabling or disabling one or more functions of the second device 104, enabling or disabling one or more processes of the second device 104, and / or enabling or disabling one or more programs or firmware of the second device 104. In addition, each of the plurality of device addresses of the second device 104 may be associated with one of the plurality of dedicated device configurations of the second device 104. Therefore, each address frame can be used to trigger a dedicated device configuration of the target device (eg, a dedicated device configuration of the second device 104 ).

[0032] The second device 104 may include a second I 2 C communication interface 112 and a second processing circuit 114 (eg, including at least one processor), the second I 2 The C communication interface 112 is configured to receive a first SDA signal from the first device 102 (eg, via an I 2 C bus), the second processing circuit 114 is configured to decode the first address frame to identify or otherwise determine whether the second device 104 corresponds to the first target device address. In other words, the second processing circuit 114 can determine whether the second device 104 corresponds to the first target device that the first device 102 wants to communicate with. The second device 104 may also include a memory 116, a sensor element 118, and a sampling circuit 120 (e.g., at least one analog-to-digital converter (ADC)), the sensor element 118 is configured to generate a sensor signal based on a measurable characteristic, and the sampling circuit 120 is configured to sample the sensor signal for generating sensor data.

[0033] Based on the second device 104 corresponding to the first target device address, the second processing circuit 114 can be configured to decode the first address frame to identify a first dedicated device configuration corresponding to one of the multiple dedicated device configurations indicated by the first address frame. That is, the second processing circuit 114 can be configured to decode the first address frame to identify which of its multiple dedicated device configurations should be implemented. In addition, the second processing circuit 114 can be configured to configure the second device 104 according to the first dedicated device configuration identified based on the first address frame. That is, on the basis of the second processing circuit 114 determining which of its multiple dedicated device configurations should be implemented based on the first address frame, the second processing circuit 114 can generate one or more configuration signals (e.g., control signals) to set the second device 104 to the dedicated device configuration.

[0034] The first device 102 may also be configured to 2The C communication interface 110 transmits a first SDA signal having a second address frame, the second address frame identifying a second target device address of a second target device for communicating with the first device 102 and a second dedicated device configuration of the second target device. The second processing circuit 114 may be configured to decode the second address frame to determine whether the second device 104 corresponds to the second target device address of the second target device indicated in the second address frame. Based on the second device 104 corresponding to the second target device address of the second target device, the second processing circuit 114 may be configured to decode the second address frame to identify a second dedicated device configuration corresponding to one of the multiple dedicated device configurations indicated by the second address frame. That is, the second processing circuit 114 may be configured to decode the first address frame to identify which of its multiple dedicated device configurations should be implemented. In addition, the second processing circuit 114 may be configured to configure the second device 104 according to the second dedicated device configuration identified based on the second address frame. That is, based on the second processing circuit 114 determining which dedicated device configuration among its multiple dedicated device configurations should be implemented based on the second address frame, the second processing circuit 114 can generate one or more configuration signals (e.g., control signals) to set the second device 104 to the dedicated device configuration.

[0035] The second address frame may be transmitted by the first device 102 on the SDA line after the first address frame. The first dedicated device configuration and the second dedicated device configuration may be the same dedicated device configuration or different dedicated device configurations. In some embodiments, the first dedicated device configuration may be a sensor trigger on configuration and the second dedicated device configuration may be a sensor trigger off configuration. In some embodiments, both the first dedicated device configuration and the second dedicated device configuration may be a sensor trigger on / off configuration.

[0036] Additional device-specific configuration may include configuring the read order of the register map of the target device, and cyclic redundancy check (CRC) configuration. The CRC configuration may indicate the write data length used for CRC calculation.

[0037] The address bits of the address frame can be used according to various embodiments. For example, all seven bits of the address frame can be used for address lookup. Once the slave device determines that it is the target device (e.g., based on the device address of the slave device corresponding to the target device address), the slave device can use some or all of the seven bits to perform a configuration lookup. In some embodiments, the address lookup and configuration lookup can be performed in the same processing step or action.

[0038] Alternatively, the address frame may include a first plurality of bits and a second plurality of bits. The first plurality of bits (e.g., the first three bits) may be address bits corresponding to one of a plurality of addresses of the target device, which address bits are used by the slave device to determine whether the slave device corresponds to the target device address of the target device. Thus, when three bits are used as address bits, up to eight slave devices may be connected to the I 2 C bus, and can be addressed by a first plurality of bits. A second plurality of bits (e.g., the next four bits) can be configuration bits indicating a dedicated device configuration to be implemented. Therefore, the configuration bits can correspond to a dedicated device configuration in the dedicated device configuration of the target device, and can be used by the slave device to identify the (commanded) dedicated device configuration of the target device. Therefore, when four bits are used as configuration bits, each slave device can have up to sixteen addressable configurations.

[0039] Based on receiving the sensor trigger on configuration, the second processing circuit 114 can be configured to enable the sampling circuit 120 (e.g., one or more ADCs) so as to be able to acquire samples from the sensor signal of the sensor element 118. Based on receiving the sensor trigger off configuration, the second processing circuit 114 can be configured to disable the sampling circuit 120 so as to disable acquiring samples of the sensor signal. Based on receiving the sensor trigger on / off configuration, the second processing circuit 114 can be configured to enable the sampling circuit 120 for one measurement frame and disable the sampling circuit 120 at the end of the measurement frame. For example, the second processing circuit 114 can be configured to automatically disable the sampling circuit 120 in response to the completion of the measurement frame without receiving any additional instructions from the first device 102. Therefore, the sensor trigger on / off configuration can be used to trigger one measurement frame. In some embodiments, the sensor trigger on / off configuration can be used to trigger multiple measurement frames (e.g., a defined number of measurement frames), and the second processing circuit 114 can be configured to automatically disable the sampling circuit 120 in response to the completion of the multiple measurement frames without receiving any additional instructions from the first device 102.

[0040] In some embodiments, the sensor trigger on / off configuration may configure the second device 104 to transmit sensor data corresponding to the measurement frame to the first device 102 the next time a read command bit is received from the first device 102. 2 The C communication interface 112 may be configured to transmit sensor data triggered by the first address frame in the second SDA signal transmitted by the second device 104 on the SDA line. 2 The C communication interface 112 may be configured to automatically disable the sampling circuit 120 and transmit the sensor data in response to the measurement frame (or frames) being completed, without receiving any additional dedicated device configuration from the first device 102 .

[0041] In some implementations, the sensor trigger on / off configuration may configure the second device 104 to automatically transmit sensor data corresponding to the measurement frame to the first device 102 during the next communication frame addressed to the second device 104 without receiving any additional instructions from the first device 102 .

[0042] The second processing circuit 114 may also be configured to read or otherwise decode the read / write command bits following the address frame and perform a read or write function associated with the dedicated device configuration specified in the address frame. For example, a read command indicated by the read / write command bits may trigger the second processing circuit 114 to transmit sensor data acquired during a particular measurement frame or acquired during a time interval between receiving the first address frame and receiving the second address frame.

[0043] In some implementations, the memory 116 of the second device 104 can be configured to store a lookup table that links each of the plurality of device addresses of the second device 104 to one of the plurality of dedicated device configurations of the second device 104. Each of the plurality of device addresses of the second device 104 can be linked to a different dedicated device configuration of the plurality of dedicated device configurations.

[0044] In some embodiments, the memory 116 of the second device 104 may be configured to store a plurality of device addresses of the second device 104. The second processing circuit 114 may be configured to reference the plurality of device addresses stored in the memory 116 and determine whether the second device 104 corresponds to a first target device address of the first target device based on whether the first address frame corresponds to one of the plurality of device addresses stored in the memory 116 of the second device 104. Based on the first address frame corresponding to one of the plurality of device addresses stored in the memory 116, the second processing circuit 114 may be configured to reference a map that associates each of the plurality of device addresses stored in the memory 116 of the second device 104 with one of the plurality of dedicated device configurations for identifying a first dedicated device configuration to be configured by the second processing circuit 114.

[0045] In some embodiments, the second processing circuit 114 can be configured to decode the seven bits of the seven-bit address frame to determine the first target device address of the first target device (e.g., to determine whether the second device 104 corresponds to the first target device address). In addition, based on the second device 104 corresponding to the first target device address, the second processing circuit 114 can be configured to decode the seven bits to identify the first dedicated device configuration specified in the seven-bit address frame. Therefore, both the address of the first target device and the first dedicated device configuration of the first target device can be encoded in seven bits. The first SDA signal includes a command bit (e.g., a read command bit or a write command bit) following the first address frame.

[0046] In some embodiments, the first address frame may include a first plurality of bits and a second plurality of bits. The first plurality of bits may be address bits that identify the first target device. The second plurality of bits may be configuration bits corresponding to a first dedicated device configuration of the first target device. The second processing circuit 114 may be configured to decode the first plurality of bits to identify the first target device (e.g., determine whether the second device 104 corresponds to the first target device address). Based on the second device 104 corresponding to the first target device address, the second processing circuit 114 may be configured to decode the second plurality of bits to identify the first dedicated device configuration.

[0047] As mentioned above, Figure 1 is provided as an example. Other examples can be found with Figure 1 Different from what is described in . Figure 1 The number and arrangement of components shown are provided as examples. Figure 1 Compared with the shown 2 C-system 100 may include additional components, fewer components, different components, or components in a different arrangement. Figure 1 Two or more components shown may be implemented in a single component, or Figure 1 A single component shown may be implemented as multiple distributed components.

[0048] Figure 2 A signal diagram 200 of an SDA signal and a clock signal is shown according to one or more embodiments. The SDA signal is transmitted in parallel with the clock signal transmitted on SCL. The signal diagram 200 may correspond to a single communication frame delimited by a start condition (S) and a stop condition (P). The start condition (S) and the stop condition (P) are defined by I 2 The first SDA signal on the SDA line may be provided by an I C master device (eg, the first device 102) and may serve as a message delimiter that is different from the address bit, the read / write command bit, the data bit, and the ACK bit. 2 C master device, and the second SDA signal on the SDA line can be driven by the I2 C slave device based on the first SDA. Additional SDA signals can be driven by I 2 C master and I 2 C slave transmission. In addition, I 2 C master can use I 2 C bus connects to two or more I 2 C slave device.

[0049] The address frame between the start condition and the read / write command is a seven-bit address that identifies the device address of the target device used to communicate with the first device 102 and the dedicated device configuration of the target device. The target device can be configured with or otherwise associated with multiple device addresses and can have multiple dedicated device configurations. The target device can be based on the I 2 The C master device (eg, from the first device 102) selects which of the multiple dedicated device configurations to enable based on the dedicated device configuration indicated in the address frame received by the C master device (eg, from the first device 102).

[0050] Figure 2 The signals shown are provided as examples.

[0051] Figure 3 1 shows a communication exchange 300 using SDA signals according to one or more embodiments. The communication exchange 300 may be performed at I 2 C master device (eg, first device 102) and I 2 I between C sensor devices (eg, second device 104) 2 C bus.

[0052] I 2 The C master device may transmit a first message 301 delimited by a start condition (S) and a stop condition (P). The first message 301 may include a first address frame AF1 and a first read / write (R / W) command bit. The first address frame AF1 may include a first I for the target device. 2 C address, and can indicate the sensor trigger start configuration, which triggers the target device to configure itself according to the sensor trigger start configuration. After confirming that it is the target device indicated in the first address frame AF1, I 2 C sensor devices can implement a sensor trigger-on configuration based on the detection of a stop condition (P). In this case, I 2 C sensor device can start measuring sensor signals for generating sensor data. For example, I 2 The sampling circuit 120 (eg, ADC) of the C sensor device may acquire samples x, y, and z during a measurement frame, and I 2The processing circuitry of the C sensor device (eg, the second processing circuitry 114 ) may generate sensor data (temp) based on the samples x, y, and z.

[0053] I 2 The C master device may transmit a second message 302 delimited by a start condition (S) and a stop condition (P). The second message 302 may include a second address frame AF2 and a second read / write (R / W) command bit. The second address frame AF2 may include a second I for the target device. 2 C address and can indicate a sensor triggered shutdown configuration, which triggers the target device to configure itself according to the sensor triggered shutdown configuration.

[0054] After confirming that it is the target device indicated in the second address frame AF2, I 2 The C sensor device can implement the sensor trigger off configuration based on decoding the second address frame AF2. In this case, I 2 C sensor device can stop measuring the sensor signal. For example, I 2 The processing circuitry of the C sensor device can disable the I 2 The sampling circuit of the C sensor device (eg, sampling circuit 120) is used to save power. In addition, the read / write (R / W) command bit of the second message 302 may be set to a read command (R), which indicates that I 2 C sensor device transmits sensor data generated during the measurement frame. Therefore, based on the read command (R), I 2 The C sensor device may send a data frame to the I C sensor device during an active communication frame (e.g., during a communication frame in which a read command (R) is received). 2 C master transmits sensor data.

[0055] Therefore, one measurement of sensor data (eg, one measurement frame) may be performed as needed.

[0056] Figure 3 The illustrated communication exchange 300 is provided as an example. Other device configurations are possible.

[0057] Figure 4 4 shows a communication exchange 400 using SDA signals according to one or more embodiments. The communication exchange 400 may be performed at I 2 C master device (eg, first device 102) and I 2 I between C sensor devices (eg, second device 104) 2 C bus.

[0058] I 2The C master device may transmit a first message 401 delimited by a start condition (S) and a stop condition (P). The first message 401 may include a first address frame AF1 and a first read / write (R / W) command bit. The first address frame AF1 may include a first I for the target device. 2 C address, and can indicate the sensor trigger start configuration, which triggers the target device to configure itself according to the sensor trigger start configuration. After confirming that it is the target device indicated in the first address frame AF1, I 2 C sensor devices can implement a sensor trigger-on configuration based on the detection of a stop condition (P). In this case, I 2 C sensor device can start measuring sensor signals for generating sensor data. For example, I 2 The sampling circuitry of the C sensor device (eg, sampling circuitry 120) may acquire samples x, y, and z during a measurement frame, and I 2 The processing circuitry of the C sensor device (eg, the second processing circuitry 114 ) may generate sensor data (temp) based on the samples x, y, and z.

[0059] During the measurement frame, I 2 The C master device may transmit a second message 402 delimited by a start condition (S) and a stop condition (P). 2 The C master device may transmit the second message 402 when the measurement frame is active (eg, during an active measurement frame), during which the I 2 The C sensor device generates sensor data. The second message 402 may include a second address frame AF2 and a second read / write (R / W) command bit transmitted during the measurement frame. The second address frame AF2 may include a second I for the target device. 2 C address, and can indicate a sensor trigger shutdown configuration, which triggers the target device to configure itself according to the sensor trigger shutdown configuration. In addition, the read / write (R / W) command bit of the second message can be set to a read command (R), which instructs the target device to transmit sensor data.

[0060] After confirming that it is the target device indicated in the second address frame AF2, I 2 The C sensor device can implement the sensor trigger off configuration based on decoding the second address frame AF2. 2 C sensor device can delay initiating the sensor trigger off configuration until the active measurement frame is complete. In this case, I 2 C sensor device can stop measuring the sensor signal. For example, I 2 The processing circuitry of the C sensor device can disable the I 2C sensor device's sampling circuit (eg, sampling circuit 120) to save power. In addition, since the read command (R) has been received in the second message 402 during the measurement frame, I 2 The C sensor device can be configured to transmit sensor data acquired during the measurement frame in the second SDA signal once the sensor data is ready for transmission (e.g., once the measurement frame is complete). The interval of the communication frame can be stretched by clock stretching to allow I 2 The C sensor device transmits sensor data in the same communication frame in which the second message 402 is received. 2 The C sensor device may send a data frame to the I C sensor device during an active communication frame (e.g., during a communication frame in which a read command (R) is received). 2 C master transmits sensor data.

[0061] Figure 4 The illustrated communication exchange 400 is provided as an example. Other device configurations are possible.

[0062] Figure 5 1 shows a communication exchange 500 using SDA signals according to one or more embodiments. The communication exchange 500 may be performed over I 2 C master device (eg, first device 102) and I 2 I between C sensor devices (eg, second device 104) 2 C bus.

[0063] I 2 The C master device may transmit a first message 501 delimited by a start condition (S) and a stop condition (P) and a second message 502 delimited by a start condition (S) and a stop condition (P).

[0064] For example, by I 2 Each message 501 and 502 transmitted by the C master device may indicate the I 2 C address in the sensor trigger on configuration or sensor trigger on / off configuration, and can include the read command bit (R). 2 The C sensor device can be configured to obtain a measurement of sensor data in response to each message 501 and 502 (e.g., according to a sensor trigger on configuration) and transmit the sensor data triggered in the previous communication frame in the next communication frame (e.g., according to a read command bit (R) of the next communication frame). 2 The C sensor device may acquire sensor data in a first measurement frame based on the sensor trigger-on configuration received in the first message 501, and I 2The C sensor device may transmit the sensor data acquired in the first measurement frame during a second communication frame (eg, the next communication frame) based on the read command bit (R) received in the second message 502. At the same time, the second message 502 may trigger a second measurement frame during which the I 2 The C sensor device may acquire sensor data based on the sensor trigger on configuration received in the second message 502. The sensor data acquired in the second measurement frame may be in response to the sensor trigger on configuration received from I 2 The C master receives the read command bit (R) in a subsequent communication frame and transmits (eg, in a third message—not explicitly shown).

[0065] The first message 501 and the second message 502 may be spaced apart in sufficient time to allow sufficient time to complete the measurement of the sensor data. In other words, the time interval between the first message 501 and the second message 502 may be at least equal to or greater than the measurement frame. Therefore, the sampling and reading of the sensor data may be triggered continuously over multiple communication frames based on the configuration instructions received in the address frame.

[0066] Figure 5 The illustrated communication exchange 500 is provided as an example. Other device configurations are possible.

[0067] Figure 6 600 using SDA signals according to one or more embodiments is shown. For example, communication exchange 600 can be an extension of communication exchange 400 over multiple communication frames and multiple measurement frames. In this example, a first communication frame, a second communication frame, and a third communication frame are shown. 2 The C master device may transmit a first message 601 during a first communication frame. The first message 601 may include a first address frame AF1 and a read / write command bit (R / W). The first address frame AF1 may trigger the first measurement frame to start at the stop condition (P) of the first communication frame. 2 The C master device may transmit a second message 602 during the second communication frame and during the first measurement frame. The second message 602 may include a second address frame AF2 and a read command bit (R). The second address frame AF2 may trigger the second measurement frame to start at the stop condition (P) of the second communication frame, and the read command bit (R) may trigger the I 2 The C slave device transmits the sensor data acquired during the first measurement frame during the data frame of the second communication frame.

[0068] I 2The C master device may transmit a third message 603 during the third communication frame and during the second measurement frame. The third message 603 may include a third address frame AF3 and a read command bit (R). The third address frame AF3 may trigger the third measurement frame to start at the stop condition (P) of the third communication frame, and the read command bit (R) may trigger the I 2 The C slave device transmits the sensor data acquired during the second measurement frame during the data frame of the third communication frame.

[0069] Therefore, I 2 The C slave device can be configured to sense and read out sensor data as quickly as possible without the need for an interrupt pin. In addition, clock stretching can ensure short measurement intervals with immediate readout of data.

[0070] Figure 6 The illustrated communication exchange 600 is provided as an example. Other device configurations are possible.

[0071] Figure 7 700 is shown using SDA signals according to one or more embodiments. For example, the communication exchange 700 may include multiple I 2 C slave devices (e.g., multiple sensor devices), each I 2 The C slave device has a corresponding plurality of device addresses and a corresponding plurality of dedicated device configurations.

[0072] Figure 7 The illustrated communication exchange 700 is provided as an example. Other device configurations are possible.

[0073] The following provides an overview of some aspects of the disclosure:

[0074] Aspect 1: An integrated circuit (I 2 C) A system comprising: a first device and a second device, wherein the first device comprises: a first processing circuit; and a first I 2 The invention relates to a communication interface for transmitting and receiving a first serial data line (SDA) signal based on an instruction received from a first processing circuit, wherein the first SDA signal includes a first address frame, the first address frame identifying a first target device address of a first target device for communicating with the first device and a first dedicated device configuration of the first target device; the second device is configured with a plurality of device addresses and a plurality of dedicated device configurations, wherein each device address of the plurality of device addresses is associated with one of the plurality of dedicated device configurations, wherein the second device includes: a second I 2C communication interface, which is configured to receive a first SDA signal; and a second processing circuit, which is configured to decode the first address frame to determine whether the second device corresponds to the first target device address, wherein based on the second device corresponding to the first target device address, the second processing circuit is configured to decode the first address frame to identify a first dedicated device configuration corresponding to one of a plurality of dedicated device configurations indicated by the first address frame, and wherein the second processing circuit is configured to configure the second device according to the first dedicated device configuration identified based on the first address frame.

[0075] Aspect 2: I according to Aspect 1 2 C system, wherein the second device further comprises: a memory configured to store a lookup table that links each device address of the plurality of device addresses to a dedicated device configuration of the plurality of dedicated device configurations.

[0076] Aspect 3: I according to Aspect 2 2 C system, wherein each device address of the plurality of device addresses is linked to a different dedicated device configuration of the plurality of dedicated device configurations.

[0077] Aspect 4: The I according to any one of aspects 1 to 3 2 C system, wherein the second device further comprises: a memory configured to store a plurality of device addresses of the second device, wherein the second processing circuit is configured to refer to the plurality of device addresses stored in the memory and determine whether the second device is the first target device based on whether the first target device address corresponds to one of the plurality of device addresses stored in the memory, and wherein based on the first address frame corresponding to one of the plurality of device addresses stored in the memory, the second processing circuit is configured to refer to a mapping that associates each of the plurality of device addresses stored in the memory with one of the plurality of dedicated device configurations for identifying the first dedicated device configuration.

[0078] Aspect 5: The I according to any one of aspects 1 to 4 2 C system, wherein the first address frame is a seven-bit address frame including seven bits.

[0079] Aspect 6: I according to Aspect 5 2 C system, wherein the second processing circuit is configured to decode the seven bits to determine the first target device address, wherein based on the second device corresponding to the first target device address, the second processing circuit is configured to decode the seven bits to identify the first dedicated device configuration.

[0080] Aspect 7: I according to Aspect 5 2C system, wherein the first SDA signal includes a command bit following the first address frame, wherein the command bit is a read command bit or a write command bit.

[0081] Aspect 8: I according to Aspect 5 2 C system, wherein a first target device address and a first dedicated device configuration of a first target device are encoded in the seven bits.

[0082] Aspect 9: The I according to any one of aspects 1 to 8 2 C system, wherein the first address frame includes a first plurality of bits and a second plurality of bits, wherein the first plurality of bits are address bits identifying an address of a first target device, and wherein the second plurality of bits are configuration bits corresponding to a first dedicated device configuration of the first target device.

[0083] Aspect 10: I according to Aspect 9 2 C system, wherein the second processing circuit is configured to decode the first plurality of bits to determine the first target device address, wherein based on the second device being the first target device, the second processing circuit is configured to decode the second plurality of bits to identify the first dedicated device configuration.

[0084] Aspect 11: The I according to any one of aspects 1 to 10 2 C system, wherein the first device is a controller, wherein the second device is a sensor including a sensor element configured to generate a sensor signal based on a measurable characteristic, wherein the plurality of dedicated device configurations include a sensor trigger-on configuration and a sensor trigger-off configuration, wherein based on the first dedicated device configuration determined from the first address frame being the sensor trigger-on configuration, the second processing circuit is configured to start measurement of the sensor signal to generate sensor data, and wherein based on the first dedicated device configuration determined from the first address frame being the sensor trigger-off configuration, the second processing circuit is configured to stop measurement of the sensor signal.

[0085] Aspect 12: I according to Aspect 11 2 C system, wherein the second device includes an analog-to-digital converter (ADC) configured to sample the sensor signal to generate sensor data, and wherein the second processing circuit is configured to enable the ADC to start measuring the sensor signal to generate the sensor data, and the second processing circuit is configured to disable the ADC to stop measuring the sensor signal.

[0086] Aspect 13: The I according to any one of aspects 1 to 12 2C system, wherein the first device is a controller, wherein the second device is a sensor including a sensor element configured to generate a sensor signal based on a measurable characteristic, wherein the plurality of dedicated device configurations include a sensor trigger on configuration and a sensor trigger off configuration, wherein based on a first dedicated device configuration determined from a first address frame being the sensor trigger on configuration, the second processing circuit is configured to start a measurement frame during which the sensor signal is sampled by a sampling circuit of the second device, and wherein based on the first address frame being received during the measurement frame, and based on the first dedicated device configuration determined from the first address frame being the sensor trigger off configuration, the second processing circuit is configured to generate sensor data at the end of the measurement frame and transmit the sensor data to the first device via a second SDA signal.

[0087] Aspect 14: The I according to any one of aspects 1 to 13 2 C system, wherein the first SDA signal includes a second address frame that identifies a second target device address of a second target device for communicating with the first device and a second dedicated device configuration of the second target device, wherein the second processing circuit is configured to decode the second address frame to determine whether the second device corresponds to the second target device address, wherein based on the second device corresponding to the second target device address, the second processing circuit is configured to decode the second address frame to identify a second dedicated device configuration corresponding to one of a plurality of dedicated device configurations indicated by the second address frame, and wherein the second processing circuit is configured to configure the second device according to the second dedicated device configuration identified based on the second address frame.

[0088] Aspect 15: I according to Aspect 14 2 C system, wherein the first device is a controller, wherein the second device is a sensor including a sensor element, the sensor element being configured to generate a sensor signal based on a measurable characteristic, wherein the plurality of dedicated device configurations include a sensor trigger-on configuration and a sensor trigger-off configuration, wherein the first dedicated device configuration corresponds to the sensor trigger-on configuration, wherein the second dedicated device configuration corresponds to the sensor trigger-off configuration, wherein based on identifying the first dedicated device configuration from a first address frame, the second processing circuit is configured to start a measurement frame during which the sensor signal is sampled by a sampling circuit of the second device for generating sensor data, and wherein based on identifying the second dedicated device configuration from a second address frame, the second processing circuit is configured to stop the sampling circuit from sampling the sensor signal and transmit the sensor data to the first device via a second SDA signal.

[0089] Aspect 16: I according to Aspect 15 2 C system, wherein if the second address frame is replaced by the second I during the measurement frame 2If the C communication interface receives the signal, the second processing circuit is configured to: stop the sampling circuit from sampling the sensor signal at the completion time of the measurement frame, generate sensor data based on the completion of the measurement frame, and transmit the sensor data to the first device via the second SDA signal.

[0090] Aspect 17: The I according to any one of aspects 1 to 16 2 C system, wherein the first device is a controller, wherein the second device is a sensor including a sensor element configured to generate a sensor signal based on a measurable characteristic, wherein the plurality of dedicated device configurations include a sensor trigger on / off configuration, wherein the first dedicated device configuration determined based on the first address frame is the sensor trigger on / off configuration, the second processing circuit is configured to start a measurement frame during which the sensor signal is sampled by a sampling circuit of the second device for generating sensor data, automatically stop sampling the sensor signal by the sampling circuit at the end of the measurement frame, and automatically generate sensor data based on samples of the sensor signal acquired during the measurement frame.

[0091] Aspect 18: I according to Aspect 17 2 C system, wherein the first SDA signal includes a stop signal that triggers the start of a measurement frame.

[0092] Aspect 19: An integrated circuit (IC) configured with a plurality of device addresses and a plurality of dedicated device configurations 2 C) a device comprising: at least one memory, I 2 C communication interface, and processing circuitry, the at least one memory being configured to store a plurality of device addresses and a plurality of dedicated device configurations, wherein each device address of the plurality of device addresses is associated with one of the plurality of dedicated device configurations; the I 2 The C communication interface is configured to receive a serial data line (SDA) signal from a master device, wherein the SDA signal includes an address frame that identifies a target device address of a target device for communicating with the master device and a dedicated device configuration of the target device; the processing circuit is configured to decode the address frame to determine whether one of the plurality of device addresses corresponds to the target device address, wherein the processing circuit is configured to decode the address frame to determine a dedicated device configuration corresponding to one of the plurality of dedicated device configurations indicated by the address frame, and wherein based on one of the plurality of device addresses corresponding to the target device address, the processing circuit is configured to configure the I C communication interface according to the dedicated device configuration determined from the address frame. 2 C device.

[0093] Aspect 20: A configuration of an integrated circuit (I 2C) a method for a device, the method comprising: receiving a serial data line (SDA) signal from a master device, wherein the SDA signal includes an address frame, the address frame identifying a target device address of a target device for communicating with the master device and a dedicated device configuration of the target device; decoding the address frame to determine an I 2 C device corresponds to the target device address; decoding the address frame to determine whether one of the multiple device addresses of the I 2 which device address among a plurality of device addresses of the C device corresponds to the dedicated device configuration indicated by the address frame; and configuring the I C device according to the dedicated device configuration identified from the address frame based on one device address among the plurality of device addresses corresponding to the target device address. 2 C device.

[0094] Aspect 21: A system configured to perform one or more operations according to one or more of aspects 1-20.

[0095] Aspect 22: An apparatus comprising means for performing one or more operations according to one or more of aspects 1-20.

[0096] Aspect 23: A non-transitory computer-readable medium storing an instruction set, the instruction set comprising one or more instructions, which when executed by a device causes the device to perform one or more operations according to one or more of aspects 1-20.

[0097] Aspect 24: A computer program product comprising instructions or codes for performing one or more operations according to one or more of aspects 1-20.

[0098] The foregoing disclosure provides illustration and description, but is not intended to be exhaustive or to limit the embodiments to the precise forms disclosed. Modifications and variations may be made in light of the above disclosure or may be acquired from practice of the embodiments.

[0099] Some embodiments may be described herein in conjunction with a threshold value. As used herein, "satisfying" a threshold value may refer to a value being greater than a threshold value, more than a threshold value, above a threshold value, greater than or equal to a threshold value, less than a threshold value, less than a threshold value, below a threshold value, less than or equal to a threshold value, equal to a threshold value, etc.

[0100] As used herein, the term "component" is intended to be broadly interpreted as hardware, firmware, or a combination of hardware and software. The systems and / or methods described herein can be implemented in different forms of hardware, firmware, or a combination of hardware and software. The actual dedicated control hardware or software code used to implement these systems and / or methods does not limit these embodiments. Therefore, the operation and behavior of the systems and / or methods are described herein without mentioning specific software code--it should be understood that software and hardware can be designed to implement the systems and / or methods based on the description herein.

[0101] Any component in the processing component can be implemented as a central processing unit (CPU) or other processor, which reads and executes a software program from a non-transient computer-readable recording medium such as a hard disk or a semiconductor memory device. For example, instructions can be executed by one or more processors, such as one or more CPUs, digital signal processors (DSPs), general-purpose microprocessors, application-specific integrated circuits (ASICs), field programmable logic arrays (FPLAs), programmable logic controllers (PLCs), or other equivalent integrated or discrete logic circuit devices. Therefore, the term "processor" used in this article refers to any structure in the aforementioned structure or any other structure suitable for implementing the technology described herein. The software can be stored on a non-transient computer-readable medium, so that the non-transient computer-readable medium includes a program code or a program algorithm stored thereon, and the program code or program algorithm causes the processor to perform the steps of the method via a computer program when executed.

[0102] A controller including hardware may also perform one or more of the techniques of the present disclosure. A controller including one or more processors may use electrical signals and digital algorithms to perform its receiving, analyzing, and control functions, which may also include correction functions. Such hardware, software, and firmware may be implemented in the same device or in separate devices to support the various techniques described in the present disclosure.

[0103] Signal processing circuitry and / or signal conditioning circuitry may receive one or more signals (e.g., measurement signals) in the form of raw measurement data from one or more components, and may derive additional information from the measurement signals. As used herein, "signal conditioning" refers to manipulating an analog signal so that the signal meets the requirements for further processing at the next stage. Signal conditioning may include conversion from analog to digital (e.g., via an analog-to-digital converter), amplification, filtering, conversion, biasing, range matching, isolation, and any other process required to make the signal suitable for post-conditioning processing.

[0104] Although the specific combination of features is recorded in the claims and / or disclosed in the specification, these combinations are not intended to limit the disclosure of the embodiments described herein. Many of these features can be combined in a manner not specifically recorded in the claims and / or not disclosed in the specification. For example, the disclosure includes the combination of each dependent claim in the claim set with each other individual claim in the claim set and each combination of multiple claims in the claim set. As used herein, the phrase "at least one" in the reference project list refers to any combination of these projects, including a single member. For example, "at least one of a, b, or c" is intended to cover a, b, c, a and b, a and c, b and c, and a, b and c, and any combination with multiple identical elements (for example, a+a, a+a+a, a+a+b, a+a+c, a+b+b, a+c+c, b+b, b+b+b, b+b+c, c+c, and c+c+c, or any other order of a, b, and c).

[0105] In addition, it should be understood that the disclosure of multiple actions or functions disclosed in the specification or claims should not be interpreted as being in a specific order. Therefore, unless these actions or functions are not interchangeable for technical reasons, the disclosure of multiple actions or functions will not limit these actions or functions to a specific order. In addition, in some embodiments, a single action may include multiple sub-actions, or may be decomposed into multiple sub-actions. Unless explicitly excluded, such sub-actions may be included in the disclosure of this single action and may be part of the disclosure of this single action.

[0106] When a "component" or "one or more components" (or another element, such as a "controller" or "one or more controllers") is described or claimed (either within a single claim or across multiple claims) as performing or being configured to perform multiple operations, the language is intended to broadly encompass a variety of architectures and environments. For example, unless otherwise expressly required (e.g., via the use of "a first component" and "a second component" or other language that distinguishes components in a claim), the language is intended to encompass a single component that performs or is configured to perform all operations, a group of components that collectively perform or are configured to perform all operations, a first component that performs or is configured to perform a first operation and a second component that performs or is configured to perform a second operation, or any combination of components that performs or is configured to perform operations. For example, when a claim is of the form "one or more components are configured to: perform X; perform Y; and perform Z," the claim should be interpreted to mean "one or more components are configured to perform X; one or more (possibly different) components are configured to perform Y; and one or more (possibly different) components are configured to perform Z."

[0107] Unless explicitly stated, any element, action or instruction used in this article should not be interpreted as key or necessary. In addition, as used in this article, the article "one" and "an" are intended to include one or more projects, and can be used interchangeably with "one or more". In addition, as used in the text, the article "the" is intended to include one or more projects quoted in combination with the article "the", and can be used interchangeably with "the one or more". In the case of only being intended to a project, the phrase "only one", "single" or similar language is used. In addition, as used in this article, the term "have", "have", "contain" etc. are intended to be open terms, and the open terms do not limit the elements modified by them (for example, "the element with" A can also have B). In addition, unless explicitly stated otherwise, the phrase "based on" is intended to mean "at least partially based on". As used in this article, the term "many" can be replaced with "multiple", and vice versa. In addition, as used in this article, the term "or" is intended to be inclusive when used in series, and can be used interchangeably with "and / or", unless explicitly stated otherwise (for example, if used in combination with "or" or "only one of them").

Claims

1. An integrated circuit I 2 C system, including: A first device, comprising: a first processing circuit; and First I 2 C communication interface, configured to generate a first serial data line SDA signal based on an instruction received from the first processing circuit, wherein the first SDA signal comprises a first address frame, the first address frame identifying a first target device address of a first target device for communicating with the first device and a first dedicated device configuration of the first target device; and a second device configured with a plurality of device addresses and a plurality of dedicated device configurations, wherein each device address of the plurality of device addresses is associated with one of the plurality of dedicated device configurations, The second device comprises: Second I 2 C communication interface, configured to receive the first SDA signal; and a second processing circuit configured to decode the first address frame to determine whether the second device corresponds to the first target device address, Wherein, based on the second device corresponding to the first target device address, The second processing circuit is configured to decode the first address frame to identify the first dedicated device configuration corresponding to one of the plurality of dedicated device configurations indicated by the first address frame, and The second processing circuit is configured to configure the second device according to the first dedicated device configuration identified based on the first address frame.

2. The method according to claim 1 2 C system, wherein the second device further comprises: A memory is configured to store a lookup table that links each device address of the plurality of device addresses to a dedicated device configuration of the plurality of dedicated device configurations.

3. The method according to claim 2 2 C system, wherein each device address of the plurality of device addresses is linked to a different dedicated device configuration of the plurality of dedicated device configurations.

4. The method according to claim 1 2 C system, wherein the second device further comprises: a memory configured to store the plurality of device addresses of the second device, wherein the second processing circuit is configured to refer to the plurality of device addresses stored in the memory and determine whether the second device is the first target device based on whether the first target device address corresponds to one of the plurality of device addresses stored in the memory, and Wherein, based on the first address frame corresponding to one of the multiple device addresses stored in the memory, the second processing circuit is configured to reference a mapping that associates each of the multiple device addresses stored in the memory with one of the multiple dedicated device configurations for identifying the first dedicated device configuration.

5. The method according to claim 1 2 C system, wherein the first address frame is a seven-bit address frame including seven bits.

6. The method according to claim 5 2 C system, wherein the second processing circuit is configured to decode the seven bits to determine the first target device address, wherein based on the second device corresponding to the first target device address, the second processing circuit is configured to decode the seven bits to identify the first dedicated device configuration.

7. The method according to claim 5 2 C system, wherein the first SDA signal includes a command bit following the first address frame, wherein the command bit is a read command bit or a write command bit.

8. The method according to claim 5 2 C system, wherein the first target device address and the first dedicated device configuration of the first target device are encoded in the seven bits.

9. The method according to claim 1 2 C system, wherein the first address frame includes a first plurality of bits and a second plurality of bits, wherein the first plurality of bits are address bits identifying the first target device address, and Wherein the second plurality of bits are configuration bits corresponding to the first specific device configuration of the first target device.

10. The method according to claim 9 2 C system, wherein the second processing circuit is configured to decode the first plurality of bits to determine the first target device address, wherein based on the second device being the first target device, the second processing circuit is configured to decode the second plurality of bits to identify the first dedicated device configuration.

11. The method according to claim 1 2 C system, wherein the first device is a controller, wherein the second device is a sensor comprising a sensor element configured to generate a sensor signal based on a measurable characteristic, wherein the plurality of dedicated device configurations include a sensor trigger on configuration and a sensor trigger off configuration, wherein based on the first dedicated device configuration determined from the first address frame to be the sensor trigger on configuration, the second processing circuit is configured to start measuring the sensor signal to generate sensor data, and Wherein based on the first dedicated device configuration determined from the first address frame to be the sensor trigger off configuration, the second processing circuit is configured to cease the measuring of the sensor signal.

12. The method according to claim 11 2 C system, wherein the second device comprises an analog-to-digital converter ADC, the ADC is configured to sample the sensor signal to generate the sensor data, and The second processing circuit is configured to enable the ADC to start the measurement of the sensor signal to generate the sensor data, and the second processing circuit is configured to disable the ADC to stop the measurement of the sensor signal.

13. The method according to claim 1 2 C system, wherein the first device is a controller, wherein the second device is a sensor comprising a sensor element configured to generate a sensor signal based on a measurable characteristic, wherein the plurality of dedicated device configurations include a sensor trigger on configuration and a sensor trigger off configuration, wherein based on the first dedicated device configuration determined from the first address frame to be the sensor trigger-on configuration, the second processing circuit is configured to start a measurement frame during which the sensor signal is sampled by a sampling circuit of the second device, and Wherein, based on the first address frame being received during the measurement frame, and based on the first dedicated device configuration determined from the first address frame to be the sensor trigger shutdown configuration, the second processing circuit is configured to generate sensor data at the end of the measurement frame and transmit the sensor data to the first device via a second SDA signal.

14. The method according to claim 1 2 C system, wherein the first SDA signal includes a second address frame, the second address frame identifying a second target device address of a second target device for communicating with the first device and a second dedicated device configuration of the second target device, wherein the second processing circuit is configured to decode the second address frame to determine whether the second device corresponds to the second target device address, wherein based on the second device corresponding to the second target device address, the second processing circuit is configured to decode the second address frame to identify the second dedicated device configuration corresponding to one of the plurality of dedicated device configurations indicated by the second address frame, and The second processing circuit is configured to configure the second device according to the second dedicated device configuration identified based on the second address frame.

15. The method according to claim 14 2 C system, wherein the first device is a controller, wherein the second device is a sensor comprising a sensor element configured to generate a sensor signal based on a measurable characteristic, wherein the plurality of dedicated device configurations include a sensor trigger on configuration and a sensor trigger off configuration, wherein the first dedicated device configuration corresponds to the sensor trigger-on configuration, wherein the second dedicated device configuration corresponds to the sensor triggered shutdown configuration, wherein based on identifying the first dedicated device configuration from the first address frame, the second processing circuit is configured to start a measurement frame during which the sensor signal is sampled by a sampling circuit of the second device for generating sensor data, and Based on identifying the second dedicated device configuration from the second address frame, the second processing circuit is configured to stop the sampling circuit from sampling the sensor signal and transmit the sensor data to the first device via a second SDA signal.

16. The method according to claim 15 2 C system, wherein if the second address frame is received by the second I during the measurement frame 2 C communication interface receives the sensor data, the second processing circuit is configured to: stop the sampling circuit from sampling the sensor signal at the completion time of the measurement frame, generate the sensor data based on the completion of the measurement frame, and transmit the sensor data to the first device via the second SDA signal.

17. The method according to claim 1 2 C system, wherein the first device is a controller, wherein the second device is a sensor comprising a sensor element configured to generate a sensor signal based on a measurable characteristic, wherein the plurality of dedicated device configurations include a sensor-triggered on / off configuration, Wherein, based on the first dedicated device configuration determined from the first address frame being the sensor trigger on / off configuration, the second processing circuit is configured to start a measurement frame, during which the sensor signal is sampled by a sampling circuit of the second device for generating sensor data, stop the sampling circuit from sampling the sensor signal at the end of the measurement frame, and generate the sensor data based on samples of the sensor signal acquired during the measurement frame.

18. The method according to claim 17 2 C system, wherein the first SDA signal includes a stop signal that triggers the start of the measurement frame.

19. An integrated circuit configured with a plurality of device addresses and a plurality of dedicated device configurations 2 C devices, including: at least one memory configured to store the plurality of device addresses and the plurality of dedicated device configurations, wherein each device address of the plurality of device addresses is associated with one of the plurality of dedicated device configurations; I 2 C communication interface, configured to receive a serial data line SDA signal from a master device, wherein the SDA signal includes an address frame, the address frame identifying a target device address of a target device for communicating with the master device and a dedicated device configuration of the target device; as well as processing circuitry configured to decode the address frame to determine whether one of the plurality of device addresses corresponds to the target device address, wherein the processing circuit is configured to decode the address frame to determine the dedicated device configuration corresponding to one of the plurality of dedicated device configurations indicated by the address frame, and wherein based on one of the plurality of device addresses corresponding to the target device address, the processing circuit is configured to configure the I according to the dedicated device configuration determined from the address frame 2 C device.

20. A method for configuring an integrated circuit 2 A method for a C device, the method comprising: receiving a serial data line SDA signal from a master device, wherein the SDA signal includes an address frame, the address frame identifying a target device address of a target device for communicating with the master device and a dedicated device configuration of the target device; Decode the address frame to determine the I 2 Whether one of the multiple device addresses of the C device corresponds to the target device address; Decode the address frame to determine the I 2 which device address of a plurality of device addresses of a C device corresponds to the dedicated device configuration indicated by the address frame; as well as configuring the I according to the dedicated device configuration identified from the address frame based on one of the plurality of device addresses corresponding to the target device address 2 C device.

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