Display driving chip, display driving method, display device and electronic equipment

Abstract

The embodiment of the invention relates to a display driving chip, a display driving method, a display device and electronic equipment, and relates to the technical field of image processing. The chip comprises a display channel circuit, a discharge circuit, a discharge switch and an output end, the first end of the discharge circuit is coupled with the first end of the discharge switch, and the second end of the discharge circuit is grounded; the second end of the discharge switch and the display channel circuit are both coupled with the output end. Therefore, the power consumption of the display driving chip can be reduced.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of image processing technology, and in particular to a display driver chip, a display driver method, a display device, and an electronic device. Background Art

[0002] The display screen includes a pixel circuit, which is usually driven by a display driver IC (DDIC). About a quarter of the power consumption of the whole machine is on the display driver chip side. As the time users use the whole machine gradually increases, it is increasingly important to reduce the power consumption of the display driver chip. The display driver chip has a strong ability to provide (source) and consume (sink) electrical energy. The display driver chip can be used to charge and discharge the pixel circuit of the display screen. The display driver chip can provide a high voltage for the pixel circuit of the display screen, so that the display driver chip charges the pixel circuit of the display screen; the display driver chip can provide a low voltage for the pixel circuit of the display screen, so that the pixel circuit of the display screen discharges to the display driver chip. During the charging and discharging process of the display screen, the power consumption of the display driver chip is relatively large. Summary of the invention

[0003] The embodiments of the present application provide a display driver chip, a display driver method, a display device and an electronic device, which solve the problem of high power consumption of the display driver chip during the charging and discharging process of the display screen in the prior art.

[0004] In order to achieve the above purpose, the embodiment of the present application adopts the following technical solution:

[0005] In a first aspect, a display driver chip is provided, the chip comprising a display channel circuit, a discharge circuit, a discharge switch and an output terminal. A first terminal of the discharge circuit is coupled to a first terminal of the discharge switch, a second terminal of the discharge circuit is grounded; and a second terminal of the discharge switch and the display channel circuit are both coupled to the output terminal.

[0006] In the above technical solution, a discharge circuit is provided on the output end side, and the output end is coupled to the discharge circuit via a discharge switch. When the output end needs to output a lower voltage, the switch inside the display channel circuit can be turned on and the discharge switch can be turned off, so that the display channel circuit outputs a voltage to the output end, or the discharge switch can be turned on and the switch inside the display channel circuit can be turned off, so that the discharge circuit outputs a voltage to the output end. Therefore, during discharge, the display channel circuit does not need to be used throughout the process, and the power consumption of the display channel circuit can be reduced.

[0007] In a possible implementation manner of the first aspect, the discharge circuit includes a clamping device, a first end of the clamping device is coupled to a first end of the discharge circuit, and a second end of the clamping device is coupled to a second end of the discharge circuit.

[0008] In the above possible implementations, the output terminal needs to output a lower discharge voltage so that the display screen discharges. The voltage at the output terminal is reduced to the clamping voltage through a clamping device, and then the voltage at the output terminal can be reduced from the clamping voltage to the discharge voltage through other circuits. Therefore, setting a clamping device can prevent the charge of the display screen from being completely discharged, so that the output terminal reaches the required discharge voltage.

[0009] In a possible implementation of the first aspect, the discharge circuit includes a clamp switch, a first clamp device, and a second clamp device. A first end of the first clamp device is coupled to a first end of the discharge circuit, a second end of the first clamp device is coupled to a first end of the second clamp device, and a second end of the second clamp device is coupled to a second end of the discharge circuit. A first end of the clamp switch is coupled to a first end of the first clamp device, and a second end of the clamp switch is coupled to a second end of the first clamp device.

[0010] In the above possible implementations, the output end needs to output a lower discharge voltage so that the display screen discharges. The voltage at the output end is reduced to the clamping voltage through a clamping device, and then the voltage at the output end can be reduced from the clamping voltage to the discharge voltage through other circuits. Therefore, setting a clamping device can prevent the charge of the display screen from being completely discharged, so that the output end reaches the required discharge voltage. In addition, two clamping devices are set, and one or two clamping devices are controlled by a clamping switch to access the circuit, so that clamping voltages of different gears can be achieved. The display driver chip can clamp the voltage at the output end to the gear closest to the discharge voltage according to the previous frame data or the next frame data. This can minimize the time of using the display channel circuit, thereby minimizing the power consumption of the display channel circuit.

[0011] In a possible implementation of the first aspect, the discharge circuit includes M-1 clamp switches and M clamp devices connected in series. The M clamp devices include a first clamp device, an N-1th clamp device, an Nth clamp device, an N+1th clamp device, and an Mth clamp device. The M-1 clamp switches include a first clamp switch, an Nth clamp device, and an M-1th clamp switch. N is any positive integer greater than 1 and less than M-1, and M is a positive integer greater than or equal to 3. The first end of the first clamp device is coupled to the first end of the discharge circuit, the first end of the Nth clamp device is coupled to the second end of the N-1th clamp device, the second end of the Nth clamp device is coupled to the first end of the N+1th clamp device, the first end of the Mth clamp device is coupled to the second end of the M-1th clamp device, and the second end of the Mth clamp device is coupled to the second end of the discharge circuit. The first end of the first clamp switch is coupled to the first end of the first clamp device, and the second end of the first clamp switch is coupled to the second end of the first clamp device. The first end of the Nth clamp switch is coupled to the first end of the Nth clamp device, and the second end of the Nth clamp switch is coupled to the second end of the Nth clamp device. The first end of the M-1th clamp switch is coupled to the first end of the M-1th clamp device, and the second end of the M-1th clamp switch is coupled to the second end of the M-1th clamp device.

[0012] In the above possible implementations, the output end needs to output a lower discharge voltage so that the display screen discharges. The voltage at the output end is reduced to the clamping voltage through a clamping device, and then the voltage at the output end can be reduced from the clamping voltage to the discharge voltage through other circuits. Therefore, setting a clamping device can prevent the charge of the display screen from being completely discharged, so that the output end reaches the required discharge voltage. In addition, multiple clamping devices are set, and different numbers of clamping devices are controlled by clamping switches to access the circuit, so that clamping voltages of different gears can be achieved. The display driver chip can clamp the voltage at the output end to the gear closest to the discharge voltage based on the previous frame data or the next frame data. This can minimize the time of using the display channel circuit, thereby minimizing the power consumption of the display channel circuit.

[0013] In a possible implementation of the first aspect, the clamping device is a metal oxide semiconductor field effect transistor, the control end and the first end of the metal oxide semiconductor field effect transistor are coupled to the first end of the clamping device, and the second end of the metal oxide semiconductor field effect transistor is coupled to the second end of the clamping device. Alternatively, the clamping device is a diode, the cathode of the diode is coupled to the first end of the clamping device, and the anode of the diode is coupled to the second end of the clamping device. In the above possible implementations, the power consumption of the metal oxide semiconductor field effect transistor or the diode is small, which can save power consumption. In addition, the metal oxide semiconductor field effect transistor or the diode has a simple circuit structure and low cost.

[0014] In a possible implementation of the first aspect, the discharge circuit has a clamping voltage; an output terminal, which is used to output a first voltage in a first time period and a second voltage in a second time period; the second time period is located after the first time period; and the second voltage is less than the first voltage. The output terminal is also used to output a voltage in a first intermediate time period and a second intermediate time period. At the end of the first intermediate time period, the slope of the voltage output by the output terminal is the first slope; at the beginning of the second intermediate time period, the slope of the voltage output by the output terminal is the second slope; and the second slope is less than the first slope. Among them, the first intermediate time period and the second intermediate time period are located after the end of the first time period and before the start of the second time period, and the second intermediate time period is located after the first intermediate time period; at the end of the first intermediate time period, the voltage output by the output terminal is equal to the clamping voltage. In the above possible implementation, when the voltage output by the output terminal needs to be reduced from the first voltage to the second voltage, the display channel circuit can be turned off, and the voltage at the output terminal can be reduced to the clamping voltage through the discharge circuit. Then the voltage at the output terminal is reduced from the clamping voltage to the second voltage through the display channel circuit. In this implementation, the display channel circuit is not required to be used in the first intermediate time period, but a discharge circuit with lower power consumption is used. Therefore, this implementation can save power consumption to a greater extent during the first intermediate period.

[0015] In a possible implementation of the first aspect, the chip further includes a consumption circuit and a consumption switch, the consumption circuit is coupled to the first end of the consumption switch, and the second end of the consumption switch is coupled to the output end. In the above possible implementation, the consumption circuit is arranged on the output end side, and the output end is coupled to the consumption circuit through the consumption switch. When the output end needs to output a lower voltage, the consumption switch can be turned on, the discharge switch can be turned off, and the switch inside the display channel circuit can be turned off, so that the consumption circuit outputs a voltage to the output end, or the discharge switch can be turned on, the consumption switch can be turned off, and the switch inside the display channel circuit can be turned off, so that the discharge circuit outputs a voltage to the output end. Therefore, during discharge, it is not necessary to use the display channel circuit throughout the process, which can reduce the power consumption of the display channel circuit.

[0016] In a possible implementation of the first aspect, the consumption circuit includes a low voltage drop linear regulator or a drive enhancement circuit. In the above possible implementation, using a low voltage drop linear regulator or a drive enhancement circuit as the consumption circuit can have lower power consumption than the display channel circuit.

[0017] In a possible implementation of the first aspect, the discharge circuit has a clamping voltage; an output terminal, which is used to output a first voltage in a first time period and a second voltage in a second time period; the second time period is located after the first time period; and the second voltage is less than the first voltage. The output terminal is also used to output a voltage in a first intermediate time period and a second intermediate time period. At the end of the first intermediate time period, the slope of the voltage output by the output terminal is a third slope; at the beginning of the second intermediate time period, the slope of the voltage output by the output terminal is a fourth slope; and the fourth slope is less than the third slope. Wherein, the first intermediate time period and the second intermediate time period are located after the end of the first time period and before the start of the second time period, and the second intermediate time period is located after the first intermediate time period; at the end of the first intermediate time period, the voltage output by the output terminal is equal to the clamping voltage. In the above possible implementation, when the voltage output by the output terminal needs to be reduced from the first voltage to the second voltage, the display channel circuit can be turned off, and the voltage at the output terminal can be reduced to the clamping voltage through the discharge circuit. Then, the voltage at the output terminal is reduced from the clamping voltage to the second voltage through the consumption circuit. This implementation does not require the use of the display channel circuit in both the first intermediate time period and the second intermediate time period, but uses a consumption circuit and a discharge circuit with lower power consumption. Therefore, this implementation can save power consumption to a large extent in both the first intermediate period and the second intermediate period.

[0018] In a possible implementation of the first aspect, the discharge circuit has a clamping voltage; an output terminal for outputting a first voltage in a first time period and a second voltage in a second time period; the second time period is located after the first time period; the second voltage is less than the first voltage; and the second voltage is equal to the clamping voltage. In the above possible implementation, when the voltage output by the output terminal needs to be reduced from the first voltage to the clamping voltage, the display channel circuit can be turned off, and the voltage at the output terminal is reduced to the clamping voltage through the discharge circuit. This implementation does not require the use of the display channel circuit in both the first intermediate time period and the second intermediate time period, but uses a discharge circuit with lower power consumption. Therefore, this implementation can save power consumption to a large extent in both the first intermediate time period and the second intermediate time period.

[0019] In a second aspect, a display driving method is provided, which is applied to a display driving chip, wherein the chip includes a display channel circuit, a discharge circuit, a discharge switch and an output end; the first end of the discharge circuit is coupled to the first end of the discharge switch, and the second end of the discharge circuit is grounded; the second end of the discharge switch and the display channel circuit are both coupled to the output end; the discharge circuit has a clamping voltage; the method includes: outputting a first voltage in a first time period and outputting a second voltage in a second time period through the output end; the second time period is after the first time period; the first voltage is greater than the clamping voltage, and the second voltage is less than or equal to the clamping voltage.

[0020] In a possible implementation of the second aspect, the second voltage is less than the clamping voltage; the method also includes: outputting the voltage through the output terminal in the first intermediate period and the second intermediate period; at the end of the first intermediate period, the slope of the voltage output through the output terminal is the first slope; at the initial moment of the second intermediate period, the slope of the voltage output through the output terminal is the second slope; the second slope is less than the first slope; wherein the first intermediate period and the second intermediate period are located after the end of the first time period and before the start of the second time period, and the second intermediate period is located after the first intermediate period; at the end of the first intermediate period, the voltage output through the output terminal is equal to the clamping voltage.

[0021] In a third aspect, a display device is provided, comprising a display screen and a display driver chip provided by the first aspect or any possible implementation of the first aspect. The display screen comprises a pixel circuit, and a pixel channel of the pixel circuit is coupled to an output terminal in the display driver chip.

[0022] In a fourth aspect, an electronic device is provided. The electronic device includes a circuit board and the display device provided in the third aspect, wherein a display driver chip in the display device is arranged on the circuit board.

[0023] In another aspect of the present application, a computer-readable storage medium is provided, in which a program code is stored. The program code can be called by a processor to execute the method provided by the second aspect or any possible implementation of the second aspect.

[0024] According to another aspect of the present application, a computer program product is provided. When the computer program product is run on a computer, the computer is enabled to execute the method provided by the second aspect or any possible implementation manner of the second aspect.

[0025] It can be understood that any of the display driving methods, devices, equipment, computer storage media or computer program products provided above all apply the corresponding display driving chip provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding chip provided above, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 A schematic diagram of a first display device provided in an embodiment of the present application Figure 1 ;

[0027] Figure 2 A voltage waveform provided in the embodiment of the present application Figure 1 ;

[0028] Figure 3 A schematic diagram of a first display device provided in an embodiment of the present application Figure 2 ;

[0029] Figure 4 A voltage waveform provided in the embodiment of the present application Figure 2 ;

[0030] Figure 5 A schematic diagram of an electronic device provided in an embodiment of the present application;

[0031] Figure 6 A schematic diagram of a second display device provided in an embodiment of the present application Figure 1 ;

[0032] Figure 7 A schematic diagram of a second display driver chip provided in an embodiment of the present application;

[0033] Figure 8 A schematic diagram of a first discharge circuit provided in an embodiment of the present application Figure 1 ;

[0034] Fig. 9 A schematic diagram of a first discharge circuit provided in an embodiment of the present application Figure 2 ;

[0035] Fig.10 A voltage waveform provided in the embodiment of the present application Figure 3 ;

[0036] Fig.11 A schematic diagram of a second display device provided in an embodiment of the present application Figure 2 ;

[0037] Fig.12 A voltage waveform provided in the embodiment of the present application Figure 4 ;

[0038] Fig.13 A voltage waveform provided in the embodiment of the present application Figure 5 ;

[0039] Fig.14 A schematic diagram of a display driving method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0040] It should be noted that the terms "first", "second", etc. involved in the embodiments of the present application are only used to distinguish features of the same type and cannot be understood as indicating relative importance, quantity, order, etc.

[0041] The terms "exemplary" or "for example" and the like in the embodiments of the present application are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of the terms "exemplary" or "for example" is intended to present the related concepts in a specific way.

[0042] The terms "coupling" and "connection" involved in the embodiments of the present application should be understood in a broad sense. For example, they may refer to a direct physical connection, or an indirect connection achieved through electronic devices, such as a connection achieved through resistors, inductors, capacitors or other electronic devices.

[0043] First, some basic concepts involved in the embodiments of the present application are explained:

[0044] Organic light-emitting diode (OLED) display is a display technology that uses organic light-emitting materials as pixel light sources. Each pixel of the OLED display includes three sub-pixels: red (red, R), green (green, G) and blue (blue, B). Each sub-pixel includes an OLED element. When current passes through, the OLED element emits light of the corresponding color. The brightness and color of each OLED element can be controlled individually. Each sub-pixel can be equivalent to a capacitor-resistor (RC) load. There is a certain delay in the reaction of OLED elements to voltage changes. The RC load can slow down the rise and fall rate of the signal, making the voltage change curve of the OLED element more ideal. The RC load can also control the current of the OLED element to maintain the brightness and color consistency of the OLED element. Therefore, the RC load can improve the stability of the display.

[0045] Display driver IC (DDIC) is an integrated circuit chip specially used to control and drive display screens. It is mainly used to convert the data to be displayed into electrical signals to ensure that the image indicated by the data to be displayed can be presented clearly and accurately on the display screen.

[0046] In a possible implementation, Figure 1 As shown, the first display device 1100A includes a first display screen 100A and a first display driver IC 200A (display driver IC, DDIC). For example, the first display screen 100A may be an OLED display screen.

[0047] The first display screen 100A may include a first pixel circuit 110A. The first pixel circuit 110A may include a plurality of channels, such as a first channel 11A, a second channel 12A, and more channels not shown. Each of the plurality of channels may include a plurality of sub-pixels. For example, the first channel 11A may include at least a sub-pixel R and a sub-pixel B, and the second channel 12A may include at least two sub-pixels G. The first display driver chip 200A may include a plurality of output terminals and a plurality of drive channel circuits. The plurality of output terminals may include a first output terminal, a second output terminal, and more output terminals not shown. The plurality of drive channel circuits may include a first drive channel circuit 211A, a second drive channel circuit 212A, and more drive channel circuits not shown.

[0048] The multiple drive channel circuits of the first display driver chip 200A are coupled to the multiple output terminals in a one-to-one correspondence. For example, the first drive channel circuit 211A is coupled to the first output terminal, and the second drive channel circuit 212A is coupled to the second output terminal. The multiple sub-pixels in each channel of the first pixel circuit 110A can be coupled to the same output terminal of the first display driver chip 200A, and the multiple channels of the first pixel circuit 110A correspond to the multiple output terminals of the first display driver chip 200A in a one-to-one correspondence. For example, the first row of sub-pixels R in the first channel 11A and the second row of sub-pixels B in the first channel 11A are both coupled to the first output terminal of the first display driver chip 200A. The first row of sub-pixels G in the second channel 12A and the second row of sub-pixels G in the second channel 12A are both coupled to the second output terminal of the first display driver chip 200A. The sub-pixels in the same row in the multiple channels of the first pixel circuit 110A can be coupled to the same clock signal line ( Figure 1 For example, the sub-pixels R of the first row in the first channel 11A and the sub-pixels G of the first row in the second channel 12A may be coupled to the first clock signal line. The sub-pixels B of the second row in the first channel 11A and the sub-pixels G of the second row in the second channel 12A may be coupled to the second clock signal line.

[0049] In one example, the driving channel circuit can output a voltage VH and a voltage VL to the output terminal corresponding to the driving channel circuit. VH is greater than VL. VH is used to charge the channel corresponding to the driving channel circuit in the first pixel circuit 110A, and VL is used to discharge the channel corresponding to the driving channel circuit in the first pixel circuit 110A. For example, when the first driving channel circuit 211A outputs VH through the first output terminal, since VH is a higher voltage, the sub-pixel in the first channel 11A is charged through VH. When the first driving channel circuit 211A outputs VL through the first output terminal, since VL is a lower voltage, the sub-pixel in the first channel 11A is discharged through VL. When the second driving channel circuit 212A outputs VH through the second output terminal, since VH is a higher voltage, the sub-pixel in the second channel 12A is charged through VH. When the second driving channel circuit 212A outputs VL through the second output terminal, since VL is a lower voltage, the sub-pixel in the second channel 12A is discharged through VL.

[0050] For example, Figure 2 As shown, the first driving channel circuit 211A can output VH11 in the first time period T1, output VL12 in the second time period T2, output VH13 in the third time period T3, and output VL14 in the fourth time period T4 through the first output terminal. Among them, the second time period T2 is located after the end of the first time period T1, the third time period T3 is located after the end of the second time period T2, and the fourth time period T4 is located after the end of the third time period T3. VH11 and VH13 are used to charge the first channel 11A. VH11 and VH13 can be the same or different. VL12 and VL14 are used to discharge the first channel 11A. VL12 and VL14 can be the same or different. There is a first switching period Tz1 after the end of the first time period T1 and before the start of the second time period T2, a second switching period Tz2 after the end of the second time period T2 and before the start of the third time period T3, and a third switching period Tz3 after the end of the third time period T3 and before the start of the fourth time period T4. The voltage outputted by the first output terminal drops from VH11 to VL12 in the first switching period Tz1, and the voltage slope changes from small to large. The voltage outputted by the first output terminal rises from VH12 to VH13 in the second switching period Tz2, and the voltage slope changes from large to small. The voltage outputted by the first output terminal drops from VH13 to VL14 in the third switching period Tz3, and the voltage slope changes from small to large.

[0051] In this embodiment, the greater the difference between VH and VL, the greater the dynamic power consumption of the driving channel circuit. Since the driving channel circuit is fully involved in the discharge process of the first pixel circuit 110A, the power consumption of the driving channel circuit is relatively large.

[0052] In a possible implementation, usually, the first pixel circuit 110A is driven by the driving channel circuit to display color. However, in the charging and discharging scenario of the first pixel circuit 110A, the power consumption of the driving channel circuit is relatively large. Therefore, the first pixel circuit 110A can be discharged by a sink circuit whose power consumption is less than that of the driving channel circuit.

[0053] like Figure 3 As shown, the first display driver chip 200A also includes a first consumption circuit 220A, a first consumption switch S1A and a second consumption switch S2A. Optionally, the first consumption circuit 220A can be a low dropout voltage regular (LDO) or a drive enhancement (buffer) circuit. The first end of the first consumption switch S1A and the first end of the second consumption switch S2A are both coupled to the first consumption circuit 220A. The first end of the first consumption switch S1A is coupled to the first output end. The second end of the second consumption switch S2A is coupled to the second output end.

[0054] In some examples, the first consumption circuit 220A can output a voltage VL to an output terminal coupled to the consumption switch through a consumption switch. The first drive channel circuit 211A and the second drive channel circuit 212A have switches inside. By controlling the on and off of the switches inside the first consumption switch S1A and the first drive channel circuit 211A, the first consumption circuit 220A or the first drive channel circuit 211A can output VL to the first output terminal. By controlling the on and off of the switches inside the second consumption switch S2A and the second drive channel circuit 212A, the first consumption circuit 220A or the second drive channel circuit 212A can output VL to the second output terminal.

[0055] For example, Figure 4As shown, in the first time period T1, the internal switch of the first drive channel circuit 211A is turned on, the first consumption switch S1A is turned off, and the first drive channel circuit 211A can output VH21 through the first output terminal. In the first switching period Tz1 and the second time period T2, the first consumption switch S1A is turned on, and the internal switch of the first drive channel circuit 211A is turned off. In the second time period T2, the first consumption circuit 220A can output VL22 through the first output terminal. The voltage output from the first output terminal drops from VH21 to VL22 in the first switching period Tz1, and the voltage slope changes from small to large. In the second switching period Tz2 and the third time period T3, the internal switch of the first drive channel circuit 211A is turned on, and the first consumption switch S1A is turned off. In the third time period T3, the first drive channel circuit 211A can output VH23 through the first output terminal. The voltage output from the first output terminal rises from VH22 to VH23 in the second switching period Tz2, and the voltage slope changes from large to small. In the third switching period Tz3 and the fourth period T4, the first consumption switch S1A is turned on, and the internal switch of the first driving channel circuit 211A is turned off. In the fourth period T4, the first consumption circuit 220A can output VL24 through the first output terminal. The voltage output by the first output terminal drops from VH23 to VL24 in the third switching period Tz3, and the voltage slope changes from small to large. Among them, VH21 and VH23 are used to charge the first channel 11A. VH21 and VH23 can be the same or different. VL22 and VL24 are used to discharge the first channel 11A. VL22 and VL24 can be the same or different.

[0056] In this embodiment, when the voltage outputted by the output terminal needs to be reduced from VH to VL, the driving channel circuit can be turned off, and the voltage of the output terminal can be stabilized at VL using the consumption circuit. However, the design of a separate on-chip consumption circuit requires high driving capability of the consumption circuit. The driving capability of the consumption circuit is insufficient, and the speed of stabilizing the voltage of the output terminal at VL is slow. Moreover, the consumption circuit participates in the charging and discharging process of the first pixel circuit 110A, and the consumption circuit requires additional current, and the power consumption is still large.

[0057] The present application embodiment provides an electronic device 1000B. Figure 5 As shown, the electronic device 1000B may include a circuit board ( Figure 5 The second display device 1100B may include a coupled second display screen 100B and a second display driver chip 200B. The second display driver chip 200B may be disposed on a circuit board. Figure 6As shown, the second display screen 100B may include a second pixel circuit 110B. The second pixel circuit 110B may include a plurality of channels, such as a first pixel channel 11B, a second pixel channel 12B, and more pixel channels not shown. Each of the plurality of channels may include a plurality of sub-pixels. For example, the first pixel channel 11B may include at least a sub-pixel R and a sub-pixel B, and the second pixel channel 12B may include at least two sub-pixels G. The second display driver chip 200B may include a plurality of output terminals, a plurality of display channel circuits, a plurality of discharge circuits, and a plurality of discharge switches. The plurality of output terminals may include a first output terminal, a second output terminal, and more output terminals not shown. The plurality of display channel circuits may include a first display channel circuit 211B, a second display channel circuit 212B, and more display channel circuits not shown. The plurality of discharge circuits may include a first discharge circuit 231B, a second discharge circuit 232B, and more discharge circuits not shown. The plurality of discharge switches may include a first discharge switch F1B, a second discharge switch F2B, and more discharge switches not shown. The plurality of display channel circuits of the second display driver chip 200B are coupled to the plurality of output terminals in a one-to-one correspondence. For example, the first display channel circuit 211B is coupled to the first output terminal, and the second display channel circuit 212B is coupled to the second output terminal. The first terminals of the plurality of discharge circuits are coupled to the first terminals of the plurality of discharge switches in a one-to-one correspondence. The second terminals of the plurality of discharge circuits are all grounded. The second terminals of the plurality of discharge switches are coupled to the plurality of output terminals in a one-to-one correspondence. For example, the first terminal of the first discharge circuit 231B is coupled to the first terminal of the first discharge switch F1B. The second terminal of the first discharge circuit 231B is grounded. The second terminal of the first discharge switch F1B is coupled to the first output terminal. The first terminal of the second discharge circuit 232B is coupled to the first terminal of the second discharge switch F2B. The second terminal of the second discharge circuit 232B is grounded. The second terminal of the second discharge switch F2B is coupled to the second output terminal. The plurality of sub-pixels in each channel of the second pixel circuit 110B may be coupled to the same output terminal of the second display driver chip 200B, and the plurality of channels of the second pixel circuit 110B correspond to the plurality of output terminals of the second display driver chip 200B in a one-to-one correspondence. For example, the first row of sub-pixels R in the first pixel channel 11B and the second row of sub-pixels B in the first pixel channel 11B are both coupled to the first output terminal of the second display driver chip 200B. The first row of sub-pixels G in the second pixel channel 12B and the second row of sub-pixels G in the second pixel channel 12B are both coupled to the second output terminal of the second display driver chip 200B. The sub-pixels in the same row in multiple channels of the second pixel circuit 110B can be coupled to the same clock signal line ( Figure 6For example, the sub-pixels R of the first row in the first pixel channel 11B and the sub-pixels G of the first row in the second pixel channel 12B may be coupled to the first clock signal line. The sub-pixels B of the second row in the first pixel channel 11B and the sub-pixels G of the second row in the second pixel channel 12B may be coupled to the second clock signal line.

[0058] In one example, next, Figure 7 , possible implementations of multiple display channel circuits and the second pixel circuit 110B in the second display driver chip 200B are introduced. Figure 7 Multiple discharge circuits and discharge switches are not shown. Each display channel circuit may include a multiplexer (MUX) and a driving operational amplifier (CH-OP). The output end of the multiplexer is coupled to the first input end of the driving operational amplifier, and the second input end of the driving operational amplifier and the output end of the operational amplifier are both connected to the internal switch ( Figure 7 The first end of the internal switch of the display channel circuit is coupled to the first end of the first output terminal, the second end of the internal switch of the display channel circuit is coupled to the output end corresponding to the display channel circuit. Each sub-pixel can be equivalent to an RC load, the RC load includes a resistor R1 and a capacitor C, the first end of the resistor R1 is coupled to the first output end, the second end of the resistor R1 is coupled to the first end of the capacitor C, and the second end of the capacitor C is grounded.

[0059] In this embodiment, a discharge circuit is provided on the output end side, and the output end is coupled to the discharge circuit via a discharge switch. When the output end needs to output a lower voltage to discharge the second pixel circuit 110B, the switch inside the display channel circuit can be turned on and the discharge switch can be turned off, so that the display channel circuit outputs a voltage to the output end, or the discharge switch can be turned on and the switch inside the display channel circuit can be turned off, so that the discharge circuit outputs a voltage to the output end. Therefore, when the second pixel circuit 110B discharges, the display channel circuit does not need to be used throughout the process, and the power consumption of the display channel circuit can be reduced.

[0060] In one example, next, Figure 8 In FIG. 2 , a possible implementation of the discharge circuit in the second display driver chip 200B is introduced by taking the first discharge circuit 231B as an example. Figure 8 The first discharge circuit 231B includes a clamp device 310B, a first end of the clamp device 310B is coupled to a first end of the first discharge circuit 231B, and a second end of the clamp device 310B is coupled to a second end of the first discharge circuit 231B.

[0061] In this embodiment, the first output terminal needs to output a lower discharge voltage so that the display screen discharges. The voltage of the first output terminal is reduced to the clamping voltage through the clamping device 310B, and then the voltage of the first output terminal can be reduced from the clamping voltage to the discharge voltage through other circuits. Therefore, the provision of the clamping device 310B can prevent the charge of the display screen from being completely discharged, so that the first output terminal reaches the required discharge voltage.

[0062] For example, Figure 8 As shown in Figure (a), the above-mentioned clamping device is a metal-oxide-semiconductor field-effect transistor (MOSFET), the control end and the first end of the MOSFET are coupled to the first end of the clamping device, and the second end of the MOSFET is coupled to the second end of the clamping device; or, the above-mentioned clamping device is a diode, the cathode of the diode is coupled to the first end of the clamping device, and the anode of the diode is coupled to the second end of the clamping device.

[0063] In this implementation, the power consumption of the MOSFET or diode is relatively small, which can save power consumption. In addition, the circuit structure of the MOSFET or diode is simple and the cost is relatively low.

[0064] In one example, next, Figure 8 In FIG. 2( b ), a possible implementation of the discharge circuit in the second display driver chip 200B is introduced by taking the first discharge circuit 231B as an example. Figure 8 (b) in the figure does not show multiple display channel circuits. The first discharge circuit 231B includes a clamp switch Q1B, a first clamp device 311B, and a second clamp device 312B. The first end of the first clamp device 311B is coupled to the first end of the first discharge circuit 231B, the second end of the first clamp device 311B is coupled to the first end of the second clamp device 312B, and the second end of the second clamp device 312B is coupled to the second end of the first discharge circuit 231B. The first end of the clamp switch Q1B is coupled to the first end of the first clamp device 311B, and the second end of the clamp switch Q1B is coupled to the second end of the first clamp device 311B.

[0065] For example, Figure 8 The clamping device in (b) can also be used Figure 8 This is achieved using the clamping device shown in Figure (a).

[0066] In this embodiment, the first output terminal needs to output a lower discharge voltage so that the display screen discharges. The voltage of the first output terminal is reduced to the clamping voltage through the first clamping device 311B and the second clamping device 312B, and then the voltage of the first output terminal can be reduced from the clamping voltage to the discharge voltage through other circuits. Therefore, the first clamping device 311B and the second clamping device 312B can avoid the complete discharge of the charge of the display screen, so that the first output terminal reaches the required discharge voltage. In addition, two clamping devices are set, and one or two clamping devices are controlled by the clamping switch to access the circuit, so that clamping voltages of different gears can be achieved. The display driver chip can clamp the voltage of the first output terminal to the gear closest to the discharge voltage according to the previous frame data or the next frame data. In this way, the time of using the first display channel circuit 211B can be minimized, thereby minimizing the power consumption of the display channel circuit 211B.

[0067] In one example, next, Fig. 9 , taking the first discharge circuit 231B as an example, another possible implementation of the discharge circuit in the second display driver chip 200B is introduced. Fig. 9 Multiple display channel circuits are not shown. The discharge circuit includes M-1 clamp switches and M clamp devices connected in series. The M clamp devices include a first clamp device, an N-1 clamp device, an N clamp device, an N+1 clamp device, and an M clamp device. The M-1 clamp switches include a first clamp switch, an N clamp device, and an M-1 clamp switch. N is any positive integer greater than 1 and less than M-1, and M is a positive integer greater than or equal to 3.

[0068] Take M greater than or equal to 5 as an example. The first discharge circuit 231B includes M-1 clamp switches and M clamp devices connected in series. The M clamp devices include a first clamp device 311B, a second clamp device 312B, an N-1 clamp device, an N clamp device, an N+1 clamp device, and an M clamp device 31MB. The M-1 clamp switches include a first clamp switch Q1B, a second clamp switch Q2B, an N clamp device, and an M-1 clamp switch Q(M-1)B. The first end of the first clamp device 311B is coupled to the first end of the discharge circuit. The second end of the first clamp device 311B is coupled to the first end of the second clamp device 312B. The first end of the N clamp device is coupled to the second end of the N-1 clamp device (when N is equal to 3, the first end of the third clamp device 313B is coupled to the second end of the second clamp device 312B). The second end of the Nth clamp device is coupled to the first end of the N+1th clamp device (when n is equal to M-2, the second end of the M-2th clamp device is coupled to the first end of the M-1th clamp device 31(M-1)B). The second end of the M-1th clamp device 31(M-1)B is coupled to the first end of the Mth clamp device 31MB. The second end of the Mth clamp device 31MB is coupled to the second end of the discharge circuit. The first end of the first clamp switch Q1B is coupled to the first end of the first clamp device 311B, and the second end of the first clamp switch Q1B is coupled to the second end of the first clamp device 311B. The first end of the second clamp switch Q2B is coupled to the first end of the second clamp device 312B, and the second end of the second clamp switch Q2B is coupled to the second end of the second clamp device 312B. The first end of the Nth clamp switch is coupled to the first end of the Nth clamp device, and the second end of the Nth clamp switch is coupled to the second end of the Nth clamp device (when N is equal to 3, the first end of the third clamp switch Q3B is coupled to the first end of the third clamp device 313B, and the second end of the third clamp switch Q3B is coupled to the second end of the third clamp device 313B). The first end of the M-1th clamp switch Q(M-1)B is coupled to the first end of the M-1th clamp device 31(M-1)B, and the second end of the M-1th clamp switch Q(M-1)B is coupled to the second end of the M-1th clamp device 31(M-1)B.

[0069] For example, Fig. 9 The clamping device in Figure 8 This is achieved using the clamping device shown in Figure (a).

[0070] In this embodiment, the first output terminal needs to output a lower discharge voltage so that the display screen discharges. The voltage of the first output terminal is reduced to the clamping voltage through M clamping devices, and then the voltage of the first output terminal can be reduced from the clamping voltage to the discharge voltage through other circuits. Therefore, setting M clamping devices can avoid the complete discharge of the charge of the display screen, so that the first output terminal reaches the required discharge voltage. In addition, M clamping devices are set, and one or more clamping devices are controlled by a clamping switch to access the circuit, so that clamping voltages of different gears can be achieved. The display driver chip can clamp the voltage of the first output terminal to the gear closest to the discharge voltage according to the previous frame data or the next frame data. In this way, the time of using the first display channel circuit 211B can be minimized, thereby minimizing the power consumption of the display channel circuit 211B.

[0071] In one example, the display channel circuit can output a voltage VH and a voltage VL to the output terminal corresponding to the display channel circuit. For example, when the first display channel circuit 211B outputs VH through the first output terminal, since VH is a higher voltage, the sub-pixel in the first pixel channel 11B is charged through VH. When the first display channel circuit 211B outputs VL through the first output terminal, since VL is a lower voltage, the sub-pixel in the first pixel channel 11B is discharged through VL. When the second display channel circuit 212B outputs VH through the second output terminal, since VH is a higher voltage, the sub-pixel in the second pixel channel 12B is charged through VH. When the second display channel circuit 212B outputs VL through the second output terminal, since VL is a lower voltage, the sub-pixel in the second pixel channel 12B is discharged through VL. The discharge circuit can output the voltage VL to the corresponding output terminal through the discharge switch coupled thereto. The first display channel circuit 211B and the second display channel have switches inside. By controlling the on and off of the first discharge switch F1B and the internal switch of the first display channel circuit 211B, the first discharge circuit 231B or the first display channel circuit 211B can output VL to the first output terminal. By controlling the on and off of the second discharge switch F2B and the internal switch of the second display channel circuit 212B, the second discharge circuit 232B or the second display channel circuit 212B can output VL to the second output terminal.

[0072] For example, Fig.10As shown, the first discharge circuit 231B has a clamping voltage. The first switching period Tz1 includes a first intermediate period t1 and a second intermediate period t2, and the second intermediate period t2 is located after the first intermediate period t1. The third switching period Tz3 includes a third intermediate period t3 and a fourth intermediate period t4, and the fourth intermediate period t4 is located after the third intermediate period t3. The first output terminal is used to output a first voltage in the first time period T1 and output a second voltage in the second time period T2. The second time period T2 is located after the first time period T1. The second voltage is less than the first voltage. At the end of the first intermediate period t1, the slope of the voltage output by the first output terminal is the first slope. At the initial moment of the second intermediate period t2, the slope of the voltage output by the first output terminal is the second slope; the second slope is less than the first slope. At the end of the first intermediate period t1, the voltage output by the output terminal is equal to the clamping voltage.

[0073] For example, in the first time period T1, the internal switch of the first display channel circuit 211B is turned on, the first discharge switch F1B is turned off, and the first display channel circuit 211B can output VH31 through the first output terminal. In the first intermediate time period t1 in the first switching period Tz1, the first discharge switch F1B is turned on, the internal switch of the first display channel circuit 211B is turned off, and the first pixel channel 11B is discharged to the clamping voltage through the first discharge circuit 231B. At the end of the first intermediate time period t1, the voltage output by the first output terminal is equal to the clamping voltage. In the second intermediate time period t2 and the second time period T2 in the first switching period Tz1, the internal switch of the first display channel circuit 211B is turned on, and the first discharge switch F1B is turned off. In the second intermediate time period t2 and the second time period T2 in the first switching period Tz1, the first display channel circuit 211B can output VL32 through the first output terminal. At the end of the second intermediate time period t2, the first pixel channel 11B is discharged to VL32 through the first display channel circuit 211B. It can be seen that the voltage outputted by the first output terminal drops from VH31 to the clamping voltage in the first intermediate period t1, and the voltage slope changes from small to large. At the end of the first intermediate period t1, the slope of the voltage outputted by the first output terminal is the first slope. The voltage outputted by the first output terminal drops from the clamping voltage to VL32 in the second intermediate period t2, and the voltage slope changes from small to large. At the initial moment of the second intermediate period t2, the slope of the voltage outputted by the output terminal is the second slope; the second slope is less than the first slope. In the second switching period Tz2 and the third period T3, the internal switch of the first display channel circuit 211B is turned on, and the first discharge switch F1B is turned off. In the second switching period Tz2 and the third period T3, the first display channel circuit 211B can output VH33 through the first output terminal. The voltage of the first output terminal rises from VL32 to VH33 in the second switching period Tz2, and the voltage slope changes from large to small. In the third intermediate period t3 of the third switching period Tz3, the first discharge switch F1B is turned on, the internal switch of the first display channel circuit 211B is turned off, and the first pixel channel 11B is discharged to the clamping voltage through the first discharge circuit 231B. At the end of the third intermediate period t3, the voltage output by the first output terminal is equal to the clamping voltage. In the fourth intermediate period t4 and the fourth time period T4 of the third switching period Tz3, the internal switch of the first display channel circuit 211B is turned on, and the first discharge switch F1B is turned off. In the fourth intermediate period t4 and the fourth time period T4 of the third switching period Tz3, the first display channel circuit 211B can output VL34 through the first output terminal. At the end of the fourth intermediate period t4, the first pixel channel 11B is discharged to VL34 through the first display channel circuit 211B. It can be seen that the voltage output by the first output terminal drops from VH33 to the clamping voltage in the third intermediate period t3, and the voltage slope changes from small to large.At the end of the third intermediate period t3, the slope of the voltage output by the first output terminal is the fifth slope. The voltage output by the first output terminal drops from the clamping voltage to VL34 in the fourth intermediate period t4, and the voltage slope changes from small to large. At the initial moment of the fourth intermediate period t4, the slope of the voltage output by the output terminal is the sixth slope. The sixth slope is less than the fifth slope. Among them, VH31 and VH33 are used to charge the first pixel channel 11B. VH31 and VH33 can be the same or different. VL32 and VL34 are used to discharge the first pixel channel 11B. VL32 and VL34 can be the same or different. The clamping voltage output by the first output terminal at the end of the first intermediate moment may be the same as or different from the clamping voltage output by the first output terminal at the end of the third intermediate moment.

[0074] In this embodiment, when the voltage outputted from the output terminal needs to be reduced from VH to VL, the display channel circuit can be turned off, and the voltage at the output terminal can be reduced to the clamping voltage through the discharge circuit. Then, the voltage at the output terminal can be reduced from the clamping voltage to VL through the display channel circuit. Figure 2 Compared with the embodiment shown in FIG. 1 , this embodiment does not need to use the display channel circuit in the first intermediate period t1 , but uses a discharge circuit with lower power consumption. Therefore, this embodiment can save power consumption to a large extent in the first intermediate period t1 .

[0075] In a possible implementation, the pixel channel discharge can also be achieved by the cooperation of the consumption circuit. The power consumption of the discharge circuit is less than that of the consumption circuit, and the power consumption of the consumption circuit is less than that of the display channel circuit. Fig.11 As shown, the second display driver chip 200B also includes a second consumption circuit 220B, a first consumption switch S1B and a second consumption switch S2B. Optionally, the second consumption circuit 220B can be a low dropout voltage regular (LDO) or a drive enhancement (buffer) circuit. The first end of the first consumption switch S1B and the first end of the second consumption switch S2B are both coupled to the second consumption circuit 220B. The first end of the first consumption switch S1B is coupled to the first output end. The second end of the second consumption switch S2B is coupled to the second output end.

[0076] In one example, next, Figure 7 , a possible implementation of the LDO in the second display driver chip 200B is introduced. LDO221B includes an operational amplifier, a resistor R2 and a resistor R3. The first input terminal of LDO221B is used to receive an input voltage. The operational amplifier output terminal of LDO221B and the first end of resistor R2 are both coupled to the first ends of multiple consumption switches. The second input terminal of LDO221B and the second end of resistor R2 are both coupled to the first end of resistor R3. The second end of resistor R3 is grounded.

[0077] In this embodiment, a consumption circuit is provided on the output end side, and the output end is coupled to the consumption circuit through a consumption switch. When the output end needs to output a lower voltage to discharge the second pixel circuit 110B, the consumption switch can be turned on, the discharge switch can be turned off, and the switch inside the display channel circuit can be turned off, so that the consumption circuit outputs a voltage to the output end, or the discharge switch can be turned on, the consumption switch can be turned off, and the switch inside the display channel circuit can be turned off, so that the discharge circuit outputs a voltage to the output end. Therefore, when the second pixel circuit 110B discharges, the display channel circuit does not need to be used throughout the process, and the power consumption of the display channel circuit can be reduced.

[0078] In some examples, the second consumption circuit 220B can output a voltage VL to an output terminal coupled to the consumption switch through a consumption switch. The first display channel circuit 211B and the second display channel circuit 212B have switches inside. By controlling the on and off of the first consumption switch S1B, the first discharge switch F1B, and the internal switch of the first display channel circuit 211B, the first consumption circuit 220A, or the first discharge circuit 231B, or the first display channel circuit 211B can output VL to the first output terminal. By controlling the on and off of the second consumption switch S2B, the second discharge switch F2B, and the internal switch of the second display channel circuit 212B, the first consumption circuit 220A, or the second discharge circuit 232B, or the second display channel circuit 212B can output VL to the second output terminal.

[0079] For example, Fig.12 As shown, the first discharge circuit 231B has a clamping voltage. The first output terminal is used to output a first voltage in a first time period T1 and output a second voltage in a second time period T2. The second time period T2 is located after the first time period T1. The second voltage is less than the first voltage. At the end of the first intermediate time period t1, the slope of the voltage output by the output terminal is a third slope. At the initial moment of the second intermediate time period t2, the slope of the voltage output by the output terminal is a fourth slope. The fourth slope is less than the third slope.

[0080] For example, in the first time period T1, the internal switch of the first display channel circuit 211B is turned on, the first discharge switch F1B is turned off, the first consumption switch S1B is turned off, and the first display channel circuit 211B can output VH41 through the first output terminal. In the first intermediate time period t1 in the first switching period Tz1, the first discharge switch F1B is turned on, the internal switch of the first display channel circuit 211B is turned off, the first consumption switch S1B is turned off, and the first pixel channel 11B is discharged to the clamping voltage through the first discharge circuit 231B. At the end of the first intermediate time period t1, the voltage output by the first output terminal is equal to the clamping voltage. In the second intermediate time period t2 and the second time period T2 in the first switching period Tz1, the first consumption switch S1B is turned on, the first discharge switch F1B is turned off, and the internal switch of the first display channel circuit 211B is turned off. In the second intermediate time period t2 and the second time period T2 in the first switching period Tz1, the second consumption circuit 220B can output VL42 through the first output terminal. At the end of the second intermediate period t2, the first pixel channel 11B is discharged to VL42 through the second consumption circuit 220B. It can be seen that the voltage outputted from the first output terminal drops from VH41 to the clamping voltage in the first intermediate period t1, and the voltage slope changes from small to large. At the end of the first intermediate period t1, the slope of the voltage outputted from the first output terminal is the third slope. The voltage outputted from the first output terminal drops from the clamping voltage to VL42 in the second intermediate period t2, and the voltage slope changes from small to large. At the initial moment of the second intermediate period t2, the slope of the voltage outputted from the output terminal is the fourth slope; the fourth slope is less than the third slope. In the second switching period Tz2 and the third time period T3, the internal switch of the first display channel circuit 211B is turned on, the first discharge switch F1B is turned off, and the first consumption switch S1B is turned off. In the second switching period Tz2 and the third time period T3, the first display channel circuit 211B can output VH43 through the first output terminal. The voltage of the first output terminal rises from VL42 to VH43 in the second switching period Tz2, and the voltage slope changes from large to small. In the third intermediate period t3 in the third switching period Tz3, the first discharge switch F1B is turned on, the internal switch of the first display channel circuit 211B is turned off, the first consumption switch S1B is turned off, and the first pixel channel 11B is discharged to the clamping voltage through the first discharge circuit 231B. At the end of the third intermediate period t3, the voltage output by the first output terminal is equal to the clamping voltage. In the fourth intermediate period t4 and the fourth time period T4 in the third switching period Tz3, the first consumption switch S1B is turned on, the first discharge switch F1B is turned off, and the internal switch of the first display channel circuit 211B is turned off. In the fourth intermediate period t4 and the fourth time period T4 in the third switching period Tz3, the second consumption circuit 220B can output VL44 through the first output terminal. At the end of the fourth intermediate period t4, the first pixel channel 11B is discharged to VL44 through the second consumption circuit 220B.It can be seen that the voltage output by the first output terminal drops from VH43 to the clamping voltage in the third intermediate period t3, and the voltage slope changes from small to large. At the end of the third intermediate period t3, the slope of the voltage output by the first output terminal is the seventh slope. The voltage output by the first output terminal drops from the clamping voltage to VL44 in the fourth intermediate period t4, and the voltage slope changes from small to large. At the initial moment of the fourth intermediate period t4, the slope of the voltage output by the output terminal is the eighth slope. The eighth slope is less than the seventh slope. Among them, VH41 and VH43 are used to charge the first pixel channel 11B. VH41 and VH43 can be the same or different. VL42 and VL44 are used to discharge the first pixel channel 11B. VL42 and VL44 can be the same or different. The clamping voltage output by the first output terminal at the end of the first intermediate moment can be the same as or different from the clamping voltage output by the first output terminal at the end of the third intermediate moment.

[0081] In this embodiment, when the voltage outputted by the output terminal needs to be reduced from VH to VL, the display channel circuit can be turned off, and the voltage of the output terminal can be reduced to the clamping voltage through the discharge circuit. Then, the voltage of the output terminal can be reduced from the clamping voltage to VL through the consumption circuit. Figure 2 Compared with the embodiment shown in FIG. 1 , this embodiment does not need to use the display channel circuit in the first intermediate period t1 and the second intermediate period t2, but uses a consumption circuit and a discharge circuit with lower power consumption. Therefore, this embodiment can save power consumption to a large extent in the first intermediate period t1 and the second intermediate period t2. Figure 4 Compared with the embodiment shown in FIG. 1 , this embodiment does not need to use a consumption circuit in the first intermediate period t1 , but uses a discharge circuit with lower power consumption. Therefore, this embodiment can save power consumption to a large extent in the first intermediate period t1 .

[0082] For example, Fig.13 As shown, if the value of VL is equal to the clamping voltage, the pixel channel discharge can also be realized by the discharge circuit. At this time, the second display driver chip 200B does not need to use the second consumption circuit 220B and the consumption switch. The first discharge circuit 231B has a clamping voltage. The first output terminal is used to output a first voltage in a first time period T1 and output a second voltage in a second time period T2. The second voltage is less than the first voltage. The second voltage is equal to the clamping voltage.

[0083] For example, in the first time period T1, the internal switch of the first display channel circuit 211B is turned on, the first discharge switch F1B is turned off, and the first display channel circuit 211B can output VH51 through the first output terminal. In the first switching period Tz1 and the second time period T2, the first discharge switch F1B is turned on, and the internal switch of the first display channel circuit 211B is turned off. The first pixel channel 11B is discharged through the first discharge circuit 231B, and the voltage at the first output terminal drops from VH51 to VL52 in the first switching period Tz1, and the voltage slope changes from small to large. VL52 is one of the clamping voltages that the first discharge circuit 231B can provide. In the second switching period Tz2 and the third time period T3, the internal switch of the first display channel circuit 211B is turned on, the first discharge switch F1B is turned off, and the first display channel circuit 211B can output VH53 through the first output terminal. The voltage of the first output terminal rises from VL52 to VH53 in the second switching period Tz2, and the voltage slope changes from large to small. In the third switching period Tz3 and the fourth time period T4, the first discharge switch F1B is turned on, and the internal switch of the first display channel circuit 211B is turned off. The first pixel channel 11B is discharged through the first discharge circuit 231B, and the voltage of the first output terminal drops from VH53 to VL54 in the third switching period Tz3, and the voltage slope changes from small to large. VL54 is one of the clamping voltages that the first discharge circuit 231B can provide. Among them, VH51 and VH53 are used to charge the first pixel channel 11B. VH51 and VH53 can be the same or different. VL52 and VL54 are used to discharge the first pixel channel 11B. VL52 and VL54 can be the same or different.

[0084] In this implementation, when the voltage outputted from the output terminal needs to be reduced from VH to the clamping voltage, the display channel circuit can be turned off, and the voltage of the output terminal can be reduced to the clamping voltage through the discharge circuit. Figure 2 Compared with the embodiment shown in FIG. 1 , this embodiment does not need to use the display channel circuit in the first intermediate period t1 and the second intermediate period t2, but uses a discharge circuit with lower power consumption. Therefore, this embodiment can save power consumption to a large extent in the first intermediate period t1 and the second intermediate period t2. Figure 4 Compared with the embodiment shown in FIG. 1 , this embodiment does not need to use a consumption circuit in the first intermediate period t1 and the second intermediate period t2 , but uses a discharge circuit with lower power consumption. Therefore, this embodiment can save power consumption to a large extent in the first intermediate period t1 .

[0085] based on Figure 6 to Figure 9 as well as Fig.11 The second display driver chip 200B provided in the present application also provides a display driving method applied to the second display driver chip 200B. Fig.14As shown, the method may at least include: S100: outputting a first voltage through an output terminal in a first time period T1. S200: outputting a second voltage through an output terminal in a second time period T2. Exemplarily, the second time period T2 is after the first time period T1. The first voltage is greater than the clamping voltage, and the second voltage is less than or equal to the clamping voltage.

[0086] In one possible implementation, the second voltage is less than the clamping voltage; at the end of the first intermediate period t1, the slope of the voltage output through the output end is the first slope; at the beginning of the second intermediate period t2, the slope of the voltage output through the output end is the second slope; the second slope is less than the first slope; wherein, the first intermediate period t1 and the second intermediate period t2 are located after the end of the first time period T1 and before the start of the second time period T2, and the second intermediate period t2 is located after the first intermediate period t1; at the end of the first intermediate period t1, the voltage output through the output end is equal to the clamping voltage.

[0087] It can be understood that the above display driving method can be applied to the aforementioned second display driving chip 200B. Since the effect of the chip has been described in detail in the aforementioned chip embodiment, it will not be repeated here.

[0088] An embodiment of the present application also provides a computer-readable storage medium, which stores program code. When the computer-readable storage medium is run on a device (for example, the device may be a single-chip microcomputer, a chip, a computer or a processor, etc.), the program code therein may be called to execute one or more steps in the above method embodiment.

[0089] Based on this understanding, the embodiments of the present application also provide a computer program product comprising instructions. The essence of the technical solution of the present application or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes a number of instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor therein to execute all or part of the steps of the methods of the various embodiments of the present application.

[0090] In the several embodiments provided in the present application, it should be understood that the disclosed chips, devices, equipment and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the above modules is only a logical function division. There may be other division methods in actual implementation, such as multiple modules or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0091] In addition, each functional module in each embodiment of the present application may be integrated into one device, or each module may exist physically separately, or two or more modules may be integrated into one device.

[0092] Finally, it should be noted that the above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A display driver chip, characterized in that: The display driver chip includes a display channel circuit, a discharge circuit, a discharge switch and an output terminal; The first end of the discharge circuit is coupled to the first end of the discharge switch, and the second end of the discharge circuit is grounded; the second end of the discharge switch and the display channel circuit are both coupled to the output end.

2. The display driver chip according to claim 1, characterized in that: The discharge circuit includes a clamp device, a first end of the clamp device is coupled to a first end of the discharge circuit, and a second end of the clamp device is coupled to a second end of the discharge circuit.

3. The display driver chip according to claim 1, characterized in that: The discharge circuit includes a clamp switch, a first clamp device and a second clamp device; The first end of the first clamping device is coupled to the first end of the discharge circuit, the second end of the first clamping device is coupled to the first end of the second clamping device, and the second end of the second clamping device is coupled to the second end of the discharge circuit; A first end of the clamp switch is coupled to a first end of the first clamp device, and a second end of the clamp switch is coupled to a second end of the first clamp device.

4. The display driver chip according to claim 1, characterized in that: The discharge circuit includes M-1 clamp switches and M clamp devices connected in series; the M clamp devices include a first clamp device, an N-1 clamp device, an N clamp device, an N+1 clamp device, and an M clamp device; the M-1 clamp switches include a first clamp switch, an N clamp switch, and an M-1 clamp switch; N is any positive integer greater than 1 and less than M-1, and M is a positive integer greater than or equal to 3; The first end of the first clamp device is coupled to the first end of the discharge circuit, the first end of the Nth clamp device is coupled to the second end of the N-1th clamp device, the second end of the Nth clamp device is coupled to the first end of the N+1th clamp device, the first end of the Mth clamp device is coupled to the second end of the M-1th clamp device, and the second end of the Mth clamp device is coupled to the second end of the discharge circuit; The first end of the first clamp switch is coupled to the first end of the first clamp device, and the second end of the first clamp switch is coupled to the second end of the first clamp device; the first end of the Nth clamp switch is coupled to the first end of the Nth clamp device, and the second end of the Nth clamp switch is coupled to the second end of the Nth clamp device; the first end of the M-1th clamp switch is coupled to the first end of the M-1th clamp device, and the second end of the M-1th clamp switch is coupled to the second end of the M-1th clamp device.

5. The display driver chip according to any one of claims 2 to 4, characterized in that: The clamping device is a metal oxide semiconductor field effect transistor, the control terminal and the first terminal of the metal oxide semiconductor field effect transistor are coupled to the first terminal of the clamping device, and the second terminal of the metal oxide semiconductor field effect transistor is coupled to the second terminal of the clamping device; or, The clamping device is a diode, a cathode of the diode is coupled to a first end of the clamping device, and an anode of the diode is coupled to a second end of the clamping device.

6. The display driver chip according to any one of claims 1 to 5, characterized in that: The chip further includes a consumption circuit and a consumption switch, wherein the consumption circuit is coupled to a first end of the consumption switch, and a second end of the consumption switch is coupled to the output end.

7. The display driver chip according to claim 6, characterized in that: The consumption circuit includes a low voltage drop linear regulator or a drive enhancement circuit.

8. The display driver chip according to any one of claims 1 to 7, characterized in that: The discharge circuit has a clamping voltage; The output terminal is used to output a first voltage in a first time period and a second voltage in a second time period; the second time period is after the first time period; the second voltage is less than the first voltage; The output terminal is further used to output a voltage in a first intermediate time period and a second intermediate time period; at the end of the first intermediate time period, the slope of the voltage output by the output terminal is a third slope; at the beginning of the second intermediate time period, the slope of the voltage output by the output terminal is a fourth slope; the fourth slope is smaller than the third slope; The first intermediate period and the second intermediate period are located after the end of the first period and before the start of the second period, and the second intermediate period is located after the first intermediate period; at the end of the first intermediate period, the voltage output by the output end is equal to the clamping voltage.

9. The display driver chip according to any one of claims 1 to 4, characterized in that: The discharge circuit has a clamping voltage; The output terminal is used to output a first voltage in a first time period and a second voltage in a second time period; the second time period is after the first time period; The second voltage is less than the first voltage; the second voltage is equal to the clamping voltage.

10. A display driving method, characterized in that: The method is applied to a display driver chip, the chip comprising a display channel circuit, a discharge circuit, a discharge switch and an output terminal; The first end of the discharge circuit is coupled to the first end of the discharge switch, and the second end of the discharge circuit is grounded; The second end of the display channel circuit and the discharge switch are both coupled to the output end; The discharge circuit has a clamping voltage; the method comprises: The output terminal outputs a first voltage in a first time period and a second voltage in a second time period; the second time period is after the first time period; the first voltage is greater than the clamping voltage, and the second voltage is less than or equal to the clamping voltage.

11. The display driving method according to claim 10, characterized in that: The second voltage is less than the clamping voltage; and the method further comprises: Outputting a voltage through the output terminal in a first intermediate period and a second intermediate period; at the end of the first intermediate period, the slope of the voltage output through the output terminal is a first slope; at the beginning of the second intermediate period, the slope of the voltage output through the output terminal is a second slope; the second slope is smaller than the first slope; The first intermediate period and the second intermediate period are located after the end of the first period and before the start of the second period, and the second intermediate period is located after the first intermediate period; at the end of the first intermediate period, the voltage output through the output end is equal to the clamping voltage.

12. A display device, characterized in that: The display device comprises a display screen and a display driver chip according to any one of claims 1 to 9; The display screen includes a pixel circuit, and a pixel channel of the pixel circuit is coupled to an output terminal in the display driving chip.

13. An electronic device, characterized in that: The electronic device comprises a circuit board and the display device as claimed in claim 12, wherein a display driving chip in the display device is arranged on the circuit board.

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