A display driving chip, a display driving method, a display device and an electronic equipment

Abstract

Embodiments of the present application relate to a display driving chip, a display driving method, a display device and an electronic device, and relate to the technical field of image processing. The chip comprises a display channel circuit, a discharge circuit, a discharge switch and an output terminal; a first end of the discharge circuit is coupled with a first end of the discharge switch, and a second end of the discharge circuit is grounded; a second end of the discharge switch and the display channel circuit are both coupled with the output terminal. In this way, the power consumption of the display driving chip can be reduced.

Description

Technical Field

[0001] This application relates to the field of image processing technology, and in particular to a display driver chip, a display driver method, a display device, and an electronic device. Background Technology

[0002] A display screen includes pixel circuits, which are typically driven by a display driver IC (DDIC). Approximately one-quarter of the total power consumption is at the DDIC level. As users spend increasingly more time using the device, reducing the power consumption of the DDIC is becoming increasingly important. The DDIC has a strong ability to both supply and consume power. It can be used to charge and discharge the display's pixel circuits. The DDIC can provide high voltage to charge the pixel circuits, and low voltage to discharge them. During these charging and discharging processes, the DDIC consumes a significant amount of power. Summary of the Invention

[0003] This application provides a display driver chip, a display driving method, a display device, and an electronic device, which solves the problem of high power consumption of the display driver chip during the charging and discharging process of the display screen in the prior art.

[0004] To achieve the above objectives, the embodiments of this application adopt the following technical solutions:

[0005] In a first aspect, a display driver chip is provided, which includes a display channel circuit, a discharge circuit, a discharge switch, and an output terminal. A first terminal of the discharge circuit is coupled to a first terminal of the discharge switch, and a second terminal of the discharge circuit is grounded; both the second terminal of the discharge switch and the display channel circuit are coupled to the output terminal.

[0006] In the above technical solution, a discharge circuit is provided on the output side, and the output is coupled to the discharge circuit via a discharge switch. When a lower voltage is required at the output, the switch inside the display channel circuit can be turned on and the discharge switch can be turned off, thereby allowing the display channel circuit to output voltage to the output. Alternatively, the discharge switch can be turned on and the switch inside the display channel circuit can be turned off, thereby allowing the discharge circuit to output voltage to the output. Therefore, during discharge, the display channel circuit does not need to be used continuously, reducing the power consumption of the display channel circuit.

[0007] In one possible implementation of the first aspect, the discharge circuit includes a clamping device, a first end of which is coupled to a first end of the discharge circuit, and a second end of which is coupled to a second end of the discharge circuit.

[0008] In the above possible implementations, a lower discharge voltage needs to be output at the output terminal to discharge the display screen. A clamping device is used to reduce the output voltage to a clamping voltage, and then other circuitry can be used to reduce the output voltage from the clamping voltage to the discharge voltage. Therefore, using a clamping device can prevent the display screen from completely discharging its charge, ensuring that the output terminal reaches the required discharge voltage.

[0009] In one possible implementation of the first aspect, the discharge circuit includes a clamping switch, a first clamping device, and a second clamping device. A first terminal of the first clamping device is coupled to a first terminal of the discharge circuit, a second terminal of the first clamping device is coupled to a first terminal of the second clamping device, and a second terminal of the second clamping device is coupled to a second terminal of the discharge circuit. A first terminal of the clamping switch is coupled to a first terminal of the first clamping device, and a second terminal of the clamping switch is coupled to a second terminal of the first clamping device.

[0010] In the above possible implementations, the output terminal needs to output a low discharge voltage to discharge the display screen. A clamping device is used to reduce the output voltage to a clamping voltage, and then other circuitry can further reduce the output voltage from the clamping voltage to the discharge voltage. Therefore, using a clamping device prevents the display screen from completely discharging its charge, ensuring the output terminal reaches the required discharge voltage. Furthermore, using two clamping devices, controlled by a clamping switch, allows for different clamping voltage levels. The display driver chip can clamp the output voltage to the level closest to the discharge voltage based on the previous or next frame of data. This minimizes the time spent using the display channel circuitry, thereby reducing its power consumption.

[0011] In one possible implementation of the first aspect, the discharge circuit includes M-1 clamping switches and M clamping devices connected in series. The M clamping devices include a first clamping device, an (N-1)th clamping device, an Nth clamping device, an (N+1)th clamping device, and an Mth clamping device. The M-1 clamping switches include a first clamping switch, an Nth clamping device, and an (M-1)th clamping switch. N is any positive integer greater than 1 and less than M-1, and M is a positive integer greater than or equal to 3. A first terminal of the first clamping device is coupled to a first terminal of the discharge circuit; a first terminal of the Nth clamping device is coupled to a second terminal of the (N-1)th clamping device; a second terminal of the Nth clamping device is coupled to a first terminal of the (N+1)th clamping device; a first terminal of the Mth clamping device is coupled to a second terminal of the discharge circuit; and a first terminal of the first clamping switch is coupled to a first terminal of the first clamping device, and a second terminal of the first clamping switch is coupled to a second terminal of the first clamping device. The first terminal of the Nth clamp switch is coupled to the first terminal of the Nth clamp device, and the second terminal of the Nth clamp switch is coupled to the second terminal of the Nth clamp device. The first terminal of the (M-1)th clamp switch is coupled to the first terminal of the (M-1)th clamp device, and the second terminal of the (M-1)th clamp switch is coupled to the second terminal of the (M-1)th clamp device.

[0012] In the above possible implementations, the output terminal needs to output a low discharge voltage to discharge the display screen. A clamping device is used to reduce the output voltage to a clamping voltage, and then other circuits can be used to reduce the output voltage from the clamping voltage to the discharge voltage. Therefore, using a clamping device can prevent the display screen from completely discharging its charge, ensuring the output terminal reaches the required discharge voltage. Furthermore, by using multiple clamping devices and controlling different numbers of clamping devices connected to the circuit via clamping switches, different clamping voltage levels can be achieved. The display driver chip can clamp the output voltage to the level closest to the discharge voltage based on the previous or next frame of data. This minimizes the time spent using the display channel circuitry, thereby minimizing the power consumption of the display channel circuitry.

[0013] In one possible implementation of the first aspect, the clamping device is a metal-oxide-semiconductor (MOSFET), with the control terminal and first terminal of the MOSFET coupled to the first terminal of the clamping device, and the second terminal of the MOSFET coupled to the second terminal of the clamping device. Alternatively, the clamping device is a diode, with the cathode of the diode coupled to the first terminal of the clamping device, and the anode of the diode coupled to the second terminal of the clamping device. In the above possible implementations, the power consumption of the MOSFET or diode is relatively low, thus saving power. Furthermore, the circuit structure of the MOSFET or diode is simple and the cost is low.

[0014] In one possible implementation of the first aspect, the discharge circuit has a clamping voltage; an output terminal is used to output a first voltage in a first time period and a second voltage in a second time period; the second time period is after the first time period; the second voltage is less than the first voltage. The output terminal is also used to output voltage in a first intermediate time period and a second intermediate time period. At the end of the first intermediate time period, the slope of the voltage output by the output terminal is a first slope; at the beginning of the second intermediate time period, the slope of the voltage output by the output terminal is a second slope; the second slope is less than the first slope. The first and second intermediate time periods are located after the end of the first time period and before the beginning of the second time period, with the second intermediate time period following the first intermediate time period; at the end of the first intermediate time period, the voltage output by the output terminal is equal to the clamping voltage. In the above possible implementation, when the voltage output by the output terminal needs to be reduced from the first voltage to the second voltage, the display channel circuit can be turned off, and the voltage at the output terminal can be reduced to the clamping voltage through the discharge circuit. Then, the voltage at the output terminal can be reduced from the clamping voltage to the second voltage through the display channel circuit. This implementation eliminates the need for a display channel circuit in the first intermediate time period, instead using a discharge circuit with lower power consumption. Therefore, this implementation can save power consumption to a great extent during the first intermediate period.

[0015] In one possible implementation of the first aspect, the chip further includes a power consumption circuit and a power consumption switch. The power consumption circuit is coupled to a first terminal of the power consumption switch, and a second terminal of the power consumption switch is coupled to the output terminal. In the above possible implementation, the power consumption circuit is provided on the output terminal side, and the output terminal is coupled to the power consumption circuit through the power consumption switch. When a lower voltage needs to be output at the output terminal, the power consumption switch can be turned on, the discharge switch can be turned off, and the switch inside the display channel circuit can be turned off, thereby causing the power consumption circuit to output voltage to the output terminal. Alternatively, the discharge switch can be turned on, the power consumption switch can be turned off, and the switch inside the display channel circuit can be turned off, thereby causing the discharge circuit to output voltage to the output terminal. Therefore, during discharge, the display channel circuit does not need to be used throughout, which can reduce the power consumption of the display channel circuit.

[0016] In one possible implementation of the first aspect, the power-consuming circuit includes a low-dropout linear regulator or a drive enhancement circuit. In the above possible implementations, using a low-dropout linear regulator or a drive enhancement circuit as the power-consuming circuit can result in lower power consumption compared to the display channel circuit.

[0017] In one possible implementation of the first aspect, the discharge circuit has a clamping voltage; an output terminal is used to output a first voltage in a first time period and a second voltage in a second time period; the second time period is after the first time period; the second voltage is less than the first voltage. The output terminal is also used to output voltage in a first intermediate time period and a second intermediate time period. At the end of the first intermediate time period, the slope of the voltage output by the output terminal is a third slope; at the beginning of the second intermediate time period, the slope of the voltage output by the output terminal is a fourth slope; the fourth slope is less than the third slope. The first and second intermediate time periods are located after the end of the first time period and before the beginning of the second time period, and the second intermediate time period is after the first intermediate time period; at the end of the first intermediate time period, the voltage output by the output terminal is equal to the clamping voltage. In the above possible implementation, when the voltage output by the output terminal needs to be reduced from the first voltage to the second voltage, the display channel circuit can be turned off, and the voltage at the output terminal can be reduced to the clamping voltage through the discharge circuit. Then, the voltage at the output terminal can be reduced from the clamping voltage to the second voltage through the consumption circuit. This implementation eliminates the need for a display channel circuit in both the first and second intermediate time periods, instead using a consumption circuit and a discharge circuit with lower power consumption. Therefore, this implementation can save power consumption to a great extent in both the first and second intermediate periods.

[0018] In one possible implementation of the first aspect, the discharge circuit has a clamping voltage; an output terminal for outputting a first voltage in a first time period and a second voltage in a second time period; the second time period is after the first time period; the second voltage is less than the first voltage; and the second voltage is equal to the clamping voltage. In the above possible implementation, when the voltage output from the output terminal needs to be reduced from the first voltage to the clamping voltage, the display channel circuit can be turned off, and the voltage at the output terminal can be reduced to the clamping voltage by the discharge circuit. This embodiment eliminates the need for a display channel circuit in both the first and second intermediate time periods, instead using a discharge circuit with lower power consumption. Therefore, this embodiment can significantly save power consumption in both the first and second intermediate time periods.

[0019] Secondly, a display driving method is provided, which is applied to a display driving chip, the chip including a display channel circuit, a discharge circuit, a discharge switch, and an output terminal; a first terminal of the discharge circuit is coupled to a first terminal of the discharge switch, and a second terminal of the discharge circuit is grounded; the second terminal of the discharge switch and the display channel circuit are both coupled to the output terminal; the discharge circuit has a clamping voltage; the method includes: outputting a first voltage through the output terminal in a first time period, and outputting a second voltage in a second time period; the second time period is after the first time period; the first voltage is greater than the clamping voltage, and the second voltage is less than or equal to the clamping voltage.

[0020] In one possible implementation of the second aspect, the second voltage is less than the clamping voltage; the method further includes: outputting a voltage through an output terminal during a first intermediate time period and a second intermediate time period; at the end of the first intermediate time period, the slope of the voltage output through the output terminal is a first slope; at the beginning of the second intermediate time period, the slope of the voltage output through the output terminal is a second slope; the second slope is less than the first slope; wherein the first intermediate time period and the second intermediate time period are located after the end of the first time period and before the beginning of the second time period, and the second intermediate time period is located after the first intermediate time period; at the end of the first intermediate time period, the voltage output through the output terminal is equal to the clamping voltage.

[0021] Thirdly, a display device is provided, comprising a display screen and a display driver chip provided in the first aspect, or any possible implementation of the first aspect. The display screen includes pixel circuitry, and pixel channels of the pixel circuitry are coupled to output terminals in the display driver chip.

[0022] Fourthly, an electronic device is provided, comprising a circuit board and a display device provided in the third aspect, wherein a display driver chip in the display device is disposed on the circuit board.

[0023] In another aspect, this application provides a computer-readable storage medium storing program code that can be invoked by a processor to execute the method provided by the second aspect or any possible implementation thereof.

[0024] In another aspect, this application provides a computer program product that, when run on a computer, causes the computer to perform the method provided by the second aspect or any possible implementation thereof.

[0025] It is understood that any of the display driving methods, devices, equipment, computer storage media or computer program products provided above all use the corresponding display driving chips provided above. Therefore, the beneficial effects they can achieve can be referred to the beneficial effects of the corresponding chips provided above, and will not be repeated here. Attached Figure Description

[0026] Figure 1 A schematic diagram of a first display device provided in an embodiment of this application. Figure 1 ;

[0027] Figure 2 A voltage waveform provided in the embodiments of this application Figure 1 ;

[0028] Figure 3 A schematic diagram of a first display device provided in an embodiment of this application. Figure 2 ;

[0029] Figure 4 A voltage waveform provided in the embodiments of this application Figure 2 ;

[0030] Figure 5 A schematic diagram of an electronic device provided in an embodiment of this application;

[0031] Figure 6 A schematic diagram of a second display device provided in an embodiment of this application. Figure 1 ;

[0032] Figure 7 A schematic diagram of a second display driver chip provided in an embodiment of this application;

[0033] Figure 8 A schematic diagram of a first discharge circuit provided in an embodiment of this application. Figure 1 ;

[0034] Figure 9 A schematic diagram of a first discharge circuit provided in an embodiment of this application. Figure 2 ;

[0035] Figure 10 A voltage waveform provided in the embodiments of this application Figure 3 ;

[0036] Figure 11 A schematic diagram of a second display device provided in an embodiment of this application. Figure 2 ;

[0037] Figure 12 A voltage waveform provided in the embodiments of this application Figure 4 ;

[0038] Figure 13 A voltage waveform provided in the embodiments of this application Figure 5 ;

[0039] Figure 14 This is a schematic diagram of a display driving method provided in an embodiment of this application. Detailed Implementation

[0040] It should be noted that the terms "first" and "second" used in the embodiments of this application are only used to distinguish features of the same type and should not be construed as indicating relative importance, quantity, order, etc.

[0041] The terms "exemplary" or "for example" used in the embodiments of this application are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0042] The terms "coupling" and "connection" used in the embodiments of this application should be interpreted broadly. For example, they can refer to a physical direct connection or an indirect connection achieved through electronic devices, such as a connection achieved through resistors, inductors, capacitors or other electronic devices.

[0043] First, some basic concepts involved in the embodiments of this application will be explained:

[0044] Organic light-emitting diode (OLED) displays are a display technology that uses organic light-emitting materials as the pixel light source. Each pixel in an OLED display consists of three sub-pixels: red (R), green (G), and blue (B). Each sub-pixel contains an OLED element. When current flows through it, the OLED element emits light of the corresponding color. The brightness and color of each OLED element can be controlled independently. Each sub-pixel can be equivalent to a resistor-capacitor (RC) load. OLED elements exhibit a certain delay in responding to voltage changes; the RC load can slow down the rise and fall rates of the signal, resulting in a more ideal voltage change curve for the OLED element. The RC load can also control the current of the OLED element, maintaining the consistency of its brightness and color. Therefore, the RC load can improve the stability of the display.

[0045] A display driver IC (DDIC) is an integrated circuit chip specifically designed to control and drive a display screen. Its main function is to convert the data to be displayed into electrical signals, ensuring that the image indicated by the displayed data is clearly and accurately presented on the screen.

[0046] In one possible implementation, such as Figure 1 As shown, the first display device 1100A includes a first display screen 100A and a first display driver IC (DDIC) 200A. For example, the first display screen 100A may be an OLED display screen.

[0047] The first display screen 100A may include a first pixel circuit 110A. The first pixel circuit 110A may include multiple channels, such as a first channel 11A, a second channel 12A, and more channels not shown. Each of the multiple channels may include multiple sub-pixels. For example, the first channel 11A may include at least sub-pixels R and B, and the second channel 12A may include at least two sub-pixels G. The first display driver chip 200A may include multiple output terminals and multiple driving channel circuits. The multiple output terminals may include a first output terminal, a second output terminal, and more output terminals not shown. The multiple driving channel circuits may include a first driving channel circuit 211A, a second driving channel circuit 212A, and more driving channel circuits not shown.

[0048] Multiple driving channel circuits of the first display driver chip 200A are coupled one-to-one with multiple output terminals. For example, the first driving channel circuit 211A is coupled to the first output terminal, and the second driving channel circuit 212A is coupled to the second output terminal. Multiple sub-pixels in each channel of the first pixel circuit 110A can be coupled to the same output terminal of the first display driver chip 200A, and the multiple channels of the first pixel circuit 110A correspond one-to-one with the multiple output terminals of the first display driver chip 200A. For example, the first row sub-pixel R and the second row sub-pixel B in the first channel 11A are both coupled to the first output terminal of the first display driver chip 200A. The first row sub-pixel G in the second channel 12A and the second row sub-pixel G in the second channel 12A are both coupled to the second output terminal of the first display driver chip 200A. Sub-pixels in the same row in the multiple channels of the first pixel circuit 110A can be coupled to the same clock signal line. Figure 1 (Not shown in the image). For example, sub-pixels R in the first row of the first channel 11A and sub-pixels G in the first row of the second channel 12A can be coupled to the first clock signal line. Sub-pixels B in the second row of the first channel 11A and sub-pixels G in the second row of the second channel 12A can be coupled to the second clock signal line.

[0049] In one example, the driving channel circuit can output voltages VH and VL to its corresponding output terminal. VH is greater than VL. VH is used to charge the channel corresponding to the driving channel circuit in the first pixel circuit 110A, and VL is used to discharge the channel corresponding to the driving channel circuit in the first pixel circuit 110A. For example, when the first driving channel circuit 211A outputs VH through its first output terminal, the sub-pixels in the first channel 11A are charged by VH because VH is a higher voltage. When the first driving channel circuit 211A outputs VL through its first output terminal, the sub-pixels in the first channel 11A are discharged by VL because VL is a lower voltage. When the second driving channel circuit 212A outputs VH through its second output terminal, the sub-pixels in the second channel 12A are charged by VH because VH is a higher voltage. When the second driving channel circuit 212A outputs VL through its second output terminal, the sub-pixels in the second channel 12A are discharged by VL because VL is a lower voltage.

[0050] For example, such as Figure 2 As shown, the first driving channel circuit 211A can output VH11 in the first time period T1, VL12 in the second time period T2, VH13 in the third time period T3, and VL14 in the fourth time period T4 through the first output terminal. The second time period T2 is after the end of the first time period T1, the third time period T3 is after the end of the second time period T2, and the fourth time period T4 is after the end of the third time period T3. VH11 and VH13 are used to charge the first channel 11A. VH11 and VH13 can be the same or different. VL12 and VL14 are used to discharge the first channel 11A. VL12 and VL14 can be the same or different. There is a first switching period Tz1 between the end of the first time period T1 and the beginning of the second time period T2, a second switching period Tz2 between the end of the second time period T2 and the beginning of the third time period T3, and a third switching period Tz3 between the end of the third time period T3 and the beginning of the fourth time period T4. During the first switching period, the voltage output from the first output terminal decreases from VH11 to VL12 with an increasing voltage slope (Tz1). During the second switching period, the voltage output from the first output terminal increases from VH12 to VH13 with an increasing voltage slope (Tz2). During the third switching period, the voltage output from the first output terminal decreases from VH13 to VL14 with an increasing voltage slope (Tz3).

[0051] In this embodiment, the greater the difference between VH and VL, the greater the dynamic power consumption of the driving channel circuit. Since the driving channel circuit is required to participate in the entire discharge process of the first pixel circuit 110A, the power consumption of the driving channel circuit is relatively large.

[0052] In one possible implementation, the first pixel circuit 110A is typically driven by a driving channel circuit to display color. However, the power consumption of the driving channel circuit is relatively high during the charging and discharging of the first pixel circuit 110A. Therefore, the first pixel circuit 110A can be discharged using a sink circuit with lower power consumption than the driving channel circuit.

[0053] like Figure 3 As shown, the first display driver chip 200A also includes a first power consumption circuit 220A, a first power consumption switch S1A, and a second power consumption switch S2A. Optionally, the first power consumption circuit 220A can be a low dropout voltage regular (LDO) or a drive enhancement (buffer) circuit. The first terminal of the first power consumption switch S1A and the first terminal of the second power consumption switch S2A are both coupled to the first power consumption circuit 220A. The first terminal of the first power consumption switch S1A is coupled to the first output terminal. The second terminal of the second power consumption switch S2A is coupled to the second output terminal.

[0054] In some examples, the first consumption circuit 220A can output a voltage VL to the output terminal coupled to the consumption switch via a consumption switch. The first drive channel circuit 211A and the second drive channel circuit 212A have internal switches. By controlling the on / off state of the first consumption switch S1A and the internal switch of the first drive channel circuit 211A, either the first consumption circuit 220A or the first drive channel circuit 211A can output VL to the first output terminal. By controlling the on / off state of the second consumption switch S2A and the internal switch of the second drive channel circuit 212A, either the first consumption circuit 220A or the second drive channel circuit 212A can output VL to the second output terminal.

[0055] For example, such as Figure 4As shown, in the first time period T1, the internal switch of the first drive channel circuit 211A is turned on, and the first consumption switch S1A is turned off. The first drive channel circuit 211A can output VH21 through the first output terminal. In the first switching period Tz1 and the second time period T2, the first consumption switch S1A is turned on, and the internal switch of the first drive channel circuit 211A is turned off. In the second time period T2, the first consumption circuit 220A can output VL22 through the first output terminal. The voltage output from the first output terminal decreases from VH21 to VL22 in the first switching period Tz1, and the voltage slope changes from small to large. In the second switching period Tz2 and the third time period T3, the internal switch of the first drive channel circuit 211A is turned on, and the first consumption switch S1A is turned off. In the third time period T3, the first drive channel circuit 211A can output VH23 through the first output terminal. The voltage output from the first output terminal increases from VH22 to VH23 in the second switching period Tz2, and the voltage slope changes from large to small. During the third switching period Tz3 and the fourth switching period T4, the first consumption switch S1A is turned on, and the internal switch of the first drive channel circuit 211A is turned off. During the fourth switching period T4, the first consumption circuit 220A can output VL24 through the first output terminal. The voltage output from the first output terminal decreases from VH23 to VL24 during the third switching period Tz3, and the voltage slope changes from small to large. VH21 and VH23 are used to charge the first channel 11A. VH21 and VH23 can be the same or different. VL22 and VL24 are used to discharge the first channel 11A. VL22 and VL24 can be the same or different.

[0056] In this embodiment, when the output voltage needs to be reduced from VH to VL, the drive channel circuit can be shut down, and the power consumption circuit can be used to stabilize the output voltage at VL. However, designing a separate on-chip power consumption circuit places high demands on its driving capability. If the driving capability of the power consumption circuit is insufficient, the speed at which the output voltage is stabilized at VL is slow. Moreover, since the power consumption circuit participates in the charging and discharging process of the first pixel circuit 110A, it requires additional current, resulting in relatively high power consumption.

[0057] This application provides an electronic device 1000B. For example... Figure 5 As shown, electronic device 1000B may include a circuit board ( Figure 5 (Not shown in the image) and a second display device 1100B. The second display device 1100B may include a coupled second display screen 100B and a second display driver chip 200B. The second display driver chip 200B may be disposed on a circuit board. Figure 6As shown, the second display screen 100B may include a second pixel circuit 110B. The second pixel circuit 110B may include multiple channels, such as a first pixel channel 11B, a second pixel channel 12B, and more pixel channels not shown. Each of the multiple channels may include multiple sub-pixels. For example, the first pixel channel 11B may include at least sub-pixels R and B, and the second pixel channel 12B may include at least two sub-pixels G. The second display driver chip 200B may include multiple output terminals, multiple display channel circuits, multiple discharge circuits, and multiple discharge switches. The multiple output terminals may include a first output terminal, a second output terminal, and more output terminals not shown. The multiple display channel circuits may include a first display channel circuit 211B, a second display channel circuit 212B, and more display channel circuits not shown. The multiple discharge circuits may include a first discharge circuit 231B, a second discharge circuit 232B, and more discharge circuits not shown. The multiple discharge switches may include a first discharge switch F1B, a second discharge switch F2B, and more discharge switches not shown. The multiple display channel circuits of the second display driver chip 200B are coupled one-to-one with the multiple output terminals. For example, the first display channel circuit 211B is coupled to the first output terminal, and the second display channel circuit 212B is coupled to the second output terminal. The first terminals of multiple discharge circuits are coupled one-to-one with the first terminals of multiple discharge switches. The second terminals of multiple discharge circuits are all grounded. The second terminals of multiple discharge switches are coupled one-to-one with multiple output terminals. For example, the first terminal of the first discharge circuit 231B is coupled to the first terminal of the first discharge switch F1B. The second terminal of the first discharge circuit 231B is grounded. The second terminal of the first discharge switch F1B is coupled to the first output terminal. The first terminal of the second discharge circuit 232B is coupled to the first terminal of the second discharge switch F2B. The second terminal of the second discharge circuit 232B is grounded. The second terminal of the second discharge switch F2B is coupled to the second output terminal. Multiple sub-pixels in each channel of the second pixel circuit 110B can be coupled to the same output terminal of the second display driver chip 200B, and the multiple channels of the second pixel circuit 110B correspond one-to-one with the multiple output terminals of the second display driver chip 200B. For example, the first row of sub-pixels R and the second row of sub-pixels B in the first pixel channel 11B are both coupled to the first output terminal of the second display driver chip 200B. The first row of sub-pixels G in the second pixel channel 12B and the second row of sub-pixels G in the second pixel channel 12B are both coupled to the second output terminal of the second display driver chip 200B. Sub-pixels located in the same row in multiple channels of the second pixel circuit 110B can be coupled to the same clock signal line. Figure 6(Not shown in the image). For example, sub-pixels R in the first row of the first pixel channel 11B and sub-pixels G in the first row of the second pixel channel 12B can be coupled to the first clock signal line. Sub-pixels B in the second row of the first pixel channel 11B and sub-pixels G in the second row of the second pixel channel 12B can be coupled to the second clock signal line.

[0058] In one example, the following combination Figure 7 Possible implementations of the multiple display channel circuits and the second pixel circuit 110B in the second display driver chip 200B will be described. Figure 7 Multiple discharge circuits and discharge switches are not shown. Each display channel circuit may include a multiplexer (MUX) and a channel operational amplifier (CH-OP). The output of the multiplexer is coupled to the first input of the channel operational amplifier, and the second input and output of the channel operational amplifier are both coupled to the internal switch of the display channel circuit. Figure 7 The first terminal of the display channel circuit (not shown) is coupled to the second terminal of the internal switch of the display channel circuit, which is coupled to the corresponding output terminal of the display channel circuit. Each sub-pixel can be equivalent to an RC load, which includes a resistor R1 and a capacitor C. The first terminal of the resistor R1 is coupled to the first output terminal, and the second terminal of the resistor R1 is coupled to the first terminal of the capacitor C. The second terminal of the capacitor C is grounded.

[0059] In this embodiment, a discharge circuit is provided on the output side, and the output is coupled to the discharge circuit via a discharge switch. When a lower voltage needs to be output at the output to discharge the second pixel circuit 110B, the switch inside the display channel circuit can be turned on and the discharge switch can be turned off, thereby causing the display channel circuit to output voltage to the output. Alternatively, the discharge switch can be turned on and the switch inside the display channel circuit can be turned off, thereby causing the discharge circuit to output voltage to the output. Therefore, when the second pixel circuit 110B discharges, the display channel circuit does not need to be used continuously, which reduces the power consumption of the display channel circuit.

[0060] In one example, the following combination Figure 8 Figure (a) in the figure describes a possible implementation of the discharge circuit in the second display driver chip 200B, taking the first discharge circuit 231B as an example. Figure 8 Figure (a) does not show multiple display channel circuits. The first discharge circuit 231B includes a clamping device 310B, with a first end of the clamping device 310B coupled to a first end of the first discharge circuit 231B and a second end of the clamping device 310B coupled to a second end of the first discharge circuit 231B.

[0061] In this embodiment, the first output terminal needs to output a low discharge voltage to discharge the display screen. The voltage at the first output terminal is reduced to a clamping voltage using a clamping device 310B, and then the voltage at the first output terminal can be reduced from the clamping voltage to the discharge voltage using other circuitry. Therefore, by using the clamping device 310B, the complete discharge of the display screen's charge can be prevented, ensuring that the first output terminal reaches the required discharge voltage.

[0062] For example, such as Figure 8 As shown in Figure (a), the clamping device is a metal-oxide-semiconductor field-effect transistor (MOSFET), with the control terminal and the first terminal of the MOSFET coupled to the first terminal of the clamping device, and the second terminal of the MOSFET coupled to the second terminal of the clamping device; or, the clamping device is a diode, with the negative terminal of the diode coupled to the first terminal of the clamping device, and the positive terminal of the diode coupled to the second terminal of the clamping device.

[0063] In this embodiment, the MOSFET or diode consumes less power, thus saving power. Furthermore, the MOSFET or diode circuit has a simple structure and low cost.

[0064] In one example, the following combination Figure 8 Figure (b) in the diagram describes a possible implementation of the discharge circuit in the second display driver chip 200B, taking the first discharge circuit 231B as an example. Figure 8 Figure (b) does not show the multiple display channel circuits. The first discharge circuit 231B includes a clamping switch Q1B, a first clamping device 311B, and a second clamping device 312B. The first terminal of the first clamping device 311B is coupled to the first terminal of the first discharge circuit 231B, the second terminal of the first clamping device 311B is coupled to the first terminal of the second clamping device 312B, and the second terminal of the second clamping device 312B is coupled to the second terminal of the first discharge circuit 231B. The first terminal of the clamping switch Q1B is coupled to the first terminal of the first clamping device 311B, and the second terminal of the clamping switch Q1B is coupled to the second terminal of the first clamping device 311B.

[0065] For example, Figure 8 The clamping device in Figure (b) can also be used. Figure 8 The clamping device shown in Figure (a) is used to achieve this.

[0066] In this embodiment, the first output terminal needs to output a low discharge voltage to discharge the display screen. The voltage at the first output terminal is reduced to a clamping voltage using a first clamping device 311B and a second clamping device 312B. Then, other circuitry can further reduce the voltage at the first output terminal from the clamping voltage to the discharge voltage. Therefore, using the first clamping device 311B and the second clamping device 312B prevents complete discharge of the display screen's charge, ensuring the first output terminal reaches the required discharge voltage. Furthermore, by using two clamping devices and controlling one or both clamping devices to connect to the circuit via a clamping switch, different clamping voltage levels can be achieved. The display driver chip can clamp the voltage at the first output terminal to the level closest to the discharge voltage based on the previous or next frame of data. This minimizes the time spent using the first display channel circuit 211B, thereby minimizing the power consumption of the display channel circuit 211B.

[0067] In one example, the following combination Figure 9 Taking the first discharge circuit 231B as an example, another possible implementation of the discharge circuit in the second display driver chip 200B will be introduced. Figure 9 Multiple display channel circuits are not shown. The discharge circuit includes M-1 clamping switches and M clamping devices connected in series. The M clamping devices include a first clamping device, an (N-1)th clamping device, an Nth clamping device, an (N+1)th clamping device, and an Mth clamping device. The M-1 clamping switches include a first clamping switch, an Nth clamping device, and an M-1th clamping switch. N is any positive integer greater than 1 and less than M-1, and M is a positive integer greater than or equal to 3.

[0068] Taking an M greater than or equal to 5 as an example, the first discharge circuit 231B includes M-1 clamping switches and M clamping devices connected in series. The M clamping devices include a first clamping device 311B, a second clamping device 312B, an (N-1)th clamping device, an Nth clamping device, an (N+1)th clamping device, and an Mth clamping device 31MB. The M-1 clamping switches include a first clamping switch Q1B, a second clamping switch Q2B, an Nth clamping device, and an (M-1)th clamping switch Q(M-1)B. The first terminal of the first clamping device 311B is coupled to the first terminal of the discharge circuit. The second terminal of the first clamping device 311B is coupled to the first terminal of the second clamping device 312B. The first terminal of the Nth clamping device is coupled to the second terminal of the (N-1)th clamping device (when N equals 3, the first terminal of the third clamping device 313B is coupled to the second terminal of the second clamping device 312B). The second terminal of the Nth clamping device is coupled to the first terminal of the (N+1)th clamping device (when n equals M-2, the second terminal of the M-2nd clamping device is coupled to the first terminal of the M-1th clamping device 31(M-1)B). The second terminal of the M-1th clamping device 31(M-1)B is coupled to the first terminal of the Mth clamping device 31MB. The second terminal of the Mth clamping device 31MB is coupled to the second terminal of the discharge circuit. The first terminal of the first clamping switch Q1B is coupled to the first terminal of the first clamping device 311B, and the second terminal of the first clamping switch Q1B is coupled to the second terminal of the first clamping device 311B. The first terminal of the second clamping switch Q2B is coupled to the first terminal of the second clamping device 312B, and the second terminal of the second clamping switch Q2B is coupled to the second terminal of the second clamping device 312B. The first terminal of the Nth clamping switch is coupled to the first terminal of the Nth clamping device, and the second terminal of the Nth clamping switch is coupled to the second terminal of the Nth clamping device (when N equals 3, the first terminal of the third clamping switch Q3B is coupled to the first terminal of the third clamping device 313B, and the second terminal of the third clamping switch Q3B is coupled to the second terminal of the third clamping device 313B). The first terminal of the (M-1)th clamping switch Q(M-1)B is coupled to the first terminal of the (M-1)th clamping device 31(M-1)B, and the second terminal of the (M-1)th clamping switch Q(M-1)B is coupled to the second terminal of the (M-1)th clamping device 31(M-1)B.

[0069] For example, Figure 9 Clamping devices in the middle can also be used Figure 8 The clamping device shown in Figure (a) is used to achieve this.

[0070] In this embodiment, the first output terminal needs to output a low discharge voltage to discharge the display screen. M clamping devices are used to reduce the voltage at the first output terminal to a clamping voltage, and then other circuits can be used to reduce the voltage at the first output terminal from the clamping voltage to the discharge voltage. Therefore, setting M clamping devices can prevent the display screen from completely discharging its charge, ensuring the first output terminal reaches the required discharge voltage. Furthermore, by setting M clamping devices and controlling one or more clamping devices to connect to the circuit via clamping switches, different clamping voltage levels can be achieved. The display driver chip can clamp the voltage at the first output terminal to the level closest to the discharge voltage based on the previous or next frame of data. This minimizes the time spent using the first display channel circuit 211B, thereby minimizing the power consumption of the display channel circuit 211B.

[0071] In one example, the display channel circuit can output voltages VH and VL to its corresponding output terminal. For instance, when the first display channel circuit 211B outputs VH through its first output terminal, the sub-pixels in the first pixel channel 11B are charged by VH because VH is a higher voltage. When the first display channel circuit 211B outputs VL through its first output terminal, the sub-pixels in the first pixel channel 11B are discharged by VL because VL is a lower voltage. When the second display channel circuit 212B outputs VH through its second output terminal, the sub-pixels in the second pixel channel 12B are charged by VH because VH is a higher voltage. When the second display channel circuit 212B outputs VL through its second output terminal, the sub-pixels in the second pixel channel 12B are discharged by VL because VL is a lower voltage. The discharge circuit can output voltage VL to its corresponding output terminal through its coupled discharge switch. Both the first display channel circuit 211B and the second display channel have internal switches. By controlling the on / off state of the first discharge switch F1B and the internal switch of the first display channel circuit 211B, the first discharge circuit 231B or the first display channel circuit 211B can output VL to the first output terminal. By controlling the on / off state of the second discharge switch F2B and the internal switch of the second display channel circuit 212B, the second discharge circuit 232B or the second display channel circuit 212B can output VL to the second output terminal.

[0072] For example, such as Figure 10As shown, the first discharge circuit 231B has a clamping voltage. The first switching period Tz1 includes a first intermediate period t1 and a second intermediate period t2, with the second intermediate period t2 following the first intermediate period t1. The third switching period Tz3 includes a third intermediate period t3 and a fourth intermediate period t4, with the fourth intermediate period t4 following the third intermediate period t3. A first output terminal is used to output a first voltage in the first period T1 and a second voltage in the second period T2. The second period T2 follows the first period T1. The second voltage is less than the first voltage. At the end of the first intermediate period t1, the slope of the voltage output by the first output terminal is a first slope. At the beginning of the second intermediate period t2, the slope of the voltage output by the first output terminal is a second slope; the second slope is less than the first slope. At the end of the first intermediate period t1, the voltage output by the output terminal is equal to the clamping voltage.

[0073] For example, during the first time period T1, the internal switch of the first display channel circuit 211B is turned on, the first discharge switch F1B is turned off, and the first display channel circuit 211B can output VH31 through the first output terminal. During the first intermediate time period t1 in the first switching time period Tz1, the first discharge switch F1B is turned on, the internal switch of the first display channel circuit 211B is turned off, and the first pixel channel 11B discharges to the clamping voltage through the first discharge circuit 231B. At the end of the first intermediate time period t1, the voltage output by the first output terminal is equal to the clamping voltage. During the second intermediate time period t2 and the second time period T2 in the first switching time period Tz1, the internal switch of the first display channel circuit 211B is turned on, and the first discharge switch F1B is turned off. During the second intermediate time period t2 and the second time period T2 in the first switching time period Tz1, the first display channel circuit 211B can output VL32 through the first output terminal. At the end of the second intermediate time period t2, the first pixel channel 11B discharges to VL32 through the first display channel circuit 211B. It can be seen that the voltage output from the first output terminal decreases from VH31 to the clamping voltage during the first intermediate period t1, and the voltage slope changes from small to large. At the end of the first intermediate period t1, the slope of the voltage output from the first output terminal is the first slope. The voltage output from the first output terminal decreases from the clamping voltage to VL32 during the second intermediate period t2, and the voltage slope changes from small to large. At the beginning of the second intermediate period t2, the slope of the voltage output from the output terminal is the second slope; the second slope is less than the first slope. During the second switching period Tz2 and the third time period T3, the internal switch of the first display channel circuit 211B is turned on, and the first discharge switch F1B is turned off. During the second switching period Tz2 and the third time period T3, the first display channel circuit 211B can output VH33 through the first output terminal. The voltage of the first output terminal increases from VL32 to VH33 during the second switching period Tz2, and the voltage slope changes from large to small. During the third intermediate period t3 of the third switching period Tz3, the first discharge switch F1B is turned on, the internal switch of the first display channel circuit 211B is turned off, and the first pixel channel 11B discharges to the clamping voltage through the first discharge circuit 231B. At the end of the third intermediate period t3, the voltage output by the first output terminal is equal to the clamping voltage. During the fourth intermediate period t4 and the fourth time period T4 of the third switching period Tz3, the internal switch of the first display channel circuit 211B is turned on, and the first discharge switch F1B is turned off. During the fourth intermediate period t4 and the fourth time period T4 of the third switching period Tz3, the first display channel circuit 211B can output VL34 through the first output terminal. At the end of the fourth intermediate period t4, the first pixel channel 11B discharges to VL34 through the first display channel circuit 211B. It can be seen that the voltage output by the first output terminal drops from VH33 to the clamping voltage during the third intermediate period t3, and the voltage slope changes from small to large.At the end of the third intermediate time period t3, the slope of the voltage output from the first output terminal is the fifth slope. The voltage output from the first output terminal decreases from the clamping voltage to VL34 during the fourth intermediate time period t4, with the voltage slope increasing. At the beginning of the fourth intermediate time period t4, the slope of the voltage output from the output terminal is the sixth slope. The sixth slope is less than the fifth slope. VH31 and VH33 are used to charge the first pixel channel 11B. VH31 and VH33 can be the same or different. VL32 and VL34 are used to discharge the first pixel channel 11B. VL32 and VL34 can be the same or different. The clamping voltage output from the first output terminal at the end of the first intermediate time period can be the same as or different from the clamping voltage output from the first output terminal at the end of the third intermediate time period.

[0074] In this embodiment, when the output voltage needs to be reduced from VH to VL, the display channel circuit can be turned off, and the output voltage can be reduced to the clamping voltage through the discharge circuit. Then, the display channel circuit is used to reduce the output voltage from the clamping voltage to VL. Figure 2 Compared to the illustrated embodiment, this embodiment eliminates the need for a display channel circuit during the first intermediate time period t1, instead utilizing a discharge circuit with lower power consumption. Therefore, this embodiment can significantly reduce power consumption during the first intermediate time period t1.

[0075] In one possible implementation, pixel channel discharge can also be achieved in conjunction with a power dissipation circuit. The power consumption of the discharge circuit is less than that of the power dissipation circuit, and the power consumption of the power dissipation circuit is less than that of the display channel circuit. For example... Figure 11 As shown, the second display driver chip 200B also includes a second power consumption circuit 220B, a first power consumption switch S1B, and a second power consumption switch S2B. Optionally, the second power consumption circuit 220B can be a low dropout voltage regular (LDO) or a drive enhancement (buffer) circuit. The first terminal of the first power consumption switch S1B and the first terminal of the second power consumption switch S2B are both coupled to the second power consumption circuit 220B. The first terminal of the first power consumption switch S1B is coupled to the first output terminal. The second terminal of the second power consumption switch S2B is coupled to the second output terminal.

[0076] In one example, the following combination Figure 7 This paper describes a possible implementation of the LDO in the second display driver chip 200B. The LDO221B includes an operational amplifier, resistors R2 and R3. The first input terminal of the LDO221B is used to receive an input voltage. The output terminal of the LDO221B and the first terminal of resistor R2 are both coupled to the first terminals of a plurality of power-consuming switches. The second input terminal of the LDO221B and the second terminal of resistor R2 are both coupled to the first terminal of resistor R3. The second terminal of resistor R3 is grounded.

[0077] In this embodiment, a power consumption circuit is provided on the output side, and the output is coupled to the power consumption circuit via a power consumption switch. When a lower voltage needs to be output at the output to discharge the second pixel circuit 110B, the power consumption switch can be turned on, the discharge switch can be turned off, and the internal switch of the display channel circuit can be turned off, thereby causing the power consumption circuit to output voltage to the output. Alternatively, the discharge switch can be turned on, the power consumption switch can be turned off, and the internal switch of the display channel circuit can be turned off, thereby causing the discharge circuit to output voltage to the output. Therefore, when the second pixel circuit 110B discharges, the display channel circuit does not need to be used throughout, which reduces the power consumption of the display channel circuit.

[0078] In some examples, the second consumption circuit 220B can output voltage VL to the output terminal coupled to the consumption switch via a consumption switch. The first display channel circuit 211B and the second display channel circuit 212B have internal switches. By controlling the on / off state of the first consumption switch S1B, the first discharge switch F1B, and the internal switch of the first display channel circuit 211B, the first consumption circuit 220A, or the first discharge circuit 231B, or the first display channel circuit 211B can output VL to the first output terminal. By controlling the on / off state of the second consumption switch S2B, the second discharge switch F2B, and the internal switch of the second display channel circuit 212B, the first consumption circuit 220A, or the second discharge circuit 232B, or the second display channel circuit 212B can output VL to the second output terminal.

[0079] For example, such as Figure 12 As shown, the first discharge circuit 231B has a clamping voltage. A first output terminal is used to output a first voltage in a first time period T1 and a second voltage in a second time period T2. The second time period T2 is after the first time period T1. The second voltage is less than the first voltage. At the end of the first intermediate time period t1, the slope of the voltage output from the output terminal is a third slope. At the beginning of the second intermediate time period t2, the slope of the voltage output from the output terminal is a fourth slope. The fourth slope is less than the third slope.

[0080] For example, during the first time period T1, the internal switch of the first display channel circuit 211B is turned on, the first discharge switch F1B is turned off, and the first consumption switch S1B is turned off. The first display channel circuit 211B can output VH41 through the first output terminal. During the first intermediate time period t1 in the first switching time period Tz1, the first discharge switch F1B is turned on, the internal switch of the first display channel circuit 211B is turned off, the first consumption switch S1B is turned off, and the first pixel channel 11B discharges to the clamping voltage through the first discharge circuit 231B. At the end of the first intermediate time period t1, the voltage output by the first output terminal is equal to the clamping voltage. During the second intermediate time period t2 and the second time period T2 in the first switching time period Tz1, the first consumption switch S1B is turned on, the first discharge switch F1B is turned off, and the internal switch of the first display channel circuit 211B is turned off. During the second intermediate time period t2 and the second time period T2 in the first switching time period Tz1, the second consumption circuit 220B can output VL42 through the first output terminal. At the end of the second intermediate time period t2, the first pixel channel 11B discharges to VL42 through the second consumption circuit 220B. It can be seen that the voltage output from the first output terminal drops from VH41 to the clamping voltage during the first intermediate time period t1, with the voltage slope increasing. At the end of the first intermediate time period t1, the slope of the voltage output from the first output terminal is the third slope. The voltage output from the first output terminal drops from the clamping voltage to VL42 during the second intermediate time period t2, with the voltage slope increasing. At the beginning of the second intermediate time period t2, the slope of the voltage output from the output terminal is the fourth slope; the fourth slope is less than the third slope. During the second switching time period Tz2 and the third time period T3, the internal switch of the first display channel circuit 211B is turned on, the first discharge switch F1B is turned off, and the first consumption switch S1B is turned off. During the second switching time period Tz2 and the third time period T3, the first display channel circuit 211B can output VH43 through the first output terminal. The voltage at the first output terminal rises from VL42 to VH43 during the second switching period Tz2, with the voltage slope decreasing. During the third intermediate period t3 of the third switching period Tz3, the first discharge switch F1B is turned on, the internal switch of the first display channel circuit 211B is turned off, the first consumption switch S1B is turned off, and the first pixel channel 11B discharges to the clamping voltage through the first discharge circuit 231B. At the end of the third intermediate period t3, the voltage output from the first output terminal is equal to the clamping voltage. During the fourth intermediate period t4 and the fourth time period T4 of the third switching period Tz3, the first consumption switch S1B is turned on, the first discharge switch F1B is turned off, and the internal switch of the first display channel circuit 211B is turned off. During the fourth intermediate period t4 and the fourth time period T4 of the third switching period Tz3, the second consumption circuit 220B can output VL44 through the first output terminal. At the end of the fourth intermediate period t4, the first pixel channel 11B discharges to VL44 through the second consumption circuit 220B.It can be seen that the voltage output from the first output terminal drops from VH43 to the clamping voltage during the third intermediate time period t3, and the voltage slope changes from small to large. At the end of the third intermediate time period t3, the slope of the voltage output from the first output terminal is the seventh slope. The voltage output from the first output terminal drops from the clamping voltage to VL44 during the fourth intermediate time period t4, and the voltage slope changes from small to large. At the beginning of the fourth intermediate time period t4, the slope of the voltage output from the output terminal is the eighth slope. The eighth slope is less than the seventh slope. Among them, VH41 and VH43 are used to charge the first pixel channel 11B. VH41 and VH43 can be the same or different. VL42 and VL44 are used to discharge the first pixel channel 11B. VL42 and VL44 can be the same or different. The clamping voltage output from the first output terminal at the end of the first intermediate time period can be the same as or different from the clamping voltage output from the first output terminal at the end of the third intermediate time period.

[0081] In this embodiment, when the output voltage needs to be reduced from VH to VL, the display channel circuit can be shut down, and the output voltage can be reduced to the clamping voltage through the discharge circuit. Then, the output voltage is reduced from the clamping voltage to VL through the dissipation circuit. Figure 2 Compared to the illustrated embodiment, this embodiment eliminates the need for a display channel circuit in both the first intermediate time period t1 and the second intermediate time period t2, instead utilizing power-efficient consumption and discharge circuits. Therefore, this embodiment can significantly reduce power consumption in both the first intermediate time period t1 and the second intermediate time period t2. Figure 4 Compared to the illustrated embodiment, this embodiment eliminates the need for a power-consuming circuit during the first intermediate time period t1, instead using a discharge circuit with lower power consumption. Therefore, this embodiment can significantly reduce power consumption during the first intermediate time period t1.

[0082] For example, such as Figure 13 As shown, if the value of VL equals the clamping voltage, pixel channel discharge can also be achieved by the discharge circuit. In this case, the second display driver chip 200B does not need to use the second consumption circuit 220B and the consumption switch. The first discharge circuit 231B has a clamping voltage. The first output terminal is used to output a first voltage in a first time period T1 and a second voltage in a second time period T2. The second voltage is less than the first voltage. The second voltage is equal to the clamping voltage.

[0083] For example, during the first time period T1, the internal switch of the first display channel circuit 211B is turned on, and the first discharge switch F1B is turned off. The first display channel circuit 211B can output VH51 through its first output terminal. During the first switching period Tz1 and the second time period T2, the first discharge switch F1B is turned on, and the internal switch of the first display channel circuit 211B is turned off. The first pixel channel 11B discharges through the first discharge circuit 231B. The voltage at the first output terminal drops from VH51 to VL52 during the first switching period Tz1, and the voltage slope changes from small to large. VL52 is one of the clamping voltages that the first discharge circuit 231B can provide. During the second switching period Tz2 and the third time period T3, the internal switch of the first display channel circuit 211B is turned on, and the first discharge switch F1B is turned off. The first display channel circuit 211B can output VH53 through its first output terminal. The voltage at the first output terminal rises from VL52 to VH53 during the second switching period Tz2, and the voltage slope changes from large to small. During the third switching period Tz3 and the fourth switching period T4, the first discharge switch F1B is turned on, and the internal switch of the first display channel circuit 211B is turned off. The first pixel channel 11B discharges through the first discharge circuit 231B. The voltage at the first output terminal drops from VH53 to VL54 during the third switching period Tz3, and the voltage slope changes from small to large. VL54 is one of the clamping voltages that the first discharge circuit 231B can provide. VH51 and VH53 are used to charge the first pixel channel 11B. VH51 and VH53 can be the same or different. VL52 and VL54 are used to discharge the first pixel channel 11B. VL52 and VL54 can be the same or different.

[0084] In this embodiment, when the output voltage needs to be reduced from VH to the clamping voltage, the display channel circuit can be turned off, and the output voltage can be reduced to the clamping voltage through the discharge circuit. Figure 2 Compared to the illustrated embodiment, this embodiment eliminates the need for a display channel circuit in both the first intermediate time period t1 and the second intermediate time period t2, instead utilizing a discharge circuit with lower power consumption. Therefore, this embodiment can significantly reduce power consumption in both the first intermediate time period t1 and the second intermediate time period t2. Figure 4 Compared to the illustrated embodiment, this embodiment eliminates the need for a power-consuming circuit during the first intermediate time period t1 and the second intermediate time period t2, instead using a discharge circuit with lower power consumption. Therefore, this embodiment can significantly reduce power consumption during the first intermediate time period t1.

[0085] based on Figures 6-9 as well as Figure 11 The provided second display driver chip 200B, in this application embodiment, also provides a display driving method applied to the second display driver chip 200B. For example... Figure 14As shown, the method may include at least: S100: outputting a first voltage through an output terminal in a first time period T1. S200: outputting a second voltage through an output terminal in a second time period T2. For example, the second time period T2 is located after the first time period T1. The first voltage is greater than the clamping voltage, and the second voltage is less than or equal to the clamping voltage.

[0086] In one possible implementation, the second voltage is less than the clamping voltage; at the end of the first intermediate time period t1, the slope of the voltage output through the output terminal is a first slope; at the beginning of the second intermediate time period t2, the slope of the voltage output through the output terminal is a second slope; the second slope is less than the first slope; wherein the first intermediate time period t1 and the second intermediate time period t2 are located after the end of the first time period T1 and before the beginning of the second time period T2, and the second intermediate time period t2 is located after the first intermediate time period t1; at the end of the first intermediate time period t1, the voltage output through the output terminal is equal to the clamping voltage.

[0087] It is understood that the above display driving method can be applied to the aforementioned second display driver chip 200B. Since the effects of the chip have been described in detail in the aforementioned chip embodiment, they will not be repeated here.

[0088] This application also provides a computer-readable storage medium storing program code. When the medium is run on a device (e.g., a microcontroller, chip, computer, or processor), the program code can be invoked to execute one or more steps in the above method embodiments.

[0089] Based on this understanding, this application also provides a computer program product containing instructions. The technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) or its processor to execute all or part of the steps of the methods of the various embodiments of this application.

[0090] In the several embodiments provided in this application, it should be understood that the disclosed chips, devices, equipment, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative; for instance, the division of modules described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or modules may be electrical, mechanical, or other forms.

[0091] In addition, the functional modules in the various embodiments of this application can be integrated into one device, or each module can exist physically separately, or two or more modules can be integrated into one device.

[0092] Finally, it should be noted that the above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A display driving chip, characterized in that, The display driving chip comprises a display channel circuit, a discharge circuit, a discharge switch and an output terminal; a first end of the discharge circuit is coupled with a first end of the discharge switch, and a second end of the discharge circuit is grounded; a second end of the discharge switch and the display channel circuit are both coupled with the output terminal; the discharge circuit comprises M-1 clamping switches and M clamping devices connected in series; the M clamping devices comprise a first clamping device, an N-1th clamping device, an Nth clamping device, an N+1th clamping device and an Mth clamping device; the M-1 clamping switches comprise a first clamping switch, an Nth clamping switch and an M-1th clamping switch; N is any positive integer greater than 1 and smaller than M-1, and M is a positive integer greater than or equal to 3; a first end of the first clamping device is coupled with a first end of the discharge circuit, a first end of the Nth clamping device is coupled with a second end of the N-1th clamping device, a second end of the Nth clamping device is coupled with a first end of the N+1th clamping device, a first end of the Mth clamping device is coupled with a second end of the M-1th clamping device, and a second end of the Mth clamping device is coupled with a second end of the discharge circuit; a first end of the first clamping switch is coupled with a first end of the first clamping device, and a second end of the first clamping switch is coupled with a second end of the first clamping device; a first end of the Nth clamping switch is coupled with a first end of the Nth clamping device, and a second end of the Nth clamping switch is coupled with a second end of the Nth clamping device; a first end of the M-1th clamping switch is coupled with a first end of the M-1th clamping device, and a second end of the M-1th clamping switch is coupled with a second end of the M-1th clamping device.

2. The display driving chip according to claim 1, wherein the clamping device is a metal oxide semiconductor field effect transistor, a control end and a first end of the metal oxide semiconductor field effect transistor are coupled with the first end of the clamping device, and a second end of the metal oxide semiconductor field effect transistor is coupled with the second end of the clamping device; or the clamping device is a diode, a negative electrode of the diode is coupled with the first end of the clamping device, and a positive electrode of the diode is coupled with the second end of the clamping device.

3. The display driving chip according to claim 1 or 2, characterized in that, The chip further comprises a consumption circuit and a consumption switch, the consumption circuit is coupled with a first end of the consumption switch, and a second end of the consumption switch is coupled with the output terminal.

4. The display driver chip of claim 3, wherein, The consumption circuit comprises a low dropout linear regulator or a driving enhancement circuit.

5. The display driver chip according to any one of claims 1-4, wherein, The discharge circuit has a clamping voltage; the output terminal is configured to output a first voltage in a first time period and output a second voltage in a second time period; the second time period is located after the first time period; and the second voltage is smaller than the first voltage. The output end is further configured to output a voltage in a first intermediate time period and a second intermediate time period; at an end moment of the first intermediate time period, a slope of the voltage output by the output end is a third slope; at an initial moment of the second intermediate time period, a slope of the voltage output by the output end is a fourth slope; the fourth slope is smaller than the third slope. The first intermediate time period and the second intermediate time period are located after the end of the first time period and before the start of the second time period, and the second intermediate time period is located after the first intermediate time period; at the end moment of the first intermediate time period, the voltage output by the output end is equal to the clamping voltage.

6. The display driver chip of claim 1, wherein, The discharge circuit has a clamping voltage. The output end is configured to output a first voltage in a first time period and a second voltage in a second time period; the second time period is located after the first time period. The second voltage is smaller than the first voltage; the second voltage is equal to the clamping voltage.

7. A display driving method, comprising: The method is applied to a display driving chip, and the chip includes a display channel circuit, a discharge circuit, a discharge switch and an output end. A first end of the discharge circuit is coupled with a first end of the discharge switch, and a second end of the discharge circuit is grounded. The display channel circuit and a second end of the discharge switch are both coupled with the output end. The discharge circuit has a clamping voltage; the method includes: outputting, by the output end, a first voltage in a first time period and a second voltage in a second time period; the second time period is located after the first time period; the first voltage is greater than the clamping voltage, and the second voltage is smaller than or equal to the clamping voltage.

8. The display driving method according to claim 7, wherein The second voltage is smaller than the clamping voltage; the method further includes: outputting, by the output end, a voltage in a first intermediate time period and a second intermediate time period; at an end moment of the first intermediate time period, a slope of the voltage output by the output end is a first slope; at an initial moment of the second intermediate time period, a slope of the voltage output by the output end is a second slope; the second slope is smaller than the first slope; The first intermediate time period and the second intermediate time period are located after the end of the first time period and before the start of the second time period, and the second intermediate time period is located after the first intermediate time period; at the end moment of the first intermediate time period, the voltage output by the output end is equal to the clamping voltage.

9. A display device, characterized by comprising: The display device includes a display screen and a display driving chip as claimed in any one of claims 1-6; The display screen includes a pixel circuit, and a pixel channel of the pixel circuit is coupled with the output end in the display driving chip.

10. An electronic device, comprising: The electronic equipment includes a circuit board and the display device as claimed in claim 9, and the display driving chip in the display device is arranged on the circuit board.

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