Electrostatic discharge (ESD) protection circuit

By using a series connection of semiconductor controlled rectifier and Zener diode in integrated circuits, electrostatic discharge protection of high voltage input/output pins is achieved, solving the problem of immunity and robustness in low-capacitance and high-speed communication signals. Electrostatic discharge protection with low area occupation and high current carrying capacity is achieved.

CN119230545APending Publication Date: 2024-12-31STMICROELECTRONICS INT NV
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202410851344.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-06-29
Filing Date
2024-06-28
Publication Date
2024-12-31

AI Technical Summary

Technical Problem

The prior art has difficulty in achieving electrostatic discharge protection of high voltage input/output pins in low capacitance and high-speed communication signals, especially in terms of high immunity and robustness for different electromagnetic events.

Method used

Using a semiconductor controlled rectifier (SCR) device composed of anode terminal and cathode terminal, combined with the circuit path connected in series between M Zener diodes, the design of avalanche breakdown voltage and activation voltage can achieve self-on electrostatic discharge protection. , ensuring high immunity and robustness under high voltage conditions.

Benefits of technology

The electrostatic discharge protection with low area occupation, high current/power capability and high electromagnetic immunity is achieved, reducing the area occupation of integrated circuits and showing more robust performance in ESD events.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119230545A_ABST
    Figure CN119230545A_ABST
Patent Text Reader

Abstract

The invention relates to an electrostatic discharge (ESD) protection circuit. A two-terminal semiconductor controlled rectifier (SCR) device has an anode terminal coupled to a first node and a cathode terminal coupled to a second node. Neither the cathode gate nor the anode gate of the SCR device is connected to a trigger circuit for controlling the turn-on of the SCR device. The SCR device has an avalanche breakdown voltage for switching on, wherein the avalanche breakdown voltage is set by a breakdown avalanche of a PN junction of the SCR device. The circuit path includes a series-connected chain of M Zener diodes coupled between a first node and a second node and a blocking diode. The circuit path has an activation voltage for switching on, wherein the activation voltage depends on N times the reverse breakdown voltage of the Zener diode. The activation voltage is less than the avalanche breakdown voltage.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present disclosure relates generally to electrostatic discharge (ESD) protection circuitry for integrated circuit devices. Background Art

[0002] Electrostatic discharge (ESD) protection is required for the input / output (I / O) and other pins (or pads) of integrated circuits in many applications. This is particularly important for high voltage (HV) I / O pins used for low capacitance / high speed communication signals (such as for use on data communication bus lines).

[0003] Mandatory requirements for HV ESD protection of certain input / output pins of integrated circuit (IC) devices, such as for low capacitance / high speed HV input / output with system-level specifications such as IEC 62228-3 and / or SAE J2962, include: low capacitance; limited area occupation; high current / power capability; and high immunity to different electromagnetic (EM) events, such as for different stress rise time and current duration source types (e.g., direct power injection testing or transient immunity testing). The HV ESD protection must also exhibit high immunity and robustness in both supplied and unsupplied IC housings. In addition, high immunity to unwanted triggering is also necessary (e.g., in the case of inductive effects on the input / output pins).

[0004] The implementation of integrated HV ESD protection with low area footprint (low capacitance) and high robustness (current capability) as well as high EM immunity is a challenge. The embodiments described herein satisfy the need for improved integrated HV ESD protection. Summary of the invention

[0005] In an embodiment, an electrostatic discharge (ESD) protection circuit includes: a first semiconductor controlled rectifier (SCR) device of a two-terminal type consisting of an anode terminal and a cathode terminal, and wherein the first SCR device has an avalanche breakdown voltage for self-turning on; a first circuit path having a first node and a second node, and wherein the first circuit path has an activation voltage for turning on; wherein the first SCR device and the first circuit path are connected in parallel with the anode terminal and a first node coupled to a first pin and with the cathode terminal and a second node coupled to a second pin; and wherein the activation voltage is less than the avalanche breakdown voltage.

[0006] In an embodiment, a semiconductor controlled rectifier (SCR) device has an anode terminal directly connected to a first pin of an integrated circuit, a cathode terminal directly connected to a second pin of the integrated circuit, and wherein both the cathode gate node and the anode gate node of the SCR device are not connected to a trigger circuit for controlling the turning-on of the SCR device; and a circuit path having a first end node directly connected to the first pin of the integrated circuit and a second end directly connected to the second pin of the integrated circuit, wherein the circuit path includes a chain of M Zener diodes connected in series; wherein the SCR device has an avalanche breakdown voltage for turning-on, the avalanche breakdown voltage being set by a breakdown avalanche of a PN junction of the SCR device; wherein the circuit path has an activation voltage for turning-on, the activation voltage being dependent on M times the reverse breakdown voltage of the Zener diode; and wherein the activation voltage is less than the avalanche breakdown voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] For a better understanding of the embodiments, reference will now be made, by way of example only, to the accompanying drawings, in which:

[0008] Figure 1 is a circuit diagram for an electrostatic discharge (ESD) protection circuit using a triggered semiconductor controlled rectifier (SCR) device;

[0009] Figure 2 is a circuit diagram for an ESD protection circuit using an avalanche SCR device and a static trigger control circuit (TCC) connected in parallel;

[0010] Figure 3 It is a graph of current versus voltage;

[0011] Figure 4A is a circuit diagram for an ESD protection circuit using an avalanche SCR device and a static trigger control circuit (TCC) connected in parallel;

[0012] Figure 4B Shown for Figure 4A An example layout configuration of an ESD protection circuit; and

[0013] Figure 5 , Figure 6 and Figure 7 A circuit diagram for an alternative embodiment of an ESD protection circuit is shown. DETAILED DESCRIPTION

[0014] Similar features in the various figures are indicated by similar reference numerals. In particular, common structural and / or functional features in various embodiments may have the same reference numerals and may be arranged in the same structure, dimensions and material properties.

[0015] Unless otherwise indicated, when referring to two elements being connected together, this means a direct connection without any intermediate elements other than conductors, and when referring to two elements being coupled together, this means the two elements may be connected or they may be coupled via one or more other elements.

[0016] In the following description, when reference is made to terms indicating absolute positions such as terms "front", "back", "top", "bottom", "left", "right", etc., or terms indicating relative positions such as terms "above", "below", "above...", "below...", etc., or terms indicating directions such as terms "horizontal", "vertical", etc., unless otherwise specified, they all refer to the orientation of the drawing.

[0017] Semiconductor (Silicon) Controlled Rectifier (SCR) devices are well-known and widely used circuits for on-chip electrostatic discharge (ESD) protection. SCR devices are typically connected between a signal (input or output) pin of an integrated circuit and a ground (reference voltage) pin of the integrated circuit.

[0018] Figure 1 A circuit diagram of an ESD protection circuit for an SCR device 100 using gate triggering is shown. The SCR device 100 is a three (or more) terminal device including one or more of an anode gate AG terminal and / or a cathode gate CG terminal, an anode node A terminal, and a cathode node K terminal. In the ESD protection scheme, the anode node A may be coupled, preferably directly connected, to a signal (input / output) pin 102, and the cathode node K may be coupled, preferably directly connected, to a reference or ground pin 104. A PNP-type bipolar transistor 106 has a collector coupled, preferably directly connected, to the anode node A, an emitter coupled, preferably directly connected, to a first internal base node 108 at the cathode gate CG, and a base coupled, preferably directly connected, to a second internal base node 110 at the anode gate AG. The NPN bipolar transistor 112 has a collector coupled, preferably directly connected, to the second internal base node 110 at the anode gate AG, an emitter coupled, preferably directly connected, to the cathode node K, and a base coupled, preferably directly connected, to the first internal base node 108 at the cathode gate CG. The first resistor 114 (provided by the resistance of a doped well in the silicon substrate) has a first terminal coupled, preferably directly connected, to the first internal base node 108 at the cathode gate CG, and a second terminal coupled, preferably directly connected, to the cathode node K. The second resistor 116 (provided by the resistance of a doped well in the silicon substrate) has a first terminal coupled, preferably directly connected, to the second internal base node 110 at the anode gate AG, and a second terminal coupled, preferably directly connected, to the anode node A.

[0019] When the SCR device 100 is in the off state, current flow between the anode node A and the cathode node K is blocked. Turning on the SCR device 100 (i.e., switching from the off state to the on state) is typically controlled by applying a gate signal to the cathode gate CG at the first internal base node 108 or the anode gate AG at the second internal base node 110 when there is a sufficient voltage potential difference between the anode node A and the cathode node K. In the on state, current flows between the anode node A and the cathode node K until the voltage at the anode node A (referenced to the ground voltage at the cathode node K) drops below the holding voltage level.

[0020] For example, turning on the SCR device 100 may be achieved by using a trigger current It provided by the trigger circuit TC1 to the cathode gate CG at the first internal base node 108 (this is referred to in the art as a cathode gate controlled SCR 100). This turns on the NPN bipolar transistor 112, and current flows through the collector-emitter path of the NPN bipolar transistor 112. This current flow sinks current from the base of the PNP bipolar transistor 106 and causes the PNP bipolar transistor 106 to turn on. Current flows from the anode node A through the collector-emitter path of the PNP bipolar transistor 106 to the base of the NPN bipolar transistor 112 and is used to maintain the NPN bipolar transistor 112 turned on. Then, the trigger current It is no longer needed to be provided to the cathode gate CG at the first internal base node 108 to turn on the SCR device 100. If there is still enough current available from the anode node A through the PNP bipolar transistor 106 due to the voltage potential difference between the anode node A and the cathode node K, the SCR device 100 will remain in the on state.

[0021] Instead, a trigger current It may be sunk by the trigger circuit TC2 from the anode gate AG at the second internal base node 110 (this is referred to in the art as anode gate controlled SCR 100). This turns on the PNP bipolar transistor 106 and current flows through the collector-emitter path of the PNP bipolar transistor 106. This current flow provides current to the base of the NPN bipolar transistor 112 and turns the NPN bipolar transistor 112 on. The current flowing to the cathode node K through the collector-emitter path of the NPN bipolar transistor 112 is sunk from the base of the PNP bipolar transistor 106 and is used to maintain the PNP bipolar transistor 106 on. Then, it is no longer necessary to sunk the trigger current It from the anode gate AG at the second internal base node 110 for turning on. If there is still enough current available from the anode node A through the PNP bipolar transistor 106 due to the voltage potential difference between the anode node A and the cathode node K, then the SCR device 100 will remain in the on state.

[0022] The trigger circuits TC1, TC2 can be used to sense an ESD event at the pins 102, 104 and generate the required pulse of current It for the trigger signal to control the SCR device 100 to turn on in response to the sensed ESD event. The current flowing through the SCR device 100 when turned on will dissipate the ESD stress.

[0023] Figure 2 is a circuit diagram for an ESD protection circuit using an avalanche SCR device 200 and a static trigger control circuit (TCC) 202 connected in parallel.

[0024] The SCR device 200 herein is a two-terminal device consisting of an anode node A terminal and a cathode node K terminal. The PNP bipolar transistor 206 has a collector coupled, preferably directly connected, to the anode node A, an emitter coupled, preferably directly connected, to the first internal base node 208, and a base coupled, preferably directly connected, to the second internal base node 210. The NPN bipolar transistor 212 has a collector coupled, preferably directly connected, to the second internal base node 210, an emitter coupled, preferably directly connected, to the cathode node K, and a base coupled, preferably directly connected, to the first internal base node 208. The first resistor 214 (provided by the resistance of a doped well in the silicon substrate) has a first terminal coupled, preferably directly connected, to the first internal base node 208 and a second terminal coupled, preferably directly connected, to the cathode node K. The second resistor 216 (provided by the resistance of a doped well in the silicon substrate) has a first terminal coupled, preferably directly connected, to the second internal base node 210 and a second terminal coupled, preferably directly connected, to the anode node A. Given the two-terminal configuration of the SCR device 200, neither the first internal base node 208 nor the second internal base node 210 are in any way externally (from the perspective of the SCR) connectable or coupleable by circuitry (such as trigger circuitry) to the anode terminal or cathode terminal.

[0025] The TCC 202, also referred to herein as a circuit path, includes a series-connected chain of M Zener diodes 220(1) to 220(M) coupled between an anode node A and a cathode node K. The series connection of the Zener diodes 220(1) to 220(M) is a head-to-tail type connection, where the cathode of one Zener diode is directly connected to the anode of the next Zener diode. The anode of the first Zener diode 220(1) in the chain is coupled, preferably directly connected, to the cathode node K. The cathode of the last Zener diode 220(M) is coupled to the anode node A through a blocking diode 222. The cathode of the blocking diode 222 is coupled, preferably directly connected, to the cathode of the last Zener diode 220(M), and the anode of the blocking diode 222 is coupled, preferably directly connected, to the anode node A.

[0026] The blocking diode 222 is included to prevent current from being conducted from the cathode node K to the anode node A through the TCC 202 during a negative ESD event. The presence of the blocking diode 222 further prevents possible activation of parasitic conduction paths embedded in the integrated circuit structure for the TCC 202. Another advantage of including the diode 222 is that it avoids any issues or constraints in the integrated circuit layout for the TCC 202 due to excessive current / power dissipation at the silicon or metal level.

[0027] In an alternative embodiment, the blocking diode 222 is not present in the TCC 202 and the cathode of the last Zener diode 220 (M) is directly connected to the anode node A.

[0028] In the ESD protection scheme, the anode node A can be coupled, preferably directly connected, to a signal pin 203 (e.g., an input / output pin of an integrated circuit), and the cathode node K can be coupled, preferably directly connected, to a reference (ground) pin 204 of the integrated circuit.

[0029] It is important to note that because the SCR device 200 consists of a two-terminal device (anode and cathode terminals only), a gate terminal for controlling turn-on is not included, and therefore no anode or cathode gate trigger circuit is utilized to source / sink a trigger current pulse to either of the first and second internal base nodes 208, 210. In fact, because the SCR device 200 operates independently (i.e., self-turning on and off of the SCR occurs without the application of any gate control signaling), no circuit connection is made to the cathode gate or the anode gate. In order to achieve the absence of an anode gate or cathode gate control signal Figure 2The self-turning on of the SCR device 200 in the ESD protection circuit of the embodiment requires a voltage exceeding the breakdown avalanche of the reverse biased PN junction between the n-type doped region for the collector of the NPN bipolar transistor 212 and the p-type doped region for the base of the NPN bipolar transistor 212. This voltage is referred to herein as the avalanche breakdown voltage V for the SCR device 200. SCR When this PN junction avalanches, current is absorbed from the base of the PNP bipolar transistor 206. This turns on the PNP bipolar transistor 206 and current flows through the collector-emitter path of the PNP bipolar transistor 206 to the base of the NPN bipolar transistor 212. This base current will control the NPN bipolar transistor 212 to turn on. The flow of current through the collector-emitter path of the turned-on NPN bipolar transistor 212 then maintains the turn-on of the PNP bipolar transistor 206. If there is still enough current available from the anode node A through the PNP bipolar transistor 206 due to the voltage potential difference between the anode node A and the cathode node K, then the SCR device 200 will remain in the on state.

[0030] exist Figure 2 In a preferred embodiment of the ESD protection circuit, the avalanche breakdown voltage V of the SCR device 200 is SCR is set to be greater than the activation voltage V of the TCC 202 TCC This is a key feature of the design of an ESD protection circuit in order to ensure that the TCC 202 turns on (and begins current dissipation) before the SCR device 200 responds to an ESD event.

[0031] The avalanche breakdown voltage V for the SCR device 200 is achieved by controlling the values ​​of the PNP and NPN junctions of transistors 206 and 212 and the parasitic resistance of the doped wells in the silicon substrate of resistors 214, 216. SCR This is achieved, for example, by controlling the size, spacing, and doping levels of doped wells and doped regions in the semiconductor (silicon) layer of the integrated circuit device that forms the PNPN structure of the SCR 200. For example, the architecture of the SCR device 200 can be defined with a specific cross-section (i.e., the number and location of active regions, using a field plate approach to control the electric field and potential distribution on the silicon). The size, spacing, and doping levels of the doped wells and doped regions will then set the precise avalanche breakdown voltage for the SCR device 200.

[0032] The activation voltage V of TCC 202 TCCis equal to the sum of the reverse breakdown voltages for the series-connected chain of M Zener diodes 220(1) to 220(M) plus the forward voltage drop of the blocking diode 222. The setting of the reverse breakdown voltage for each Zener diode 220 is achieved by controlling the size, spacing, and doping levels of the doped wells, implants, and doped regions in the semiconductor substrate of the integrated circuit device forming each diode 220. For example, the forward voltage drop of the blocking diode 222 implemented as a common PN junction is typically in the range of 0.5 to 0.7 volts.

[0033] The voltage intervention of TCC 202 for ESD protection, in other words, the activation voltage V TCC , is defined according to the voltage protection requirement of the signal pin 203 (e.g., an input / output pin of an integrated circuit). For example, if the voltage protection requirement for the signal pin 203 is for an absolute maximum rating (AMR) of +40 volts, then the TCC 202 can be designed to have an activation voltage V of approximately +45 volts (i.e., exceeding the AMR). TCC Therefore, there is no current conduction for ESD protection at least before the AMR of pin 203, and the activation voltage V TCC will be set above the AMR rating with an appropriate margin. For a Zener diode 220 with a reverse breakdown voltage of +5 volts, TCC 202 will include a series-connected chain of M=9 Zener diodes 220(1) to 220(9) to provide an activation voltage V approximately equal to +45 volts. TCC The SCR device 200 in this example will be designed to have an avalanche breakdown voltage V SCR (i.e., avalanche breakdown of the reverse biased PN junction) is used for the self-turn-on of the SCR. The avalanche breakdown voltage V SCR Greater than the activation voltage V TCC , such as a breakdown voltage approximately equal to +51 volts. In this case, the SCR device 200 may further exhibit a threshold voltage for snap-back approximately equal to +55 volts.

[0034] It will be noted that there is no operational connection between the SCR device 200 and the TCC 202. For example, in conjunction with Figure 1 In the embodiments described above, the SCR 200 generally includes an anode or cathode gate trigger circuit. Figure 2 The TCC 202 in FIG. 200 does not serve as a trigger for the SCR device 200. The avalanche breakdown voltage V SCR and the threshold voltage for rebound is well defined by the design of the SCR device 200 itself. Figure 2 The ESD protection circuits are operated independently within the

[0035] It will also be noted that TCC 202 is not a MOS-based semiconductor device. The current in TCC 202 does not flow through the MOS channel region. Therefore, TCC 202 is not sensitive to dV / dt issues or any external fast transients or ringing (relative to anode node A or cathode node K), which can be a significant problem when using MOS-based circuits. The operation of TCC 202 is based solely on the use of PN junctions (Zener diodes are an example of such PN junctions). As a result, TCC 202 exhibits more robust performance against EM or ESD events.

[0036] Reference now Figure 3 , Figure 3 A graph of current versus voltage is shown.

[0037] Line 300 illustrates the current versus voltage operating characteristics of an ESD protection circuit using only an avalanche SCR device 200. The SCR circuit 200 is designed to have an avalanche breakdown voltage V of approximately +51 volts for self-turning on. SCR (Having a threshold voltage for rebound of approximately +55 volts). When the voltage at signal pin 203 rises to the point where the voltage at the collector of transistor 210 exceeds the avalanche breakdown voltage V of the reverse biased PN junction SCR When the voltage at signal pin 203 reaches a level of approximately +51 volts, current begins to flow from signal pin 203 through SCR 200 to reference (ground) pin 204. As the voltage at signal pin 203 increases, the current through SCR 200 increases accordingly until a threshold voltage of approximately +55 volts is reached. At this point, SCR device 200 transitions to snap-back operation (line 300sb).

[0038] Line 302 illustrates Figure 2 1 and 2. The current (I) versus voltage (V) operating characteristics of a first embodiment of an ESD protection circuit using an avalanche SCR device 200 and a parallel-connected static trigger control circuit (TCC) 202. In this embodiment, the TCC 202 uses a series-connected chain of M=9 Zener diodes 220(1) to 220(9), each of which has a reverse breakdown voltage of +5 volts and a first size (e.g., given by the parameter N=20, where N indicates the number of parallel-connected diode structures for each diode 220). When the voltage at the signal pin 203 rises above the activation voltage V of the TCC 202 of approximately +45 volts, the TCC 202 is activated. TCCWhen the voltage at signal pin 203 reaches the level of , current begins to flow from signal pin 203 through TCC 202 to reference (ground) pin 204. The amount of current flowing here is related to the size of the Zener diode 220 device (N=20). As the voltage at signal pin 203 increases, the current through TCC 202 increases accordingly until the voltage at the collector of transistor 210 exceeds the avalanche breakdown voltage V of the reverse biased PN junction for the SCR to self-turn on. SCR (approximately +51 volts). At this point, the increased current level flows from the signal pin 203 to the reference (ground) pin 204 using two current paths - one path through the TCC 202 and the other path through the SCR device 200. Therefore, Figure 2 The ESD protection circuit of the invention supports current flow shared with the TCC 202 and the SCR device 200 in the VI operating region indicated at reference numeral 306. As the voltage at the signal pin 203 increases, the current flow increases accordingly until a threshold voltage level of approximately +55 volts is reached. At this point, the SCR device 200 transitions to snap-back operation (line 302sb). After the SCR device 200 transitions to snap-back operation and the voltage drops to the activation voltage V of the TCC 202, the current flow increases accordingly. TCC Thereafter, current flow through the TCC 202 ceases and the ESD event discharge is handled only by the SCR device 200 .

[0039] Line 304 illustrates Figure 2 2 shows the current versus voltage operating characteristics of a second embodiment of an ESD protection circuit that uses an avalanche SCR device 200 and a parallel-connected static trigger control circuit (TCC) 202. In this embodiment, the TCC 202 uses a series-connected chain of M=9 Zener diodes 220(1) to 220(9), each of which has a reverse breakdown voltage of +5 volts and a second size (e.g., given by the parameter N=40, where N indicates the number of parallel-connected diode structures for each Zener diode 220). Thus, the Zener diodes 220 in this embodiment are twice as large as the Zener diodes 220 in the previous embodiment. When the voltage at the signal pin 203 rises above the activation voltage V of the TCC 202 of approximately +45 volts, the voltage at the signal pin 203 rises above the activation voltage V of the TCC 202 of approximately +45 volts. TCC, current begins to flow from signal pin 203 through TCC 202 to reference (ground) pin 204. The amount of current that flows here is related to the size of the Zener diode 220 device (N=40). Note here that because the Zener diode 220 is larger, the current flowing through TCC 202 is larger in this embodiment than in the previous embodiment. As the voltage at signal pin 203 increases, the current flowing through TCC 202 increases accordingly until the voltage at the collector of transistor 210 exceeds the avalanche breakdown voltage V of the reverse biased PN junction for the SCR to self-turn on. SCR (approximately +51 volts). At this point, the increased current level flows from the signal pin 203 to the reference (ground) pin 204 using two current paths - one path through the TCC 202 and the other path through the SCR device 200. Therefore, Figure 2 The ESD protection circuit of supports current flow shared with TCC 202 and SCR device 200 in the area indicated at reference numeral 306, which current flow follows the current contribution shown by line 300. As the voltage at signal pin 203 increases, the current flow increases accordingly until a threshold voltage level of approximately +55 volts is reached. At this point, the SCR device 200 transitions to rebound operation (line 304sb). After the SCR device 200 transitions to rebound operation and the voltage drops to the activation voltage V of the TCC 202 TCC Thereafter, current flow through the TCC 202 ceases and the ESD event discharge is handled only by the SCR device 200 .

[0040] Although the preferred embodiment of TCC 202 uses Zener diode 220, TCC 202 may alternatively be implemented with another type of avalanche triggered semiconductor devices connected in a series chain. For example, the series connection of Zener diode 220 may be replaced with a series connection of reverse biased PN diodes (non-limiting examples of which include: a high voltage PN diode; one or more bipolar NPN and PNP transistors in series with shorted base / emitter or base / collector terminals; one or more reverse biased grounded gate MOS (GGMOS) transistors (i.e., completely off, without a MOS conduction channel)).

[0041] Although the preferred embodiment of TCC 202 uses blocking diode 222, TCC 202 may alternatively be implemented with another type of current blocking semiconductor device. For example, blocking diode 222 may be implemented with a PN diode (non-limiting examples of which include: a high voltage PN diode; a shorted base / emitter or base / collector terminal of an NPN or PNP transistor; a grounded gate MOS (GGMOS) transistor).

[0042] and Figure 1Compared with the ESD protection circuit, Figure 2 A significant advantage of the ESD protection circuit is the reduced IC area occupied. The size of the SCR device 200 is generally proportional to the desired current carrying capability and the level of immunity (current value for rebound). As the protection requirements for the signal pin 203 increase, the size of the SCR device 200 also increases. Based on the immunity requirements, the current carrying capability of the SCR device may be over-designed. However, for Figure 2 The ESD protection circuit of FIG. 2 has two current conduction paths, and the existence of the current conduction path for TCC 202 simplifies the design requirements for the SCR device 200 to support Figure 3 As a result, for the same current carrying capacity requirement, by using Figure 2 The ESD protection circuit can reduce the integrated circuit area occupied by 15-25%.

[0043] Reference now Figure 4A . Figure 4A The ESD protection circuit is Figure 2 The ESD protection circuit of the embodiment of the present invention is different only in that the first TCC 202a and the second TCC 202b are connected in parallel with each other and with the two-terminal SCR device 200 between the signal pin 203 and the reference (ground) pin 204. Each of the first TCC 202a and the second TCC 202b includes a first series-connected chain of M Zener diodes 220(1) to 220(M) coupled between an anode node A terminal and a cathode node K terminal. The series connection of the Zener diodes 220(1) to 220(M) is a head-to-tail type connection in which the cathode of one Zener diode is directly connected to the anode of the next Zener diode. In each of the first and second TCCs 202a and 202b: the anode of the first Zener diode 220(1) in the chain is coupled, preferably directly connected, to the cathode node K; and the cathode of the last Zener diode 220(M) is coupled to the anode node A via a blocking diode 222 (wherein the cathode of the blocking diode 222 is coupled, preferably directly connected, to the cathode of the last Zener diode 220(M), and the anode of the blocking diode 222 is coupled, preferably directly connected, to the anode node A).

[0044] The use of the first TCC 202a and the second TCC 202b in this configuration is to obtain a more efficient connection of the circuit at the layout level between the SCR device 200 and the TCC 202. For example, consider a configuration in which the TCC 202 is split into two branches (one branch having the TCC 202a and the other branch having the TCC 202b) and connecting those branches in a symmetrical manner relative to the layout of the SCR device 200 (e.g., relative to the TCC 202b). Figure 4B A more unified triggering mechanism provided by the SCR device 200 and the TCC 202 may be achieved by using the dotted diagonal line across the layout area of ​​the SCR device shown in FIG.

[0045] Reference now Figure 5 , Figure 5 A circuit diagram for another embodiment of an ESD protection circuit is shown. Here, the included two-terminal SCR device 200 is shown by using its conventional schematic symbol. The SCR device 200a has a cathode node K terminal coupled, preferably directly connected, to the signal pin 203, an anode node A terminal coupled, preferably directly connected, to the intermediate node 230, and a disconnected cathode gate CG (indicated by an "X", indicating that there is no transistor base access or trigger circuit connection). The SCR device 200b has a cathode node K terminal coupled, preferably directly connected, to the reference (ground) pin 204, an anode node A terminal coupled, preferably directly connected, to the intermediate node 230, and a disconnected cathode gate CG (indicated by an "X", indicating that there is no transistor base access or trigger circuit connection). Importantly, given the two-terminal configuration, neither of the SCR devices 200a, 200b is gate controlled (anode or cathode) by the trigger circuit in any way to turn on (i.e., these SCR devices support self-turning on depending on the applied voltage, as discussed above). The TCC 202 is connected between the signal pin 203 and the intermediate node 230. The TCC 202 includes a series-connected chain of M Zener diodes 220(1) to 220(M) coupled between the signal pin 203 and the intermediate node 230. The series connection of the Zener diodes 220(1) to 220(M) is a head-to-tail type connection, where the cathode of one Zener diode is directly connected to the anode of the next Zener diode. The anode of the first Zener diode 220(1) in the chain is coupled, preferably directly connected, to the pin 203 at the cathode node K of the SCR device 200a. The cathode of the last Zener diode 220(N) is coupled to the intermediate node 230 through a blocking diode 222. The cathode of the blocking diode 222 is coupled, preferably directly connected, to the cathode of the last Zener diode 220(N), and the anode of the blocking diode 222 is coupled, preferably directly connected, to the intermediate node 230 at the anode node A of the SCR device 200a. The activation voltage V of TCC 202TCC is set to be less than the avalanche breakdown voltage V of the SCR device 200a SCR .

[0046] Reference now Figure 6 , Figure 6 A circuit diagram for another embodiment of an ESD protection circuit is shown. Here, the included two-terminal SCR device 200 is shown by using its conventional schematic symbol. The SCR device 200a has a cathode node K terminal coupled, preferably directly connected, to the reference (ground) pin 204, an anode node A terminal coupled, preferably directly connected, to the intermediate node 230, and a disconnected cathode gate CG (indicated by an "X", indicating that there is no transistor base access or trigger circuit connection). The SCR device 200b has a cathode node K terminal coupled, preferably directly connected, to the signal pin 203, an anode node A terminal coupled, preferably directly connected, to the intermediate node 230, and a disconnected cathode gate CG (indicated by an "X", indicating that there is no transistor base access or trigger circuit connection). Importantly, given the two-terminal configuration, neither of the SCR devices 200a, 200b is gate controlled (anode or cathode) by a trigger circuit in any way to turn on (i.e., these SCR devices support self-turning on depending on the applied voltage, as discussed above). The TCC 202 is connected between a reference (ground) pin 204 and an intermediate node 230. The TCC 202 includes a series-connected chain of M Zener diodes 220(1) to 220(M) coupled between the reference (ground) pin 204 and the intermediate node 230. The series connection of the Zener diodes 220(1) to 220(M) is a head-to-tail type connection, where the cathode of one Zener diode is directly connected to the anode of the next Zener diode. The anode of the first Zener diode 220(1) in the chain is coupled, preferably directly connected, to the reference (ground) pin 204 at the cathode node K of the SCR device 200a. The cathode of the last Zener diode 220(M) is coupled to the intermediate node 230 through a blocking diode 222. The cathode of the blocking diode 222 is coupled, preferably directly connected, to the cathode of the last Zener diode 220 (M), and the anode of the blocking diode 222 is coupled, preferably directly connected, to the intermediate node 230 at the anode node A of the SCR device 200a. The activation voltage V of the TCC 202 TCC is set to be less than the avalanche breakdown voltage V of the SCR device 200a SCR .

[0047] Reference now Figure 7 , Figure 7A circuit diagram for another embodiment of an ESD protection circuit is shown. Here, the included two-terminal SCR device 200 is shown using its conventional schematic symbol. The SCR device 200a has a cathode node K terminal coupled, preferably directly connected, to the signal pin 203, an anode node A terminal coupled, preferably directly connected, to the intermediate node 230, and a disconnected cathode gate (indicated by an "X", indicating that there is no transistor base access or trigger circuit connection). The SCR device 200b has a cathode node K terminal coupled, preferably directly connected, to the reference (ground) pin 204, an anode node A terminal coupled, preferably directly connected, to the intermediate node 230, and a disconnected cathode gate (indicated by an "X", indicating that there is no transistor base access or trigger circuit connection). Importantly, given the two-terminal configuration, neither of the SCR devices 200a, 200b is gate controlled by a trigger circuit to turn on in any way (i.e., these SCR devices support self-turning on depending on the applied voltage, as discussed above).

[0048] The first TCC 202a is connected between the signal pin 203 and the intermediate node 230. The first TCC 202a includes a series-connected chain of Ma Zener diodes 220(1) to 220(Ma) coupled between the signal pin 203 and the intermediate node 230. The series connection of the Zener diodes 220(1) to 220(Ma) is a head-to-tail type connection, where the cathode of one Zener diode is directly connected to the anode of the next Zener diode. The anode of the first Zener diode 220(1) in the chain is coupled, preferably directly connected, to the signal pin 203 at the cathode of the SCR device 200a. The cathode of the last Zener diode 220(Ma) is coupled to the intermediate node 230 through a blocking diode 222. The cathode of the blocking diode 222 is coupled, preferably directly connected, to the cathode of the last Zener diode 220(Ma), and the anode of the blocking diode 222 is coupled, preferably directly connected, to the intermediate node 230 at the anode node A of the SCR device 200a. The activation voltage V of TCC 202a TCC is set to be less than the avalanche breakdown voltage V of the SCR device 200a SCR .

[0049] The second TCC 202b is connected between the reference (ground) pin 204 and the intermediate node 230. The TCC 202b includes a series-connected chain of Mb Zener diodes 220(1) to 220(Mb) coupled between the reference (ground) pin 204 and the intermediate node 230. The series connection of the Zener diodes 220(1) to 220(Mb) is a head-to-tail type connection, where the cathode of one Zener diode is directly connected to the anode of the next Zener diode. The anode of the first Zener diode 220(1) in the chain is coupled, preferably directly connected, to the reference (ground) pin 204 at the cathode node K of the SCR device 202b. The cathode of the last Zener diode 220(Mb) is coupled to the ground pin 204 through a blocking diode 222. The cathode of the blocking diode 222 is coupled, preferably directly connected, to the cathode of the last Zener diode 220 (Mb), and the anode of the blocking diode 222 is coupled, preferably directly connected, to the intermediate node 230 at the anode node A of the SCR device 200b. The activation voltage V of the TCC 202b is TCC is set to be less than the avalanche breakdown voltage V of the SCR device 200b SCR .

[0050] It will be noted that Ma and Mb do not have to be equal to each other. In the case where Ma and Mb are not equal, the activation voltage V of TCC 202a and TCC 202b TCC In this case, the avalanche breakdown voltages V of SCR device 200a and SCR device 200b are unequal. SCR will also not be equal and should be relative to the activation voltage V TCC In other embodiments, Ma and Mb are equal, and the activation voltages V of TCC 202a and TCC 202b are equal. TCC In this case, the avalanche breakdown voltages V of SCR devices 200a and 200b are equal. SCR will be equal and relative to the activation voltage V TCC Align with appropriate margin.

[0051] Although the present invention has been illustrated and described in detail in the drawings and the above description, these illustrations and descriptions are to be considered illustrative or exemplary rather than restrictive; the present invention is not limited to the disclosed embodiments. Other variations of the disclosed embodiments can be understood and implemented by those skilled in the art in practicing the claimed invention by studying the drawings, the disclosure, and the appended claims.

Claims

1. An electrostatic discharge (ESD) protection circuit, comprising: a first semiconductor controlled rectifier (SCR) device of a two-terminal type consisting of an anode terminal and a cathode terminal, and wherein the first SCR device has an avalanche breakdown voltage for self-turning on; a first circuit path having a first node and a second node, and wherein the first circuit path has an activation voltage for turning on; wherein the first SCR device and the first circuit path are connected in parallel with an anode terminal and a first node coupled to the first pin and with a cathode terminal and a second node coupled to the second pin; and Wherein, the activation voltage is less than the avalanche breakdown voltage.

2. The ESD protection circuit according to claim 1, wherein: Both the cathode gate node and the anode gate node of the first SCR device are not connected to a trigger circuit for controlling turning on of the first SCR device.

3. The ESD protection circuit according to claim 1, wherein: The first circuit path includes a series-connected chain of M Zener diodes coupled between an anode terminal and a cathode terminal of the first SCR device, wherein the activation voltage is dependent on M times a reverse breakdown voltage of the Zener diodes.

4. The ESD protection circuit according to claim 3, wherein: The first circuit path further comprises a diode connected in series directly with the series-connected chain of M Zener diodes.

5. The ESD protection circuit according to claim 4, wherein: The cathode of the diode faces the cathode of the Zener diode to which the diode in the series-connected chain of M Zener diodes is directly connected.

6. The ESD protection circuit according to claim 1, wherein: The avalanche breakdown voltage is set by the breakdown avalanche of the PN junction of the first SCR device.

7. The ESD protection circuit according to claim 6, wherein: The first SCR device includes an NPN bipolar transistor coupled to a PNP bipolar transistor, and wherein the PN junction of the first SCR device is a junction between a collector and a base of the NPN bipolar transistor.

8. The ESD protection circuit of claim 1 , further comprising a second SCR device of a two-terminal type consisting of an anode terminal and a cathode terminal, and wherein the anode terminal of the second SCR device is coupled to the anode terminal of the first SCR device, and wherein the cathode terminal of the second SCR device is coupled to the first pin.

9. The ESD protection circuit according to claim 8, wherein: The first pin is a signal pin for input / output of the integrated circuit, and the second pin is a reference pin for a ground reference of the integrated circuit.

10. The ESD protection circuit according to claim 8, wherein: The first pin is a reference pin for a ground reference of an integrated circuit signal, and the second pin is a signal pin for an input / output of the integrated circuit.

11. The ESD protection circuit according to claim 8, wherein: The second SCR device has an avalanche breakdown voltage for self-turning on.

12. The ESD protection circuit according to claim 11, wherein: Both the cathode gate node and the anode gate node of the second SCR device are not connected to a trigger circuit for controlling turning on of the second SCR device.

13. The ESD protection circuit of claim 11, further comprising: a second circuit path having a first node and a second node, and wherein the second circuit path has an activation voltage for turning on; wherein the second SCR device is connected in parallel with the second circuit path; and Wherein, the activation voltage of the second circuit path is less than an avalanche breakdown voltage of the second SCR device.

14. The ESD protection circuit of claim 13, wherein: The first circuit path includes a series-connected chain of Ma Zener diodes coupled between an anode terminal and a cathode terminal of the first SCR device, wherein the activation voltage is dependent on Ma times a reverse breakdown voltage of the Zener diodes; as well as The second circuit path includes a series-connected chain of Mb Zener diodes coupled between the anode terminal and the cathode terminal of the second SCR device, wherein the activation voltage is dependent on Mb times the reverse breakdown voltage of the Zener diodes.

15. The ESD protection circuit according to claim 14, wherein: The number Ma of Zener diodes in the first circuit path and the number Mb of Zener diodes in the second circuit path are equal.

16. The ESD protection circuit according to claim 14, wherein: The number Ma of Zener diodes in the first circuit path and the number Mb of Zener diodes in the second circuit path are not equal.

17. The ESD protection circuit according to claim 14, wherein: The second circuit path further comprises a diode connected in series directly with the series-connected chain of Mb Zener diodes.

18. An electrostatic discharge (ESD) protection circuit, comprising: a semiconductor controlled rectifier (SCR) device having an anode terminal directly connected to a first pin of the integrated circuit, a cathode terminal directly connected to a second pin of the integrated circuit, and wherein both the cathode gate node and the anode gate node of the SCR device are not connected to a trigger circuit for controlling turning on of the SCR device; as well as a circuit path having a first end node directly connected to a first pin of the integrated circuit and a second end directly connected to a second pin of the integrated circuit, wherein the circuit path comprises a series-connected chain of M Zener diodes; wherein the SCR device has an avalanche breakdown voltage for switching on, the avalanche breakdown voltage being set by a breakdown avalanche of a PN junction of the SCR device; wherein the circuit path has an activation voltage for switching on, the activation voltage being determined by M times the reverse breakdown voltage of the Zener diode; and Wherein, the activation voltage is less than the avalanche breakdown voltage.

19. The ESD protection circuit according to claim 18, wherein: The circuit path further comprises a diode connected in series directly with the series-connected chain of M Zener diodes, wherein the cathode of the diode is directly connected to the cathode of one Zener diode in the series-connected chain of M Zener diodes.

20. The ESD protection circuit of claim 18, wherein: The SCR device includes an NPN bipolar transistor coupled to a PNP bipolar transistor, and wherein the PN junction of the SCR device is a junction between a collector and a base of the NPN bipolar transistor.

21. The ESD protection circuit according to claim 18, wherein: The first pin of the integrated circuit is a signal pin for input / output, and wherein the second pin of the integrated circuit is a reference pin for ground reference.