Preparation method of P-type solar cell and P-type solar cell

Abstract

The invention provides a preparation method of a P-type solar cell and the P-type solar cell, and relates to the technical field of photovoltaics. The method comprises the following steps: providing a P-type silicon wafer, wherein a first surface of the P-type silicon wafer comprises a P-type region and an N-type region; a tunneling oxide layer, a phosphorus-doped polycrystalline silicon layer and a phosphorosilicate glass layer are sequentially stacked in the N-type region; the P-type region is exposed; the phosphorosilicate glass layer of the N-type region is used as a first mask layer, and the P-type region is polished, so that a polished structure is formed in the P-type region; forming a second mask layer on the phosphorosilicate glass layer and the polishing structure; and under the protection effect of the second mask layer, texturing the second surface of the P-type silicon wafer, so that a textured structure is formed on the second surface. The phosphorosilicate glass layer protects the N-type region, and the P-type region forms a polishing structure, so that better contact with electrode slurry in the later period is facilitated. The phosphorosilicate glass layer and the polishing structure are protected by the second mask layer, so that the adjusting range of the second surface texturing parameter is enlarged.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic technology, and in particular to a preparation method of a P-type solar cell and a P-type solar cell. Background Art

[0002] IBC (Interdigitated back contact) cell is the abbreviation of full back electrode contact crystalline silicon solar cell. The characteristics of IBC cell are that there is no grid line on the light-facing side, and the positive and negative metal grid lines on the back-facing side are arranged in a finger-like cross pattern. Therefore, the light-facing side of the IBC cell facing the sun is completely black, and no metal grid lines can be seen. This structure makes the light-facing side of the IBC cell "zero shielding", thereby increasing the absorption and utilization of light, bringing higher power generation efficiency under the same area, and more beautiful appearance.

[0003] Due to the poor solubility of phosphorus and silicon, phosphorus is unevenly distributed when the rod is pulled, and the quality of the N-type silicon wafers finally cut is not high, resulting in poor quality of IBC batteries prepared using N-type silicon wafers.

[0004] In the prior art, during the preparation of a P-type IBC cell made from a P-type silicon wafer, after the P-type region and the N-type region on the backlight side are formed, the light-facing side needs to be textured. Usually, the P-type region and the light-facing side are textured together. However, during the texture process, the impact on the N-type region on the backlight side needs to be considered, and the texture parameters can only be adjusted within a limited range. In addition, the P-type region is a velvet structure, and the contact effect between the P-type region and the electrode slurry during the electrode preparation process is poor, which affects the photoelectric conversion efficiency of the P-type IBC cell. Summary of the invention

[0005] The present invention provides a method for preparing a P-type solar cell and a P-type solar cell, aiming to solve the problems in the prior art that in the preparation process of a P-type IBC cell, when texturing, it is necessary to consider the influence on the N-type area of ​​the backlight surface, and the texturing parameters can only be adjusted within a limited range, and the P-type area has a velvet structure, and the contact effect between the P-type area and the electrode slurry during the preparation of the electrode is poor, which affects the photoelectric conversion efficiency of the P-type IBC cell.

[0006] A first aspect of the present invention provides a method for preparing a P-type solar cell, the method comprising:

[0007] A P-type silicon wafer is provided, wherein the first surface of the P-type silicon wafer comprises: a P-type region and an N-type region; the N-type region on the first surface of the P-type silicon wafer is sequentially stacked with a tunneling oxide layer, a phosphorus-doped polysilicon layer, and a phosphorus-silicon glass layer; and the P-type region on the first surface of the P-type silicon wafer is exposed;

[0008] Using the phosphosilicate glass layer of the N-type region as a first mask layer, polishing the P-type region so that the P-type region forms a polishing structure; forming a second mask layer on the phosphosilicate glass layer and the polishing structure;

[0009] Under the protection of the second mask layer, the second surface of the P-type silicon wafer is textured so that the second surface forms a textured structure; the first surface and the second surface are relatively distributed.

[0010] In the present invention, a P-type silicon wafer is provided, wherein the first surface of the P-type silicon wafer comprises: a P-type region and an N-type region; a tunneling oxide layer, a phosphorus-doped polysilicon layer, and a phosphosilicate glass layer are sequentially stacked in the N-type region of the first surface of the P-type silicon wafer; the P-type region of the first surface of the P-type silicon wafer is exposed; the phosphosilicate glass layer of the N-type region is used as a first mask layer to polish the P-type region so that the P-type region forms a polishing structure; the formation of the polishing structure of the P-type region facilitates better contact between the P-type region and the electrode slurry during the subsequent preparation of the electrode, thereby improving the photoelectric conversion efficiency of the P-type solar cell; the phosphosilicate glass layer of the N-type region is used as a first mask layer to protect the N-type region and prevent the structure of the N-type region from being damaged during polishing. A second mask layer is formed on the phosphosilicate glass layer and the polishing structure, and the second mask layer can protect the phosphosilicate glass layer and the polishing structure; under the protection of the second mask layer, the second surface of the P-type silicon wafer is textured so that a velvet structure is formed on the second surface; the formation of the velvet structure on the second surface can enhance light absorption and improve the photoelectric conversion efficiency of the P-type solar cell; because the phosphosilicate glass layer and the polishing structure are protected by the second mask layer, the adjustment range of the second surface texture parameters can be increased and the texture process window can be widened.

[0011] Optionally, the time for polishing the P-type region is 1 min to 10 min, and the temperature for polishing the P-type region is 50° C. to 70° C.

[0012] Optionally, forming a second mask layer on the phosphosilicate glass layer and the polishing structure includes:

[0013] The phosphosilicate glass layer and the polishing structure are oxidized to form a second mask layer on the phosphosilicate glass layer and the polishing structure.

[0014] Optionally, the temperature for oxidizing the phosphosilicate glass layer and the polishing structure is 700° C. to 900° C., and the time for oxidizing the phosphosilicate glass layer and the polishing structure is 5 min to 30 min.

[0015] Optionally, the second mask layer has a thickness of 10 nm to 50 nm.

[0016] Optionally, the temperature for texturing the second surface of the P-type silicon wafer is 70° C. to 85° C., and the time for texturing the second surface of the P-type silicon wafer is 300s to 600s.

[0017] Optionally, after texturing the second surface of the P-type silicon wafer, the method further comprises:

[0018] removing the second mask layer and the phosphosilicate glass layer in the N-type region;

[0019] An aluminum oxide layer and a silicon nitride layer are sequentially stacked on both sides of the P-type silicon wafer;

[0020] Prepare electrodes.

[0021] Optionally, the P-type region and the N-type region are formed by a laser ablation process.

[0022] A second aspect of the present invention provides a P-type solar cell, which is prepared by the method for preparing a P-type solar cell as described in the first aspect.

[0023] Optionally, the P-type solar cell includes a P-type full back electrode contact crystalline silicon solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative labor.

[0025] Figure 1 A flowchart showing a method for preparing a P-type solar cell according to an embodiment of the present invention is shown;

[0026] Figure 2 A schematic structural diagram of a P-type full back electrode contact crystalline silicon solar cell according to an embodiment of the present invention is shown;

[0027] Figure 3 A flow chart showing the steps of another method for preparing a P-type solar cell in an embodiment of the present invention is shown.

[0028] Description of reference numerals:

[0029] 10-P-type silicon wafer, 11-tunneling oxide layer, 12-phosphorus-doped polysilicon layer, 13-aluminum oxide layer, 14-silicon nitride layer, 15-silver electrode, 16-aluminum electrode. DETAILED DESCRIPTION

[0030] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0031] The present invention provides a method for preparing a P-type solar cell. Figure 1 , Figure 1 A flowchart of a method for preparing a P-type solar cell in an embodiment of the present invention is shown, and the method includes:

[0032] Step 101, providing a P-type silicon wafer 10, wherein the first surface of the P-type silicon wafer 10 includes: a P-type region and an N-type region; the N-type region in the first surface of the P-type silicon wafer 10 is sequentially stacked with a tunneling oxide layer 11, a phosphorus-doped polysilicon layer 12, and a phosphosilicate glass layer; the P-type region in the first surface of the P-type silicon wafer 10 is exposed.

[0033] The first surface of the P-type silicon wafer 10 may be a light-facing surface or a light-backward surface of the P-type silicon wafer 10 .

[0034] Step 102, using the phosphosilicate glass layer in the N-type region as a first mask layer, polishing the P-type region so that the P-type region forms a polishing structure; and forming a second mask layer on the phosphosilicate glass layer and the polishing structure.

[0035] The P-type region forms a polishing structure, which is convenient for the P-type region to form better contact with the electrode slurry during the later preparation of the electrode, which can improve the photoelectric conversion efficiency of the P-type solar cell; the phosphosilicate glass layer in the N-type region is used as the first mask layer to protect the N-type region and prevent the structure of the N-type region from being damaged during polishing. A second mask layer is formed on the phosphosilicate glass layer and the polishing structure to protect the phosphosilicate glass layer and the polishing structure. The second mask layer can be a silicon oxide layer, which has strong alkali resistance.

[0036] Step 103, under the protection of the second mask layer, texturing is performed on the second surface of the P-type silicon wafer 10 so that the second surface forms a texturing structure; the first surface and the second surface are arranged relative to each other.

[0037] The second surface can be the light-facing surface or the backlight surface of the P-type silicon wafer 10. The formation of a velvet structure on the second surface can enhance light absorption and improve the photoelectric conversion efficiency of the P-type solar cell; because the phosphorus silicon glass layer and the polishing structure are protected by the second mask layer, the adjustment range of the second surface velvet parameters can be increased, and the velvet process window is widened. The first surface and the second surface are relatively distributed, when the first surface is the light-facing surface, the second surface is the backlight surface; when the first surface is the backlight surface, the second surface is the light-facing surface.

[0038] The inventors found that in the prior art, during the preparation of a P-type IBC battery prepared using a P-type silicon wafer 10, after the P-type region and the N-type region on the backlight side are formed, the light-facing side needs to be textured. Usually, the P-type region and the light-facing side are textured together. However, during the texture, the impact on the N-type region on the backlight side needs to be considered, and the texture parameters can only be adjusted within a limited range. In addition, the P-type region is a velvet structure, and the contact effect between the P-type region and the electrode slurry during the electrode preparation process is poor, which affects the photoelectric conversion efficiency of the P-type IBC battery.

[0039] In view of the above problems, after the P-type region and the N-type region are formed, the inventor creatively polishes the P-type region so that the P-type region forms a polishing structure, and then forms a second mask layer on the phosphosilicate glass layer and the polishing structure, and then the second surface of the P-type silicon wafer 10 is textured. In an embodiment of the present invention, a P-type silicon wafer 10 is provided, and the first surface of the P-type silicon wafer 10 includes: a P-type region and an N-type region; the N-type region in the first surface of the P-type silicon wafer 10 is sequentially stacked with a tunneling oxide layer 11, a phosphorus-doped polysilicon layer 12, and a phosphosilicate glass layer; the P-type region in the first surface of the P-type silicon wafer 10 is exposed; the phosphosilicate glass layer in the N-type region is used as the first mask layer to polish the P-type region so that the P-type region forms a polishing structure; the P-type region forms a polishing structure, which is convenient for the P-type region to form better contact with the electrode slurry during the later preparation of the electrode, which can improve the photoelectric conversion efficiency of the P-type solar cell; the phosphosilicate glass layer in the N-type region is used as the first mask layer to protect the N-type region to prevent the structure of the N-type region from being damaged during polishing. A second mask layer is formed on the phosphosilicate glass layer and the polishing structure, and the second mask layer can protect the phosphosilicate glass layer and the polishing structure; under the protection of the second mask layer, the second surface of the P-type silicon wafer 10 is textured so that a velvet structure is formed on the second surface; the velvet structure formed on the second surface can enhance light absorption and improve the photoelectric conversion efficiency of the P-type solar cell; because the phosphosilicate glass layer and the polishing structure are protected by the second mask layer, the adjustment range of the second surface texture parameters can be increased and the texture process window can be widened.

[0040] Optionally, the time for polishing the P-type region is 1 min to 10 min, and the temperature for polishing the P-type region is 50°C to 70°C. For example, the time for polishing the P-type region may be 1 min, or 2 min, or 4 min, or 6 min, or 8 min, or 10 min, and the temperature for polishing the P-type region may be 50°C (degrees Celsius), or 52°C, or 55°C, or 60°C, or 65°C, or 70°C. The time for polishing the P-type region is 1 min to 10 min, which can ensure that the P-type region forms a polishing structure while avoiding a too long process time; the temperature for polishing the P-type region is 50°C to 70°C, which can ensure a fast polishing rate while avoiding a too high temperature, which makes the polishing rate too fast and forms over-polishing of the P-type region.

[0041] Optionally, forming a second mask layer on the phosphosilicate glass layer and the polishing structure includes: oxidizing the phosphosilicate glass layer and the polishing structure, and forming the second mask layer on the phosphosilicate glass layer and the polishing structure.

[0042] The second mask layer can be formed directly on the phosphosilicate glass layer and the polishing structure by oxidizing the phosphosilicate glass layer and the polishing structure. The preparation process is relatively simple. When the second surface is textured with an alkaline solution, the second mask layer can play a good protective role for the phosphosilicate glass layer and the polishing structure.

[0043] Optionally, the temperature for oxidizing the phosphosilicate glass layer and the polishing structure is 700°C to 900°C, and the time for oxidizing the phosphosilicate glass layer and the polishing structure is 5 minutes to 30 minutes. For example, the temperature for oxidizing the phosphosilicate glass layer and the polishing structure can be 700°C, or 740°C, or 780°C, or 820°C, or 860°C, or 900°C, and the time for oxidizing the phosphosilicate glass layer and the polishing structure can be 5 minutes, or 10 minutes, or 15 minutes, or 20 minutes, or 25 minutes, or 30 minutes. The temperature for oxidizing the phosphosilicate glass layer and the polishing structure is 700°C to 900°C, and the oxidation temperature is relatively low, which can improve the life of the oxidation furnace tube and the stability of the machine; the time for oxidizing the phosphosilicate glass layer and the polishing structure is 5 minutes to 30 minutes, which can ensure that the thickness of the second mask layer is relatively thick while avoiding too long a process time.

[0044] Optionally, the thickness of the second mask layer is 10 nm to 50 nm. For example, the thickness of the second mask layer may be 10 nm (nanometer), or 15 nm, or 20 nm, or 30 nm, or 40 nm, or 50 nm. The thickness of the second mask layer is 10 nm to 50 nm. The second mask layer is thicker, has stronger alkali resistance, and has stronger protection for the phosphosilicate glass layer and the polishing structure. At the same time, the second mask layer is not too thick, which makes it difficult to remove in the later stage and takes a long process time for oxidation.

[0045] Optionally, the temperature for texturing the second surface of the P-type silicon wafer 10 is 70° C. to 85° C., and the time for texturing the second surface of the P-type silicon wafer 10 is 300 s to 600 s. For example, the temperature for texturing the second surface of the P-type silicon wafer 10 can be 70° C., or 73° C., or 75° C., or 78° C., or 80° C., or 85° C., and the time for texturing the second surface of the P-type silicon wafer 10 can be 300 s (seconds), or 360 s, or 420 s, or 480 s, or 540 s, or 600 s. The temperature for texturing the second surface of the P-type silicon wafer 10 is 70°C to 85°C. The higher the temperature, the faster the texturing speed, and the second surface can quickly form a velvet structure. At the same time, it can avoid excessive corrosion of the second surface when the temperature is too high, making the P-type silicon wafer 10 thinner. The time for texturing the second surface of the P-type silicon wafer 10 is 300s to 600s, which can ensure that the second surface forms a complete velvet structure and at the same time avoid the process time being too long.

[0046] Optionally, after the second surface of the P-type silicon wafer 10 is textured, the method further includes: removing the second mask layer and the phosphosilicate glass layer in the N-type region; sequentially stacking an aluminum oxide layer 13 and a silicon nitride layer 14 on both sides of the P-type silicon wafer 10; and preparing an electrode.

[0047] Removing the second mask layer and the phosphorus silicon glass layer in the N-type region facilitates the subsequent process and can also prevent the phosphorus silicon glass layer from affecting the performance of the P-type solar cell. The aluminum oxide layer 13, as a passivation layer, can play a good passivation role; the silicon nitride layer 14 can play a passivation role and also play an anti-reflection role, thereby improving the photoelectric conversion efficiency of the P-type solar cell; the electrode is prepared so that a current can be formed, so that the P-type solar cell can achieve photoelectric conversion.

[0048] Optionally, the P-type region and the N-type region are formed by a laser ablation process. The laser ablation process refers to the use of a high energy density laser beam to irradiate the surface of the processed material. The surface of the material absorbs the laser energy, the temperature rises, and melts, ablates, and evaporates, thereby achieving the purpose of removing the surface layer. The P-type region and the N-type region are formed by a laser ablation process, and the laser damage formed in the P-type region can be removed by polishing the P-type region, thereby improving the photoelectric conversion efficiency of the P-type solar cell.

[0049] Optionally, the surface of the N-type region in the first surface of the P-type silicon wafer 10 that contacts the tunnel oxide layer 11 is a polished structure. The P-type region is also a polished structure, and the passivation effect of the polished structure is better than that of the velvet structure, thereby greatly improving the passivation effect of the first surface. In addition, the N-type region and the P-type region are in better contact with the electrode slurry, thereby improving the photoelectric conversion efficiency of the P-type solar cell.

[0050] The embodiment of the present invention also provides a P-type solar cell, which is prepared by the above-mentioned preparation method of the P-type solar cell. By using the preparation method of the P-type solar cell in the embodiment of the present invention, a polishing structure is formed in the P-type region, so that when the electrode is prepared later, the P-type region forms a better contact with the electrode slurry; because the phosphosilicate glass layer and the polishing structure are protected by the second mask layer, the adjustment range of the second surface texturing parameters can be increased, and the texturing process window is widened, thereby improving the photoelectric conversion efficiency of the P-type solar cell.

[0051] Optionally, the P-type solar cell includes a P-type full back electrode contact crystalline silicon solar cell. The characteristic of the IBC cell is that there is no grid electrode on the light-facing surface, and the positive and negative electrodes are cross-arranged on the backlight side. This structure makes the IBC cell "zero shading" on the light-facing side, thereby increasing the absorption and utilization of light and achieving a significant improvement in the photoelectric conversion efficiency. The light-facing surface of the battery is a velvet structure, and the P-type area on the backlight surface is a polished structure. Before polishing the P-type area, the P-type area and the N-type area with a phosphorus-doped polysilicon layer 12 can be obtained by ion implantation, laser etching, mask protection, wet etching and other technologies, so that the contact electrodes of the PN junction, the substrate and the emitter area form a cross-finger shape. Refer to Figure 2 , Figure 2A schematic structural diagram of a P-type full back electrode contact crystalline silicon solar cell in an embodiment of the present invention is shown, and the P-type full back electrode contact crystalline silicon solar cell comprises: a P-type silicon wafer 10, a tunneling oxide layer 11, a phosphorus-doped polycrystalline silicon layer 12, an aluminum oxide layer 13, and a silicon nitride layer 14; the backlight side of the P-type silicon wafer 10 comprises: a P region and an N region; the tunneling oxide layer 11, the phosphorus-doped polycrystalline silicon layer 12, the aluminum oxide layer 13, and the silicon nitride layer 14 are sequentially stacked on the N region on the backlight side of the P-type silicon wafer 10; the aluminum oxide layer 13 and the silicon nitride layer 14 are sequentially stacked on the P region on the backlight side of the P-type silicon wafer 10; the aluminum oxide layer 13 and the silicon nitride layer 14 are sequentially stacked on the light-facing side of the P-type silicon wafer 10; the P region on the backlight side of the P-type silicon wafer 10 is a polished structure; the light-facing side of the P-type silicon wafer 10 is a velvet structure, and a silver electrode 15 and an aluminum electrode 16 are provided on the backlight side of the P-type IBC cell. The method for preparing a P-type solar cell in the embodiment of the present invention can improve the photoelectric conversion efficiency of a P-type IBC cell. In the embodiment of the present invention, the type of solar cell can also be a solar cell that needs to form a P region and an N region in addition to a P-type IBC cell, and there is no restriction on the type of solar cell.

[0052] The present invention will be further explained below in conjunction with specific embodiments. Figure 3 , Figure 3 A flowchart of another method for preparing a P-type solar cell in an embodiment of the present invention is shown. The P-type solar cell is specifically a P-type IBC cell. The first surface of the P-type silicon wafer 10 is the backlight surface of the P-type silicon wafer 10, and the second surface of the P-type silicon wafer 10 is the light-facing surface of the P-type silicon wafer 10. The method specifically includes the following steps:

[0053] S1, performing double-sided alkaline polishing on the P-type silicon wafer 10, so that the light-facing surface and the backlight surface of the P-type silicon wafer 10 form a flat polishing morphology;

[0054] S2, growing a tunnel oxide layer 11 and a polysilicon layer on the backlight side and the light-facing side of the P-type silicon wafer 10, then performing phosphorus doping treatment on the polysilicon layer on the backlight side to form a phosphorus doped polysilicon layer 12, and generating a phosphorus silicon glass layer on the side of the phosphorus doped polysilicon layer 12 away from the P-type silicon wafer 10, and forming an expanded phosphorus doped polysilicon layer 12 and a phosphorus silicon glass layer on the light-facing side;

[0055] S3, performing laser ablation on the backlight surface of the P-type silicon wafer 10, removing part of the tunnel oxide layer 11, the phosphorus-doped polysilicon layer 12, and the phosphorus silicon glass layer, so that part of the backlight surface is exposed to form a P-type area, and the other area outside the P-type area of ​​the backlight surface is an N-type area; forming sequentially arranged N-type areas and P-type areas on the backlight surface of the P-type silicon wafer 10;

[0056] S4, using the phosphorus silicon glass layer in the N-type region as the first mask layer, and polishing the P-type region with an alkaline solution, so that the P-type region forms a polishing structure, and removing a portion of the polysilicon layer on the light-facing surface of the P-type silicon wafer 10; the alkaline solution includes a potassium hydroxide solution and a protective additive, the volume ratio of the potassium hydroxide solution to the protective additive is 5:1, the volume fraction of the potassium hydroxide solution is 5%, the volume fraction of the protective additive is 1%, the polishing time is 5 minutes, and the temperature is 70° C. The composition of the protective additive is specifically shown in Table 1, and the protective additive has a good protective effect, which can prevent the N-type region structure from being damaged during the polishing of the P-type region with an alkaline solution;

[0057] S5, cleaning the P-type silicon wafer 10 after polishing, and then oxidizing the phosphosilicate glass layer and the polishing structure, the oxidation temperature is 700° C., the oxidation time is 30 minutes, and a second mask layer is formed on the phosphosilicate glass layer and the polishing structure;

[0058] S6. Using HF (hydrogen fluoride) solution to remove the second mask layer and the phosphorus silicon glass layer on the light-facing surface of the P-type silicon wafer 10, and under the protection of the second mask layer, using alkaline solution to texture the light-facing surface of the P-type silicon wafer 10, removing the phosphorus-doped polysilicon layer on the light-facing surface of the P-type silicon wafer 10 and the tunneling oxide layer and polysilicon layer on the light-facing surface, so that a texture structure is formed on the light-facing surface; the alkaline solution includes potassium hydroxide solution, a texturing additive, and water, wherein the volume proportion of the potassium hydroxide solution is 5%, the volume proportion of the texturing additive is 1.5%, and the rest is water, the texturing temperature is 70°C, and the texturing time is 600s; the composition of the texturing additive is specifically shown in Table 1;

[0059] S7, performing alkaline cleaning and HF solution cleaning on the P-type silicon wafer 10 after texturing, using potassium hydroxide solution and H2O2 (hydrogen peroxide) solution for alkaline cleaning to remove the residual texturing additives and some organic matter after texturing, and performing HF solution cleaning to remove the second mask layer and the phosphorus silicon glass layer in the N-type region;

[0060] S8, forming an aluminum oxide layer 13 and a silicon nitride layer 14 in sequence on both sides of the P-type silicon wafer 10;

[0061] S9. Metallizing the backlight surface of the P-type silicon wafer 10 with a burn-through silver-aluminum paste and a burn-through silver paste, respectively, to obtain a P+ electrode in contact with the P+ doped silicon layer and an N+ electrode in contact with the N+ doped silicon layer.

[0062] Table 1 Composition of Texturing Additives and Protective Additives

[0063]

[0064]

[0065] Each numerical value in Table 1 is the mass ratio of each component.

[0066] Optionally, in step S1, the size of the tower base block after polishing can be 6um (micrometer) to 12um, for example, the size of the tower base block after polishing can be 6um, or 7um, or 8um, or 10um, or 11um, or 12um. Optionally, in step S2, the thickness of the tunneling oxide layer 11 can be 1nm to 2nm, for example, the thickness of the tunneling oxide layer 11 can be 1nm, or 1.2nm, or 1.4nm, or 1.6nm, or 1.8nm, or 2nm, and the thickness of the polysilicon layer can be 50nm to 200nm, for example, the thickness of the polysilicon layer can be 50nm, or 80nm, or 100nm, or 150nm, or 180nm, or 200nm. Optionally, in step S4, the volume ratio of potassium hydroxide solution to the protective additive can be (5 to 10): 1, for example, the volume ratio of potassium hydroxide solution to the protective additive can be (5: 1), or (6: 1), or (7: 1), or (8: 1), or (9: 1), or (10: 1), the volume fraction of potassium hydroxide solution can be 1% to 5%, for example, the volume fraction of potassium hydroxide solution can be 1%, or 1.5%, or 2%, or 3%, or 4%, or 5%, the volume fraction of the protective additive can be 0.1% to 1%, for example, the volume fraction of the protective additive can be 0.1%, or 0.3%, or 0.5%, or 0.7%, or 0.9%, or 1%, and the potassium hydroxide solution can also be replaced by sodium hydroxide solution. The volume fraction of potassium hydroxide solution is low, so as to avoid the strong corrosion ability of potassium hydroxide solution, damage to the N-type region, and excessive corrosion of the P-type region. Volume fraction is a commonly used method for expressing solution concentration, which refers to: at a certain temperature and pressure, the volume of a pure substance divided by the sum of the volumes of the pure substances of each component in the mixture. Optionally, in step S6, the volume proportion of potassium hydroxide solution can be 0.5% to 5%, for example, the volume proportion of potassium hydroxide solution can be 0.5%, or 1.5%, or 2.5%, or 3.5%, or 4.5%, or 5%, the volume proportion of the texturing additive can be 0.1% to 1.5%, for example, the volume proportion of the texturing additive can be 0.1%, or 0.3%, or 0.5%, or 0.8%, or 1.0%, or 1.5%, and the potassium hydroxide solution can also be replaced by a sodium hydroxide solution. Optionally, in step S7, the potassium hydroxide solution can also be replaced by a sodium hydroxide solution. Optionally, in step S8, the thickness of the aluminum oxide layer 13 can be 2nm to 10nm, for example, the thickness of the aluminum oxide layer 13 can be 2nm, or 4nm, or 6nm, or 8nm, or 9nm, or 10nm, and the thickness of the silicon nitride layer 14 can be 65nm to 90nm, for example, the thickness of the silicon nitride layer 14 can be 65nm, or 70nm, or 75nm, or 80nm, or 85nm, or 90nm.

[0067] The P-type silicon wafer 10 is divided into two groups, one group is prepared according to the steps in the preparation method of the above-mentioned P-type solar cell as an experimental group, and the other group is prepared using the existing preparation method of the P-type solar cell as a comparative group. The steps of the existing preparation method of the P-type solar cell are as follows:

[0068] Steps S1 to S3 are the same as steps S1 to S3 in the above-mentioned method for preparing a P-type solar cell;

[0069] S4, using HF solution to remove the phosphosilicate glass layer on the light-facing surface of the P-type silicon wafer 10;

[0070] S5, using the phosphorus silicon glass layer in the N-type region as the first mask layer, using an alkaline solution to perform texturing on the P-type region and the light-facing surface of the P-type silicon wafer 10, removing the diffusion phosphorus-doped polysilicon layer on the light-facing surface of the P-type silicon wafer 10 and the tunneling oxide layer and polysilicon layer on the light-facing surface, so that the P-type region and the light-facing surface of the P-type silicon wafer 10 form a velvet structure, the alkaline solution includes a potassium hydroxide solution, a texturing additive, and water;

[0071] S6, performing alkaline cleaning and HF solution cleaning on the P-type silicon wafer 10 after texturing, using potassium hydroxide solution and H2O2 solution for alkaline cleaning to remove the residual texturing additives and some organic matter after texturing, and performing HF solution cleaning to remove the phosphorus silicon glass layer in the N-type region;

[0072] S7, the same as step S8 in the above-mentioned method for preparing a P-type solar cell;

[0073] S8 is the same as step S9 in the above-mentioned method for preparing a P-type solar cell.

[0074] The semi-finished products of the comparison group and the experimental group after the aluminum oxide layer 13 and the silicon nitride layer 14 were taken for passivation performance test, and the test conditions were the same; finally, the P-type IBC batteries prepared by the comparison group and the experimental group were taken for electrical performance test, and the test conditions were the same. The experimental results are as follows:

[0075] Table 2 Passivation performance data comparison and electrical performance data comparison

[0076]

[0077] In Table 2, IVoc (Implied Voc) refers to the simulated open circuit voltage, and Eta refers to the photoelectric conversion efficiency.

[0078] As can be seen from Table 2, the simulated open circuit voltage of the experimental group is improved compared with that of the control group, indicating that the passivation performance is improved by using the method for preparing a P-type solar cell according to the embodiment of the present invention. In addition, the photoelectric conversion efficiency of the experimental group is improved compared with that of the control group, indicating that the method for preparing a P-type solar cell according to the embodiment of the present invention can improve the photoelectric conversion efficiency. By using the method for preparing a P-type solar cell according to the embodiment of the present invention, a polishing structure is formed in the P-type region, and the P-type region forms a better contact with the electrode slurry; since the phosphosilicate glass layer and the polishing structure are protected by the second mask layer, the adjustment range of the second surface texturing parameters can be increased, and the texturing process window is widened, so that the photoelectric conversion efficiency of the P-type solar cell can be improved by adjusting the velvet structure.

[0079] It should be noted that the relevant parts of the aforementioned method for preparing a P-type solar cell and the P-type solar cell can be referred to each other and can achieve the same or similar effects.

[0080] It should be noted that, for the method embodiments, for the sake of simplicity of description, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the embodiments of the present application are not limited by the described order of actions, because according to the embodiments of the present application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present application.

[0081] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0082] It should be noted that, in this document, the terms "first", "second", etc. in the specification and claims are used to distinguish similar objects, rather than to describe a specific order or sequence. Moreover, the objects distinguished by "first", "second", etc. are usually of the same type, and the number of objects is not limited. For example, the second object can be one.

[0083] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, a magnetic disk, or an optical disk), and includes a number of instructions for enabling a terminal (which can be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to execute the methods described in each embodiment of the present invention.

[0084] The embodiments of the present invention are described above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific implementation modes, which are merely illustrative rather than restrictive. Under the guidance of the present invention, ordinary technicians in this field can also make many forms without departing from the scope of protection of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. A method for preparing a P-type solar cell, characterized in that: include: A P-type silicon wafer is provided, wherein the first surface of the P-type silicon wafer comprises: a P-type region and an N-type region; the N-type region on the first surface of the P-type silicon wafer is sequentially stacked with a tunneling oxide layer, a phosphorus-doped polysilicon layer, and a phosphorus-silicon glass layer; and the P-type region on the first surface of the P-type silicon wafer is exposed; Using the phosphosilicate glass layer of the N-type region as a first mask layer, polishing the P-type region so that the P-type region forms a polishing structure; forming a second mask layer on the phosphosilicate glass layer and the polishing structure; Under the protection of the second mask layer, the second surface of the P-type silicon wafer is textured so that the second surface forms a textured structure; the first surface and the second surface are relatively distributed.

2. The method for preparing a P-type solar cell according to claim 1, characterized in that: The time for polishing the P-type region is 1 min to 10 min, and the temperature for polishing the P-type region is 50° C. to 70° C.

3. The method for preparing a P-type solar cell according to claim 1, characterized in that: The forming of a second mask layer on the phosphosilicate glass layer and the polishing structure comprises: The phosphosilicate glass layer and the polishing structure are oxidized to form a second mask layer on the phosphosilicate glass layer and the polishing structure.

4. The method for preparing a P-type solar cell according to claim 3, characterized in that: The temperature for oxidizing the phosphosilicate glass layer and the polishing structure is 700° C. to 900° C., and the time for oxidizing the phosphosilicate glass layer and the polishing structure is 5 min to 30 min.

5. The method for preparing a P-type solar cell according to claim 1, characterized in that: The thickness of the second mask layer is 10 nm to 50 nm.

6. The method for preparing a P-type solar cell according to claim 1, characterized in that: The temperature for texturing the second surface of the P-type silicon wafer is 70° C. to 85° C., and the time for texturing the second surface of the P-type silicon wafer is 300s to 600s.

7. The method for preparing a P-type solar cell according to any one of claims 1 to 6, characterized in that: After texturing the second surface of the P-type silicon wafer, the method further comprises: removing the second mask layer and the phosphosilicate glass layer in the N-type region; An aluminum oxide layer and a silicon nitride layer are sequentially stacked on both sides of the P-type silicon wafer; Prepare electrodes.

8. The method for preparing a P-type solar cell according to any one of claims 1 to 6, characterized in that: The P-type region and the N-type region are formed by a laser ablation process.

9. A P-type solar cell, characterized in that: The P-type solar cell is prepared by the method for preparing the P-type solar cell according to any one of claims 1 to 8.

10. The P-type solar cell according to claim 9, characterized in that: The P-type solar cell comprises a P-type full back electrode contact crystalline silicon solar cell.

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