Back contact solar cell, photovoltaic module and preparation method
Through the use of a single-layer mask layer and a single-layer prefabricated dielectric layer, the preparation process of the back contact solar cell is simplified, the production efficiency and photoelectric conversion efficiency are improved, and the problem of many processes in the prior art is solved.
Patent Information
- Application Number
- CN202411297977.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-14
- Publication Date
- 2024-12-31
- Estimated Expiration
- 2044-09-14
AI Technical Summary
The existing back contact solar cells have a large number of processes, resulting in low production efficiency. Especially when using masking process to assist in forming doped conductive parts, multi-layer mask layer and prefabricated dielectric layer need to be prepared successively, increasing the number of processes. .
Using a single-layer mask layer and a single-layer prefabricated dielectric layer, the doped conductive parts are formed by laser removal and diffusion channels, simplifying the process, forming the first and second doped conductive parts, and forming a silicon glass layer on both sides of the tunneling layer , reduce the number of processes.
The production efficiency of back contact solar cells is improved, the number of processes is reduced, the preparation process is simplified, and the photoelectric conversion efficiency and output power are improved.
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Figure CN119230655A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of photovoltaic technology, and in particular to a back-contact solar cell, a photovoltaic module and a preparation method thereof. Background Art
[0002] The positive electrode and negative electrode of a back contact solar cell are both arranged on the back side of the cell. In the process of preparing a back contact solar cell, a mask process is required to assist in forming two doped regions, one of which is used for contacting the metallization of the positive electrode, and the other is used for contacting the metallization of the negative electrode. However, in the existing back contact solar cell preparation method, the number of steps required in the process of using a mask process to assist in forming the doped conductive part is relatively large, resulting in a low production efficiency of the back contact solar cell. Summary of the invention
[0003] In view of this, the present application provides a method for preparing a back-contact solar cell, a back-contact solar cell and a photovoltaic module, wherein the preparation method provided in the present application can improve the production efficiency of the back-contact solar cell.
[0004] In a first aspect, the present application provides a method for preparing a back-contact solar cell, the method comprising: providing a silicon substrate, a tunneling layer and a prefabricated dielectric layer, wherein the tunneling layer is located between the silicon substrate and the prefabricated dielectric layer; forming a patterned mask layer on a side of the prefabricated dielectric layer away from the tunneling layer, wherein the patterned mask layer is provided with a first diffusion channel, and a portion of the prefabricated dielectric layer corresponding to the first diffusion channel is a first portion to be diffused; diffusing conductive impurities into the first portion to be diffused through the first diffusion channel so that the first portion to be diffused becomes a first doped conductive portion, and on a side of the first doped conductive portion away from the tunneling layer and on the patterned mask layer A first silicon glass layer is formed on a side away from the tunneling layer; a part of the first silicon glass layer is removed by laser and a part of the patterned mask layer is irradiated to form a second diffusion channel spaced apart from the first diffusion channel, wherein a part of the prefabricated dielectric layer corresponding to the second diffusion channel is a second part to be diffused, and the second part to be diffused is spaced apart from the first doped conductive part; another conductive impurity is diffused into the second part to be diffused through the second diffusion channel to make the second part to be diffused become a second doped conductive part, and a second silicon glass layer is formed on a side of the second doped conductive part away from the tunneling layer and on a side of the first silicon glass layer away from the tunneling layer.
[0005] Optionally, the method of using laser to irradiate a portion of the patterned mask layer includes: using laser to remove a portion of the patterned mask layer to form a window that serves as part of a second diffusion channel; or, using laser to modify a portion of the patterned mask layer, wherein the portion of the patterned mask layer modified by the laser serves as part of the second diffusion channel.
[0006] Optionally, the method of forming a patterned mask layer on the side of the prefabricated dielectric layer facing away from the tunneling layer includes: forming a patterned mask layer on the side of the prefabricated dielectric layer facing away from the tunneling layer using a screen printing process or a transfer process; or, forming a prefabricated mask layer on the side of the prefabricated dielectric layer facing away from the tunneling layer using a deposition process or a coating process, and removing a portion of the prefabricated mask layer using a laser to form a patterned mask layer.
[0007] Optionally, conductive impurities including at least one element of the third main group are diffused into the first portion to be diffused, and conductive impurities including at least one element of the fifth main group are diffused into the second portion to be diffused; or, conductive impurities including at least one element of the fifth main group are diffused into the first portion to be diffused, and conductive impurities including at least one element of the third main group are diffused into the second portion to be diffused.
[0008] Optionally, after forming the second silicon glass layer, the preparation method further comprises: removing the second silicon glass layer, the first silicon glass layer and the patterned mask layer located on the side of the tunneling layer away from the silicon substrate by an acid pickling process.
[0009] Optionally, after forming the second silicon glass layer and before removing the second silicon glass layer, the first silicon glass layer and the patterned mask layer, the preparation method further includes: using an acid pickling process to remove the expansion layer located on the side of the silicon substrate away from the tunneling layer, wherein the expansion layer is sequentially formed in the process of forming the first doped conductive portion and in the process of forming the second doped conductive portion; and using an alkaline washing process to texturize the surface of the silicon substrate on the side away from the tunneling layer.
[0010] Optionally, after removing the second silicon glass layer, the first silicon glass layer and the patterned mask layer, the preparation method further includes: forming a passivation layer on the surface of the silicon substrate facing away from the tunneling layer, on the surface of the first doped conductive part facing away from the tunneling layer, on the surface of the second doped conductive part facing away from the tunneling layer, and on the surface of the prefabricated dielectric layer facing away from the tunneling layer.
[0011] Optionally, after forming the passivation layer, the preparation method further includes: forming a first metal electrode in a portion of the passivation layer located on a side of the tunneling layer away from the silicon substrate corresponding to the first doped conductive part, and making the first metal electrode in metallization contact with the first doped conductive part; forming a second metal electrode in a portion of the passivation layer located on a side of the tunneling layer away from the silicon substrate corresponding to the second doped conductive part, and making the second metal electrode in metallization contact with the second doped conductive part.
[0012] In a second aspect, the present application provides a back-contact solar cell, which is obtained by the method for preparing a back-contact solar cell described above, and the back-contact solar cell comprises a silicon substrate, a tunneling layer, a first doped conductive part, and a second doped conductive part. The tunneling layer is arranged on one side of the silicon substrate, the first doped conductive part is arranged on the side of the tunneling layer away from the silicon substrate, and the second doped conductive part is arranged on the side of the tunneling layer away from the silicon substrate. Among them, at least two first doped conductive parts and at least two second doped conductive parts are alternately arranged in sequence and spaced apart along a first direction, and the first direction is perpendicular to the thickness direction of the back-contact solar cell.
[0013] In a third aspect, the present application provides a photovoltaic module, which includes a cell string formed by electrically connecting a plurality of back-contact solar cells as described above.
[0014] Compared with the prior art which requires the preparation of at least two mask layers in succession to assist in forming the doped conductive part, the back-contact solar cell preparation method of the present application utilizes a single mask layer to assist in forming the doped conductive part (the first doped conductive part and the second doped conductive part). Accordingly, the method of the present application requires fewer steps for forming the doped conductive part. Therefore, the method of the present application can improve the production efficiency of the back-contact solar cells.
[0015] Compared with the prior art which requires the preparation of at least two prefabricated dielectric layers in succession to assist in forming the doped conductive part, the method for preparing the back-contact solar cell of the present application utilizes a single prefabricated dielectric layer to assist in forming the doped conductive part (the first doped conductive part and the second doped conductive part). Accordingly, the method of the present application requires fewer steps for forming the doped conductive part. Therefore, the method of the present application can improve the production efficiency of the back-contact solar cell. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.
[0017] Figure 1 It is a schematic diagram of the local structure of a silicon substrate, a tunneling layer and a prefabricated dielectric layer in a specific embodiment;
[0018] Figure 2 It is a schematic diagram of the local structure of a silicon substrate, a tunneling layer, a prefabricated dielectric layer and a patterned mask layer in a specific embodiment;
[0019] Figure 3It is a schematic diagram of the local structure of a silicon substrate, a tunneling layer, a prefabricated dielectric layer, a patterned mask layer, a first doped conductive portion and a first silicon glass layer in a specific embodiment;
[0020] Figure 4 It is a schematic diagram of the local structure of a silicon substrate, a tunneling layer, a prefabricated dielectric layer, a patterned mask layer, a first doped conductive portion and a first silicon glass layer in a specific embodiment, wherein a second diffusion channel is provided;
[0021] Figure 5 It is a schematic diagram of the local structure of a silicon substrate, a tunneling layer, a prefabricated dielectric layer, a patterned mask layer, a first doped conductive portion, a first silicon glass layer, a second doped conductive portion, and a second silicon glass layer in a specific embodiment;
[0022] Figure 6 It is a schematic diagram of a local structure of a silicon substrate, a tunneling layer, a prefabricated dielectric layer, a patterned mask layer, a first doped conductive portion and a first silicon glass layer in another specific embodiment, wherein another second diffusion channel is provided;
[0023] Figure 7 It is a schematic diagram of the local structure of a silicon substrate, a tunneling layer, a prefabricated dielectric layer and a prefabricated mask layer in a specific embodiment;
[0024] Figure 8 It is a schematic diagram of the partial structure of a silicon substrate, a tunneling layer, a prefabricated dielectric layer, a first doped conductive portion, and a second doped conductive portion in a specific embodiment;
[0025] Fig. 9 A schematic structural diagram of a back-contact solar cell provided in the present application in a specific embodiment;
[0026] Fig.10 It is a schematic diagram of the local structure of a silicon substrate, a tunneling layer, a first doped conductive portion, a second doped conductive portion and a trench in a specific embodiment;
[0027] Fig.11 It is a schematic diagram of the local structure of a silicon substrate, a tunneling layer, a first doped conductive portion, a second doped conductive portion, a passivation layer and a trench in a specific embodiment;
[0028] Fig.12 It is a schematic diagram of the local structure of a silicon substrate, a tunneling layer, a first doped conductive portion, a second doped conductive portion, a passivation layer, a first metal electrode, a second metal electrode and a trench in a specific embodiment;
[0029] Fig.13 is a schematic diagram of charge distribution and built-in electric field of a silicon substrate, a tunneling layer and a first doped conductive portion;
[0030] Fig.14 Schematic diagram of the charge distribution and built-in electric field of the silicon substrate, tunneling layer and second doped conductive part.
[0031] 10-Back contact solar cell;
[0032] 1-Silicon substrate;
[0033] 2- tunneling layer;
[0034] 3-prefabricated dielectric layer;
[0035] 3a-first doped conductive portion;
[0036] 3b-second doped conductive portion;
[0037] 3c-isolation part;
[0038] 4-patterned mask layer;
[0039] 4a-prefabricated mask layer;
[0040] 51-first diffusion channel;
[0041] 52-second diffusion channel;
[0042] 521-first window;
[0043] 522-second window;
[0044] 523-modified part;
[0045] 61- first silicon glass layer;
[0046] 62- a second silicon glass layer;
[0047] 71- first passivation layer;
[0048] 72- second passivation layer;
[0049] 81- third passivation layer;
[0050] 82- fourth passivation layer;
[0051] 91- a first metal electrode;
[0052] 92- a second metal electrode;
[0053] 10a-groove. DETAILED DESCRIPTION
[0054] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.
[0055] It should be clear that the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.
[0056] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.
[0057] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.
[0058] In a first aspect, an embodiment of the present application provides a method for preparing a back-contact solar cell, and the preparation method includes the following contents.
[0059] First, provide Figure 1 The silicon substrate 1 , the tunneling layer 2 and the prefabricated dielectric layer 3 are shown. The prefabricated dielectric layer 3 , the tunneling layer 2 and the silicon substrate 1 are stacked along a direction Y, and the tunneling layer 2 is located between the silicon substrate 1 and the prefabricated dielectric layer 3 .
[0060] The silicon substrate 1 may be an N-type substrate, and the silicon substrate 1 may be doped with at least one N-type element (element of the fifth main group in the periodic table of chemical elements), such as phosphorus, arsenic, antimony and other N-type elements. The tunneling layer 2 may include at least one of silicon oxide, silicon nitride and silicon oxynitride. The prefabricated dielectric layer 3a may include at least one of polycrystalline silicon, amorphous silicon and microcrystalline silicon.
[0061] Please refer to Figure 2 As shown, a patterned mask layer 4 is formed on the side of the prefabricated dielectric layer 3 away from the tunneling layer 2, and the patterned mask layer 4 is provided with a first diffusion channel 51. The patterned mask layer 4 has a blocking effect on the conductive impurities to be diffused in the subsequent diffusion process, that is, the portion of the prefabricated dielectric layer 3 covered by the patterned mask layer 4 will not be doped with conductive impurities in the subsequent diffusion process, and the portion of the prefabricated dielectric layer 3 exposed by the first diffusion channel 51 will be doped with conductive impurities in the subsequent diffusion process, that is, the portion of the prefabricated dielectric layer 3 corresponding to the first diffusion channel 51 is the first portion to be diffused.
[0062] Among them, the portion of the patterned mask layer 4 located between two adjacent first diffusion channels 51 and covering the prefabricated dielectric layer 3 is a gate line portion, and the width of the gate line portion in the direction X is 150um to 1500um, and can specifically be 150um, 200um, 250um, 300um, 350um, 400um, 450um, 500um, 550um, 600um, 650um, 750um, 800um, 850um, 900um, 950um, 1000um, 1100um, 1150um, 1200um, 1250um, 1300um, 1350um, 1400um, 1450um or 1500um.
[0063] In addition, the thickness of the patterned mask layer 4 in the direction Y is 1 um to 30 um, and specifically can be 1 um, 5 um, 10 um, 15 um, 20 um, 25 um or 30 um.
[0064] Please refer to Figure 3 As shown, conductive impurities are diffused into the first part to be diffused through the first diffusion channel 51 so that the first part to be diffused becomes a first doped conductive part 3a, and a first silicon glass layer 61 is formed on the side of the first doped conductive part 3a facing away from the tunneling layer 2 and on the side of the patterned mask layer 4 facing away from the tunneling layer 2.
[0065] The conductivity of the first doped conductive part 3a doped with conductive impurities is stronger than that of the prefabricated dielectric layer 3 not doped with conductive impurities, so that the first doped conductive part 3a serves as a part in contact with the metal electrode metallization in the subsequent metallization process. The conductive impurity elements doped in the first doped conductive part 3a may include at least one P-type element (the third main group element in the periodic table of chemical elements), such as boron, aluminum, gallium and other P-type elements. The concentration of the P-type element doped in the first doped conductive part 3a may be 1*10 19 at / cm 3 ~1*10 21 at / cm 3 , the concentration of P-type elements can be specifically 1*10 19 at / cm 3 , 2*10 19 at / cm 3 , 4*10 19 at / cm 3 , 6*10 19 at / cm 3 ,8*10 19 at / cm 3 , 1*10 20 at / cm 3 , 2*1020 at / cm 3 , 4*10 20 at / cm 3 , 6*10 20 at / cm 3 ,8*10 20 at / cm 3 or 1*10 21 at / cm 3 The first silicon glass layer 61 may be a borosilicate glass layer.
[0066] In addition, the thickness of the first silicon glass layer 61 in direction Y can be 10nm to 150nm, specifically 10nm, 20nm, 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm or 150nm.
[0067] Please refer to Figure 4 As shown, a part of the first silicon glass layer 61 and a part of the patterned mask layer 4 are removed by laser to form a second diffusion channel 52, and the first diffusion channel 51 and the second diffusion channel 52 are arranged at intervals in the direction X. Among them, the retained part of the first silicon glass layer 61 and the retained part of the patterned mask layer 4 have a blocking effect on the conductive impurities to be diffused in the subsequent diffusion process, that is, the part of the prefabricated dielectric layer 3 covered by the first silicon glass layer 61 and the patterned mask layer 4 will not be doped with conductive impurities in the subsequent diffusion process, and the first doped conductive part 3a is covered by the first silicon glass layer 61, and the first doped conductive part 3a will not be doped with conductive impurities in the subsequent diffusion process. The part of the prefabricated dielectric layer 3 exposed by the second diffusion channel 52 will be doped with conductive impurities in the subsequent diffusion process, that is, the part of the prefabricated dielectric layer 3 corresponding to the second diffusion channel 52 is the second part to be diffused, and the second part to be diffused is arranged at intervals from the first doped conductive part 3a in the direction X.
[0068] The first silicon glass layer 61 is partially removed by laser to form a first window 521 , and then the patterned mask layer 4 is partially removed by laser to form a second window 522 . The first window 521 and the second window 522 are connected to form a second diffusion channel 52 .
[0069] In addition, when the laser is sequentially irradiated on the surface of the first silicon glass layer 61 and the surface of the patterned mask layer 4, the laser will sequentially form a light spot on the surface of the two, and the size of the light spot in the direction X can be 150um to 1500um, specifically 150um, 200um, 250um, 300um, 350um, 400um, 450um, 500um, 550um, 600um, 650um, 700um, 750um, 800um, 850um, 900um, 950um, 1000um, 1050um, 1100um, 1150um, 1200um, 1250um, 1300um, 1350um, 1400um, 1450um or 1500um. However, the size of the light spot in the direction X must be less than Figure 2 The size of the middle grid line portion in the direction X is such that the laser can remove a portion of the patterned mask layer 4 .
[0070] Furthermore, the laser may specifically be a green laser, a violet laser or an infrared laser.
[0071] In addition, if the thickness of the first silicon glass layer 61 in the direction Y is too small, for example, less than 10 nm, it is difficult for the first silicon glass layer 61 to effectively block the conductive impurities to be diffused in the subsequent diffusion process for the first doped conductive portion 3a. If the thickness of the first silicon glass layer 61 in the direction Y is too large, for example, greater than 150 nm, it takes a lot of time in the subsequent process of removing the first silicon glass layer 61. Therefore, it is better that the thickness of the first silicon glass layer 61 in the direction Y is 10 nm to 150 nm.
[0072] Please refer to Figure 5 As shown, another conductive impurity is diffused into the second portion to be diffused through the second diffusion channel 52 so that the second portion to be diffused becomes a second doped conductive portion 3b, and a second silicon glass layer 62 is formed on the side of the second doped conductive portion 3b facing away from the tunneling layer 2 and on the side of the first silicon glass layer 61 facing away from the tunneling layer 2.
[0073] The conductivity of the second doped conductive part 3b doped with conductive impurities is stronger than that of the prefabricated dielectric layer 3 not doped with conductive impurities, so that the second doped conductive part 3b serves as a part in contact with another metal electrode in the subsequent metallization process. The conductive impurity elements doped in the second doped conductive part 3b may include at least one N-type element (element of the fifth main group in the periodic table of chemical elements), such as phosphorus, arsenic, antimony and other N-type elements. The concentration of the N-type element doped in the second doped conductive part 3b may be 1*10 19 at / cm 3 ~1*10 22 at / cm3 The concentration of N-type elements can be 1*10 19 at / cm 3 , 2*10 19 at / cm 3 , 4*10 19 at / cm 3 , 6*10 19 at / cm 3 ,8*10 19 at / cm 3 , 1*10 20 at / cm 3 , 2*10 20 at / cm 3 , 4*10 20 at / cm 3 , 6*10 20 at / cm 3 ,8*10 20 at / cm 3 , 1*10 21 at / cm 3 , 2*10 21 at / cm 3 , 4*10 21 at / cm 3 , 6*10 21 at / cm 3 ,8*10 21 at / cm 3 or 1*10 22 at / cm 3 The second silicon glass layer 62 may be a phosphosilicate glass layer.
[0074] In addition, please refer to Figure 5 As shown, the last undoped portion in the prefabricated dielectric layer 3 is used as a portion for isolating the first doped conductive portion 3a and the second doped conductive portion 3b.
[0075] Furthermore, the thickness of the second silicon glass layer 62 in the direction Y may be 10 nm to 120 nm, and specifically may be 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm or 120 nm.
[0076] Compared with the prior art which requires the preparation of at least two mask layers in succession to assist in forming the doped conductive part, the method for preparing the back-contact solar cell of the embodiment of the present application utilizes a single mask layer to assist in forming the doped conductive part (the first doped conductive part 3a and the second doped conductive part 3b). Accordingly, the method of the embodiment of the present application requires fewer steps for forming the doped conductive part. Therefore, the method of the embodiment of the present application can improve the production efficiency of the back-contact solar cell.
[0077] Compared with the prior art which requires the preparation of at least two prefabricated dielectric layers in succession to assist in forming the doped conductive part, the method for preparing the back-contact solar cell of the embodiment of the present application utilizes a single prefabricated dielectric layer 3 to assist in forming the doped conductive part (the first doped conductive part 3a and the second doped conductive part 3b). Accordingly, the method of the embodiment of the present application requires fewer steps for forming the doped conductive part. Therefore, the method of the embodiment of the present application can improve the production efficiency of the back-contact solar cell.
[0078] In other embodiments, the silicon substrate 1 may also be a P-type substrate, and the silicon substrate 1 may be doped with at least one P-type element (a third main group element in the periodic table of chemical elements), such as boron, aluminum, gallium, or other P-type elements.
[0079] The following content of this article is mainly described by taking the silicon substrate 1 as an N-type substrate as an example.
[0080] In other embodiments, the conductive impurity elements doped by the first doped conductive part 3a may also include at least one N-type element (element of the fifth main group in the periodic table of chemical elements), such as phosphorus, arsenic, antimony and other N-type elements. The conductive impurity elements doped by the second doped conductive part 3b may also include at least one P-type element (element of the third main group in the periodic table of chemical elements), such as boron, aluminum, gallium and other P-type elements. That is, the N-type element can be diffused first, and then the P-type element can be diffused.
[0081] The following content of this article is mainly described by taking “first diffusing P-type elements to form the first doped conductive part 3 a , and then diffusing N-type elements to form the second doped conductive part 3 b ” as an example.
[0082] In other embodiments, please refer to Figure 6 As shown, after the first silicon glass layer 61 is partially removed by laser to form the first window 521, the patterned mask layer 4 may be partially modified by laser. The portion of the patterned mask layer 4 modified by laser is the modified portion 523. The modified portion 523 is as shown in FIG. Figure 6Although the modified portion 523 is not removed by the laser, the modified portion 523 does not have a blocking effect on the conductive impurities to be diffused subsequently, that is, the modified portion 523 can be used as a part of the second diffusion channel 52, so that the conductive impurities to be diffused can be diffused into the prefabricated dielectric layer 3 through the first window 521 and the modified portion 523 in sequence to form the second doped conductive portion 3b.
[0083] Among them, the mechanism of using laser to form the modified part 523 is: microscopic holes will be formed inside the part of the patterned mask layer 4 irradiated by the laser, and the microscopic holes have no blocking effect on the conductive impurities to be diffused. Therefore, the part including the microscopic holes is called the modified part 523.
[0084] In addition, the power of the laser used to form the modified portion 523 is lower than the power of the laser used to remove the local structure. Therefore, by using the laser to modify the local part of the patterned mask layer 4, the prefabricated dielectric layer 3, the tunneling layer 2 and the silicon substrate 1 are not easily damaged by laser heat.
[0085] Regardless of whether the local structure of the target object is removed by laser or modified by laser, the local structure of the target object needs to be irradiated by laser.
[0086] Optionally, the method of forming the patterned mask layer 4 on the side of the prefabricated dielectric layer 3 facing away from the tunneling layer 2 may include:
[0087] A screen printing process or a transfer process is used to directly form a layer such as Figure 2 The patterned mask layer 4 shown is a patterned mask layer 4 directly provided with the first diffusion channel 51 .
[0088] If a screen printing process or a transfer process is used, the slurry used to form the patterned mask layer 4 can be a solid non-metallic compound mixed slurry, the solute includes at least one of non-metallic oxides, sulfides, nitrides, phosphides and borides, and the solvent includes at least one of water, styrene, perchloroethylene, trichloroethylene, ethylene glycol ether and triethanolamine.
[0089] Optionally, the method of forming the patterned mask layer 4 on the side of the prefabricated dielectric layer 3 facing away from the tunneling layer 2 may also include:
[0090] A deposition process or a coating process is used to form a layer such as Figure 7 The pre-made mask layer 4a shown in FIG. 1 is partially removed by laser to form a Figure 2 The patterned mask layer 4 is shown to be provided with a first diffusion channel 51 .
[0091] Optionally, in forming Figure 5 After forming the second silicon glass layer 62 as shown, the preparation method of the embodiment of the present application further comprises removing the second silicon glass layer 62, the first silicon glass layer 61 and the patterned mask layer 4 located on the side of the tunneling layer 2 away from the silicon substrate 1 by an acid pickling process. Figure 8 As shown, the first doped conductive portion 3a and the second doped conductive portion 3b are exposed.
[0092] Compared with the prior art which requires removing the first silicon glass layer and the second silicon glass layer in two steps, the preparation method of the embodiment of the present application removes the second silicon glass layer 62, the first silicon glass layer 61 and the patterned mask layer 4 at one time. The method of the embodiment of the present application requires fewer steps. Therefore, the method of the embodiment of the present application can improve the production efficiency of back-contact solar cells.
[0093] Optionally, after forming the second silicon glass layer 62 and before removing the second silicon glass layer 62, the first silicon glass layer 61 and the patterned mask layer 4, the preparation method of the embodiment of the present application further includes:
[0094] The wrapping layer (not shown in the figure) located on the side of the silicon substrate 1 away from the tunneling layer 2 is removed by an acid pickling process to expose the surface of the silicon substrate 1 on the side away from the tunneling layer 2 (i.e., the front or top surface of the silicon substrate 1). The wrapping layer is sequentially formed in the process of forming the first doped conductive portion 3a and in the process of forming the second doped conductive portion 3b, that is, the wrapping layer is two silicon glass layers, such as a borosilicate glass layer and a phosphosilicate glass layer.
[0095] Among them, the process for removing the expansion layer can be specifically chain single-sided acid etching, and the single-sided etching amount is 0.05g~0.5g, and can be specifically 0.05g, 0.1g, 0.15g, 0.2g, 0.25g, 0.3g, 0.35g, 0.4g, 0.45g or 5g, so that the reflectivity of the surface of the silicon substrate 1 away from the tunneling layer 2 side is 20%~40%, and can be specifically 21%, 22%, 23%, 24%, 25%, 26%, 27%, 28%, 29%, 30%, 31%, 32%, 33%, 34%, 35%, 36%, 37%, 38%, 39% or 40%.
[0096] After removing the expansion layer, the surface of the silicon substrate 1 facing away from the tunneling layer 2 is textured using an alkaline washing process so that the surface of the silicon substrate 1 facing away from the tunneling layer 2 is a velvet surface (the velvet surface has multiple micron-sized grooves). The velvet surface is used to improve the efficiency of light incident into the interior of the silicon substrate 1, so as to improve the efficiency of the silicon substrate 1 in generating photogenerated electrons and photogenerated holes, thereby improving the photoelectric conversion efficiency and output power of the back-contact solar cell to be prepared.
[0097] Among them, after texturing, the reflectivity of the surface of the silicon substrate 1 facing away from the tunneling layer 2 is 6% to 15%, specifically 6%, 7%, 8%, 9%, 10%, 11%, 12%, 13%, 14% or 15%.
[0098] In other embodiments, the second silicon glass layer 62, the first silicon glass layer 61, the patterned mask layer 4 and the wrap-around layer may be removed together by an acid pickling process, which may further improve the production efficiency of the back-contact solar cell.
[0099] Optionally, after removing the second silicon glass layer 62, the first silicon glass layer 61 and the patterned mask layer 4, the preparation method of the embodiment of the present application further includes: Fig. 9 As shown, a passivation layer (e.g., a first passivation layer 71, a second passivation layer 72, a third passivation layer 81, and a fourth passivation layer 82) is formed on the surface of the silicon substrate 1 on the side away from the tunneling layer 2, on the surface of the first doped conductive portion 3a on the side away from the tunneling layer 2, on the surface of the second doped conductive portion 3b on the side away from the tunneling layer 2, and on the surface of the prefabricated dielectric layer 3 on the side away from the tunneling layer 2.
[0100] Among them, the passivation layer can play the role of chemical passivation and field passivation to reduce the rate of recombination of holes and electrons at the interface in the silicon substrate 1. The passivation layer can include at least one of aluminum oxide and silicon nitride. If the passivation layer includes silicon nitride, the reflectivity of the passivation layer is low, which can improve the efficiency of light incident into the interior of the silicon substrate 1, so as to improve the efficiency of the silicon substrate 1 generating photogenerated electrons and photogenerated holes, thereby improving the photoelectric conversion efficiency and output power of the back contact solar cell to be prepared.
[0101] The embodiments of the present application do not limit the specific number of passivation layers to be prepared.
[0102] Optionally, after forming the passivation layer, the preparation method of the embodiment of the present application further includes:
[0103] Please refer to Fig. 9 As shown, a first metal electrode 91 is formed in a portion corresponding to the first doped conductive portion 3a in the passivation layer located on the side of the tunneling layer 2 away from the silicon substrate 1, and the first metal electrode 91 is in metallization contact with the first doped conductive portion 3a. A second metal electrode 92 is formed in a portion corresponding to the second doped conductive portion 3b in the passivation layer located on the side of the tunneling layer 2 away from the silicon substrate 1, and the second metal electrode 92 is in metallization contact with the second doped conductive portion 3b.
[0104] If the first doped conductive part 3a is doped with a P-type element, the first metal electrode 91 can be used as a positive electrode, and if the second doped conductive part 3b is doped with an N-type element, the second metal electrode 92 can be used as a negative electrode.
[0105] In addition, the required first metal electrode 91 and second metal electrode 92 may be formed by first printing a metal-containing paste and then sintering.
[0106] Optionally, before providing the silicon substrate 1, the tunneling layer 2 and the prefabricated dielectric layer 3, the preparation method of the embodiment of the present application may also include the content of preparing the silicon substrate 1, the tunneling layer 2 and the prefabricated dielectric layer 3. First, double-sided polishing of a silicon wafer is performed to serve as the silicon substrate 1. Then, a tunneling layer 2 is formed on one side of the silicon substrate 1 by a thermal oxidation method or a wet oxidation method. The ambient temperature required for preparing the tunneling layer 2 may be 500°C to 900°C, specifically 500°C, 520°C, 540°C, 560°C, 580°C, 600°C, 620°C, 640°C, 660°C, 680°C, 700°C, 720°C, 740°C, 760°C, 780°C, 800°C, 820°C, 840°C, 860°C, 880°C or 900°C. The thickness of the tunnel layer 2 in the direction Y can be 1nm to 2.5nm, specifically 1nm, 1.1nm, 1.2nm, 1.3nm, 1.4nm, 1.5nm, 1.6nm, 1.7nm, 1.8nm, 1.9nm, 2nm, 2.1nm, 2.2nm, 2.3nm, 2.4nm or 2.5nm. Next, a prefabricated dielectric layer 3 is formed on the side of the tunnel layer 2 away from the silicon substrate 1 by chemical vapor deposition. The chemical vapor deposition method can be specifically low pressure chemical vapor deposition (LPCVD), plasma enhanced chemical vapor deposition (PECVD), atmospheric pressure chemical vapor deposition (APCVD). The ambient temperature required for preparing the prefabricated dielectric layer 3 may be 500° C. to 700° C., specifically 500° C., 520° C., 540° C., 560° C., 580° C., 600° C., 620° C., 640° C., 660° C., 670° C. or 700° C. The thickness of the prefabricated dielectric layer 3 in the direction Y may be 30 nm to 500 nm, specifically 30 nm, 50 nm, 70 nm, 90 nm, 110 nm, 130 nm, 150 nm, 170 nm, 190 nm, 210 nm, 230 nm, 250 nm, 270 nm, 290 nm, 310 nm, 330 nm, 350 nm, 370 nm, 390 nm, 410 nm, 430 nm, 450 nm, 470 nm, 490 nm or 500 nm.
[0107] In other embodiments, after removing the second silicon glass layer 62, the first silicon glass layer 61 and the patterned mask layer 4, and before forming the passivation layer, the preparation method of the embodiment of the present application may also include: removing the prefabricated dielectric layer 3, removing the portion of the tunneling layer 2 corresponding to the prefabricated dielectric layer 3, and removing the local structure of the silicon substrate 1 corresponding to the prefabricated dielectric layer 3, so as to form Fig.10 The groove 10a shown in FIG. Fig.10 After the trench 10a is formed, Fig.11 The passivation layer shown in FIG. 1 (eg, the stacked first passivation layer 71 and the second passivation layer 72). Fig.11 After forming the passivation layer shown in FIG. 1 (eg, the stacked first passivation layer 71 and the second passivation layer 72), the Fig.12 The first metal electrode 91 and the second metal electrode 92 are shown. In this embodiment, the trench 10a can separate the first doped conductive part 3a and the second doped conductive part 3b.
[0108] From the above content, it can be seen that the preparation Fig. 9 The back contact solar cell shown is prepared as Fig.12 The back contact solar cell shown does not require removal of the prefabricated dielectric layer 3 or the so-called isolation portion 3c. Fig. 9 The number of steps required for the back-contact solar cell shown is relatively small, and accordingly, Fig. 9 The production efficiency of the back contact solar cell shown is relatively high.
[0109] In a second aspect, the present application provides a back-contact solar cell, which can be obtained by the preparation method described above. Fig. 9 As shown, the back contact solar cell 10 comprises a silicon substrate 1, a tunneling layer 2, a first doped conductive portion 3a, a second doped conductive portion 3b and an isolation portion 3c. The isolation portion 3c is a portion of the prefabricated dielectric layer 3 in the above-mentioned preparation method that is not finally doped with conductive impurities, that is, the isolation portion 3c can play a role of electrical insulation.
[0110] The first doped conductive part 3a, the second doped conductive part 3b and the isolation part 3c are all arranged on the side of the tunneling layer 2 away from the silicon substrate 1, and the first doped conductive part 3a, the isolation part 3c and the second doped conductive part 3b are alternately arranged in sequence along a first direction (direction X), and the first direction (direction X) is perpendicular to the thickness direction (direction Y) of the back contact solar cell 10.
[0111] If the first doped conductive part 3a contains P-type elements, the first doped conductive part 3a can be P-type polysilicon; if the second doped conductive part 3b contains N-type elements, the second doped conductive part 3b can be N-type polysilicon; if the silicon substrate 1 is an N-type substrate, the concentration of the N-type element in the second doped conductive part 3b needs to be greater than the concentration of the N-type element in the silicon substrate 1; the isolation part 3c is intrinsic polysilicon.
[0112] Please refer to Fig.13 As shown, the first doped conductive part 3a containing P-type elements and the tunneling layer 2 can form a tunneling passivation contact structure, and the tunneling passivation contact structure is used to passivate the contact surface between the silicon substrate 1 (N-type substrate) and the tunneling layer 2. In detail, the lattice of the tunneling layer 2 can be well matched with the lattice of the silicon substrate 1 to reduce the recombination center at the contact surface between the silicon substrate 1 and the tunneling layer 2 (the contact surface is prone to form recombination center energy levels due to the presence of impurities, and the recombination center energy levels are prone to cause electrons and holes to recombine), that is, the tunneling layer 2 can passivate the contact surface between the silicon substrate 1 and the tunneling layer 2 well to reduce the rate at which photogenerated electrons and photogenerated holes in the silicon substrate 1 recombine at the contact surface between the silicon substrate 1 and the tunneling layer 2. The following can be formed between the first doped conductive part 3a and the silicon substrate 1 (N-type substrate): Fig.13 The built-in electric field E1 shown, Fig.13 In the figure, "+" represents positive charge, and "-" represents negative charge. The built-in electric field E1 can prevent the photogenerated electrons in the silicon substrate 1 from moving toward the first doped conductive part 3a, and the built-in electric field E1 can attract the photogenerated holes in the silicon substrate 1 to move toward the first doped conductive part 3a. Although the tunneling layer 2 is between the silicon substrate 1 and the first doped conductive part 3a, the thickness of the tunneling layer 2 is relatively small. The electrons in the valence band in the first doped conductive part 3a (the electrons are different from the photogenerated electrons or free electrons in the conduction band) can approach the tunneling layer 2 under the action of the built-in electric field E1 and use the tunneling effect to pass through the tunneling layer 2 until they move into the silicon substrate 1. The electrons in the valence band after tunneling occupy the photogenerated holes in the silicon substrate 1. After the electrons in the valence band in the first doped conductive part 3a move, new holes will be generated in the first doped conductive part 3a. This phenomenon can also be regarded as equivalent to the photogenerated holes in the silicon substrate 1 moving into the first doped conductive part 3a. Therefore, the tunnel passivation contact structure formed by the tunneling layer 2 and the first doped conductive part 3a can improve the efficiency of the first doped conductive part 3a in collecting holes, so that the first doped conductive part 3a exhibits good positive electrical properties, which is beneficial to improve the photoelectric conversion efficiency and output power of the back-contact solar cell 10 to be prepared.
[0113] In addition, please refer to Fig.14As shown, the second doped conductive part 3b containing N-type elements and the tunneling layer 2 can also form a tunneling passivation contact structure, which is used to passivate the contact surface between the silicon substrate 1 (N-type substrate) and the tunneling layer 2. The passivation effect of the tunneling layer 2 has been described above and will not be repeated here. Fig.14 The built-in electric field E2 shown. The built-in electric field E2 can hinder the photogenerated holes in the silicon substrate 1 from moving toward the second doped conductive part 3b, and the built-in electric field E2 can attract the photogenerated electrons in the silicon substrate 1 to move toward the second doped conductive part 3b. Although the tunneling layer 2 is between the silicon substrate 1 and the first doped conductive part 3a, the thickness of the tunneling layer 2 is relatively small. Under the action of the built-in electric field E2, the photogenerated electrons in the silicon substrate 1 approach the tunneling layer 2 and use the tunneling effect to pass through the tunneling layer 2 until they move into the second doped conductive part 3b. Therefore, the tunneling passivation contact structure formed by the tunneling layer 2 and the second doped conductive part 3b can improve the efficiency of the second doped conductive part 3b in collecting electrons, so that the second doped conductive part 3b presents good negative charge, which is beneficial to improve the photoelectric conversion efficiency and output power of the back contact solar cell 10 to be prepared.
[0114] In other embodiments, the first doped conductive portion 3 a may also contain N-type elements, and correspondingly, the second doped conductive portion 3 b may also contain P-type elements.
[0115] In other embodiments, the silicon substrate 1 may also be a P-type substrate.
[0116] Referring to FIG9 , the back contact solar cell 10 may further include a first passivation layer 71, a second passivation layer 72, a third passivation layer 81, and a fourth passivation layer 82. The first passivation layer 71 is located on the side of the first doped conductive portion 3a, the second doped conductive portion 3b, and the isolation portion 3c away from the tunneling layer 2, and the second passivation layer 72 is located on the side of the first passivation layer 71 away from the tunneling layer 2. The first passivation layer 71 may include aluminum oxide, and the first passivation layer 71 may play a field passivation role. The second passivation layer 72 may include silicon nitride, and the second passivation layer 72 may play a role in reducing reflectivity. The third passivation layer 81 is located on the side of the silicon substrate 1 away from the tunneling layer 2, and the fourth passivation layer 82 is located on the side of the third passivation layer 81 away from the silicon substrate 1. The third passivation layer 81 may include aluminum oxide, and the third passivation layer 81 may play a field passivation role. The fourth passivation layer 82 may include silicon nitride, and the fourth passivation layer 82 may play a role in reducing reflectivity.
[0117] In other embodiments, the number of passivation layers on the top surface of the back contact solar cell 10 can also be three, four or five layers, etc. Similarly, the number of passivation layers on the bottom surface of the back contact solar cell 10 can also be three, four or five layers, etc.
[0118] Please refer to Fig. 9 As shown, the back contact solar cell 10 further includes a first metal electrode 91 and a second metal electrode 92. The first metal electrode 91 and the second metal electrode 92 are both located below or on the bottom surface of the silicon substrate 1. The first metal electrode 91 is in metallization contact with the first doped conductive portion 3a, and the second metal electrode 92 is in metallization contact with the second doped conductive portion 3b. If the first doped conductive portion 3a contains a P-type element, the first metal electrode 91 can be a positive electrode, and if the second doped conductive portion 3b contains an N-type element, the second metal electrode 92 can be a negative electrode.
[0119] Since the top surface of the back-contact solar cell 10 is not blocked by a metal electrode, a larger area of the top surface of the back-contact solar cell 10 is illuminated by sunlight. The back-contact solar cell 10 generates a larger number of photogenerated electrons and photogenerated holes per unit time. Accordingly, the photoelectric conversion efficiency and output power of the back-contact solar cell 10 are higher.
[0120] In other embodiments, the structure of the bottom surface of the back contact solar cell 10 may be provided as follows: Fig.12 As shown in the trench 10 a , the first doped conductive portion 3 a and the second doped conductive portion 3 b are separated by the trench 10 a .
[0121] regardless Fig. 9 The back contact solar cell shown is still Fig.12 In the back-contact solar cell shown, the first doped conductive portion 3a and the second doped conductive portion 3b are both spaced apart.
[0122] In a third aspect, an embodiment of the present application provides a photovoltaic module, which includes a laminate and a frame, and the frame is installed at the edge of the laminate. The laminate includes a stacked photovoltaic glass, a first encapsulation film, a battery string, a second encapsulation film and a backplane. Alternatively, the laminate includes a stacked first photovoltaic glass, a first encapsulation film, a battery string, a second encapsulation film and a second photovoltaic glass.
[0123] The cell string is formed by electrically connecting a plurality of back-contact solar cells as described above.
[0124] The photovoltaic module of the embodiment of the present application also includes the technical effects of the back-contact solar cell 10 described above, which will not be repeated here.
[0125] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A method for preparing a back contact solar cell, characterized in that: include: Providing a silicon substrate, a tunneling layer and a prefabricated dielectric layer, wherein the tunneling layer is located between the silicon substrate and the prefabricated dielectric layer; Forming a patterned mask layer on a side of the prefabricated dielectric layer away from the tunneling layer, wherein the patterned mask layer is provided with a first diffusion channel, and a portion of the prefabricated dielectric layer corresponding to the first diffusion channel is a first portion to be diffused; Diffusion of conductive impurities into the first portion to be diffused through the first diffusion channel, so that the first portion to be diffused becomes a first doped conductive portion, and a first silicon glass layer is formed on a side of the first doped conductive portion away from the tunneling layer and on a side of the patterned mask layer away from the tunneling layer; Using laser to remove a part of the first silicon glass layer and irradiate a part of the patterned mask layer to form a second diffusion channel spaced apart from the first diffusion channel, wherein a part of the prefabricated dielectric layer corresponding to the second diffusion channel is a second part to be diffused, and the second part to be diffused is spaced apart from the first doped conductive part; Another conductive impurity is diffused into the second portion to be diffused through the second diffusion channel to make the second portion to be diffused into a second doped conductive portion, and a second silicon glass layer is formed on a side of the second doped conductive portion facing away from the tunneling layer and on a side of the first silicon glass layer facing away from the tunneling layer.
2. The method for preparing a back contact solar cell according to claim 1, characterized in that: The method of using laser to irradiate a part of the patterned mask layer comprises: removing a portion of the patterned mask layer by laser to form a window as a part of the second diffusion channel; Alternatively, a portion of the patterned mask layer is modified by laser, wherein the portion of the patterned mask layer modified by the laser serves as a part of the second diffusion channel.
3. The method for preparing a back contact solar cell according to claim 1, characterized in that: The method of forming a patterned mask layer on a side of the prefabricated dielectric layer away from the tunneling layer comprises: Forming the patterned mask layer on a side of the prefabricated dielectric layer away from the tunneling layer by using a screen printing process or a transfer process; Alternatively, a prefabricated mask layer is formed on a side of the prefabricated dielectric layer away from the tunneling layer by using a deposition process or a coating process, and a part of the prefabricated mask layer is removed by using a laser to form the patterned mask layer.
4. The method for preparing a back contact solar cell according to claim 1, characterized in that: diffusing at least one conductive impurity of a third main group element into the first portion to be diffused, and diffusing at least one conductive impurity of a fifth main group element into the second portion to be diffused; Alternatively, conductive impurities including at least one element of the fifth main group are diffused into the first portion to be diffused, and conductive impurities including at least one element of the third main group are diffused into the second portion to be diffused.
5. The method for preparing a back contact solar cell according to any one of claims 1 to 4, characterized in that: After forming the second silicon glass layer, the preparation method further comprises: The second silicon glass layer, the first silicon glass layer and the patterned mask layer located on the side of the tunneling layer away from the silicon substrate are removed by an acid washing process.
6. The method for preparing a back contact solar cell according to claim 5, characterized in that: After forming the second silicon glass layer and before removing the second silicon glass layer, the first silicon glass layer and the patterned mask layer, the preparation method further includes: Using an acid pickling process to remove the winding and expansion layer located on the side of the silicon substrate away from the tunneling layer, wherein the winding and expansion layer is sequentially formed in the process of forming the first doped conductive portion and in the process of forming the second doped conductive portion; The surface of the silicon substrate on the side away from the tunneling layer is textured by using an alkali washing process.
7. The method for preparing a back contact solar cell according to claim 5, characterized in that: After removing the second silicon glass layer, the first silicon glass layer and the patterned mask layer, the preparation method further includes: A passivation layer is formed on a surface of the silicon substrate facing away from the tunneling layer, a surface of the first doped conductive portion facing away from the tunneling layer, a surface of the second doped conductive portion facing away from the tunneling layer, and a surface of the prefabricated dielectric layer facing away from the tunneling layer.
8. The method for preparing a back contact solar cell according to claim 7, characterized in that: After forming the passivation layer, the preparation method further comprises: Forming a first metal electrode at a portion of the passivation layer located on a side of the tunneling layer away from the silicon substrate corresponding to the first doped conductive portion, and making the first metal electrode in metallization contact with the first doped conductive portion; A second metal electrode is formed in a portion of the passivation layer located on a side of the tunneling layer away from the silicon substrate and corresponding to the second doped conductive portion, and the second metal electrode is in metallization contact with the second doped conductive portion.
9. A back contact solar cell, characterized in that: The back-contact solar cell is obtained by the method for preparing a back-contact solar cell according to any one of claims 1 to 8, and the back-contact solar cell comprises: Silicon substrate; A tunneling layer, disposed on one side of the silicon substrate; A first doped conductive portion is disposed on a side of the tunneling layer away from the silicon substrate; A second doped conductive portion is disposed on a side of the tunneling layer away from the silicon substrate; At least two of the first doped conductive parts and at least two of the second doped conductive parts are alternately arranged in sequence and spaced apart along a first direction, and the first direction is perpendicular to the thickness direction of the back contact solar cell.
10. A photovoltaic module, characterized in that: A cell string comprising the back-contact solar cells according to claim 9 electrically connected.
Citation Information
Patent Citations
Solar cell and method of manufacturing the same
CN106206838A
Diffusion and cleaning method for IBC solar cell
CN113363350A
Back contact solar cell and preparation method thereof
CN118248783A
Back-contact photovoltaic cell comprising a thin lamina having a superstrate receiver element
US20100229928A1
Highly efficient solar battery and preparation method therefor
WO2022100081A1
