Shut-off converter valve and overvoltage suppression method for the shut-off converter valve

Abstract

The present application provides a switchable converter valve and an overvoltage suppression method for the switchable converter valve, which relates to the field of high-voltage direct current transmission technology. The switchable converter valve includes: N2 switchable valve sections, each of which includes N1 switchable power semiconductor devices; a gate drive unit connected to the switchable power semiconductor devices, and configured to trigger the switchable power semiconductor devices to conduct when the voltage across the anode and cathode of the switchable power semiconductor devices is greater than a preset protective trigger action threshold, thereby achieving switchable power semiconductor device-level overvoltage suppression; a first lightning arrester connected in parallel with the N1 switchable power semiconductor devices connected in series to achieve switchable valve section-level overvoltage suppression; a second lightning arrester connected in parallel with the N2 switchable valve sections connected in series to achieve switchable single valve-level overvoltage suppression, and provides a constraint relationship between the three protections to solve the problem of overvoltage suppression during the switchable converter valve shutdown period.

Description

Technical Field

[0001] The present application relates to the technical field of high-voltage direct current transmission, and in particular to a switchable converter valve and an overvoltage suppression method for the switchable converter valve. Background Art

[0002] Line-commuted converters (LCCs) based on semi-controlled devices are widely used in DC transmission systems due to their low losses and low cost. The switching devices used in these converters can be either uncontrolled devices (such as diodes) or semi-controlled devices (such as thyristors). However, when operating in weak AC system connections or during AC system faults, these converters are prone to commutation failures due to AC system voltage disturbances.

[0003] To address commutation failures on the receiving side of DC transmission systems, some researchers have recently proposed using converter valves with controlled shutdown capabilities. Specifically, they add controlled shutdown devices to the existing converter valve bridge arms to achieve forced commutation, effectively preventing commutation failures. However, these new topologies are complex systems with numerous uncontrolled, semi-controlled, and fully controlled devices connected in series and parallel. Furthermore, forced shutdown of the controlled shutdown devices generates high overvoltages, which, if not mitigated, can lead to device breakdown and damage. Therefore, suppressing the overvoltage during shutdown of the controlled shutdown converter valves is a key technical challenge. Summary of the Invention

[0004] In order to solve at least one of the above problems, the present application proposes a switchable converter valve and an overvoltage suppression method for the switchable converter valve.

[0005] According to the first aspect of the present application, at least one embodiment of the present application provides a switchable converter valve, comprising: N2 switchable valve sections, N2 is an integer greater than or equal to 1, the N2 switchable valve sections are connected in series, each of the N2 switchable valve sections comprises N1 switchable power semiconductor devices, N1 is an integer greater than 1, the N1 switchable power semiconductor devices are connected in series; a gate drive unit, connected to the switchable power semiconductor device, for triggering the switchable power semiconductor device to conduct when the voltage across the anode and cathode of the switchable power semiconductor device is greater than a preset protective trigger action threshold. power semiconductor devices to achieve overvoltage suppression at the turnable power semiconductor device level; a first lightning arrester connected in parallel with the N1 turnable power semiconductor devices connected in series, for turning on the first lightning arrester when the terminal voltage of the N1 turnable power semiconductor devices is greater than the protective residual voltage of the first lightning arrester, so as to achieve overvoltage suppression at the turnable valve section level; a second lightning arrester connected in parallel with the N2 turnable valve sections connected in series, for turning on the second lightning arrester when the terminal voltage of the N2 turnable valve sections is greater than the protective residual voltage of the second lightning arrester, so as to achieve overvoltage suppression at the turnable single valve level.

[0006] For example, in some embodiments of the present application, it also includes: a DC equalizing resistor, connected in parallel with the turn-off power semiconductor device; a damping circuit, connected in parallel with the turn-off power semiconductor device, and the damping circuit includes a damping capacitor and a damping resistor connected in series.

[0007] For example, in some embodiments of the present application, the turn-off power semiconductor device includes at least one of an IGCT, an IGBT, an IGET, and a MOSFET.

[0008] According to the second aspect of the present application, at least one embodiment of the present application provides an overvoltage suppression method for a turnable converter valve, which is executed by the turnable converter valve as described in any one of the first aspects, and the overvoltage suppression method includes: when the gate drive unit detects that the voltage across the anode and cathode of the turnable power semiconductor device is greater than the protective trigger action threshold, the gate drive unit triggers the turnable power semiconductor device to turn on, so as to achieve overvoltage suppression at the turnable power semiconductor device level; when the terminal voltage of the N1 turnable power semiconductor devices is greater than the protective residual voltage of the first lightning arrester, the first lightning arrester is turned on, so as to achieve overvoltage suppression at the turnable valve section level; when the terminal voltage of the N2 turnable valve sections is greater than the protective residual voltage of the second lightning arrester, the second lightning arrester is turned on, so as to achieve overvoltage suppression at the turnable single valve level.

[0009] For example, in some embodiments of the present application, the protective trigger action threshold, the protective residual voltage of the first lightning arrester, and the protective residual voltage of the second lightning arrester satisfy the following constraints:

[0010]

[0011] Among them, U BOD is the protective trigger action threshold, U MOV1 is the protection residual voltage of the first lightning arrester, k1 is the deviation value of the protection trigger action threshold, U DRM is the off-state repetitive peak voltage of the turn-off power semiconductor device, k d is the voltage distribution unevenness coefficient of the components in the switchable converter valve, U MOV2 is the protection residual voltage of the second lightning arrester, N res is the device redundancy level of the said switchable converter valve, and k2 is the valve section voltage distribution uneven pressure coefficient in the said switchable converter valve.

[0012] For example, in some embodiments of the present application, the protection residual voltage of the first lightning arrester also satisfies the following constraints:

[0013]

[0014] Wherein, k3 is the uneven pressure coefficient when the shut-off power semiconductor device in the shut-off valve section is shut off.

[0015] For example, in some embodiments of the present application, the DC reference voltage of the first lightning arrester is higher than the voltage peak of the turn-off power semiconductor device during normal operation:

[0016]

[0017] Among them, U res is the DC reference voltage of the first lightning arrester, k4 is the charge rate of the first lightning arrester, U PCOV The maximum peak value of the continuous operating voltage of the switchable converter valve including the commutation overshoot.

[0018] For example, in some embodiments of the present application, the coordination current of the first lightning arrester under the protection residual voltage satisfies:

[0019] I MOV1 >k5·I off

[0020] Among them, I MOV1 is the matching current, k5 is the maximum turn-off current peak value of the turn-off power semiconductor device, I off is the withstand current of the turn-off power semiconductor device during the turn-off period.

[0021] For example, in some embodiments of the present application, the withstand energy of the first lightning arrester during the shutdown of the turn-off power semiconductor device satisfies:

[0022]

[0023] Among them, E MOV1 L is the withstand energy of the first lightning arrester during the shutdown period of the turn-off power semiconductor device, hx is the commutation inductance of the turn-off converter valve, and N3 is the number of times the turn-off power semiconductor device is continuously turned off.

[0024] For example, in some embodiments of the present application, the total withstand voltage value of the turn-off power semiconductor devices in the turn-off converter valve at the minimum number of series stages is higher than the withstand voltage level of the second lightning arrester:

[0025]

[0026] Among them, k m is the safety factor of the second lightning arrester under impulse voltage.

[0027] Through the above-mentioned example embodiments, the present application provides a switchable converter valve and an overvoltage suppression method for the switchable converter valve, which realizes overvoltage suppression at the switchable power semiconductor device level through protective triggering of the gate drive unit; realizes overvoltage suppression at the switchable valve section level through a first lightning arrester connected in parallel; realizes overvoltage suppression at the switchable single valve level through a second lightning arrester connected in parallel; and provides the constraint relationship between the above-mentioned triple protections to solve the problem of overvoltage suppression during the shutdown period of the new switchable converter valve.

[0028] It should be understood that the foregoing general description and the following detailed description are merely illustrative and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] By describing in detail exemplary embodiments thereof with reference to the accompanying drawings, the above and other objects, features and advantages of the present application will become more apparent. The drawings described below are only some embodiments of the present application, and are not intended to limit the present application.

[0030] Figure 1 A schematic diagram showing a topology of a switchable converter valve according to an exemplary embodiment is shown;

[0031] Figure 2 A flow chart showing an overvoltage suppression method for a turnable converter valve according to an exemplary embodiment is shown. DETAILED DESCRIPTION

[0032] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be embodied in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art. Like reference numerals in the drawings represent like or similar parts, and thus repetitive description thereof will be omitted.

[0033] The described features, structures or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present disclosure. However, those skilled in the art will appreciate that the technical solutions of the present disclosure may be practiced without one or more of these specific details, or other methods, components, materials, devices, etc. may be employed. In these cases, well-known structures, methods, devices, implementations, materials or operations will not be shown or described in detail.

[0034] The flowcharts shown in the accompanying drawings are for illustrative purposes only and do not necessarily include all contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps may be decomposed, while others may be combined or partially combined. Therefore, the actual execution order may vary depending on the actual situation.

[0035] The terms "first," "second," and the like in the specification and claims of this application and the accompanying drawings are used to distinguish between different objects, not to describe a particular order. Furthermore, the terms "including," "having," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements but may optionally include steps or elements not listed, or may optionally include other steps or elements inherent to the process, method, product, or apparatus.

[0036] Those skilled in the art will understand that the drawings are merely schematic diagrams of example embodiments, and the modules or processes in the drawings are not necessarily necessary for implementing the present application, and therefore cannot be used to limit the scope of protection of the present application.

[0037] Figure 1 A schematic diagram of a topology of a turnable converter valve according to an exemplary embodiment is shown.

[0038] like Figure 1As shown, the switchable converter valve includes: N2 switchable valve sections 11-1N2, where N2 is an integer greater than or equal to 1. The N2 switchable valve sections are connected in series. Each switchable valve section includes N1 switchable power semiconductor devices 111-11N1, where N1 is an integer greater than 1. The N1 switchable power semiconductor devices are connected in series. A first lightning arrester MOV1-11 to MOV1-1 N2, a second lightning arrester MOV2-1, and a gate drive unit.

[0039] The first lightning arrester is connected in parallel with N1 series-connected turn-off power semiconductor devices. When the terminal voltage of the N1 turn-off power semiconductor devices exceeds the protective residual voltage of the first lightning arrester, the first lightning arrester is turned on, thereby achieving overvoltage suppression at the turn-off valve stage level. The second lightning arrester is connected in parallel with N2 series-connected turn-off valve stages. When the terminal voltage of the N2 turn-off valve stages exceeds the protective residual voltage of the second lightning arrester, the second lightning arrester is turned on, thereby achieving overvoltage suppression at the turn-off single valve stage level. Taking the turn-off power semiconductor device 111 as an example, a gate drive unit 1111 is configured. Gate drive unit 1111 is configured to detect whether the voltage across the anode and cathode of the turn-off power semiconductor device 111 is greater than a preset protective triggering threshold. When the voltage across the anode and cathode of the turn-off power semiconductor device 111 is greater than the protective triggering threshold, the triggering power semiconductor device 111 is triggered to conduct.

[0040] According to some embodiments, taking the turnable power semiconductor device 111 as an example, the turnable converter valve further includes: a DC equalizing resistor 1112 and a damping circuit.

[0041] The DC voltage balancing resistor 1112 is connected in parallel with the turn-off power semiconductor device 111. The damping circuit is connected in parallel with the turn-off power semiconductor device 111. The damping circuit includes a damping capacitor 1113 and a damping resistor 1114 connected in series.

[0042] According to some embodiments, the turn-off power semiconductor device includes at least one of an IGCT, an IGBT, an IGET, and a MOSFET.

[0043] Figure 2 A flow chart showing an overvoltage suppression method for a turnable converter valve according to an exemplary embodiment is shown.

[0044] like Figure 2 As shown, the overvoltage suppression method for a turnable converter valve includes steps S1-S3.

[0045] In step S1 , power semiconductor device level overvoltage suppression may be turned off.

[0046] When the gate drive unit detects that the voltage across the anode and cathode of the turn-off power semiconductor device is greater than the protective trigger action threshold, the gate drive unit triggers the turn-off power semiconductor device to turn on, so as to achieve overvoltage suppression at the turn-off power semiconductor device level.

[0047] In step S2 , the valve section level overvoltage suppression may be turned off.

[0048] When the terminal voltage of the N1 turn-off power semiconductor devices is greater than the protection residual voltage of the first lightning arrester, the first lightning arrester is turned on to achieve overvoltage suppression at the turn-off valve stage.

[0049] In step S3 , the single-valve-level overvoltage suppression may be turned off.

[0050] When the terminal voltage of the N2 turn-off valve sections is greater than the protection residual voltage of the second lightning arrester, the second lightning arrester is turned on to achieve turn-off single valve level overvoltage suppression.

[0051] The protective triggering action threshold, the protective residual voltage of the first lightning arrester, and the protective residual voltage of the second lightning arrester must meet the following constraints:

[0052]

[0053] Among them, U BOD is the protective trigger action threshold, U MOV1 is the protective residual voltage of the first arrester, k1 is the deviation value of the protective trigger action threshold, U DRM is the off-state repetitive peak voltage of the turn-off power semiconductor device, k d is the voltage distribution unevenness coefficient of the components in the switchable converter valve, U MOV2 is the protection residual voltage of the second lightning arrester, N res is the device redundancy level of the switchable converter valve, which is a non-negative integer; k2 is the voltage distribution unevenness coefficient of the valve section in the switchable converter valve.

[0054] According to some embodiments, U DRM 、U MOV2 Usually it is a known parameter, given by U DRM 、U MOV2 Calculate U BOD 、U MOV1 .

[0055] According to some embodiments, the protection residual voltage of the first lightning arrester further satisfies the following constraints:

[0056]

[0057] Wherein, k3 is the uneven pressure coefficient when the power semiconductor device in the shutoff valve section is turned off. The more devices connected in series in the shutoff valve section, the greater the uneven pressure coefficient when the power semiconductor device is turned off.

[0058] According to some embodiments, when N1 is 2, k3 is 1.15, and when N1 is 3, k3 is 1.2.

[0059] According to some embodiments, the DC reference voltage of the first lightning arrester should be higher than the peak voltage of the turn-off power semiconductor device during normal operation:

[0060]

[0061] Among them, U res is the DC reference voltage of the first lightning arrester, k4 is the charge rate of the first lightning arrester, U PCOV The maximum peak value of the continuous operating voltage of the switchable converter valve including the commutation overshoot.

[0062] According to some embodiments, the coordination current of the first lightning arrester under the protection residual voltage satisfies:

[0063] I MOV1 >k5·I off

[0064] Among them, I MOV1 To match the current, k5 is the maximum turn-off current peak value of the power semiconductor device that can be turned off, I off It is the withstand current of the turn-off power semiconductor device during the turn-off period.

[0065] According to some embodiments, the withstand energy of the first lightning arrester during the shutdown of the turn-off power semiconductor device satisfies:

[0066]

[0067] Among them, E MOV1 L is the withstand energy of the first lightning arrester during the shutdown period of the turn-off power semiconductor device, hx is the commutation inductance of the turn-off valve, and N3 is the number of times the turn-off power semiconductor device is continuously turned off.

[0068] The total withstand voltage value of the switchable power semiconductor devices in the switchable converter valve at the minimum number of series stages should be higher than the withstand voltage level of the second lightning arrester:

[0069]

[0070] Among them, k m is the safety factor of the second arrester under impulse voltage.

[0071] According to some embodiments, kd 、k m , k1, k2, k3 are greater than or equal to 1, k4, k5 are positive numbers less than or equal to 1.

[0072] The present application provides a method for overvoltage suppression for a switchable converter valve, which achieves overvoltage suppression at the switchable power semiconductor device level through protective triggering of a gate drive unit; achieves overvoltage suppression at the switchable valve section level through a first lightning arrester connected in parallel; and achieves overvoltage suppression at the switchable single valve level through a second lightning arrester connected in parallel; and provides a constraint relationship between the above three protections to solve the problem of overvoltage suppression during the shutdown period of the new switchable converter valve.

[0073] It should be clearly understood that this application describes how to form and use specific examples, but this application is not limited to any details of these examples. On the contrary, based on the teaching of the content disclosed in this application, these principles can be applied to many other embodiments.

[0074] Furthermore, it should be noted that the aforementioned figures are merely illustrative of the processes included in the methods according to exemplary embodiments of the present application and are not intended to be limiting. It is readily understood that the processes illustrated in the aforementioned figures do not indicate or limit the temporal order of these processes. Furthermore, it is readily understood that these processes may be executed synchronously or asynchronously, for example, in multiple modules.

[0075] While the exemplary embodiments of the present application have been specifically illustrated and described above, it should be understood that the present application is not limited to the detailed structures, configurations, or implementations described herein; rather, the present application is intended to encompass various modifications and equivalent configurations within the spirit and scope of the appended claims.

Claims

1. A method for suppressing overvoltage of a switchable converter valve, characterized in that: The switchable converter valve includes a gate drive unit, a first lightning arrester, a second lightning arrester, and N2 switchable valve sections, where N2 is an integer greater than or equal to 1. Each of the N2 switchable valve sections includes N1 switchable power semiconductor devices, and the N2 switchable valve sections are connected in series. The gate drive unit is connected to the switchable power semiconductor devices. The first lightning arrester is connected in parallel to the N1 switchable power semiconductor devices connected in series, and the second lightning arrester is connected in parallel to the N2 switchable valve sections connected in series. N1 is an integer greater than 1. The overvoltage suppression method includes: When the gate drive unit detects that the voltage across the anode and cathode of the turn-off power semiconductor device is greater than a protective trigger action threshold, the gate drive unit triggers the turn-off power semiconductor device to turn on, so as to achieve overvoltage suppression at the turn-off power semiconductor device level; When the terminal voltage of the N1 turn-off power semiconductor devices is greater than the protection residual voltage of the first lightning arrester, the first lightning arrester is turned on to achieve overvoltage suppression at the turn-off valve stage level; When the terminal voltage of the N2 shutoff valve sections is greater than the protection residual voltage of the second lightning arrester, the second lightning arrester is turned on to achieve shutoff single valve level overvoltage suppression; The protective trigger action threshold, the protective residual voltage of the first lightning arrester, and the protective residual voltage of the second lightning arrester meet the following constraints: Among them, U BOD is the protective trigger action threshold, U MOV1 is the protection residual voltage of the first lightning arrester, k1 is the deviation value of the protection trigger action threshold, U DRM is the off-state repetitive peak voltage of the turn-off power semiconductor device, k d is the voltage distribution unevenness coefficient of the components in the switchable converter valve, U MOV2 is the protection residual voltage of the second lightning arrester, N res is the device redundancy level of the said switchable converter valve, and k2 is the valve section voltage distribution uneven pressure coefficient in the said switchable converter valve.

2. The overvoltage suppression method according to claim 1, wherein: The protection residual voltage of the first lightning arrester also meets the following constraints: Wherein, k3 is the uneven pressure coefficient when the shut-off power semiconductor device in the shut-off valve section is shut off.

3. The overvoltage suppression method according to claim 1, wherein: The DC reference voltage of the first lightning arrester is higher than the voltage peak of the turn-off power semiconductor device during normal operation: Among them, U res is the DC reference voltage of the first lightning arrester, k4 is the charge rate of the first lightning arrester, U PCOV The maximum peak value of the continuous operating voltage of the switchable converter valve including the commutation overshoot.

4. The overvoltage suppression method according to claim 1, wherein: The coordination current of the first lightning arrester under the protection residual voltage meets the following requirements: I MOV1 >k5·I off Among them, I MOV1 is the matching current, k5 is the maximum turn-off current peak value of the turn-off power semiconductor device, I off is the withstand current of the turn-off power semiconductor device during the turn-off period.

5. The overvoltage suppression method according to claim 4, wherein: The withstand energy of the first lightning arrester during the shutdown period of the turn-off power semiconductor device meets the following requirements: Among them, E MOV1 L is the withstand energy of the first lightning arrester during the shutdown period of the turn-off power semiconductor device, hx is the commutation inductance of the turn-off converter valve, and N3 is the number of times the turn-off power semiconductor device is continuously turned off.

6. The overvoltage suppression method according to claim 2, wherein: The total withstand voltage value of the turn-off power semiconductor devices in the turn-off converter valve at the minimum number of series stages is higher than the withstand voltage level of the second lightning arrester: Among them, k m is the safety factor of the second lightning arrester under impulse voltage.

7. A shut-off converter valve, characterized in that: For executing the overvoltage suppression method according to any one of claims 1 to 6, the switchable converter valve comprises: N2 turnable valve sections, N2 being an integer greater than or equal to 1, the N2 turnable valve sections being connected in series, each of the N2 turnable valve sections comprising N1 turnable power semiconductor devices, N1 being an integer greater than 1, the N1 turnable power semiconductor devices being connected in series; a gate drive unit connected to the turn-off power semiconductor device, and configured to trigger the turn-off power semiconductor device to turn on when the voltage across the anode and cathode of the turn-off power semiconductor device is greater than a preset protective trigger action threshold, so as to achieve overvoltage suppression at the turn-off power semiconductor device level; a first lightning arrester connected in parallel with the N1 turn-off power semiconductor devices connected in series, configured to conduct the first lightning arrester when the terminal voltage of the N1 turn-off power semiconductor devices is greater than the protection residual voltage of the first lightning arrester, so as to achieve overvoltage suppression at the turn-off valve stage; The second lightning arrester is connected in parallel with the N2 switchable valve sections connected in series, and is used to turn on the second lightning arrester when the terminal voltage of the N2 switchable valve sections is greater than the protection residual voltage of the second lightning arrester, so as to achieve switchable single valve level overvoltage suppression.

8. The switchable converter valve according to claim 7, characterized in that: Also includes: a DC grading resistor connected in parallel with the turn-off power semiconductor device; A damping circuit is connected in parallel with the turn-off power semiconductor device, wherein the damping circuit includes a damping capacitor and a damping resistor connected in series.

9. The switchable converter valve according to claim 7, characterized in that: The turn-off power semiconductor device includes at least one of an IGCT, an IGBT, an IGET and a MOSFET.

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