Reset signal sending method, storage medium, electronic equipment and computer program product

Abstract

The embodiment of the invention provides a reset signal sending method, a storage medium, electronic equipment and a computer program product, and relates to the field of communication, and the reset signal sending method comprises the following steps: determining the working state of a first optical module and the working state of a second optical module; and sending the first reset signal to the first optical module according to the working state of the first optical module, the working state of the second optical module and the sending condition of the first reset signal of the host, so as to send the first reset signal to the equipment through the first optical module and the second optical module, the first reset signal is used for resetting the equipment and instructing the equipment to perform training of a communication link between the equipment and the host. By adopting the technical scheme, the problem that the host cannot reasonably send the reset signal under the condition that the host and the equipment carry out data communication based on the optical signal is solved.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of communications, and specifically, to a method for sending a reset signal, a storage medium, an electronic device, and a computer program product. Background Art

[0002] At present, the existing Peripheral Component Interconnect Express (PCIe) link usually uses electrical signals to transmit PCIe signals. The PCIe signal and PERST signal sent by the PCIe host are directly connected to the PCIe link terminal device through on-board routing or cables. When the PCIe host and PCIe terminal device are both in normal working state, the PERST reset signal sent by the PCIe host can be directly transmitted to the PCIe terminal device to reset the terminal device and then perform PCIe link training. Currently, there are few applications that use optical signals to transmit PCIe signals. Optical modules are often added between the PCIe host and the PCIe terminal device. The optical modules convert the external input electrical signals into optical signals, and the optical signals are transmitted between the optical modules through optical fiber lines. When the PCIe host is reset, the PERST reset signal is directly transmitted to the PCIe terminal device through the optical module.

[0003] When resetting a PCIe link based on electrical signal transmission, only the PCIe host and PCIe link terminal devices are required to be in normal working state. However, when resetting a PCIe link based on optical signal transmission, the working state of the optical module needs to be taken into account. When the optical module is powered on, there are multiple states, and the optical link parameters can be configured accordingly. Whether the optical module is in normal working state or whether the configuration parameters of the optical module meet the requirements of the PCIe link are ignored. When resetting a PCIe link that is still using optical signal transmission, the reset method in the electrical signal solution is still used. After being transmitted through the optical module, the PCIe signal may have an amplitude that is too large, too small, or even unable to be transmitted through the optical module. As a result, the PCIe terminal device cannot normally identify and process the received PCIe signal, resulting in PCIe link packet loss, speed reduction, bandwidth reduction, and even the inability of the PCIe link to link normally after reset.

[0004] In the related art, when a host and a device perform data communication based on an optical signal, the host cannot reasonably send a reset signal. Currently, no effective solution has been proposed. Summary of the invention

[0005] The embodiments of the present application provide a method for sending a reset signal, a storage medium, an electronic device, and a computer program product, so as to at least solve the problem that the host cannot reasonably send a reset signal when the host and the device communicate data based on an optical signal.

[0006] According to an embodiment of the present application, a method for sending a reset signal is provided, which is applied to a communication scenario between a host and a device, wherein the communication scenario comprises a host, a first optical module of the host, a device, and a second optical module of the device; electrical signals are transmitted between the host and the first optical module, optical signals are transmitted between the first optical module and the second optical module, and electrical signals are transmitted between the second optical module and the device; the method comprises: determining a working state of the first optical module and a working state of the second optical module; sending the first reset signal to the first optical module according to the working state of the first optical module, the working state of the second optical module, and the sending state of the first reset signal of the host, so as to send the first reset signal to the device through the first optical module and the second optical module, wherein the first reset signal is used to reset the device and instruct the device to perform training of a communication link with the host.

[0007] In an exemplary embodiment, the sending of the first reset signal to the first optical module according to the working state of the first optical module, the working state of the second optical module, and the first reset signal sending status of the host includes: when the working state of the first optical module and the working state of the second optical module are both normal working states and the first reset signal sending status is used to indicate that the host has sent the first reset signal, sending the first reset signal to the first optical module; when the working state of the first optical module and the working state of the second optical module are both normal working states and the first reset signal sending status is used to indicate that the host has not sent the first reset signal, waiting for the first reset signal sent by the host, and sending the first reset signal to the first optical module when the first reset signal sent by the host is obtained; when the working state of the first optical module is not a normal working state or the working state of the second optical module is not a normal working state, prohibiting the sending of the first reset signal to the first optical module.

[0008] In an exemplary embodiment, the method further includes: after sending the first reset signal to the first optical module, if it is detected that the working state of the first optical module switches from a normal working state to an abnormal working state within a preset time and switches back to a normal working state, and / or the working state of the second optical module switches from a normal working state to an abnormal working state within the preset time and switches back to a normal working state, sending a second reset signal to the host, wherein the second reset signal is used to instruct the host to send the first reset signal again; and if the first reset signal sent by the host is obtained and the working states of the first optical module and the second optical module are both in a normal working state, sending the first reset signal to the first optical module.

[0009] In an exemplary embodiment, the method further includes: in a case where reset indication information sent by the baseboard management controller of the host is obtained, sending a second reset signal to the host, wherein the reset indication information is used to indicate the reset of the device and to train the communication link between the host and the device, and the second reset signal is used to instruct the host to send the first reset signal again; in a case where the first reset signal sent by the host is obtained and the working states of the first optical module and the second optical module are both in normal working states, sending the first reset signal to the first optical module.

[0010] In an exemplary embodiment, the method further includes: after sending the first reset signal to the first optical module, when it is detected that the working state of the device switches from a normal working state to an abnormal working state within a preset time and switches to a normal working state again, sending a second reset signal to the host, wherein the second reset signal is used to instruct the host to send the first reset signal again; when the first reset signal sent by the host is obtained and the working states of the first optical module and the second optical module are both in a normal working state, sending the first reset signal to the first optical module.

[0011] In an exemplary embodiment, determining the working status of the first optical module includes: upon obtaining first indication information sent by a baseboard management controller of the host, determining that the working status of the first optical module is a normal working status, wherein the first indication information is the indication information sent by the baseboard management controller of the host when determining that the first optical module is in an activated state by detecting a status register in the first optical module.

[0012] In an exemplary embodiment, determining the working status of the second optical module includes: upon obtaining second indication information sent by the baseboard management controller of the host, determining that the working status of the second optical module is a normal working status, wherein the second indication information is indication information sent by the baseboard management controller of the host after obtaining third indication information forwarded by the first optical module, and the third indication information is information sent by the baseboard management controller of the device to the second optical module when it determines that the second optical module is in an activated state by detecting a status register in the second optical module.

[0013] In an exemplary embodiment, the method further includes: detecting an in-place status signal of the first optical module; when the in-place status signal is used to indicate that the first optical module is in place, controlling the first optical module to enter an initialization process; and when an interrupt signal sent by the first optical module is obtained, instructing the baseboard management controller of the host to handle the interrupt of the first optical module.

[0014] In an exemplary embodiment, the instructing the baseboard management controller of the host to process the interruption of the first optical module includes: instructing the baseboard management controller of the host to perform the following operations: determining the interruption type of the interruption of the first optical module, and when the interruption type is a first type, determining the target parameters of the configuration register of the first optical module, wherein the first type of interruption is an interruption generated after the first optical module enters an initialization process and the configuration register is configured according to the default configuration parameters of the configuration register; configuring the configuration register of the first optical module according to the target parameters; and clearing the interruption status of the first optical module.

[0015] In an exemplary embodiment, determining the target parameters of the configuration register of the first optical module includes: determining the module type of the first optical module; determining the target parameters from a configuration file according to the module type of the first optical module, wherein the configuration file contains parameters of the configuration register corresponding to different module types.

[0016] In an exemplary embodiment, determining the target parameters of the configuration register of the first optical module includes: determining the module type of the first optical module; when the module type of the first optical module is the same as the module type of the optical module of the mainboard detected last time by the baseboard management controller, determining the parameters of the configuration register of the optical module of the mainboard detected last time that are stored as the target parameters.

[0017] In an exemplary embodiment, the instructing the baseboard management controller of the host to process the interruption of the first optical module includes: instructing the baseboard management controller of the host to perform the following operations: determining the interruption type of the interruption of the first optical module, and when the interruption type is a second type, determining the state of the first optical module by detecting a status register in the first optical module, wherein the second type of interruption is an interruption generated after the first optical module configures the configuration register of the first optical module according to the target parameters determined by the baseboard management controller, and after the first optical module configures the configuration register of the first optical module according to the target parameters determined by the baseboard management controller, the first optical module updates the state of the first optical module in the status register to an activated state; and clearing the interruption state of the first optical module.

[0018] According to another embodiment of the present application, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when run.

[0019] According to another embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0020] According to another embodiment of the present application, a computer program product is provided. The computer program product includes a computer program. When the computer program is executed by a processor, the steps in any one of the above method embodiments are implemented.

[0021] In the present application, according to the working state of the first optical module of the mainboard, the working state of the second optical module of the device, and the sending state of the first reset signal of the host, the first reset signal is sent to the first optical module, so as to send the first reset signal to the device through the first optical module and the second optical module. Since the working state of the optical module is taken into consideration when sending the reset signal, the reset signal can be sent reasonably. The above technical solution solves the problem that the host cannot reasonably send the reset signal when the host and the device communicate data based on the optical signal. The communication link can be stably transmitted at the expected rate through the optical module, and the host and the device can communicate stably, thereby completing the training of the communication link. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0023] Figure 1 It is a hardware structure block diagram of a server device of a method for sending a reset signal according to an embodiment of the present application;

[0024] Figure 2 is a scenario diagram of a method for sending a reset signal according to an embodiment of the present application;

[0025] Figure 3 is a flowchart of a method for sending a reset signal according to an embodiment of the present application;

[0026] Figure 4 is a flowchart of another method for sending a reset signal according to an embodiment of the present application;

[0027] Figure 5 is a structural block diagram of a reset signal sending device according to an embodiment of the present application;

[0028] Figure 6 It is a schematic diagram of the structure of an optional electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0029] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0030] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0031] The reset signal sending method embodiment provided in the embodiment of the present application can be executed in a server device or a similar computing device. Taking running on a server device as an example, Figure 1 FIG. 1 is a hardware structure block diagram of a server device of a method for sending a reset signal according to an embodiment of the present application. Figure 1 As shown, the server device may include one or more ( Figure 1 Only one is shown in the figure) a processor 102 (the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data, wherein the above-mentioned server device may also include a transmission device 106 and an input / output device 108 for communication functions. It can be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the above server device. Figure 1 More or fewer components as shown, or with Figure 1 Different configurations shown.

[0032] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the method for sending a reset signal in the embodiment of the present application. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, to implement the above method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include a memory remotely arranged relative to the processor 102, and these remote memories may be connected to the server device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0033] The transmission device 106 is used to receive or send data via a network. The specific example of the above network may include a wireless network provided by a communication provider of the server device. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 can be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0034] It should be noted that the PCIe protocol is a high-speed serial high-bandwidth transmission data standard used for data transmission between expansion cards and computer motherboards. As the PCIe rate continues to increase, the protocol's requirements for PCIe signal quality are also increasing, and the transmission distance of PCIe signals on traditional PCBs or copper cables is also shortening. In some PCIe long-distance transmission applications, designers need to add additional drive circuits to improve signal quality, which increases the design difficulty and design costs. Compared with traditional PCIe copper cable transmission, the use of optical signals to transmit PCIe signals has the advantages of low loss, low latency, high bandwidth, and long distance. However, there is no requirement in the PCIe protocol to use optical signals to transmit PCIe signals, which leads to some differences between PCIe optical transmission applications and traditional PCIe applications.

[0035] An optical module is a photoelectric conversion device that can convert external input electrical signals into optical signals and send them out through optical fiber lines, and can also convert optical signals received in optical fiber lines into electrical signals and transmit them to related processors. Compared with the plug-and-play of passive copper cables, optical modules are active devices. After power is supplied, the optical module needs a period of time for internal initialization. During this process, the optical module reads the default configuration inside the module and configures the corresponding input and output links. At the same time, the external processor can also change the parameters of the optical module in this process and adjust the input and output port link characteristics to ensure that the link initialization results meet the system working requirements. Due to the different photoelectric conversion design schemes, internal manufacturing processes, and port numbers used in optical modules produced by different manufacturers, the duration of the initialization process also varies. When the PCIe host sends a reset signal to notify the terminal device on the PCIe link to perform link training, due to the uncertainty of the initialization time, the PCIe signal and reset signal may not be transmitted normally, and the PCIe terminal device cannot stably receive the PCIe signal or reset signal, resulting in the failure of PCIe link training to proceed normally and the failure to reach the expected rate of the system design, affecting the system working state.

[0036] In order to solve the above problems, an embodiment of the present application provides a method for sending a reset signal, which is applied to a communication scenario between a host and a device, wherein the communication scenario includes a host, a first optical module of the host, a device, and a second optical module of the device; electrical signals are transmitted between the host and the first optical module, optical signals are transmitted between the first optical module and the second optical module, and electrical signals are transmitted between the second optical module and the device.

[0037] Optionally, in the case where the host and the device communicate based on a PCIe link, a schematic diagram of the communication scenario is as follows: Figure 2As shown in FIG. 1 , a PCIe link may be composed of a Host device, a Device device, a Host optical module (i.e., a first optical module), a Device optical module (i.e., a second optical module), PCIe electrical signals transmitted between Host devices and Host optical modules, PCIe electrical signals transmitted between Device devices and Device optical modules, and PCIe optical signals transmitted between Host optical modules and Device optical modules. Taking the Host end as an example, in addition to transmitting PCIe electrical signals with Host devices, the Host optical module is also connected to the Complex Programmable Logic Device (CPLD) and the Baseboard Management Controller (BMC) on the Host end to transmit low-speed signals such as GPIO (General Purpose Input / Output), I2C (Inter-Integrated Circuit), and PERST (Peripheral Reset) for reset control of the PCIe link. The connection method of the Device side is similar to that of the Host side. The difference is that the PERST reset signal is sent from the Device side optical module to the Device side CPLD, and the Device side CPLD then sends the PERST reset signal to the Device device to notify the Device device to reset the PCIe link. In addition, Figure 2 TX stands for Transmit, RX stands for Receive, RST stands for Reset, and MCU stands for Microcontroller Unit.

[0038] It should be noted that the Host device and the Host-side CPLD transmit two sets of reset signals, including a low-valid PCIe link reset signal PERST (i.e., the first reset signal described below) actively sent by the Host device to the Host-side CPLD and a low-valid PCIE reset signal RST (i.e., the second reset signal described below) actively sent by the Host-side CPLD to the Host device; after the Host device is powered on, it automatically sends a PERST reset signal to reset the Device device connected to the corresponding PCIe link in this application; when the Host device receives the low-level RST signal sent by the Host-side CPLD, it will send a PERST reset signal again to notify the Device device to reset the PCIe link again.

[0039] It should be noted that there are five groups of signals between the host optical module and the host CPLD, including:

[0040] (1) The CPLD sends an LPmode signal to the optical module. When the signal is high, the optical module enters a low power consumption state.

[0041] (2) The Reset signal sent by the CPLD to the optical module is considered a reset action when the signal is pulled low for a period of time and then pulled high. It is used to control the optical module to reset.

[0042] (3) The INT signal (interrupt signal) sent by the optical module to the CPLD indicates that an abnormality has occurred inside the CPLD optical module when the signal is high, and an external device is required to handle this abnormal state.

[0043] (4) The host optical module transmits the optical module in-place status signal PRSNT to the host CPLD. When the optical module is installed, the PRSNT signal state is low, otherwise the PRSNT signal state is high.

[0044] (5) The Host optical module receives the PERST reset signal sent by the Host CPLD, converts it into an optical signal through the internal optoelectronic conversion part, and transmits it to the Device end through the optical fiber line; this signal is the output signal of the Device optical module at the Device end. The Device optical module converts the received reset optical signal into an electrical signal and sends it to the Device end CPLD.

[0045] It should be noted that the host optical module also transmits I2C signals to the host BMC, which are used for: (1) the optical module converts the I2C electrical signal into an optical signal and transmits it to the device via the optical fiber; (2) the BMC reads the host optical module status information through I2C to determine whether the optical module is working properly.

[0046] It should be noted that Figure 3 4 is a flowchart of a method for sending a reset signal according to an embodiment of the present application, comprising the following steps S302-S304:

[0047] Step S302: Determine the working state of the first optical module and the working state of the second optical module;

[0048] Step S304: Send the first reset signal to the first optical module according to the working status of the first optical module, the working status of the second optical module, and the first reset signal sending status of the host, so as to send the first reset signal to the device through the first optical module and the second optical module, wherein the first reset signal is used to reset the device and instruct the device to train the communication link with the host.

[0049] Optionally, the subject of the method of the embodiment of the present application is a programmable device of the host, such as a CPLD of the host.

[0050] In the above steps, according to the working state of the first optical module of the mainboard, the working state of the second optical module of the device, and the sending state of the first reset signal of the host, the first reset signal is sent to the first optical module, so as to send the first reset signal to the device through the first optical module and the second optical module. Since the working state of the optical module is taken into consideration when sending the reset signal, the reset signal can be sent reasonably. The above technical solution solves the problem that the host cannot reasonably send the reset signal when the host and the device communicate data based on the optical signal. The communication link can be stably transmitted at the expected rate through the optical module, and the host and the device can communicate stably, thereby completing the training of the communication link.

[0051] In an exemplary embodiment, the sending of the first reset signal to the first optical module according to the working state of the first optical module, the working state of the second optical module, and the sending of the first reset signal by the host is implemented by the following steps S11-S13:

[0052] Step S11: When the working states of the first optical module and the second optical module are both in normal working states and the sending status of the first reset signal is used to indicate that the host has sent the first reset signal, sending the first reset signal to the first optical module;

[0053] Step S12: when the working states of the first optical module and the second optical module are both in normal working states and the sending status of the first reset signal indicates that the host has not sent the first reset signal, waiting for the first reset signal sent by the host, and sending the first reset signal to the first optical module when the first reset signal sent by the host is obtained;

[0054] Step S13: When the working state of the first optical module is not a normal working state or the working state of the second optical module is not a normal working state, it is prohibited to send the first reset signal to the first optical module.

[0055] It should be noted that the above steps S11-S13 are steps executed in different situations, and there is no specific order of execution.

[0056] That is to say, in this embodiment, the CPLD combination of the host analyzes and determines the received working state of the optical module of the host, the working state of the optical module of the device, and the sending state of the first reset signal of the host; when the optical module of the host is in a normal working state and the optical module of the device is in a normal working state, the CPLD determines whether the host has sent the first reset signal: if the first reset signal has been sent, the CPLD of the host controls the first reset signal of the optical module connected to the host to also generate a reset action; if the first reset signal has not been received, it waits for the host to send the first reset signal before sending the first reset signal to the outside. When the host has sent the first reset signal, but the optical module of the host or the optical module of the device is still not in a normal working state, the CPLD of the host needs to wait until the optical module of the host and the optical module of the device are both in a normal working state before outputting the first reset signal to the optical module of the host.

[0057] It should be noted that the above steps S11 to S13 have the following technical effects:

[0058] 1. Enhanced link stability: In steps S11 and S12, the reset signal is allowed to be transmitted only when the first optical module and the second optical module are both in normal working state. This ensures that the optical modules at both ends of the link can stably process and transmit the reset signal, thereby avoiding the link training failure or link instability caused by abnormal optical module status.

[0059] 2. Accurate control of reset action: The monitoring of the sending of the first reset signal in steps S11 and S12 ensures the accurate transmission of the host reset signal, that is, ensures the synchronization of the reset action at both ends of the link. When the host has sent a reset signal, it is immediately transparently transmitted to the optical module; when the host has not sent it, it waits until the signal is received, which avoids unnecessary link resets and saves reset time and system resources.

[0060] 3. Fault prevention and safety mechanism: The prohibition of sending a reset signal when any optical module is in an abnormal working state as described in step S13 provides a fault prevention mechanism to prevent resetting when the optical module fails to initialize normally or fails, thereby avoiding potential link damage or data loss risks.

[0061] 4. Improve overall system efficiency: The entire solution avoids invalid or premature link resets by precisely controlling the sending of reset signals, reduces unnecessary initialization time, and improves the working efficiency of PCIe optical interconnect links, thereby improving the overall performance of systems such as servers.

[0062] 5. Enhanced compatibility and interoperability: Since different optical modules may have their own initialization time and configuration requirements, this solution enhances the compatibility between different optical modules by detecting and adapting to the working status of the optical modules, ensuring that PCIe links based on optical modules from different manufacturers can be reset and work stably.

[0063] 6. Reduce maintenance costs and time: By preventing the optical module from resetting in an abnormal state, false alarms and failures are reduced, thereby reducing maintenance costs and time, improving availability and user satisfaction.

[0064] In summary, the above steps ensure the stability and efficiency of the optical module during the reset process by precisely controlling and synchronizing the sending of link reset signals, thereby enhancing the performance and reliability of the PCIe optical interconnect link based on the optical module, while reducing maintenance costs and improving compatibility and interoperability.

[0065] In an exemplary embodiment, the method further comprises the following steps S21-S22:

[0066] Step S21: After sending the first reset signal to the first optical module, if it is detected that the working state of the first optical module is switched from a normal working state to an abnormal working state within a preset time and then switched to a normal working state again, and / or the working state of the second optical module is switched from a normal working state to an abnormal working state within the preset time and then switched to a normal working state again, sending a second reset signal to the host, wherein the second reset signal is used to instruct the host to send the first reset signal again;

[0067] Step S22: When the first reset signal sent by the host is acquired and the working states of the first optical module and the second optical module are both in normal working states, the first reset signal is sent to the first optical module.

[0068] That is to say, in this embodiment, when the CPLD of the Host has issued a reset action (i.e., issued a first reset signal), the Host optical module or the Device optical module exits the normal working state (the optical module is unplugged or some abnormal state occurs), the Host CPLD waits for the Host or Device optical module to resume the normal working state, and when both are restored to the normal working state, the Host CPLD issues a reset action (i.e., sends a second reset signal) to the Host device to notify the Host device that the PCIe link needs to be initialized again, and the Host device needs to issue a reset action again (i.e., send the first reset signal) to notify the Device device to re-perform PCIe link training after the reset.

[0069] The first reset signal sent by the Host CPLD to the Host optical module passes through the Host optical module, the optical fiber line, and the Device optical module, and is output to the Device-end CPLD at the Device optical module. After the Device CPLD detects the first reset signal sent by the Host and generates a reset action, it transmits the reset action to the Device device. The Host device and the Device device can stably transmit PCIe signals through the optical module and perform subsequent link training to achieve the expected effect of PCIe optical interconnection, thereby completing a complete PCIe link reset.

[0070] That is, in this embodiment, the PCIe link between the host and the device can be reset by unplugging the first optical module or the second optical module. In addition, the above steps give the system the ability to self-detect and self-repair. Even if the optical module has a temporary failure, it can automatically reset and restore the normal operation of the link without manual intervention, thereby improving the automation and self-healing ability of the system.

[0071] In an exemplary embodiment, the method further comprises the following steps S31-S32:

[0072] Step S31: in the case of acquiring the reset indication information sent by the baseboard management controller of the host, sending a second reset signal to the host, wherein the reset indication information is used to indicate to reset the device and to train the communication link between the host and the device, and the second reset signal is used to instruct the host to send the first reset signal again;

[0073] Step S32: When the first reset signal sent by the host is acquired and the working states of the first optical module and the second optical module are both in normal working states, the first reset signal is sent to the first optical module.

[0074] That is to say, in this embodiment, the reset indication information sent by the baseboard management controller can be used to achieve the PCIe link reset between the host and the device, thereby avoiding the manual insertion and removal of the optical module to achieve the PCIe link reset between the host and the device.

[0075] In an exemplary embodiment, the method further includes the following steps S41-S42:

[0076] Step S41: after sending the first reset signal to the first optical module, if it is detected that the working state of the device switches from a normal working state to an abnormal working state within a preset time and switches back to a normal working state, sending a second reset signal to the host, wherein the second reset signal is used to instruct the host to send the first reset signal again;

[0077] Optionally, the BMC of the device may detect the working status of the device, and then the BMC of the device sends the working status of the device to the BMC of the host, and then the BMC of the host sends the working status of the device to the CPLD of the host.

[0078] Optionally, the BMC of the device may detect the working status of the device, and then send the status to the CPLD of the host through the CPLD of the device.

[0079] Step S42: When the first reset signal sent by the host is acquired and the working states of the first optical module and the second optical module are both in normal working states, the first reset signal is sent to the first optical module.

[0080] It should be noted that the above steps S41 and S42 further enhance the stability and recovery capability of the PCIe optical interconnection link based on the optical module when the device state fluctuates. The specific technical effects include:

[0081] 1. Device status monitoring and response: In step S41, after the host's CPLD sends the first reset signal to the first optical module, it can actively detect the working status of the device. Once it is found that the device status is abnormal but then recovers, the host's CPLD will automatically send a second reset signal to notify the host to reset again. This enables the host's CPLD to respond quickly to transient device failures, reducing the time for fault recovery and enhancing the stability of the link.

[0082] 2. The monitoring of the device status and the precise control of the reset signal in steps S41 and S42 ensure that the PCIe optical interconnect link can quickly return to normal working state even when the device status fluctuates, thereby improving the overall reliability of the communication scenario and reducing the downtime caused by failures.

[0083] In an exemplary embodiment, the method further comprises steps S51-S53:

[0084] Step S51: detecting an in-position status signal of the first optical module;

[0085] Step S52: When the in-position state signal is used to indicate that the first optical module is in position, controlling the first optical module to enter an initialization process;

[0086] Step S53: when an interrupt signal sent by the first optical module is obtained, instructing a baseboard management controller of the host to process the interrupt of the first optical module.

[0087] It should be noted that the above steps can monitor in real time whether the optical module is correctly installed by detecting the in-place status signal of the first optical module, which helps prevent link failures caused by incorrect installation or falling off of the optical module.

[0088] It should be noted that the system starts to control the optical module to enter the initialization process only after confirming that the first optical module is in place. This measure avoids unnecessary initialization attempts for optical modules that do not exist or are not in place, reduces the waste of system resources, and ensures the accuracy and success rate of optical module initialization, thereby improving the stability of the link.

[0089] It should be noted that when the programmable device (such as CPLD) receives the interrupt signal sent by the first optical module, the system can quickly instruct the host's baseboard management controller (BMC) to handle the interrupt. This mechanism ensures that abnormal conditions inside the optical module can be discovered and processed in a timely manner, avoiding the continued impact of abnormal conditions on link performance, and improving fault response speed and overall reliability.

[0090] In an exemplary embodiment, instructing the baseboard management controller of the host to process the interruption of the first optical module includes: instructing the baseboard management controller of the host to perform the following steps S61-S63:

[0091] Step S61: determining an interrupt type of the interrupt of the first optical module, and determining a target parameter of a configuration register of the first optical module when the interrupt type is the first type, wherein the first type of interrupt is an interrupt generated after the first optical module enters an initialization process and the configuration register is configured according to a default configuration parameter of the configuration register;

[0092] Step S62: configuring the configuration register of the first optical module according to the target parameter;

[0093] Step S63: clearing the interruption status of the first optical module.

[0094] It should be noted that, in this embodiment, the BMC can identify the type of interrupt, and further determine the target parameter of the configuration register when the interrupt type is a specific first type. This precise identification mechanism helps to quickly locate the root cause of the problem, avoids invalid processing of non-related interrupts, and improves the efficiency and accuracy of fault processing.

[0095] It should be noted that once the interrupt type is determined to be the first type, the BMC will adjust the configuration register of the first optical module according to the target parameters. This mechanism allows the system to dynamically adjust the configuration parameters according to the current state and requirements of the optical module to deal with problems such as signal quality, power consumption or compatibility that may be encountered during the initialization process, thereby improving the working performance of the optical module and the stability of the link.

[0096] It should be noted that after the BMC completes the adjustment of the configuration parameters, it will clear the interruption status of the first optical module and restore its normal operation. This operation can timely eliminate the interruption alarm in the system, avoid the continuous interference of the interruption status on subsequent communication operations, and ensure the continuity and high efficiency of the PCIe optical interconnection link.

[0097] In an exemplary embodiment, the above-mentioned determination of the target parameters of the configuration register of the first optical module includes: determining the module type of the first optical module; determining the target parameters from a configuration file according to the module type of the first optical module, wherein the configuration file contains parameters of the configuration register corresponding to different module types.

[0098] It should be noted that by determining the module type of the optical module, the configuration parameters that match the type of optical module are intelligently selected from the configuration file. This mechanism ensures the accuracy of the configuration parameters, avoids initialization failure or link performance degradation caused by parameter mismatch, and improves the stability and efficiency of the link.

[0099] It should be noted that since different optical modules may have different optoelectronic conversion characteristics, power requirements or communication protocols, the ability to dynamically obtain target parameters from the configuration file enables flexible adaptation to various types of optical modules, enhances interoperability and adaptability, and reduces the risk when replacing or upgrading optical modules.

[0100] It should be noted that accurately and quickly obtaining the target parameters from the configuration file reduces blind attempts at optical module configuration and shortens the parameter configuration time in the initialization process, thereby reducing the initialization time of the entire PCIe optical interconnect link and improving the response speed and overall performance of the link.

[0101] In an exemplary embodiment, the above-mentioned determination of the target parameters of the configuration register of the first optical module includes: determining the module type of the first optical module; when the module type of the first optical module is the same as the module type of the optical module of the mainboard detected by the baseboard management controller at the last time, determining the parameters of the configuration register of the optical module of the mainboard detected last time stored as the target parameters.

[0102] It should be noted that when the module type of the first optical module is the same as the type of the optical module on the mainboard last detected by the baseboard management controller (BMC), the BMC can directly use the previously stored configuration register parameters as target parameters without re-reading or configuring the parameters, thereby greatly speeding up the initialization process of the optical module and reducing the waiting time for startup or restart.

[0103] It should be noted that the above steps simplify the parameter configuration process during initialization and avoid repeated parameter reading and configuration steps. Especially for large server environments or data centers, it can significantly improve the initialization efficiency of batch devices and reduce operation and maintenance costs.

[0104] It should be noted that using the configuration parameters recorded and verified last time can ensure that the optical module can quickly enter a stable working state during this startup, reducing the risk of initialization failure or instability caused by improper parameter configuration.

[0105] It should be noted that, by determining the module type of the optical module and directly using the stored configuration parameters when the module type is consistent, this technical solution effectively improves the initialization efficiency of the PCIe optical interconnect link device and reduces resource consumption.

[0106] In an exemplary embodiment, instructing the baseboard management controller of the host to process the interruption of the first optical module includes: instructing the baseboard management controller of the host to perform the following steps S71-S72:

[0107] Step S71: determining an interrupt type of the interrupt of the first optical module, and when the interrupt type is a second type, determining the state of the first optical module by detecting a state register in the first optical module, wherein the second type of interrupt is an interrupt generated after the first optical module configures the configuration register of the first optical module according to the target parameters determined by the baseboard management controller, and after the first optical module configures the configuration register of the first optical module according to the target parameters determined by the baseboard management controller, the first optical module updates the state of the first optical module in the state register to an activated state;

[0108] Step S72: clearing the interruption status of the first optical module.

[0109] It should be noted that in step S71, the BMC can identify the interrupt type, and when it is determined that the interrupt type is the second type, it further detects the state of the optical module by reading the status register. This precise state detection mechanism helps to quickly diagnose whether the optical module has completed the configuration according to the target parameters and entered the activation state. This ensures that the configuration state of the optical module is accurately tracked, and any problems that do not reach the expected state after configuration can be discovered in time.

[0110] It should be noted that after the first optical module configures its configuration register according to the target parameters determined by the BMC, the state of the optical module in the status register will be updated to the activated state, which indicates that the optical module has completed initialization and is ready for normal communication. This state update mechanism provides a reliable hardware state guarantee for subsequent link reset and data transmission.

[0111] It should be noted that, by processing the second type of interrupt, it is possible to quickly confirm that the optical module has completed configuration according to the target parameters and entered the activated state, thereby reducing the waiting time in the initialization phase and speeding up the startup speed of the entire PCIe optical interconnect link.

[0112] It should be noted that by identifying and processing specific types of interruptions, the state changes of the optical module can be automatically detected and confirmed, which enhances the self-recovery capability of solving initialization problems, reduces the need for manual intervention, and improves the level of intelligence.

[0113] In an exemplary embodiment, determining the working status of the first optical module includes: upon obtaining first indication information sent by a baseboard management controller of the host, determining that the working status of the first optical module is a normal working status, wherein the first indication information is the indication information sent by the baseboard management controller of the host when determining that the first optical module is in an activated state by detecting a status register in the first optical module.

[0114] In an exemplary embodiment, determining the working status of the second optical module includes: upon obtaining second indication information sent by the baseboard management controller of the host, determining that the working status of the second optical module is a normal working status, wherein the second indication information is indication information sent by the baseboard management controller of the host after obtaining third indication information forwarded by the first optical module, and the third indication information is information sent by the baseboard management controller of the device to the second optical module when it determines that the second optical module is in an activated state by detecting a status register in the second optical module.

[0115] It should be noted that, in this embodiment, the CPLD, BMC, and optical module on the Device side are similar to the processes on the Host side. The difference is that when the BMC on the Device side detects that the optical module on the Device side is working normally, the BMC on the Device side transmits this status information to the optical module on the Device side through an I2C electrical signal. The optical module on the Device side converts the I2C electrical signal into an I2C optical signal, and transmits it to the optical module on the Host side through an optical fiber. Inside the optical module on the Host side, the I2C optical signal transmitted from the Device side is converted into an I2C electrical signal. After the BMC on the Host side parses the I2C signal, the working status of the optical module on the Device side is transmitted to the CPLD on the Host side for subsequent logical judgment.

[0116] In this embodiment, in order to better understand the above process, the following is a specific description: BMC determines whether the optical module is working properly by the combination of CPLD, BMC and optical module. The judgment process is described as follows:

[0117] 1. CPLD detects the PRSNT in-position signal of the optical module (i.e. the in-position status signal mentioned above). When it detects that the optical module is in position, it pulls the Reset signal high to control the optical module to enter the normal initialization process;

[0118] 2. The optical module reads the power-on default configuration into the relevant configuration register, and the state changes from the initial Reset state to the LowPwr state, and records this state change in the state change register, updates this state in the state register, and sets the INT interrupt signal to a high level;

[0119] 3. CPLD detects that the INT interrupt signal is high, and notifies BMC to detect the interrupt register related to the optical module to eliminate the interrupt state; at the same time, BMC reads the power requirements and system requirements of the optical module, and can modify and optimize the optical module configuration register parameters to meet the overall PCIe link requirements; after completing the above actions, CPLD sets the LPmode signal to a low level to control the optical module to enter the High Power Mode during normal operation;

[0120] 4. The optical module detects that the LPmode signal is at a low level, and the state changes from LowPwr to ModuleReady state, and updates the state to the status register;

[0121] 5. The optical module initializes each data link according to the parameters set in the configuration register. After completion, the module status enters the Active state, updates the status to the status register, records the status change to the status change register, and sets the INT interrupt signal to a high level;

[0122] 6. CPLD detects that the interrupt signal becomes high again, notifies BMC to detect the relevant status change register, and clears the interrupt status of the optical module; BMC reads the status register and detects that the optical module status has changed to Active. At this time, it is considered that the optical module has completed normal initialization and can work normally.

[0123] It should be noted that Figure 4 The PCIe optical interconnect link reset process based on the optical module is illustrated. The specific process is detailed in the above implementation method, and this application will not go into details here.

[0124] It should be noted that the CPLD on the Device side detects the PERST reset signal state of the Host device. When it detects that the PERST signal state changes from high to low and then to high, it is regarded as the Host device issuing a reset action to the outside. For the Device device on the PCIe link, the CPLD on the Host side continuously monitors whether the Host device issues a reset action for subsequent logical judgment; the CPLD on the Host side detects the presence status of the Host optical module. When the optical module is in place, the CPLD and BMC control the optical module to enter the normal initialization process, and judge whether the optical module enters the normal working state according to the judgment process above; after the Host BMC detects that the Host optical module is working normally, it passes this information to the Host side CPLD for subsequent logical judgment.

[0125] It should be noted that in the field of high-speed data communication, especially in server and data center environments, the performance and stability of PCIe optical interconnection links are the key to system design. As a bridge for photoelectric signal conversion, the working state and performance of the optical module directly affect the transmission rate and data integrity of the link. The configuration parameters of the optical module are usually set during the initialization phase and remain fixed during subsequent operation, which may not be able to adapt to the performance requirements brought about by changes in link load or environmental conditions. Therefore, the present application also proposes a system that can dynamically adjust the configuration parameters of the optical module according to the real-time status of the link, which is of great significance for maintaining the optimal performance of the link.

[0126] This application proposes an intelligent dynamic adaptation and performance optimization system for PCIe optical interconnection links based on optical modules, the core of which is the introduction of real-time performance monitoring and dynamic parameter adaptation mechanisms. The specific implementation steps are as follows:

[0127] 1. Real-time performance monitoring: CPLD continuously monitors the real-time performance indicators of the PCIe optical interconnect link, such as bit error rate, transmission delay, signal strength, etc., and transmits this data to the BMC for analysis.

[0128] 2. Intelligent analysis and decision-making: After receiving the performance data, the BMC analyzes the link status through a preset algorithm to determine whether the configuration parameters of the optical module need to be adjusted. If the link performance drops below the preset threshold, the BMC will automatically trigger the parameter adjustment process.

[0129] 3. Dynamic parameter adaptation: Based on the current link status and adaptation strategy, the BMC sends an adaptation command to the optical module through the I2C bus to dynamically adjust the parameters in the configuration register, such as output optical power, receiving sensitivity, modulation mode, etc., to optimize link performance.

[0130] 4. Performance optimization confirmation: After the adjustment is completed, the performance monitoring module monitors the link performance again to confirm whether the optimization target is achieved. If not, the BMC can continue to adjust until the performance is improved to a satisfactory level.

[0131] 5. Parameter adjustment log recording: During the entire adjustment process, BMC records the parameter changes of each adjustment, the link status and effect before and after the adjustment, which is used for subsequent performance analysis and adjustment strategy optimization.

[0132] It should be noted that the above-mentioned expansion technology solution can significantly improve the performance stability and efficiency of PCIe optical interconnection links based on optical modules. The specific technical effects are as follows:

[0133] 1. Dynamic optimization of link performance: Through real-time monitoring and intelligent analysis, the system can dynamically adjust the configuration parameters of the optical module to adapt to changing link conditions, ensure the optimal state of link performance, reduce the bit error rate and delay of data transmission, and improve the reliability of data transmission.

[0134] 2. Enhance the link's adaptability: The dynamic adaptation mechanism enables the link to automatically respond to environmental changes and load fluctuations, improving the system's adaptability and robustness and reducing the link performance bottleneck caused by fixed parameter settings.

[0135] 3. Improve operation and maintenance efficiency and intelligence: The automated parameter adjustment and optimization process reduces the need for manual intervention and simplifies operation and maintenance work. At the same time, through log records, it provides operation and maintenance personnel with detailed performance adjustment history and effect evaluation, thereby improving the system's operation and maintenance efficiency and intelligence.

[0136] In summary, by introducing real-time performance monitoring and dynamic parameter adaptation mechanisms, intelligent dynamic adaptation and performance optimization of PCIe optical interconnection links based on optical modules are realized. This has significant technical effects on improving link stability and efficiency, reducing costs, and improving the intelligent operation and maintenance level of the system. It is an important direction for the development of future server and data center communication technology.

[0137] It should be noted that the present application uses CPLD to determine the in-place status of the optical modules at both ends of the optical fiber line, and uses a combination of BMC, CPLD, and the internal status register of the optical module to determine the working status of the optical module. The CPLD controls whether to transparently transmit the link reset action issued by the PCIe host based on the working status of the optical modules at both ends of the optical fiber line, thereby controlling when the PCIe link terminal device performs a link reset. This avoids problems such as link instability caused by inappropriate optical module configuration parameters or the optical module not yet entering a normal working state when the PCIe link is reset, the PCIe rate cannot reach the expected rate, and the system works in a reduced speed and bandwidth state.

[0138] It should be noted that in the technical solution of the present application, it is possible to accurately determine whether the optical module is in a normal working state. When the PCIe optical interconnection link based on optical module transmission is reset, the PCIe link can be stably transmitted at the expected rate through the optical module, and the PCIe host and PCIe terminal device can communicate stably, thereby completing the PCIe link training. It can effectively solve the problem that when the PCIe optical interconnection link is reset, due to the difference in the initialization time of the optical module and the difference in the internal configuration parameters, the optical module has not completed the internal initialization when the PCIe link is reset, and the optical module does not work normally, resulting in the PCIe link being unable to stably transmit through the optical module, causing the PCIe link to communicate in a state of reduced speed and reduced bandwidth.

[0139] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0140] In this embodiment, a reset signal sending device is also provided to implement the above-mentioned embodiments and preferred implementation modes, which have been described and will not be repeated. As used below, the term "module" can implement a combination of software and / or hardware of a predetermined function. Although the modules described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0141] Figure 5It is a structural block diagram of a reset signal sending device according to an embodiment of the present application, which is applied to a communication scenario between a host and a device, wherein the communication scenario comprises a host, a first optical module of the host, a device, and a second optical module of the device; an electrical signal is transmitted between the host and the first optical module, an optical signal is transmitted between the first optical module and the second optical module, and an electrical signal is transmitted between the second optical module and the device, and the device comprises:

[0142] A determination module 52, configured to determine a working state of the first optical module and a working state of the second optical module;

[0143] The sending module 54 is used to send the first reset signal to the first optical module according to the working state of the first optical module, the working state of the second optical module, and the first reset signal sending status of the host, so as to send the first reset signal to the device through the first optical module and the second optical module, wherein the first reset signal is used to reset the device and instruct the device to train the communication link with the host.

[0144] The above device sends a first reset signal to the first optical module according to the working state of the first optical module of the mainboard, the working state of the second optical module of the device, and the sending state of the first reset signal of the host, so as to send the first reset signal to the device through the first optical module and the second optical module. Since the working state of the optical module is taken into consideration when sending the reset signal, the reset signal can be sent reasonably. The above technical solution solves the problem that the host cannot reasonably send the reset signal when the host and the device communicate data based on the optical signal. The communication link can be stably transmitted at the expected rate through the optical module, and the host and the device can communicate stably, thereby completing the training of the communication link.

[0145] In an exemplary embodiment, the sending module 54 is used to send the first reset signal to the first optical module when the working state of the first optical module and the working state of the second optical module are both normal working states and the sending state of the first reset signal is used to indicate that the host has sent the first reset signal; when the working state of the first optical module and the working state of the second optical module are both normal working states and the sending state of the first reset signal is used to indicate that the host has not sent the first reset signal, wait for the first reset signal sent by the host, and send the first reset signal to the first optical module when the first reset signal sent by the host is obtained; when the working state of the first optical module is not a normal working state or the working state of the second optical module is not a normal working state, it is prohibited to send the first reset signal to the first optical module.

[0146] In an exemplary embodiment, the device also includes: a processing module, which is used to send a second reset signal to the host after sending the first reset signal to the first optical module, if it is detected that the working state of the first optical module switches from a normal working state to an abnormal working state within a preset time and switches back to a normal working state, and / or the working state of the second optical module switches from a normal working state to an abnormal working state within the preset time and switches back to a normal working state, wherein the second reset signal is used to instruct the host to send the first reset signal again; and send the first reset signal to the first optical module when the first reset signal sent by the host is obtained and the working states of the first optical module and the second optical module are both in normal working states.

[0147] In an exemplary embodiment, the processing module is also used to send a second reset signal to the host when the reset indication information sent by the baseboard management controller of the host is obtained, wherein the reset indication information is used to indicate the reset of the device and to train the communication link between the host and the device, and the second reset signal is used to instruct the host to send the first reset signal again; when the first reset signal sent by the host is obtained and the working states of the first optical module and the second optical module are both in normal working states, the first reset signal is sent to the first optical module.

[0148] In an exemplary embodiment, the processing module is further configured to, after sending the first reset signal to the first optical module, detect that the working state of the device switches from a normal working state to an abnormal working state within a preset time, and then switches to a normal working state again, send a second reset signal to the host, wherein the second reset signal is used to instruct the host to send the first reset signal again;

[0149] When the first reset signal sent by the host is acquired and the working states of the first optical module and the second optical module are both in normal working states, the first reset signal is sent to the first optical module.

[0150] In an exemplary embodiment, the determination module 52 is also used to determine that the working state of the first optical module is a normal working state when the first indication information sent by the baseboard management controller of the host is obtained, wherein the first indication information is the indication information sent by the baseboard management controller of the host when it determines that the first optical module is in an activated state by detecting the status register in the first optical module.

[0151] In an exemplary embodiment, the determination module 52 is also used to determine that the working state of the second optical module is a normal working state when the second indication information sent by the baseboard management controller of the host is obtained, wherein the second indication information is the indication information sent by the baseboard management controller of the host after obtaining the third indication information forwarded by the first optical module, and the third indication information is the information sent by the baseboard management controller of the device to the second optical module when it determines that the second optical module is in an activated state by detecting the status register in the second optical module.

[0152] In an exemplary embodiment, the processing module is also used to detect an in-place status signal of the first optical module; when the in-place status signal is used to indicate that the first optical module is in place, the first optical module is controlled to enter an initialization process; and when an interrupt signal sent by the first optical module is obtained, the baseboard management controller of the host is instructed to process the interrupt of the first optical module.

[0153] In an exemplary embodiment, the processing module is also used to instruct the baseboard management controller of the host to perform the following operations: determine the interrupt type of the interrupt of the first optical module, and when the interrupt type is the first type, determine the target parameters of the configuration register of the first optical module, wherein the first type of interrupt is an interrupt generated after the first optical module enters the initialization process and the configuration register is configured according to the default configuration parameters of the configuration register; configure the configuration register of the first optical module according to the target parameters; and clear the interrupt status of the first optical module.

[0154] In an exemplary embodiment, the processing module is further used to determine the module type of the first optical module; determine the target parameters from a configuration file according to the module type of the first optical module, wherein the configuration file contains parameters of configuration registers corresponding to different module types.

[0155] In an exemplary embodiment, the processing module is also used to determine the module type of the first optical module; when the module type of the first optical module is the same as the module type of the optical module of the mainboard detected by the baseboard management controller last time, the parameters of the configuration register of the optical module of the mainboard detected last time stored are determined as the target parameters.

[0156] In an exemplary embodiment, the processing module is also used to instruct the baseboard management controller of the host to perform the following operations: determine the interrupt type of the interrupt of the first optical module, and when the interrupt type is a second type, determine the state of the first optical module by detecting a status register in the first optical module, wherein the second type of interrupt is an interrupt generated after the first optical module configures the configuration register of the first optical module according to the target parameters determined by the baseboard management controller, and after the first optical module configures the configuration register of the first optical module according to the target parameters determined by the baseboard management controller, the first optical module updates the state of the first optical module in the status register to an activated state; and clears the interrupt state of the first optical module.

[0157] It should be noted that the above modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0158] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.

[0159] Optionally, in this embodiment, the computer program may be configured to perform the following steps by means of the computer program:

[0160] S1, determining a working state of the first optical module and a working state of the second optical module;

[0161] S2, sending the first reset signal to the first optical module according to the working state of the first optical module, the working state of the second optical module, and the first reset signal sending status of the host, so as to send the first reset signal to the device through the first optical module and the second optical module, wherein the first reset signal is used to reset the device and instruct the device to train the communication link with the host.

[0162] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0163] The embodiment of the present application also provides an electronic device, such as Figure 6As shown, the electronic device includes a memory 602 and a processor 604. The memory 602 stores a computer program, and the processor 604 is configured to execute the steps in any of the above method embodiments through the computer program.

[0164] Optionally, in this embodiment, the processor 604 may be configured to perform the following steps through a computer program:

[0165] S1, determining a working state of the first optical module and a working state of the second optical module;

[0166] S2, sending the first reset signal to the first optical module according to the working state of the first optical module, the working state of the second optical module, and the first reset signal sending status of the host, so as to send the first reset signal to the device through the first optical module and the second optical module, wherein the first reset signal is used to reset the device and instruct the device to train the communication link with the host.

[0167] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail herein.

[0168] Alternatively, a person skilled in the art may understand that: Figure 6 The structure shown is for illustration only. Figure 6 The structure of the electronic device is not limited. For example, the electronic device may also include Figure 6 More or fewer components (such as network interfaces, etc.) as shown in, or with Figure 6 Different configurations shown.

[0169] Among them, the memory 602 can be used to store software programs and modules, such as the program instructions / modules corresponding to the reset signal sending method and the reset signal sending device in the embodiment of the present application. The processor 604 executes various functional applications and data processing by running the software programs and modules stored in the memory 602, that is, realizing the above-mentioned reset signal sending method. The memory 602 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 602 may further include a memory remotely arranged relative to the processor 604, and these remote memories may be connected to the terminal via a network. Examples of the above-mentioned networks include but are not limited to the Internet, corporate intranets, local area networks, mobile communication networks and combinations thereof. Among them, the memory 602 can be specifically but not limited to being used to store information such as system configuration files. As an example, such as Figure 6As shown, the memory 602 may include but is not limited to the determination module 52 and the sending module 54 in the reset signal sending device. In addition, other module units in the reset signal sending device may also be included but are not limited to, which will not be described in detail in this example.

[0170] Optionally, the transmission device 606 is used to receive or send data via a network. Specific examples of the network may include a wired network and a wireless network. In one example, the transmission device 606 includes a network adapter (Network Interface Controller, NIC), which can be connected to other network devices and routers via a network cable so as to communicate with the Internet or a local area network. In one example, the transmission device 606 is a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0171] In addition, the electronic device mentioned above further includes: a display 608; and a connection bus 610, which is used to connect various module components in the electronic device mentioned above.

[0172] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps in any one of the above method embodiments are implemented.

[0173] An embodiment of the present application further provides another computer program product, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any of the above method embodiments are implemented.

[0174] The embodiments of the present application also provide a computer program, which includes computer instructions, which are stored in a computer-readable storage medium; a processor of a computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device performs the steps of any one of the above method embodiments.

[0175] Obviously, those skilled in the art should understand that the above modules or steps of the present application can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order from that herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.

[0176] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application shall be included in the protection scope of the present application.

Claims

1. A method for sending a reset signal, characterized in that: Applicable to a communication scenario between a host and a device, the communication scenario comprises a host, a first optical module of the host, a device, and a second optical module of the device; The host transmits electrical signals to the first optical module, the first optical module transmits optical signals to the second optical module, and the second optical module transmits electrical signals to the device; include: Determining a working state of the first optical module and a working state of the second optical module; The first reset signal is sent to the first optical module according to the working state of the first optical module, the working state of the second optical module, and the first reset signal sending condition of the host, so as to send the first reset signal to the device through the first optical module and the second optical module, wherein the first reset signal is used to reset the device and instruct the device to train the communication link with the host.

2. The method according to claim 1, characterized in that: The sending the first reset signal to the first optical module according to the working state of the first optical module, the working state of the second optical module, and the sending condition of the first reset signal of the host comprises: When the working states of the first optical module and the second optical module are both in normal working states and the sending status of the first reset signal is used to indicate that the host has sent the first reset signal, sending the first reset signal to the first optical module; When the working states of the first optical module and the second optical module are both in normal working states and the sending status of the first reset signal indicates that the host has not sent the first reset signal, waiting for the first reset signal sent by the host, and sending the first reset signal to the first optical module when the first reset signal sent by the host is obtained; When the working state of the first optical module is not a normal working state or the working state of the second optical module is not a normal working state, sending the first reset signal to the first optical module is prohibited.

3. The method according to claim 1, characterized in that The method further comprises: After sending the first reset signal to the first optical module, when it is detected that the working state of the first optical module is switched from a normal working state to an abnormal working state within a preset time and then switched to a normal working state again, and / or the working state of the second optical module is switched from a normal working state to an abnormal working state within the preset time and then switched to a normal working state again, sending a second reset signal to the host, wherein the second reset signal is used to instruct the host to send the first reset signal again; When the first reset signal sent by the host is acquired and the working states of the first optical module and the second optical module are both in normal working states, the first reset signal is sent to the first optical module.

4. The method according to claim 1, characterized in that: The method further comprises: In the case of acquiring reset indication information sent by the baseboard management controller of the host, sending a second reset signal to the host, wherein the reset indication information is used to instruct to reset the device and to train the communication link between the host and the device, and the second reset signal is used to instruct the host to send the first reset signal again; When the first reset signal sent by the host is acquired and the working states of the first optical module and the second optical module are both in normal working states, the first reset signal is sent to the first optical module.

5. The method according to claim 1, characterized in that The method further comprises: After sending the first reset signal to the first optical module, when detecting that the working state of the device switches from a normal working state to an abnormal working state within a preset time and switches back to a normal working state, sending a second reset signal to the host, wherein the second reset signal is used to instruct the host to send the first reset signal again; When the first reset signal sent by the host is acquired and the working states of the first optical module and the second optical module are both in normal working states, the first reset signal is sent to the first optical module.

6. The method according to claim 1, characterized in that Determining the working state of the first optical module includes: When the first indication information sent by the baseboard management controller of the host is obtained, it is determined that the working state of the first optical module is a normal working state, wherein the first indication information is the indication information sent by the baseboard management controller of the host when it determines that the first optical module is in an activated state by detecting a status register in the first optical module.

7. The method according to claim 1, characterized in that Determining the working state of the second optical module includes: When the second indication information sent by the baseboard management controller of the host is obtained, it is determined that the working state of the second optical module is a normal working state, wherein the second indication information is the indication information sent by the baseboard management controller of the host after obtaining the third indication information forwarded by the first optical module, and the third indication information is the information sent by the baseboard management controller of the device to the second optical module when it is determined that the second optical module is in an activated state by detecting the status register in the second optical module.

8. The method according to claim 1, characterized in that The method further comprises: Detecting an in-place status signal of the first optical module; When the in-position state signal is used to indicate that the first optical module is in position, controlling the first optical module to enter an initialization process; When an interrupt signal sent by the first optical module is obtained, the baseboard management controller of the host is instructed to process the interrupt of the first optical module.

9. The method according to claim 8, characterized in that The instructing the baseboard management controller of the host to process the interruption of the first optical module includes: Instruct the baseboard management controller of the host to perform the following operations: Determine an interrupt type of the interrupt of the first optical module, and when the interrupt type is the first type, determine a target parameter of a configuration register of the first optical module, wherein the first type of interrupt is an interrupt generated after the first optical module enters an initialization process and the configuration register is configured according to a default configuration parameter of the configuration register; configuring the configuration register of the first optical module according to the target parameter; Clear the interrupt status of the first optical module.

10. The method according to claim 9, characterized in that The determining a target parameter of a configuration register of the first optical module includes: Determining a module type of the first optical module; The target parameter is determined from a configuration file according to the module type of the first optical module, wherein the configuration file contains parameters of configuration registers corresponding to different module types.

11. The method according to claim 9, characterized in that The determining a target parameter of a configuration register of the first optical module includes: Determining a module type of the first optical module; When the module type of the first optical module is the same as the module type of the optical module of the mainboard detected last by the baseboard management controller, the parameters of the configuration register of the optical module of the mainboard detected last are stored as the target parameters.

12. The method according to claim 8, characterized in that The instructing the baseboard management controller of the host to process the interruption of the first optical module includes: Instruct the baseboard management controller of the host to perform the following operations: Determine an interrupt type of the interrupt of the first optical module, and when the interrupt type is a second type, determine the state of the first optical module by detecting a state register in the first optical module, wherein the second type of interrupt is an interrupt generated after the first optical module configures the configuration register of the first optical module according to the target parameters determined by the baseboard management controller, and after the first optical module configures the configuration register of the first optical module according to the target parameters determined by the baseboard management controller, the first optical module updates the state of the first optical module in the state register to an activated state; Clear the interrupt status of the first optical module.

13. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program implements the steps of the method described in any one of claims 1 to 12 when executed by a processor.

14. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method described in any one of claims 1 to 12 are implemented.

15. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the method according to any one of claims 1 to 12 is implemented.

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