Display panel and electronic equipment

Abstract

The invention relates to a display panel and electronic equipment, the display panel comprises a substrate, a bottom shielding metal layer located on the substrate and a pixel circuit, the pixel circuit comprises a plurality of transistors, and at least part of the transistors are located on the bottom shielding metal layer; the bottom shielding metal layer comprises an alternating current signal access port, the alternating current signal access port is used for accessing a square wave alternating current signal, and the square wave alternating current signal is transmitted to the at least part of the transistors through the bottom shielding metal layer so as to perform coupling reset on channels of the at least part of the transistors. Square wave alternating current signals are added to the shielding metal layer through the alternating current signal access port, channel charge reset of a transistor arranged on the bottom shielding metal layer can be effectively promoted, and then the effect of effectively improving screen afterimage and screen switching color cast is achieved.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel and an electronic device. Background Art

[0002] With the rapid development and widespread application of AM-OLED (Active-matrix organic light-emitting diode) technology, the display quality of screens has been significantly improved. However, the current display technology still has the problem of image retention, that is, when the image moves or refreshes quickly, it will leave a blurred or residual image on the screen, which will affect the screen display effect and is not conducive to further improvement of display quality. Summary of the invention

[0003] In order to overcome the problems existing in the related art, the present disclosure provides a display panel and an electronic device.

[0004] According to a first aspect of an embodiment of the present disclosure, there is provided a display panel, including:

[0005] A substrate, a bottom shielding metal layer and a pixel circuit located on the substrate, wherein the pixel circuit includes a plurality of transistors, at least some of the transistors are located on the bottom shielding metal layer;

[0006] The bottom shielding metal layer includes an AC signal access port, which is used to access a square wave AC signal. The square wave AC signal is transmitted from the bottom shielding metal layer to at least part of the transistors to couple and reset the channels of at least part of the transistors.

[0007] Optionally, the display panel further includes an AC signal output circuit;

[0008] The AC signal output circuit is connected to the AC signal access port, and is used to output the square wave AC signal when receiving a first designated signal; the first designated signal is used to indicate the entry into the image blanking time.

[0009] Optionally, the AC signal output circuit is connected to a scanning circuit;

[0010] The scanning circuit is used to input the first designated signal to the AC signal output circuit when it is determined that the last row of scanning lines in the pixel area has been scanned.

[0011] Optionally, the AC signal access port is used to connect to a controller.

[0012] The controller is used to output the square wave AC signal when it is determined that the last row of scan lines in the pixel area has been scanned; and to output a specified DC signal when it is determined that the last row of scan lines in the pixel area has not been scanned.

[0013] Optionally, the pixel circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor and a seventh transistor,

[0014] The first end of the first transistor is used to access a first voltage signal, the second end of the first transistor is connected to a first node, and the control end of the first transistor is used to connect to a driving circuit;

[0015] The first end of the second transistor is connected to the first node, the second end of the second transistor is used to access the display data signal, and the control end of the second transistor is used to connect to the scanning circuit;

[0016] The first end of the third transistor is connected to the first node, the second end of the third transistor is connected to the second node, and the control end of the third transistor is connected to the third node;

[0017] The first end of the fourth transistor is connected to the second node, the second end of the fourth transistor is connected to the fourth node, the control end of the fourth transistor is used to connect to the scanning circuit, and the third node is connected to the fourth node;

[0018] The first end of the fifth transistor is connected to the fourth node, the second end of the fifth transistor is used to access the second voltage signal, and the control end of the fifth transistor is used to connect to the scanning circuit;

[0019] The first end of the sixth transistor is connected to the second node, the second end of the sixth transistor is connected to the anode of the light emitting diode, and the control end of the sixth transistor is used to connect to the driving circuit;

[0020] The first end of the seventh transistor is connected to the anode of the light emitting diode, the second end of the seventh transistor is used to access the third voltage signal, and the control end of the seventh transistor is used to connect to the scanning circuit.

[0021] Optionally, the pixel circuit further includes a target capacitor, a first end of the target capacitor is connected to the third node, and a second end of the target capacitor is used to access the first voltage signal.

[0022] Optionally, the at least part of the transistors include the third transistor and the fourth transistor.

[0023] Optionally, the at least part of the transistors include one or more of a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor and a seventh transistor.

[0024] Optionally, the pixel circuit also includes an eighth transistor, the pixel circuit also includes an eighth transistor, the first end of the eighth transistor is connected to the first node, the second end of the eighth transistor is used to access a fourth voltage signal, and the control end of the eighth transistor is used to connect to a scanning circuit.

[0025] Optionally, the at least part of the transistors include one or more of a third transistor, a fourth transistor, the first transistor, the second transistor, the fifth transistor, the sixth transistor, the seventh transistor and the eighth transistor.

[0026] According to a second aspect of an embodiment of the present disclosure, an electronic device is provided, wherein the electronic device includes the display panel described in the first aspect.

[0027] The technical solution provided by the embodiments of the present disclosure may include the following beneficial effects: by providing a display panel, including: a substrate, a bottom shielding metal layer located on the substrate, and a pixel circuit, the pixel circuit including a plurality of transistors, at least some of the transistors being located above the bottom shielding metal layer; the bottom shielding metal layer including an AC signal access port, the AC signal access port being used to access a square wave AC signal, the square wave AC signal being transmitted from the bottom shielding metal layer to at least some of the transistors to couple and reset the channels of at least some of the transistors. In this way, by adding a square wave AC signal to the shielding metal layer through the AC signal access port, the channel charge reset of the transistors disposed on the bottom shielding metal layer can be effectively promoted, thereby achieving the effect of effectively improving screen afterimages and screen color deviation.

[0028] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0030] Figure 1 is a schematic structural diagram of a display panel shown in an exemplary embodiment of the present disclosure;

[0031] Figure 2 is based on Figure 1 A schematic structural diagram of a display panel shown in the illustrated embodiment;

[0032] Figure 3 is based on Figure 1 A schematic diagram of the structure of another display panel shown in the illustrated embodiment;

[0033] Figure 4 is based on Figure 1 A circuit diagram of a pixel circuit shown in the illustrated embodiment;

[0034] Figure 5 is based on Figure 4 A schematic diagram of a control timing diagram shown in the illustrated embodiment;

[0035] Figure 6 is based on Figure 4 A schematic diagram of another control timing diagram shown in the illustrated embodiment;

[0036] Figure 7 is based on Figure 4 A circuit diagram of a pixel circuit shown in the illustrated embodiment;

[0037] Figure 8 is based on Figure 7 The illustrated embodiment shows a schematic diagram of a control timing diagram. DETAILED DESCRIPTION

[0038] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. Instead, they are merely examples consistent with some aspects of the present disclosure as detailed in the appended claims.

[0039] Figure 1 is a schematic diagram of a display panel structure shown in an exemplary embodiment of the present disclosure; Figure 1 As shown, the display panel comprises: a substrate 101, a bottom shielding metal layer 102 located on the substrate 101, and a pixel circuit, wherein the pixel circuit comprises a plurality of transistors, at least some of the transistors are located on the bottom shielding metal layer;

[0040] The bottom shielding metal layer 102 includes an AC signal access port I, which is used to access a square wave AC signal. The square wave AC signal is transmitted from the bottom shielding metal layer to at least part of the transistors to couple and reset the channels of at least part of the transistors.

[0041] The transistor may be a TFT (Thin Film Transistor), the bottom shielding metal layer 102 may be a BSM (Bottom-up Spatially Selective Metamaterials, a spatially selective metamaterial structure constructed from the bottom to the top) layer, the transistor in the pixel circuit may be located in the interconnection layer GI, a buffer layer BUF is provided between the BSM layer and the interconnection layer GI, and the interconnection layer GI overlaps with the BSM to achieve that at least some of the transistors in the pixel circuit are located above the bottom shielding metal layer 102. The square wave AC signal may be a PWM signal, a pulse signal, or other square wave signals.

[0042] It should be noted that the channel of a transistor refers to the area inside the transistor for current flow. The voltage of the control terminal (gate) can change the conductivity of the channel. When an appropriate voltage is applied to the control terminal, the electric field formed can attract or repel the carriers under the control terminal, thereby regulating the conductivity of the channel. In this way, the on and off of the transistor can be controlled by the voltage of the control terminal to achieve current control. That is to say, when the gate voltage of the TFT is greater than or equal to the threshold voltage, the TFT is turned on, that is, a conductive channel is formed, allowing current to pass through, but usually due to charge accumulation, voltage bias, etc., the TFT channel drifts and other reasons, resulting in channel instability. The present disclosure adds a square wave AC signal to the BSM, and the square wave AC signal is transmitted to the TFT channel through coupling, changes the charge distribution of the TFT channel, and resets it to the initial state to complete the coupling reset of the channel. Through the operation of coupling reset, the drift and instability in the TFT channel can be effectively eliminated, ensuring the performance and stability of the TFT channel. Thereby, it is possible to effectively reduce the artifacts and distortion of the image, improve the problems of screen afterimage, screen color deviation, etc., and help improve the display quality and the reliability of image display.

[0043] The above technical solution, by adding a square wave AC signal to the bottom shielding metal layer through the AC signal access port, can effectively promote the channel charge reset of the transistor arranged on the shielding metal layer, thereby achieving the effect of effectively improving screen afterimage and screen color deviation.

[0044] Figure 2 is based on Figure 1 The embodiment shown is a schematic diagram of a structure of a display panel; Figure 2 As shown, the display panel further includes an AC signal output circuit 103;

[0045] The AC signal output circuit 103 is connected to the AC signal access port I, and is used to output the square wave AC signal when receiving a first designated signal; the first designated signal is used to indicate the entry into the image blanking time.

[0046] Among them, the AC signal output circuit can be any one of an amplifier circuit, an AC coupler, a signal generator, an analog modulation circuit and a digital to analog converter. The amplifier circuit can amplify the input AC signal to the required amplitude; the AC coupler can separate the input signal from the DC and transmit the AC signal; the signal generator is used to generate an AC signal with a specific frequency, amplitude and waveform; the analog modulation circuit can modulate the low-frequency signal onto a high-frequency carrier to generate a corresponding AC signal; the digital to analog converter (DAC) can convert the digital signal into an analog signal output to obtain the required square wave AC signal.

[0047] In addition, the image blanking time can be understood as the time interval from when the display panel displays a certain image to when it switches to completely black (or other specific colors). The first specified signal can be a specified voltage signal or current signal, a pulse signal of a specified frequency, a digital signal or a communication protocol signal.

[0048] The above technical solution, by providing a square wave AC signal to the bottom shielding metal layer 102 through the AC signal access port I by the AC signal output circuit when entering the image blanking time, can promote the channel charge resetting of the transistor arranged on the bottom shielding metal layer during the image blanking time, thereby effectively improving the effects of screen afterimage and screen color deviation.

[0049] Optionally, the AC signal output circuit 103 is connected to the scanning circuit 104;

[0050] The scanning circuit 104 is used to input the first designated signal to the AC signal output circuit 103 when it is determined that the last scanning line in the pixel area has been scanned.

[0051] Among them, the scanning circuit (i.e., SCAN circuit) is used to scan the pixels of the display row by row or column by column according to a specific sequence, and transmit the corresponding image data to the pixel circuit to realize the display of the image. The pixel area refers to the area on the display panel used to display the image, which is usually composed of small areas corresponding to multiple rows of pixel points. The size and number of the pixel area depend on the resolution of the display panel; the pixel circuit is located in the pixel area and is used to control and drive the behavior of each pixel point; the scanning line is a horizontal line in the display panel used to scan and refresh the pixels row by row. Each scanning line is responsible for activating a row of pixels. During the scanning process, it can start from the top of the screen and scan row by row along the horizontal direction to the bottom of the screen to refresh each row of pixels to the correct brightness and color; the pixel is located in the pixel area. There is usually a light-emitting element in each pixel area on the display panel, such as a liquid crystal unit in a liquid crystal display or an OLED point in an organic light-emitting diode display. The light-emitting element can emit light or adjust the light transmittance according to the control signal of the pixel circuit to form an image.

[0052] The above technical scheme, when the scanning circuit 104 determines that the last row of scanning lines in the pixel area has been scanned, inputs the first designated signal to the AC signal output circuit 103, and controls the generation of the square wave AC signal through the first designated signal, can effectively ensure that the square wave AC signal is generated when entering the image blanking time, thereby effectively ensuring the reliability of the generated square wave AC signal.

[0053] Figure 3 is based on Figure 1 The embodiment shown is a schematic diagram of another structure of a display panel; Figure 3 As shown, the AC signal access port I is used to connect to the controller 105.

[0054] The controller 105 is used to output the square wave AC signal when it is determined that the last row of scan lines in the pixel area has been scanned, and to output a specified DC signal when it is determined that the last row of scan lines in the pixel area has not been scanned.

[0055] The controller 105 may be a single chip microcomputer, a PLC (Programmable Logic Controller), an FPGA (Field-Programmable Gate Array), or a hardware chip with specific functions integrated therein. In one embodiment, the controller may be a row driver or a column driver in a display panel, wherein the row driver and the column driver are used to drive the refresh of pixels row by row or column by column; in another embodiment, the controller may be a control logic circuit in a display panel, which may receive a signal from a drive circuit, and perform image processing and control according to the signal, and may be used to generate brightness and color control signals of pixels to ensure correct image display; in another embodiment, the controller may be a core controller (i.e., a display controller) in a display panel, and the display controller may be an integrated circuit chip, which may receive image data from a computer or other data source, and convert it into a signal format suitable for a display screen, and then send the signal to a driver IC and a control logic circuit.

[0056] In the above technical scheme, the controller 105 outputs the square wave AC signal when determining that the last row of scanning lines in the pixel area has been scanned, which can also effectively ensure that the square wave AC signal is generated when entering the image blanking time, thereby ensuring the reliability of the generated square wave AC signal. The AC signal access port I then provides the square wave AC signal to the bottom shielding metal layer 102, which can effectively promote the channel charge reset of the transistor arranged on the bottom shielding metal layer, thereby achieving the effect of effectively improving the screen afterimage and screen color deviation.

[0057] An exemplary embodiment of the present disclosure provides a pixel circuit, the pixel circuit comprising a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor and a seventh transistor;

[0058] The first end of the first transistor is used to access a first voltage signal, the second end of the first transistor is connected to a first node, and the control end of the first transistor is used to connect to a driving circuit;

[0059] The first end of the second transistor is connected to the first node, the second end of the second transistor is used to access the display data signal, and the control end of the second transistor is used to connect to the scanning circuit;

[0060] The first end of the third transistor is connected to the first node, the second end of the third transistor is connected to the second node, and the control end of the third transistor is connected to the third node;

[0061] The first end of the fourth transistor is connected to the second node, the second end of the fourth transistor is connected to the fourth node, the control end of the fourth transistor is used to connect to the scanning circuit, and the third node is connected to the fourth node;

[0062] The first end of the fifth transistor is connected to the fourth node, the second end of the fifth transistor is used to access the second voltage signal, and the control end of the fifth transistor is used to connect to the scanning circuit;

[0063] The first end of the sixth transistor is connected to the second node, the second end of the sixth transistor is connected to the anode of the light emitting diode, and the control end of the sixth transistor is used to connect to the driving circuit;

[0064] The first end of the seventh transistor is connected to the anode of the light-emitting diode, the second end of the seventh transistor is used to access the third voltage signal, and the control end of the seventh transistor is used to connect to the scanning circuit. The pixel circuit also includes a target capacitor, the first end of the target capacitor is connected to the third node, and the second end of the target capacitor is used to access the first voltage signal.

[0065] For example, Figure 4 As shown, Figure 4 is based on Figure 1The embodiment shown is a circuit diagram of a pixel circuit; the pixel circuit includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7 and a target capacitor Cst, the first end of the first transistor T1 is used to access a first voltage signal VDD, the second end of the first transistor T1 is connected to the first end of the second transistor T2 and the first end of the third transistor T3, the second end of the second transistor T2 is used to access a display data signal VDATA, the control end of the second transistor T2 is used to connect to a scan circuit, the second end of the third transistor T3 is connected to the first end of the fourth transistor T4 and the first end of the sixth transistor T6, and the third transistor T4 is connected to the first end of the sixth transistor T6. The control end of the body transistor T3 is simultaneously connected to the first end of the target capacitor Cst, the second end of the fourth transistor T4 and the first end of the fifth transistor T5, the second end of the target capacitor Cst is used to access the first voltage signal VDD, the second end of the fifth transistor T5 is used to access the second voltage signal VREF1, the control end of the fifth transistor T5 is used to connect the scanning circuit, the second end of the sixth transistor T6 is connected to the anode of the light emitting diode VSS and the first end of the seventh transistor T7, the second end of the seventh transistor T7 is used to access the third voltage signal VREF2, the control end of the seventh transistor T7 is used to connect the scanning circuit, and the control end of the first transistor T1 and the control end of the sixth transistor T6 are used to connect the driving circuit.

[0066] Among them, the driving circuit is used to provide EM (Emission Control Signal, emission control signal), and the emission control signal is used to control the emission or shutdown of the pixel point. When the emission control signal is transmitted to the current pixel, the current pixel point will be driven to emit light or display color, so as to display an image or content on the screen. When the emission control signal is not activated, the pixel point will be closed and will not emit light. The scanning circuit is used to generate appropriate control signals and timing to ensure that each pixel point is driven and updated in the correct order. The scanning circuit can generally include a clock generator for generating a clock signal for synchronous operation and controlling the speed and time of scanning; a row scanning driver for driving the pixels of each row in turn according to the row scanning signal; a column driver for driving the pixels of a specific column according to the column scanning signal; a control logic circuit for generating and adjusting the control signals of the row scanning and column scanning, and ensuring that the image data is transmitted to the corresponding pixel points in the correct order; a data transmission line: used to transmit the display data signal VDATA from the control logic circuit to each pixel point in the pixel circuit. The scanning circuit scans the pixels row by row or column by column, and transmits the image data to the corresponding pixel points in order, thereby realizing the display of the image. Able to drive a large number of pixels quickly and accurately, and update image content as needed to provide smooth and clear image display effects.

[0067] In one implementation, the at least part of the transistors include the third transistor T3 and the fourth transistor T4.

[0068] In another embodiment, the at least part of the transistors include one or more of a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6 and a seventh transistor T7.

[0069] It should be noted that the scanning circuit can output a first scanning control signal SP1, a second scanning control signal SP2, a third scanning control signal SN(n) and a fourth scanning control signal SN(n-5). Figure 4 The control terminals of the second transistor T2, the fourth transistor T4 and the seventh transistor T7 are connected to the second scanning control signal SP2, the control terminal of the fifth transistor T5 is connected to the first scanning control signal SP1, the control terminal of the first transistor T1 and the control terminal of the sixth transistor T6 are connected to EM, and a square wave AC signal is added to the bottom shielding metal layer (BSM), then a square wave AC signal is presented. Figure 5 The control effect shown in the timing control diagram is as follows. Figure 5 is based on Figure 4 The embodiment shown is a schematic diagram of a control timing diagram. Figure 4The control end of the second transistor T2 in the circuit is connected to the second scanning control signal SP2, the control end of the fourth transistor T4 is connected to the third scanning control signal SN(n), the control end of the fifth transistor T5 is connected to the fourth scanning control signal SN(n-5), the control end of the first transistor T1 and the control end of the sixth transistor T6 are connected to EM, and a square wave AC signal is added to the bottom shielding metal layer (BSM), then the circuit is presented. Figure 6 The control effect shown in the timing control diagram is as follows. Figure 6 is based on Figure 4 The embodiment shown is a schematic diagram of another control timing diagram, such as Figure 5 and Figure 6 As shown, by adding a square wave AC signal to at least part of the transistor, the high and low voltage continuous conversion characteristics of the square wave AC signal can rearrange the residual charge of the TFT during the signal Blanking time (image blanking time), so that the TFT can always maintain stable characteristics without being affected by long-term charge accumulation, thereby eliminating image afterimages and obtaining stable screen quality.

[0070] In another exemplary embodiment of the present disclosure, the pixel circuit may further include an eighth transistor, a first end of the eighth transistor is connected to the first node, a second end of the eighth transistor is used to access a fourth voltage signal, and a control end of the eighth transistor is used to connect to a scanning circuit.

[0071] For example, Figure 7 As shown, Figure 7 is based on Figure 4 The illustrated embodiment shows a circuit diagram of a pixel circuit; the pixel circuit also includes an eighth transistor T8, a first end of the eighth transistor T8 is connected to the second end of the first transistor T1, the first end of the third transistor T3 and the first end of the second transistor T2, and a second end of the eighth transistor T8 is used to access a fourth voltage signal DVH.

[0072] The at least part of the transistors include a third transistor T3 and a fourth transistor T4, and one or more of the first transistor T1, the second transistor T2, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7 and the eighth transistor T8.

[0073] It should be noted that the scanning circuit can output a fifth scanning control signal S1N, a sixth scanning control signal S2N, a seventh scanning control signal SP and an eighth scanning control signal SP*. Figure 8 yes Figure 7 The corresponding control timing diagram is as follows: Figure 8As shown, the control end of the fourth transistor T4 is used to access the sixth scanning control signal S2N, the control end of the fifth transistor T5 is used to access the fifth scanning control signal S1N, the control end of the second transistor T2 is used to access the seventh scanning control signal SP, the control end of the third transistor T3 and the control end of the eighth transistor T8 are used to access the eighth scanning control signal SP*. By adding a square wave AC signal to at least part of the transistors, the high and low voltages of the square wave AC signal are continuously converted. The residual charge of the TFT can be rearranged during the signal Blanking time (image blanking time), so that the TFT can always maintain stable characteristics without being affected by long-term charge accumulation, thereby eliminating image afterimages and obtaining stable screen quality.

[0074] The above technical solution, by adding a square wave AC signal to the bottom shielding metal layer through the AC signal access port, can effectively promote the channel charge reset of the transistor arranged on the shielding metal layer, thereby achieving the effect of effectively improving screen afterimage and screen color deviation.

[0075] Another exemplary embodiment of the present disclosure provides an electronic device, the electronic device comprising the above Figure 1 , Figure 2 , Figure 3 , Figure 4 as well as Figure 7 The display panel as described above.

[0076] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the present disclosure. The present disclosure is intended to cover any variations, uses or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The description and examples are to be considered as exemplary only, and the true scope and spirit of the present disclosure are indicated by the following claims.

[0077] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A display panel, characterized in that: include: A substrate, a bottom shielding metal layer and a pixel circuit located on the substrate, wherein the pixel circuit includes a plurality of transistors, at least some of the transistors are located on the bottom shielding metal layer; The bottom shielding metal layer includes an AC signal access port, which is used to access a square wave AC signal. The square wave AC signal is transmitted from the bottom shielding metal layer to at least part of the transistors to couple and reset the channels of at least part of the transistors.

2. The display panel according to claim 1, characterized in that: The display panel also includes an AC signal output circuit; The AC signal output circuit is connected to the AC signal access port, and is used to output the square wave AC signal when receiving a first designated signal; the first designated signal is used to indicate the entry into the image blanking time.

3. The display panel according to claim 2, characterized in that: The AC signal output circuit is connected to the scanning circuit; The scanning circuit is used to input the first designated signal to the AC signal output circuit when it is determined that the last row of scanning lines in the pixel area has been scanned.

4. The display panel according to claim 1, characterized in that: The AC signal access port is used to connect to the controller. The controller is used to output the square wave AC signal when it is determined that the last row of scan lines in the pixel area has been scanned; and to output a specified DC signal when it is determined that the last row of scan lines in the pixel area has not been scanned.

5. The display panel according to claim 1, characterized in that: The pixel circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor and a seventh transistor; The first end of the first transistor is used to access a first voltage signal, the second end of the first transistor is connected to a first node, and the control end of the first transistor is used to connect to a driving circuit; The first end of the second transistor is connected to the first node, the second end of the second transistor is used to access the display data signal, and the control end of the second transistor is used to connect to the scanning circuit; The first end of the third transistor is connected to the first node, the second end of the third transistor is connected to the second node, and the control end of the third transistor is connected to the third node; The first end of the fourth transistor is connected to the second node, the second end of the fourth transistor is connected to the fourth node, the control end of the fourth transistor is used to connect to the scanning circuit, and the third node is connected to the fourth node; The first end of the fifth transistor is connected to the fourth node, the second end of the fifth transistor is used to access the second voltage signal, and the control end of the fifth transistor is used to connect to the scanning circuit; The first end of the sixth transistor is connected to the second node, the second end of the sixth transistor is connected to the anode of the light emitting diode, and the control end of the sixth transistor is used to connect to the driving circuit; The first end of the seventh transistor is connected to the anode of the light emitting diode, the second end of the seventh transistor is used to access the third voltage signal, and the control end of the seventh transistor is used to connect to the scanning circuit.

6. The display panel according to claim 5, characterized in that: The pixel circuit further includes a target capacitor, a first end of the target capacitor is connected to the third node, and a second end of the target capacitor is used to access the first voltage signal.

7. The display panel according to claim 5, characterized in that: The at least part of the transistors includes the third transistor and the fourth transistor.

8. The display panel according to claim 5, characterized in that: The at least part of the transistors include one or more of a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor and a seventh transistor.

9. The display panel according to claim 5, characterized in that: The pixel circuit further includes an eighth transistor, a first end of the eighth transistor is connected to the first node, a second end of the eighth transistor is used to access a fourth voltage signal, and a control end of the eighth transistor is used to connect to a scanning circuit.

10. The display panel according to claim 9, characterized in that: The at least part of the transistors include one or more of a third transistor, a fourth transistor, the first transistor, the second transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor.

11. An electronic device, characterized in that: The electronic device comprises the display panel according to any one of claims 1 to 10.

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