Chip Yield Detection Method, Its System, Computer Device, and Computer Readable Storage Medium

Abstract

The present invention relates to the technical field of chip detection, and particularly relates to a chip yield detection method and its system, computer equipment, and computer-readable storage medium. The steps are as follows: Identify the test SNP files of each device on the wafer and convert the SNP files into test data; Customize the SPEC file, and the customized content of the SPEC file includes dB value, test items, maximum and minimum values under each test item; Read the test data, calculate the test values under each test item according to the test items defined in the SPEC file, and compare the test values with the maximum and minimum values under the corresponding test items to obtain the test results of each test item. Determine whether the device is qualified according to the test results of each test item; Calculate the yield of the entire wafer according to the qualified status of each device and output a yield data file; The present invention has automatic detection and statistics, strong versatility, and high reliability in yield detection and statistics.

Description

Technical Field

[0001] The present invention relates to the technical field of chip detection, and particularly relates to a chip yield detection method, a system thereof, a computer device, and a computer-readable storage medium. Background Art

[0002] As the core device of intelligent devices, the performance of a chip determines the working performance of intelligent devices. To detect the performance of a chip, various tests need to be performed on all devices on the chip wafer, which involves the problem of yield statistics. Since there are a large number of devices on the wafer, if the traditional method is used for manual detection and yield statistics, the workload is obviously huge, and the reliability of the statistical results is difficult to guarantee. Currently, there are also special detection methods to achieve automatic detection and statistics of chip good product rates. Since the results presented when testing the devices on the wafer are waveform diagrams, a dB value needs to be set before yield detection. To ensure that there are corresponding frequency points for the set dB value on the waveform diagram, the dB values set by existing detection methods usually default to selecting the maximum dB value or the minimum dB value in the waveform diagram. However, the maximum dB value and the minimum dB value will fluctuate within a large range due to fluctuations in device production processes. Especially for filter products, the frequency corresponding to the maximum value often fluctuates greatly, resulting in large errors in the test results under test items and poor versatility, thus affecting the reliability of yield detection and statistics. Summary of the Invention

[0003] The technical problem to be solved by the present invention is: to overcome the deficiencies in the prior art and provide a chip yield detection method, a system thereof, a computer device, and a computer-readable storage medium that are capable of automatic detection and statistics, have strong versatility, and high reliability in yield detection and statistics.

[0004] The technical solution adopted by the present invention to solve its technical problems is: a chip yield detection method, the steps of which are as follows:

[0005] S1. Identify the SNP files of each device on the wafer and convert the SNP files into test data;

[0006] S2. Customize the SPEC file, and the customized content of the SPEC file includes the dB value, test items, the maximum value and the minimum value under each test item;

[0007] S3. Read the test data, calculate the test values under each test item according to the test items defined in the SPEC file, compare the test values with the maximum value and the minimum value under the corresponding test item, obtain the test results of each test item, and determine whether the device is qualified according to the test results of each test item;

[0008] S4. Calculate the yield of the entire wafer according to the qualified status of each device in step S3 and output a yield data file.

[0009] Further, the custom rule for the dB value is as follows:

[0010] Obtain the maximum dB value in the SNP file, set a preset dB value, add the maximum dB value and the preset dB value to obtain a custom dB value. If the custom dB value has a corresponding dB value in the SNP file, determine the frequency point corresponding to that dB value; if the custom dB value does not have a corresponding dB value in the SNP file, perform linearization processing.

[0011] Further, the steps of the linearization processing are as follows:

[0012] Taking the custom dB value as the base point, in the test data converted from the SNP file, search for frequency points towards the low frequency / high frequency according to the rules defined in the test item, and obtain two frequency points A and B adjacent to the custom dB value, where the dB value of frequency point A is less than the custom dB value, and the dB value of frequency point B is greater than the custom dB value; perform linearization with frequency point A and frequency point B as endpoints, and calculate the frequency point corresponding to the custom dB value according to the linearization function.

[0013] Further, the test items include minimum insertion loss, left shoulder frequency, right shoulder frequency, bandwidth, and center frequency.

[0014] Further, if the test value of the test item in step S3 is between the minimum value and the maximum value of that test item, the test result of that test item is PASS; otherwise, the test result is FAIL.

[0015] Further, when the test results of all test items of the device on the wafer in step S4 are all PASS, the device is qualified; otherwise, the device is unqualified.

[0016] A chip yield detection system includes

[0017] A data conversion module for identifying the SNP files of each device on the wafer and converting the SNP files into test data;

[0018] A custom module for defining the dB value, test items, maximum value and minimum value under each test item in the SPEC file;

[0019] A yield output module for calculating the test values under each test item according to the test items defined in the SPEC file, comparing the test values with the maximum value and the minimum value under the corresponding test item to obtain the test results of each test item, judging whether each device on the wafer is qualified according to the test results of all test items under each device, and then calculating the yield of the entire wafer according to the qualified status of each device and outputting a yield data file.

[0020] A computer device includes a memory and a processor. A computer program is set in the memory, and the processor executes the above chip yield detection method by calling the computer program.

[0021] A computer-readable storage medium stores a computer program, and when the computer program is called by a processor, the above chip yield detection method is executed.

[0022] The beneficial effects of the present invention are as follows:

[0023] (1) In the present invention, the test values under each test item are calculated from the test items defined by the SPEC file, and the test values are compared with the maximum and minimum values under the corresponding test items to obtain the test results of each test item. Whether the device is qualified is judged according to the test results of all test items of the device. Finally, the yield of the whole wafer is calculated according to the qualified status of each device, and a yield data file is output. The detection and statistics of the chip yield are automated, and the reliability is high.

[0024] (2) In the present invention, the dB value can be customized, and the maximum dB value or the minimum dB value in the waveform diagram is no longer default selected. It has customizability, and combined with linearization processing, it is ensured that there is always a corresponding frequency point for the customized dB value on the waveform diagram, reducing the fluctuation amplitude, reducing the test error, making the calculation result more accurate, and thus making the yield result more accurate.

[0025] (3) In the present invention, the SPEC file can be customized, which is convenient for processing various test items. The same SNP file can be simulated multiple times to obtain the yield data under different SPEC files, and specific functions are realized through the definition of different characters in the SPEC file, such as different calculation modes and frequency values at different dBs. Description of the Drawings

[0026] The present invention will be further described below with reference to the drawings and embodiments.

[0027] Figure 1 is a flowchart of the chip yield detection method in the present invention;

[0028] Figure 2 is a schematic diagram of the linearization process of the customized dB value in the present invention. Detailed Embodiments

[0029] The present invention will be further described below with reference to the drawings and preferred embodiments. These drawings are all simplified schematic diagrams, only illustrating the basic structure of the present invention in a schematic way, so they only show the components related to the present invention.

[0030] Embodiment 1

[0031] As Figure 1As shown in the figure, a method for detecting chip yield is as follows:

[0032] S1. Identify the SNP files of each device on the wafer and convert the SNP files into test data;

[0033] S2. Customize the SPEC file. The customized content of the SPEC file includes dB value, test items, maximum and minimum values under each test item;

[0034] S3. Read the test data, calculate the test values under each test item according to the test items defined in the SPEC file, compare the test values with the maximum and minimum values under the corresponding test items, obtain the test results of each test item, and determine whether the device is qualified according to the test results of each test item;

[0035] S4. Calculate the yield of the entire wafer according to the qualified status of each device in step S3 and output the yield data file.

[0036] Calculate the test values under each test item corresponding to the test items customized by the SPEC file, compare the test values with the maximum and minimum values under the corresponding test items, obtain the test results of each test item, determine whether the device is qualified according to the test results of all test items of the device, and finally calculate the yield of the entire wafer according to the qualified status of each device and output the yield data file. The detection and statistics of chip yield are automated and highly reliable. At the same time, the SPEC file can be customized to facilitate the processing of various test items. The same SNP file can be simulated multiple times to obtain the yield data under different SPEC files, and specific functions can be implemented through the definition of different characters in the SPEC file, such as different calculation modes and frequency values under different dBs.

[0037] Specifically, the SNP file contains the waveform diagrams of each device, which can be converted into test data through MATLAB software; the test items include minimum insertion loss, left shoulder frequency, right shoulder frequency, bandwidth, and center frequency; the yield data file includes the yield of all test items and the yield of the wafer.

[0038] The custom rule of the dB value is as follows:

[0039] Obtain the maximum dB value in the SNP file, set the preset dB value, add the maximum dB value and the preset dB value to get the custom dB value. If the custom dB value has a corresponding dB value in the SNP file, determine the frequency point corresponding to the dB value; if the custom dB value does not have a corresponding dB value in the SNP file, perform linearization processing.

[0040] The dB value can be customized, no longer defaulting to selecting the maximum or minimum dB value in the waveform diagram, with customizability. Moreover, combined with linearization processing, it ensures that there is always a corresponding frequency point for the custom dB value on the waveform diagram, reducing the fluctuation amplitude, minimizing the test error, making the calculation result more accurate, and thus making the yield result more accurate.

[0041] It should be noted that the custom dB value is preferably selected in the relatively steep area of the waveform diagram to further reduce the fluctuation amplitude of the frequency value.

[0042] The steps of the linearization process are as follows:

[0043] Taking the custom dB value as the base point, in the test data converted from the SNP file, search for frequency points towards the low-frequency / high-frequency according to the rules defined in the test item, and obtain two frequency points A and B adjacent to the custom dB value, where the dB value of frequency point A is less than the custom dB value, and the dB value of frequency point B is greater than the custom dB value; linearize with frequency points A and B as endpoints, and calculate the frequency point corresponding to the custom dB value according to the linearization function.

[0044] The following combines Figure 2 Specifically illustrate the linearization process:

[0045] Figure 2 There are several frequency points, corresponding to several test data, and the maximum dB value is -1 dB: If the preset dB value is -4 dB, then the custom dB value is -5 dB. Obviously, there is a corresponding dB value for this custom dB value in the SNP file, so determine the frequency point corresponding to this dB value; if the preset dB value is -5 dB, then the custom dB value is -6 dB. Obviously, there is no corresponding dB value for this custom dB value in the SNP file, so linearize with frequency points A and B as endpoints, and calculate the frequency point corresponding to the custom dB value according to the linearization function.

[0046] If the test value of the test item in step S3 is between the minimum and maximum values of this test item, then the test result of this test item is PASS; otherwise, the test result is FAIL.

[0047] In step S4, when the test results of all test items of the device on the wafer are PASS, then the device is qualified; otherwise, the device is unqualified.

[0048] Embodiment 2

[0049] A chip yield detection system includes

[0050] A data conversion module for identifying the SNP files of each device on the wafer and converting the SNP files into test data;

[0051] A custom module for defining dB values, test items, maximum and minimum values under each test item in the SPEC file;

[0052] A yield output module for calculating test values under each test item according to the test items defined in the SPEC file, comparing the test values with the maximum and minimum values under the corresponding test items to obtain test results for each test item, determining whether each device on the wafer is qualified based on the test results of all test items for each device, and then calculating the yield of the entire wafer based on the qualified status of each device and outputting a yield data file.

[0053] Example 3

[0054] A computer device includes a memory and a processor. A computer program is set in the memory, and the processor executes the chip yield detection method in Example 1 by calling the computer program.

[0055] Example 4

[0056] A computer-readable storage medium stores a computer program, and when the computer program is called by a processor, it executes the chip yield detection method in Example 1.

[0057] The above embodiments are only for illustrating the technical concept and features of the present invention, and the purpose is to enable those skilled in the art to understand the content of the present invention and implement it. It cannot be used to limit the protection scope of the present invention. Any equivalent changes or modifications made according to the spirit of the present invention should be covered within the protection scope of the present invention.

Claims

1. A method for detecting chip yield, characterized in that The steps are as follows: S1. Identify the SNP files of each device on the wafer and convert the SNP files into test data; wherein, the test data are several frequency points and their corresponding several dB values; S2. Customize the SPEC file. The customized content of the SPEC file includes dB values, test items, the maximum and minimum values under each test item; wherein, the test items include minimum insertion loss, left shoulder frequency, right shoulder frequency, bandwidth, and center frequency; S3. Read the test data, calculate the test values under each test item according to the test items defined in the SPEC file, compare the test values with the maximum and minimum values under the corresponding test items, obtain the test results of each test item, and determine whether the device is qualified according to the test results of each test item; S4. Calculate the yield of the entire wafer according to the qualified status of each device in step S3 and output a yield data file; The custom rule of the dB value is as follows: Obtain the maximum dB value in the SNP file, set a preset dB value, add the maximum dB value and the preset dB value to get a custom dB value. If there is a corresponding dB value for the custom dB value in the SNP file, determine the frequency point corresponding to the dB value; if there is no corresponding dB value for the custom dB value in the SNP file, perform linearization processing; Wherein, the steps of the linearization processing are as follows: Taking the custom dB value as the base point, in the test data converted from the SNP file, search for frequency points towards the low frequency / high frequency according to the rules defined in the test item, and obtain two adjacent frequency points A and frequency point B of the custom dB value, where the dB value of frequency point A is less than the custom dB value, and the dB value of frequency point B is greater than the custom dB value. Linearize with frequency point A and frequency point B as endpoints, and calculate the frequency point corresponding to the custom dB value according to the linearization function.

2. The chip yield detection method according to claim 1, wherein If the test value of the test item in step S3 is between the minimum value and the maximum value under the test item, the test result of the test item is PASS; otherwise, the test result is FAIL.

3. The chip yield detection method according to claim 2, characterized in that, In step S4, when the test results of all test items of the device on the wafer are PASS, the device is qualified; otherwise, the device is unqualified.

4. A chip yield detection system, which adopts the chip yield detection method described in any one of claims 1-3, and is characterized in that, including A data conversion module for identifying the SNP files of each device on the wafer and converting the SNP files into test data; A customization module for defining the dB values, test items, the maximum and minimum values under each test item in the SPEC file; A yield output module for calculating the test values under each test item according to the test items defined in the SPEC file, comparing the test values with the maximum and minimum values under the corresponding test items, obtaining the test results of each test item, judging whether each device on the wafer is qualified according to the test results of all test items under each device, and then calculating the yield of the entire wafer according to the qualified status of each device and outputting a yield data file.

5. A computer device, characterized in that, including a memory and a processor. A computer program is set in the memory, and the processor executes any one of the chip yield detection methods in claims 1-3 by calling the computer program.

6. A computer-readable storage medium, characterized in that, A computer program is stored thereon, and when the computer program is called by a processor, it executes the chip yield detection method according to any one of claims 1-3.

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