Task scheduling method, task scheduler and storage medium

Abstract

The embodiment of the invention discloses a task scheduling method, a task scheduler and a storage medium, the task scheduling method is applied to the task scheduler, and the task scheduler comprises a resource management unit and an instruction control unit. The task scheduling method comprises the following steps: assembling received input thread data into a shader task through the resource management unit; the input thread data comprises an expanded first control domain segment, and the first control domain segment is used for determining whether the shader task needs to execute a software control instruction or not; under the condition that the shader task does not need to execute a software control instruction, the shader task is directly issued to a shader; and under the condition that the shader task needs to execute the software control instruction, after the instruction control unit executes the software control instruction, the shader task is issued to a shader.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of graphics processing technology, and in particular to a task scheduling method, a task scheduler, and a storage medium. Background Art

[0002] In the research on Graphics Processing Unit (GPU), multi-threaded and multi-tasking parallelism is the main goal, and the ability to timely assemble input thread data such as vertices, geometry, pixels or computing units into shader tasks and dispatch them to shader running units to make full use of on-chip storage and computing resources to hide the latency of shader task operation is the main difficulty at present. In related technologies, pure hardware task scheduling technology or software-controlled task scheduling technology is usually used to implement shader task scheduling; both technologies have corresponding problems, such as: pure hardware task scheduling technology is over-hardware, so there is a problem that related adjustments and optimizations cannot be made; software-controlled task scheduling technology has the problem of involving too many instructions and requiring storage before scheduling. Summary of the invention

[0003] The embodiment of the present application provides a task scheduling technical solution.

[0004] The technical solution of the embodiment of the present application is implemented as follows:

[0005] An embodiment of the present application provides a task scheduling method, which is applied to a task scheduler, wherein the task scheduler includes a resource management unit and an instruction control unit, and the task scheduling method includes: assembling received input thread data into a shader task through the resource management unit; the input thread data includes an extended first control domain segment, and the first control domain segment is used to determine whether the shader task needs to execute software control instructions; if the shader task does not need to execute software control instructions, directly sending the shader task to the shader; if the shader task needs to execute software control instructions, after the instruction control unit executes the software control instructions, sending the shader task to the shader.

[0006] An embodiment of the present application also provides a task scheduler, which includes a resource management unit and an instruction control unit, wherein: the resource management unit is configured to assemble received input thread data into a shader task, the input thread data includes an extended first control domain segment, and the first control domain segment is used to determine whether the shader task needs to execute software control instructions; the resource management unit is also configured to directly send the shader task to the shader when the shader task does not need to execute software control instructions; the resource management unit is also configured to send the shader task to the shader after the instruction control unit executes the software control instructions when the shader task needs to execute software control instructions.

[0007] Correspondingly, an embodiment of the present application further provides a computer-readable storage medium, on which computer-executable instructions are stored. After the computer-executable instructions are executed, the task scheduling method described above can be implemented.

[0008] Beneficial effects of this application:

[0009] By introducing an extended first control domain segment into the input thread data, the task scheduler can flexibly handle different types of shader tasks, that is, dynamically determine whether software control instructions need to be executed at runtime. For shader tasks that do not need to execute software control instructions, they are directly sent to the shader for execution, avoiding unnecessary intermediate processing steps, reducing task processing delays and overhead, and improving overall performance. At the same time, for shader tasks that need to execute software control instructions, they are processed by the instruction control unit, which increases the scope of application.

[0010] It should be understood that the above general description and the following detailed description are merely exemplary and explanatory, and are not intended to limit the technical solutions provided in the embodiments of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work, among which:

[0012] Figure 1 A flowchart of a task scheduling method provided in some embodiments of the present application;

[0013] Figure 2 A flowchart of another task scheduling method provided in some embodiments of the present application;

[0014] Figure 3 A flowchart of another task scheduling method provided in some embodiments of the present application;

[0015] Figure 4 A schematic diagram of a framework corresponding to the task scheduling method provided by an embodiment of the present application;

[0016] Figure 5A Schematic diagram of updating the value of the counter in the shader execution unit in the task scheduling method provided in the embodiment of the present application Figure 1 ;

[0017] Figure 5B Schematic diagram of updating the value of the counter in the shader execution unit in the task scheduling method provided in the embodiment of the present application Figure 2 ;

[0018] Figure 5C Schematic diagram of updating the value of the counter in the shader execution unit in the task scheduling method provided in the embodiment of the present application Figure 3 ;

[0019] Figure 5D Schematic diagram of updating the value of the counter in the shader execution unit in the task scheduling method provided in the embodiment of the present application Figure 4 ;

[0020] Figure 6 A schematic diagram of the structural composition of a task scheduler provided for some embodiments of the present application. DETAILED DESCRIPTION

[0021] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the specific technical solution of the application will be further described in detail below in conjunction with the drawings in the embodiments of the present application. The following embodiments are used to illustrate the embodiments of the present application, but are not used to limit the scope of the embodiments of the present application.

[0022] In the following description, reference is made to “some embodiments”, which describe a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0023] In the following description, the terms "first\second\third" involved are merely used to distinguish similar objects and do not represent a specific ordering of the objects. It can be understood that "first\second\third" can be interchanged with a specific order or sequence where permitted, so that the embodiments of the present application described here can be implemented in an order other than that illustrated or described here.

[0024] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the technical field of the present application. The terms used herein are only for the purpose of describing the embodiments of the present application and are not intended to limit the embodiments of the present application.

[0025] To facilitate understanding of the present solution, before describing the embodiments of the present application, the application background of the embodiments of the present application is described.

[0026] In the related technologies, in the research of full-featured graphics processors, multi-threaded and multi-tasking parallelism is the main goal pursued, and more floating-point multiplication and addition times have become a key indicator for measuring modern graphics processors. Among them, the ability to timely assemble input thread data such as vertices, geometries, pixels or computing units used by the application into tasks, and dispatch them to the shader program running unit, so as to make full use of on-chip storage and computing resources to hide the latency of task running is the main difficulty at present. The existing task assembly and scheduling technical solutions are divided into two directions, one is pure hardware task scheduling and dispatching technology, and the other is programmable task scheduling and dispatching technology triggered by software instructions;

[0027] First, for pure hardware task scheduling and dispatching technology, the input thread data such as vertices, pixels or computing units can be dispatched to the task scheduler through the upstream module. Here, the task scheduler first determines that the number of input thread data meets the upper limit of a task, or when there is no more input thread data to be dispatched within a certain period of time, the corresponding vertex, geometry, pixel or computing unit input thread data is assembled into a task; then the hardware resources required for the task are allocated, and the task data corresponding to the assembled task is written into the allocated hardware resources for storage; finally, after determining that the task data are all written into the corresponding hardware resources, the task can be dispatched by the task scheduler to the shader for calculation.

[0028] Secondly, for programmable software-controlled task scheduling and distribution technology, the task scheduler is required to first save the input thread data such as vertices, geometries, pixels or computing units passed down from the upstream into the internal storage unit, and then the small instruction control unit inside the task scheduler executes the corresponding instructions to modify and calculate the input thread data. Finally, the instruction control unit writes the calculated input thread data into the storage unit of the shader and schedules the task for distribution.

[0029] The above pure hardware task scheduling and dispatching technology has the following disadvantages: 1. The task scheduling method is hardware-based and cannot be adjusted and optimized through software; 2. The input thread data transmitted from the upstream can only be directly passed to the shader, and scalar data calculation or asynchronous data loading cannot be performed to reduce the load of the downstream shader parallel computing unit.

[0030] At the same time, there are also the following problems with software-programmable task scheduling technology: 1. Task scheduling requires more software participation, including data preparation and instruction generation, which increases the difficulty of problem locating in abnormal scenarios; 2. The input thread data transmitted from the upstream needs to be saved in its own data storage unit before it can be assembled and sent to the downstream module, that is, the shader. If no additional modification is required for the input data, it will still occupy storage space and increase the delay of instruction execution; 3. The difficulty of module design increases.

[0031] To solve the above problems, the present application provides a task scheduling method 1, which is applied to a task scheduler. The task scheduler includes: a resource management unit, an instruction control unit, such as Figure 1 FIG. 1 is a flow chart of a task scheduling method provided in some embodiments of the present application, combined with Figure 1 The steps shown are as follows:

[0032] Step S101: assembling received input thread data into a shader task through the resource management unit; the input thread data includes an extended first control field segment, and the first control field segment is used to determine whether the shader task needs to execute a software control instruction.

[0033] The resource management unit is a module for receiving input thread data sent by the upstream module and allocating resources according to task requirements. The input thread data is the data that needs to be processed in the graphics processing task, usually including vertices, pixels or calculation data. The extended first control domain is a newly added part in the input thread data, which is used to indicate whether a specific software control instruction needs to be executed.

[0034] In some embodiments, the resource management unit continuously monitors and receives input thread data sent by the upstream module, and stores the received input thread data in an internal buffer. After receiving a certain amount of input thread data, the resource management unit begins to analyze the data to identify whether a complete shader task can be formed. If the input thread data is sufficient and meets the task requirements, the resource management unit will begin to assemble the shader task. Exemplarily, the relevant input thread data, shader code, etc. can be integrated together to form an executable shader task.

[0035] The control field is an area used to identify specific control requirements or states during shader execution. In some embodiments, the control field can indicate whether the shader task needs to execute specific software control instructions, or whether input thread data needs to be cached for subsequent processing.

[0036] In an embodiment of the present application, the first control field segment can be set to a first value or a second value. When the first control field segment of the input thread data is set to the first value, it indicates that the input thread data does not need to execute software control instructions; when the first control field segment of the input thread data is set to the second value, it indicates that the input thread data needs to execute software control instructions.

[0037] In some embodiments, the first value of the above-mentioned first control field segment setting may be a null value / default value, and correspondingly, the second value of the first control field segment setting may be a non-null value; in other embodiments, the first value of the above-mentioned first control field segment setting may be 0, and correspondingly, the second value of the first control field segment setting may be 1; in yet other embodiments, the first value of the above-mentioned first control field segment setting may be F, and correspondingly, the second value of the first control field segment setting may be T.

[0038] In the embodiment of the present application, it is considered that during the assembly process, the resource management unit will identify which input thread data belongs to the same shader task, and assemble the input thread data belonging to the same shader task together. Therefore, the first control domain segment (i.e., the domain segment that controls whether the shader task needs software control instructions) of multiple input thread data belonging to the same shader task should be the same. Furthermore, the resource management unit will determine whether the shader task needs to execute software control instructions based on the first control domain segment.

[0039] Step S102: When the shader task does not need to execute software control instructions, directly send the shader task to the shader.

[0040] Step S103: When the shader task needs to execute a software control instruction, after the instruction control unit executes the software control instruction, the shader task is sent to the shader.

[0041] It should be noted that, in step S102, after determining that the shader task does not need to execute the software control instruction, the process of directly sending the shader task to the shader here is described relative to the process of sending the shader task in step S103; in the case where the shader task needs to execute the software control instruction, it is necessary to first execute the software control instruction through the instruction control unit before sending the shader task to the shader. In other words, compared with step S103, before sending the shader task to the shader, it is necessary to first execute the software control instruction through the instruction control unit, while in step S102, before sending the shader task to the shader, it is not necessary to first execute the software control instruction through the instruction control unit.

[0042] In the embodiment of the present application, by introducing the extended first control domain segment into the input thread data, the task scheduler can flexibly handle different types of shader tasks, that is, dynamically determine whether the software control instruction needs to be executed at runtime, and directly send the shader task that does not need to execute the software control instruction to the shader for execution, thereby avoiding unnecessary intermediate processing steps, reducing the delay and overhead of task processing, and improving the overall performance. At the same time, for shader tasks that need to execute software control instructions, they are processed by the instruction control unit, which increases the scope of application.

[0043] In some embodiments, the executing software control instruction includes at least one of the following: scalar data calculation, asynchronous data loading, and modifying input thread data.

[0044] Scalar data calculation refers to arithmetic and logical operations on scalars rather than vectors or matrices. In rendering or computing tasks, scalar data calculation can be used to calculate constant values ​​required by shader programs, such as lighting parameters, camera positions, time-related changes, etc. These constant values ​​are then passed to the shader program on the GPU to control the rendering effect or calculation process. Scalar data calculation can also be used for preloading and preprocessing of data.

[0045] Among them, asynchronous data loading refers to the process of loading data from external data sources (such as hard disk, network, etc.) without blocking the execution of the main program. Before the shader task is executed, it may be necessary to load necessary data from external resources (such as texture files, model files, etc.). By loading this data asynchronously, it can be ensured that the shader task starts execution as soon as the data is ready without waiting for the data to be loaded. For example, when rendering a complex 3D scene, multiple texture files may need to be loaded from the hard disk. By loading these files asynchronously, the program can continue to perform other tasks (such as processing user input, updating scene status, etc.) during the loading process, and pass the texture file to the shader program for rendering immediately after loading.

[0046] Among them, modifying the input thread data refers to modifying or adjusting the input thread data input to the shader program before or during the execution of the shader task. In some embodiments, the input thread data input to the shader program may need to be adjusted according to actual conditions. For example, the coordinates of the vertices can be adjusted according to the position, rotation or scaling of the object; or the properties of the material can be modified according to the user's interactive operation, etc. When rendering an interactive 3D object, the user may change the position or rotation angle of the object by dragging the mouse. At this time, the vertex coordinates of the object are modified according to the user's input. The modified vertex coordinates will be passed to the shader program as new input thread data for rendering.

[0047] In some embodiments, the input thread data further includes an extended second control field segment, and the second control field segment is used to determine whether to cache the task data composed of the input thread data.

[0048] The input thread data not only includes a first control field for determining whether the shader task needs to execute the software control instruction, but also includes a second control field. The second control field is mainly used to determine whether the task data composed of the input thread data needs to be cached. The task data includes the thread data of the input thread that constitutes the shader task.

[0049] In some embodiments, when it is determined based on the first control domain segment that the shader task needs to execute a software control instruction, it may be further determined based on the second control domain segment whether to cache the task data consisting of the input thread data.

[0050] Generally speaking, considering the situation that the software control instruction needs to modify the task data (input thread data), in order to ensure that the data can be quickly accessed when it needs to be modified, and the modified data can also be conveniently re-cached for subsequent use. Therefore, in the case that the software control instruction needs to modify the input thread data, the task data composed of the input thread data can be cached.

[0051] In some embodiments, when the software control instruction is executed for scalar data calculation or asynchronous data loading, task data consisting of input thread data may not be cached; when the software control instruction is executed for modifying input thread data, task data consisting of input thread data may be cached.

[0052] In the above embodiment, by introducing an extended second control domain segment into the input thread data, the system can more flexibly handle the data requirements of the shader task, and then can optimize the data processing flow based on the specific requirements of the task (such as whether the software control instructions need to be executed and whether the task data needs to be cached), thereby improving the overall processing efficiency. For example, if the input thread data does not need to be modified, not caching this data can reduce the occupancy of the cache space, so that this space can be used by other tasks that need to be cached more. On the contrary, if the input thread data needs to be modified, caching this data in time can improve the integrity and availability of the data before and after the modification.

[0053] In some embodiments, the method further includes: determining that the software control instruction needs to be executed when the first control domain segment indicates that the shader task needs to execute the software control instruction, or when the second control domain segment indicates that the task data composed of the input thread data needs to be cached.

[0054] The first control domain segment and / or the second control domain segment may be referred to to determine whether the shader task needs to execute the software control instruction.

[0055] In some embodiments, when the first control domain segment indicates that the shader task needs to execute software control instructions, it is determined that the shader task needs to execute software control instructions. In other embodiments, when the second control domain segment indicates that task data composed of the input thread data needs to be cached, it is determined that the shader task needs to execute software control instructions. In still other embodiments, when the first control domain segment indicates that the shader task needs to execute software control instructions, and when the second control domain segment indicates that task data composed of the input thread data needs to be cached, it is determined that the shader task needs to execute software control instructions.

[0056] In some embodiments, the first control field segment has a higher priority than the second control field segment.

[0057] In an embodiment of the present application, when the first control domain segment represents that the shader task does not need to execute software control instructions, regardless of whether the second control domain segment represents that task data composed of the input thread data needs to be cached, it is determined that the shader task does not need to execute software control instructions; or, when the first control domain segment represents that the shader task needs to execute software control instructions, regardless of whether the second control domain segment represents that task data composed of the input thread data needs to be cached, it is determined that the shader task needs to execute software control instructions.

[0058] In the above embodiment, by setting the priority of the first control domain segment higher than that of the second control domain segment, when deciding whether the software control instruction needs to be executed, only the state of the first control domain segment needs to be considered without considering the second control domain segment at the same time. This enables a faster determination of whether the software control instruction needs to be executed, helps reduce unnecessary delays and waiting time, and improves the execution efficiency of shader tasks.

[0059] Figure 2 This is a schematic diagram of the implementation process of a task scheduling method provided in an embodiment of the present application. Figure 2 , the method can be executed by a processor of a computer device. Figure 1 The task scheduler further includes an output arbitration unit. Before sending the shader task to the shader, the method further includes: arbitrating the shader task request through the output arbitration unit; the shader task request is used to send the shader task to the shader. The shader task request can be sent by the resource management unit to the output arbitration unit, or by the instruction control unit to the output arbitration unit. Figure 1Step S102 in the method can be updated to step S201, and step S103 can be updated to step S202. The method further includes steps S203 and S204. Figure 2 The steps shown are explained.

[0060] In the embodiment of the present application, the output arbitration unit is connected to the resource management unit and the instruction control unit respectively. When the shader task does not need to execute the software control instruction, the shader task can be sent to the shader through the resource management unit and the output arbitration unit in sequence; when the shader task needs to execute the software control instruction, the shader task can be sent to the shader through the resource management unit, the instruction control unit, and the output arbitration unit in sequence. The following will illustrate the sending process in these two scenarios respectively.

[0061] Step S201: When the shader task does not need to execute a software control instruction, the resource management unit sends a shader task request to the output arbitration unit.

[0062] In an embodiment of the present application, compared with the case where the shader task needs to execute software control instructions, when the shader task does not need to execute software control instructions, the resource management unit does not need to send the shader task to the instruction control unit, but directly sends the shader task request to the output arbitration unit.

[0063] The shader task request is used to send the shader task to the shader. In some embodiments, the shader task may include task information and task data. Accordingly, the shader task request may carry the task data corresponding to the shader task.

[0064] The shader task request may be sent by the resource management unit to the output arbitration unit.

[0065] Step S202: When the shader task needs to execute a software control instruction, the instruction control unit executes the software control instruction and then sends a shader task request to the output arbitration unit.

[0066] In an embodiment of the present application, compared to the case where the shader task does not need to execute software control instructions, in the case where the shader task needs to execute software control instructions, the resource management unit needs to send the shader task to the instruction control unit, and the instruction control unit needs to send a shader task request to the output arbitration unit after executing the software control instructions.

[0067] In some embodiments, when the above-mentioned software control instruction is to modify the input thread data, the resource management unit needs to first send the input thread data (task data) to the instruction control unit; after the instruction control unit executes the instruction to modify the input thread data, the modified input thread data (task data) is sent to the output arbitration unit through a shader task request.

[0068] In other embodiments, when the above-mentioned software control instruction does not modify the input thread data, that is, when the input thread data (task data) does not need to be sent to the instruction control unit to execute the corresponding instruction to modify the input thread data, the resource management unit can send the input thread data (task data) to the instruction control unit, but there is no need to modify the input thread data. The instruction control unit sends the input thread data (task data) to the output arbitration unit through a shader task request; the resource management unit can also send the input thread data (task data) directly to the output arbitration unit through a shader task request.

[0069] Exemplarily, taking the above-mentioned software control instruction as an instruction for scalar data calculation as an example, in some embodiments, the resource management unit can send the input thread data (task data) to the instruction control unit, but there is no need to modify the input thread data, the instruction control unit executes the instruction for scalar data calculation to obtain the calculation result; the instruction control unit sends the calculation result and the input thread data (task data) to the output arbitration unit through the shader task request. In other embodiments, the resource management unit can also send the input thread data (task data) directly to the output arbitration unit through the shader task request, on the other hand, the instruction control unit executes the instruction for scalar data calculation to obtain the calculation result, and the instruction control unit sends the calculation result to the output arbitration unit through the shader task request; in the current embodiment, for this shader task, the output arbitration unit can obtain the input thread data (task data) by receiving the shader task request sent by the resource management unit, and can also obtain the calculation result by receiving the shader task request sent by the instruction control unit.

[0070] In some embodiments, the shader task request includes at least one of the following: a task data write request from the resource manager unit, and a task data asynchronous load write request from an instruction controller or a task data write request after instruction calculation.

[0071] Among them, the above-mentioned task data write request from the resource manager unit carries the original input thread data (task data). In some embodiments, when the shader task does not need to execute the software control instruction, the shader task requests received by the output arbitration unit are all task data write requests from the resource manager unit. In other embodiments, when the shader task needs to execute the software control instruction, if the software control instruction does not need to modify the input thread data (task data), the shader task request received by the output arbitration unit may include the task data write request from the resource manager unit. At this time, the shader task request received by the output arbitration unit also includes the task data write request from the instruction controller (task data asynchronous loading write request, task data write request after scalar data calculation).

[0072] Among them, the task data asynchronous loading and writing request from the instruction controller carries the data obtained by asynchronous loading. In some embodiments, the task data asynchronous loading and writing request can also carry the original input thread data (task data). At this time, the output arbitration unit will not receive the task data writing request from the resource manager unit.

[0073] The above-mentioned task data write request after the instruction calculation from the instruction controller carries the task data after the instruction calculation. In the case where the software control instruction is an instruction for scalar data calculation, the task data write request after the instruction calculation carries the calculation result after the scalar data calculation; in the case where the software control instruction is an instruction for modifying the input thread data, the task data write request after the instruction calculation carries the modified task data.

[0074] In some embodiments, when the software control instruction is an instruction for scalar data calculation, the task data write request after the instruction is calculated can also carry the original input thread data (task data), and at this time, the output arbitration unit will not receive the task data write request from the resource manager unit. When the software control instruction is an instruction for modifying the input thread data, the task data write request after the instruction is calculated will not carry the original input thread data (task data), and at the same time, the output arbitration unit will not receive the task data write request from the resource manager unit.

[0075] Step S203: arbitrate the shader task request through the output arbitration unit.

[0076] The output arbitration unit receives a shader task request from the resource management unit and / or the instruction control unit.

[0077] In some embodiments, the output arbitration unit may send corresponding task data to the shader in response to the received shader task request, that is, write the task data corresponding to the shader task request to the shader.

[0078] In some other embodiments, the output arbitration unit may also set an initial value of a data dependency counter of the shader task based on the arbitrated data dependency relationship of the shader task, thereby determining the timing for the shader to run the shader task.

[0079] Step S204: Send the shader task to the shader through the output arbitration unit.

[0080] In some embodiments, the output arbitration unit not only needs to send the task data required by the shader task when it is running to the shader, but also needs to send the task information corresponding to the shader task to the shader, wherein the task information may include the task type and the instruction address.

[0081] In the embodiments of the present application, compared with the design scheme in which the resource manager and the instruction controller each have an independent data path to send tasks to the shader in the related scheme, the present application introduces an output arbitration unit to reuse the same data path to transmit shader task requests from different units (resource management unit and instruction control unit), which not only simplifies the hardware design, but also reduces the hardware cost, simplifies the hardware design, and improves the overall efficiency of the system.

[0082] Figure 3 This is a schematic diagram of the implementation process of a task scheduling method provided in an embodiment of the present application. Figure 3 , the method can be executed by a processor of a computer device. Figure 2 , Figure 2 S204 in can be updated to step S301 to step S302, combining Figure 3 The steps shown are explained.

[0083] Step S301: Setting an initial value of a data dependency counter of the shader task based on the arbitrated data dependency relationship of the shader task.

[0084] In some embodiments, the output arbitration unit can determine the data dependency of the shader task based on the task information of the shader task request received. The data dependency is used to represent the dependency between the data that need to exist simultaneously when running the shader task. Accordingly, the initial value of the data dependency counter is used to determine the number of data writes that need to exist simultaneously when running the shader task, that is, how many data are written to run the shader task normally. It should be noted that the data written once (or a piece of data) defined here refers to the output arbitration unit writing task data to the shader once in response to a shader task request.

[0085] Exemplarily, when the shader task does not need to execute software control instructions, what the shader task needs at runtime is the original task data. Therefore, the initial value of the data dependency counter of the shader task can be set to "1", indicating that after the output arbitration unit writes the original task data to the shader in response to a shader task request (task data write request from the resource manager unit), the shader can run the shader task normally. When the shader task needs to execute software control instructions, such as asynchronous load instructions, what the shader task needs at runtime is the original task data and the asynchronous data obtained by asynchronous loading. Therefore, the initial value of the data dependency counter of the shader task can be set to "2", indicating that after the output arbitration unit writes the original task data to the shader in response to a shader task request (task data write request from the resource manager unit), and writes the asynchronous data to the shader in response to another shader task request (task data asynchronous load write request from the instruction controller), the shader can run the shader task normally.

[0086] Step S302: Send the task data of the shader task after arbitration to the shader, and update the value of the data dependency counter of the shader task; the data dependency counter is used to indicate whether the shader runs the shader task.

[0087] In an embodiment of the present application, after the output arbitration unit completes arbitration of the shader task request, it is necessary to respond to the shader task request and write the task data corresponding to the shader task request to the shader. After completing the writing process of the task data corresponding to the shader task request, the output arbitration unit needs to update the value of the data dependency counter of the shader task.

[0088] In some embodiments, the initial value of the data dependency counter is used to determine the number of data writes that need to exist simultaneously when running the shader task. Therefore, after sending the task data of the arbitrated shader task to the shader, the value of the data dependency counter is updated, and the updated value of the data dependency counter is the remaining number of data writes when running the shader task.

[0089] In some embodiments, the shader includes a shader storage unit and a shader execution unit, and the data dependency counter is included in the shader execution unit.

[0090] In some embodiments, the sending of the task data of the shader task to the shader and updating of the data dependency counter of the shader task can be achieved through steps S3021 and S3022.

[0091] Step S3021, storing the task data of the arbitrated shader task into the shader storage unit.

[0092] It is understandable that the task data stored in the shader storage unit may be task data from the resource manager unit or task data from the instruction controller. The task data from the instruction controller may be asynchronous data carried by a task data asynchronous load write request or calculated task data (including calculation results obtained by scalar calculation and modified task data) carried by a task data write request after instruction calculation.

[0093] Step S3022: Based on the number of times the task data is written into the shader storage unit, update the value of the data dependency counter.

[0094] The number of times the task data is written into the shader storage unit may be the number of times the output arbitration unit writes the task data into the shader storage unit in response to a shader task request. That is, the output arbitration unit writes the task data corresponding to the shader task request into the shader storage unit in response to a shader task request, and the number of times is 1; the output arbitration unit writes the task data corresponding to each of the N shader task requests into the shader storage unit in response to N shader task requests, and the number of times is N.

[0095] Exemplarily, taking the above-mentioned software control instruction as an instruction for asynchronous data loading as an example, in some embodiments, the resource management unit can send the input thread data (task data) to the instruction control unit, but there is no need to modify the input thread data, and the instruction control unit sends the input thread data (task data) to the output arbitration unit through a shader task request; the instruction control unit executes the instruction for asynchronous data loading to obtain asynchronous data, and the instruction control unit sends the asynchronous data to the output arbitration unit through a shader task request. At this time, the output arbitration unit writes two pieces of data (original task data and asynchronous data) to the shader storage unit, the number of times is 2. In other embodiments, the resource management unit can also send the input thread data (task data) directly to the output arbitration unit through a shader task request, and the output arbitration unit writes the original task data to the shader storage unit. On the other hand, the instruction control unit executes the instruction for asynchronous data loading to obtain asynchronous data, and the instruction control unit sends the asynchronous data to the output arbitration unit through a shader task request, and the output arbitration unit writes the asynchronous data to the shader storage unit; at this time, the output arbitration unit writes two pieces of data (original task data and asynchronous data) to the shader storage unit, the number of times is 2.

[0096] In some embodiments, in response to the data dependency counter indicating that the data dependency is resolved, the shader is instructed to execute the shader task.

[0097] In the embodiment of the present application, when all the data required for the execution of the shader task are sent to the shader, it indicates that the data dependency relationship is released. That is, when the data dependency counter indicates that all the data required for the execution of the shader task are sent to the shader, it indicates that the data dependency relationship has been released and the shader can run the shader task.

[0098] In some embodiments, the output arbitration unit counts the number of times the task data is written into the shader storage unit during the process of writing the task data into the shader storage unit, and updates the value of the data dependency counter based on the number. Exemplarily, the output arbitration unit sends a numerical update request to the data dependency counter each time the task data is written into the shader storage unit, and the numerical update request is used to instruct the data dependency counter to update the value of the data dependency counter. Of course, the output arbitration unit may also send a numerical update request to the data dependency counter every two (or more) times after writing the task data into the shader storage unit, and the present application does not limit this.

[0099] In some embodiments, updating the value of the data dependency counter based on the number of times task data is written to a shader storage unit includes: subtracting the value of the data dependency counter based on the number of times; and when the value of the data dependency counter is 0, indicating that the data dependency relationship is released.

[0100] Here, when the data dependency is resolved, the shader task starts to execute.

[0101] Exemplarily, when the output arbitration unit sends a value update request to the data dependency counter each time after writing the task data to the shader storage unit, the value of the data dependency counter can be subtracted based on the value "1". When the shader task needs to execute an asynchronous load instruction, the initial value of the data dependency counter is set to "2", and two value update requests need to be received respectively, so that when the value of the data dependency counter is 0, it indicates that the data dependency relationship is released. Then, the shader task starts to execute.

[0102] In some embodiments, the shader includes a shader execution unit, and sending the shader task to the shader includes: writing task information of the arbitrated shader task into the shader execution unit, the task information including task type and shader instruction address.

[0103] The task type is the task type of the shader, which includes but is not limited to vertex shading tasks, pixel shading tasks, or other types of graphics processing tasks. The shading instruction address is the instruction address of the instruction required to run the shader task, and the shading instruction address points to the instruction sequence that the shader needs to follow when executing the task; generally speaking, these instructions are usually stored in memory or cache, and the shading instruction address is the starting position for accessing these instructions. The shader execution unit will start reading and executing instructions according to the shading instruction address to complete the shader task.

[0104] In some embodiments, the method further includes: the resource management unit sending an instruction address to the instruction control unit; and the instruction control unit acquiring the software control instruction based on the instruction address.

[0105] In the embodiment of the present application, the above-mentioned instruction address may be an instruction address for scalar data calculation, an instruction address for asynchronous data loading, or an instruction address for modifying input thread data.

[0106] Among them, when the instruction control unit receives an instruction address pointing to a scalar data calculation instruction, it reads the instruction sequence at the address, including but not limited to the operation code and operands required to perform scalar data (i.e., a single numerical value, as opposed to a vector or matrix) calculation; thereafter, the instruction control unit performs the corresponding scalar calculation operation based on the operation code and operand to obtain the corresponding calculation result.

[0107] When the instruction control unit receives an instruction address pointing to an asynchronous data loading instruction, the instruction control unit reads and executes instructions related to data loading, and then asynchronously loads asynchronous data from an external memory (such as system memory, hard disk, etc.).

[0108] When the instruction control unit receives an instruction address pointing to an instruction for modifying input thread data, the instruction control unit may use the instruction for modifying input thread data to update or modify cached task data.

[0109] In some embodiments, the method also includes: when the second control domain segment is used to determine the task data composed of the input thread data to be cached, the resource management unit sends the task data to the storage unit corresponding to the instruction control unit; the instruction control unit runs the execution instruction to calculate the task data stored in the storage unit, and issues the task data after the instruction calculation.

[0110] Wherein, in the case where the second control domain segment is used to determine the task data composed of the input thread data to be cached, the resource management unit sends the task data to the instruction control unit; at this time, the instruction control unit stores the task data in its corresponding storage unit. At the same time, the instruction control unit runs the execution instruction to calculate the task data stored in the storage unit to obtain the task data calculated by the instruction; the instruction control unit sends the task data calculated by the instruction to the output arbitration unit through a write request for the task data calculated by the instruction.

[0111] In some embodiments, the method further includes: when the second control domain segment is used to determine not to cache the task data composed of the input thread data, the instruction control unit runs the execution instruction to load asynchronous data, and sends down the asynchronous data and the task data.

[0112] Among them, the instruction control unit can send a task data asynchronous load write request to the output arbitration unit, and the task data asynchronous load write request carries the asynchronous data obtained by the asynchronous load, and at the same time, the task data asynchronous load write request also carries the original task data. It can be understood that in the current embodiment, the output arbitration unit will not receive the task data write request from the resource manager unit.

[0113] In an embodiment of the present application, the resource management unit may receive input thread data, such as vertices, geometries, pixels or computing units, sent by an upstream module for assembling a shader task, and assemble the input thread data according to certain assembly rules to obtain a shader task. In some embodiments, when the number of input thread data of the same type (i.e., the same attributes) meets the upper limit of the number of assembling a task, or when the resource management unit does not receive more input thread data within a certain period of time, the received input thread data with the same attributes may be packaged and assembled accordingly to obtain a shader task.

[0114] In some embodiments, the resource management unit assembles the received input thread data into a shader task, including: through the resource management unit, when the number of input thread data with the same attributes received within a first time period reaches N, assembling N of the input thread data into the shader task.

[0115] Among them, the resource management unit continuously monitors the data flow from the upstream module and receives input thread data; for each input thread data received, the resource management unit checks the attributes of the input thread data and counts the number of input thread data under each attribute; when the number of input thread data with the same attribute reaches a preset threshold N, the resource management unit assembles these input thread data into a shader task.

[0116] For example, suppose that during the graphics rendering process, the resource management unit receives a series of vertex data, which are all used to describe the vertex positions of a 3D model. If every 100 vertex data (i.e., N=100) are received, the resource management unit assembles them into a vertex shader task. In this way, when the GPU executes this vertex shader task, it can process the position calculation of 100 vertices at a time, instead of processing them one by one, thereby improving processing efficiency.

[0117] In other embodiments, the resource management unit assembles the received input thread data into a shader task, including: the resource management unit receives M input thread data with the same attributes within the first time period, and assembles M input thread data into the shader task when no new input thread data is received in the second time period; wherein the second time period is a time period that is located after the first time period and is adjacent to the first time period in timing.

[0118] Wherein, M and N are both positive integers, and M is less than N.

[0119] In some embodiments, the first time period and the second time period are continuous, and the second time period follows the first time period. The lengths of the first time period and the second time period may be fixed or dynamically adjusted, which is not limited in this application.

[0120] Among them, in the first time period, the resource management unit continuously monitors and receives input thread data from the upstream module. For each input thread data received, the resource management unit will check its attributes and count the number of input thread data with the same attributes. During the statistical process, if the number of input thread data with the same attribute reaches a preset threshold M, and no new input thread data with the attribute is received in the second time period immediately following, the resource management unit will trigger the task assembly process. In other words, the resource management unit will not only consider whether the number of input thread data with the same attribute reaches the threshold, but also consider the time factor, that is, whether no new input thread data with the same attribute arrives within a period of time.

[0121] Exemplarily, assume that during the graphics rendering process, the resource management unit is responsible for receiving and processing vertex data. In the first time period, the resource management unit receives 50 vertex data for describing the vertex positions of the 3D model. Since the attributes of these input thread data are the same (all vertex data), and the number reaches the preset threshold M (50), the resource management unit starts waiting for the second time period. In the second time period that follows, the resource management unit does not receive any new vertex data. At this time, the resource management unit can assemble the 50 vertex data previously received into a vertex shader task.

[0122] In the embodiment of the present application, the resource management unit can more flexibly assemble shader tasks according to the actual reception situation of the input thread data and the system requirements, thereby optimizing the use efficiency and rendering performance of the GPU.

[0123] The above-mentioned task scheduling method is described below in conjunction with a specific embodiment. However, it is worth noting that this specific embodiment is only for better illustrating the embodiment of the present application and does not constitute an improper limitation on the embodiment of the present application.

[0124] In the related technology, pure hardware task scheduling technology or software-controlled task scheduling technology is usually used to implement the scheduling of shader tasks; among them, pure hardware task scheduling technology is overly hardware-based and cannot be adjusted and optimized through software; in addition, the input thread data transmitted from the upstream can only be directly transmitted to the shader, and scalar data calculation or asynchronous data loading cannot be performed, thereby reducing the load of the downstream shader parallel computing unit. The software-controlled task scheduling technology requires more instructions to participate, including data preparation and instruction generation, which increases the difficulty of problem location in abnormal scenarios; and the input thread data transmitted from the upstream needs to be saved in the corresponding data storage unit before it can be assembled and sent to the shader. If no additional modification is required, the input data will still occupy storage space and increase the delay of instruction execution.

[0125] Based on this, the present application aims to accelerate the scheduling and distribution of shader tasks. It retains the software programmable flexibility while reusing some data paths to ensure the operating efficiency of the pipeline; that is, when the input thread data needs to be modified or the data needs to be loaded asynchronously, the task data of the current task, that is, the input thread data, can be written into the storage unit of the task scheduler through software control (instruction controller) for data calculation and modification; when the input thread data does not need to be modified or instructions are not required to perform scalar calculations, the input thread data can be directly transmitted to the downstream shader storage unit to accelerate the efficiency of task scheduling, thereby reducing the delay in task transmission.

[0126] like Figure 4As shown, it is a schematic diagram of the framework corresponding to the task scheduling method provided by the embodiment of the present application, that is, in the path of task assembly and issuance, the task scheduler 402 is composed of: a resource management unit 4021, an instruction control unit 4022 and an output arbitration unit 4023. Among them, the resource management unit 4021 directly receives the input thread data 401 such as vertices, geometry, pixels or computing units issued by the upstream, first assembles the received input thread data 401 into tasks according to certain conditions, and allocates the required hardware resources according to the task requirements; after the resources are allocated, if the input thread data a in the task needs additional mathematical or logical calculations, the input thread data a can be issued to the instruction control unit 4022; the instruction control unit 4022 receives the input thread data a and the corresponding instruction address sent by the resource management unit 4021, and retrieves the instruction according to the instruction address to run the corresponding instruction to realize the modification or logical calculation of the relevant input thread data a. If the input thread data b in the task does not require additional instructions for modification or logical calculation, it can be directly transmitted to the output arbitration unit 4023.

[0127] Here, for simple input thread data, such as: the input thread data does not need to be modified or calculated, the input thread data can be directly forwarded to the output arbitration unit 4023 through the resource management unit 4021; for complex input thread data, such as: for input thread data that needs to be modified and calculated, the resource management unit 4021 can be used to send the input thread data to the cache corresponding to the instruction control unit 4022, and the input thread data can be calculated or modified through the instruction control unit 4022, so that the modified input thread data is sent to the output arbitration unit 4023 using the instruction control unit 4022; at the same time, the instruction control unit can also load or save asynchronous data from off-chip storage, so that the flexibility of processing and scheduling of shader tasks in the graphics processor can be increased, that is, the integration of software control and hardware inherent pipeline is realized.

[0128] To implement the above-mentioned solution, the input thread data 401 input to the resource management unit 4021 can be expanded, that is, two control fields are added to transmit control information fields, one field (field 1) is used to indicate whether the input thread data needs to be cached in the storage unit of the instruction control unit 4022, and the other field (field 2) is used to indicate whether the input thread data needs to execute additional instructions.

[0129] Correspondingly, if the control domain segment of the input thread data extension indicates that the input thread data does not need to execute instructions (when there is no need to execute instructions, there is no need to store the input thread data in the storage unit of the instruction control unit 4022), the resource management unit 4021 can directly send the input thread data to the output arbitration unit 4023.

[0130] If the control domain segment of the input thread data extension indicates that the input thread data needs to execute instructions but does not need to be stored in the storage unit of the instruction control unit 4022, the resource management unit 4021 will pass the instruction address of the corresponding execution instruction to the instruction control unit 4022, so that the instruction control unit 4022 can retrieve the instruction at the instruction address and run the instruction, such as: loading or storing some status information or performing asynchronous data loading, etc. Finally, the instruction control unit 4022 sends the loaded or stored data to the output arbitration module 4023.

[0131] If the control domain segment of the input thread data extension indicates that the input thread data needs to execute instructions and needs to be stored in the storage unit of the instruction control unit 4022, the resource management unit 4021 will pass the instruction address of the corresponding execution instruction to the instruction control unit 4022, so that the instruction control unit 4022 can retrieve the instruction at the instruction address, run the instruction to modify or calculate the cached thread, and send the modified or calculated input thread data to the output arbitration unit 4023.

[0132] Here, you can continue to refer to Figure 4As shown, the output arbitration unit 4023 can arbitrate the output requests of the resource management unit 4021 and the instruction control unit 4022. At the same time, the output arbitration unit 4023 outlet is divided into two types of paths, one is the data flow path, and the other is the control flow path; wherein, the data flow path: is mainly responsible for writing the input thread data of the shader task from the task scheduler 402 to the shader storage unit 4032 for the shader program to read and write calculations; and the input thread data is mainly: the input thread data from the resource management unit 4021, and the input thread data after modification or calculation from the instruction control unit 4022, and the asynchronous data loaded from the instruction control unit 4022. The control flow path: is mainly responsible for writing the task information of the shader task from the task scheduler 402 to the shader operation unit 4031, including information such as the task type and the instruction address; at the same time, the internal data dependency counter is updated according to the input thread data written by the data stream or the corresponding write request. Here, the internal data dependency counter is the data counter corresponding to the shader task, and one shader task corresponds to one data counter. After the shader execution unit 4031 receives the task information of shader task A sent by the output arbitration unit 4023, it can adjust the value of the data counter inside it that matches shader task A to a preset value, which is used to represent the number of input thread data included in the shader task A.

[0133] Here, if all the input thread data included in the shader task A are successfully written from the task scheduler 402 to the shader storage unit 4032, the shader execution unit 4031 responds to the input thread data stored in the shader storage unit 4032, reduces the value of the internal data counter matching the shader task A to 0, and runs the shader task A based on the value reduced to 0.

[0134] Correspondingly, if FIG. 5A to FIG. 5DAs shown, multiple transmission paths of input thread data in the task scheduler 402 are provided, wherein 501 shows that the resource management unit 4021 directly sends the input thread data 1 of the shader task A to the output arbitration unit 4023, so that the output arbitration unit 4023 sends the received input thread data 1 to the shader storage unit 4032; 502 shows that the resource management unit 4021 sends the input thread data 2 of the shader task A to the instruction control unit 4022, so that the instruction control unit 4022 modifies or calculates the input thread data 2, so that the instruction control unit 4022 sends the modified or calculated input thread data 2 to the output arbitration unit 4023, and then outputs the arbitration unit 4023. The arbitration unit 4023 sends the received modified or calculated input thread data 2 to the shader storage unit 4032; 503 shows that the resource management unit 4021 sends the corresponding instruction address to the instruction control unit 4022, so that the instruction control unit 4022 obtains the relevant instructions based on the instruction address to load the asynchronous data, so that there are two data paths in which the instruction control unit 4022 sends the loaded asynchronous data to the output arbitration unit 4023, and the resource management unit 4021 sends the input thread data 3 of the shader task A to the output arbitration unit 4023, and then the output arbitration unit 4023 sends the received input thread data 3 and the asynchronous data synchronously to the shader storage unit 4032.

[0135] It should be noted that in 502 , there is also a resource management unit 4021 sending a corresponding instruction address to the instruction control unit 4022 , so that the instruction control unit 4022 obtains relevant instructions based on the instruction address and runs the instruction to modify or calculate the input thread data 2 .

[0136] Here, in 501, the input thread data 1 of the shader task A is transmitted to the shader storage unit 4032 by the resource management unit 4021 and the output arbitration unit 4023, and the value of the data counter matching the shader task A inside the shader execution unit 4031 is reduced by 1 accordingly; in 502, the input thread data 2 of the shader task A is transmitted to the shader storage unit 4032 by the resource management unit 4021, the instruction control unit 4022 and the output arbitration unit 4023, and the value of the data counter matching the shader task A inside the shader execution unit 4031 is reduced by 1 accordingly; in 503, the data of the related asynchronous loading of the shader task A is According to the above, the resource management unit 4021, the instruction control unit 4022 and the output arbitration unit 4023 transmit the input thread data 3 of the shader task A to the shader storage unit 4032, and the resource management unit 4021 and the output arbitration unit 4023 transmit the input thread data 3 of the shader task A to the shader storage unit 4032, and the value of the data counter matching the shader task A inside the shader execution unit 4031 is reduced by 2 accordingly; in 504, since there is no data flow, that is, there is no transmission of the input thread data of the shader task A, then the value of the data counter matching the shader task A inside the shader execution unit 4031 does not change, that is, it is reduced by 0 accordingly.

[0137] The present application also provides a task scheduler. Figure 6 A schematic diagram of the structure of a task scheduler provided in an embodiment of the present application is shown in FIG. Figure 6 As shown, the task scheduler 600 includes a resource management unit 601, an instruction control unit 602, and an output arbitration unit 603, wherein:

[0138] The resource management unit 601 is configured to assemble received input thread data into a shader task, wherein the input thread data includes an extended first control field segment, and the first control field segment is used to determine whether the shader task needs to execute a software control instruction;

[0139] The resource management unit 601 is further configured to directly send the shader task to the shader when the shader task does not need to execute the software control instruction;

[0140] The resource management unit 601 is further configured to send the shader task to the shader after the instruction control unit 602 executes the software control instruction when the shader task needs to execute the software control instruction.

[0141] In some embodiments, the executing software control instruction includes at least one of the following: scalar data calculation, asynchronous data loading, and modifying input thread data.

[0142] In some embodiments, the input thread data further includes an extended second control field segment, and the second control field segment is used to determine whether to cache the task data composed of the input thread data.

[0143] In some embodiments, the method further includes: determining that the software control instruction needs to be executed when the first control domain segment indicates that the shader task needs to execute the software control instruction, or when the second control domain segment indicates that the task data composed of the input thread data needs to be cached.

[0144] In some embodiments, the first control field segment has a higher priority than the second control field segment.

[0145] In some embodiments, the task scheduler also includes an output arbitration unit 603, and before sending the shader task to the shader, the output arbitration unit 603 is configured to arbitrate the shader task request; the shader task request is used to send the shader task to the shader.

[0146] In some embodiments, the shader task request includes at least one of the following: a task data write request from the resource manager unit, and a task data asynchronous load write request from an instruction controller or a task data write request after instruction calculation.

[0147] In some embodiments, the shader includes a data dependency counter, and the resource management unit 601 is further configured to set an initial value of the data dependency counter of the shader task based on the data dependency relationship of the arbitrated shader task.

[0148] In some embodiments, the shader includes a shader execution unit, and the data dependency counter is included in the shader execution unit.

[0149] In some embodiments, the shader also includes a shader storage unit; the resource management unit 601 is also configured to store the task data of the arbitrated shader task to the shader storage unit, and update the value of the data dependency counter based on the number of times the task data is written to the shader storage unit.

[0150] In some embodiments, the resource management unit 601 is further configured to instruct the shader to execute the shader task in response to the data dependency counter indicating that the data dependency relationship is released.

[0151] In some embodiments, the resource management unit 601 is further configured to perform a subtraction operation on the value of the data dependency counter based on the number of times; when the value of the data dependency counter is 0, it indicates that the data dependency relationship is released.

[0152] In some embodiments, the shader includes a shader execution unit, and the resource management unit 601 is further configured to write task information of the arbitrated shader task into the shader execution unit; the task information includes a task type and a shader instruction address.

[0153] In some embodiments, the resource management unit 601 is further configured to send an instruction address to the instruction control unit 602; the instruction control unit 602 is further configured to obtain the software control instruction based on the instruction address.

[0154] In some embodiments, when the second control domain segment is used to determine the task data composed of the input thread data to be cached, the resource management unit 601 is also configured to send the task data to the storage unit corresponding to the instruction control unit 602; the instruction control unit 602 is also configured to run the execution instruction to calculate the task data stored in the storage unit, and issue the task data after the instruction calculation.

[0155] In some embodiments, when the second control domain segment is used to determine not to cache the task data composed of the input thread data, the instruction control unit 602 is also configured to run the execution instruction to load asynchronous data, and send down the asynchronous data and the task data.

[0156] In some embodiments, the resource management unit 601 is also configured to assemble N input thread data with the same attributes into the shader task when the number of input thread data with the same attributes received reaches N within the first time period; or, to assemble M input thread data with the same attributes received within the first time period and when no new input thread data is received in the second time period, to assemble M input thread data into the shader task; wherein the second time period is a time period located after the first time period and adjacent to the first time period in timing; M and N are both positive integers, and M is less than N.

[0157] It should be noted that the description of the above task scheduler embodiment is similar to the description of the above method embodiment, and has similar beneficial effects as the method embodiment. For technical details not disclosed in the embodiment corresponding to the task scheduler in this application, please refer to the description of the method embodiment of this application for understanding.

[0158] It should be noted that in the embodiment of the present application, if the above-mentioned task scheduling method is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the embodiment of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a storage medium, including a number of instructions to enable a computer device (which can be a terminal, a server, etc.) to execute all or part of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a U disk, a sports hard disk, a read-only memory (ROM), a disk or an optical disk. In this way, the embodiment of the present application is not limited to any specific combination of hardware and software.

[0159] Correspondingly, an embodiment of the present application further provides a computer program product, which includes computer executable instructions. After the computer executable instructions are executed, the task scheduling method provided in the embodiment of the present application can be implemented.

[0160] Accordingly, an embodiment of the present application further provides a computer-readable storage medium, on which computer-executable instructions are stored. When the computer-executable instructions are executed by a processor, the task scheduling method provided in the above embodiment is implemented.

[0161] The description of the above task scheduler and storage medium embodiments is similar to the description of the above method embodiments, and has similar technical descriptions and beneficial effects as the corresponding method embodiments. Due to space limitations, reference can be made to the records of the above method embodiments, so they will not be repeated here. For technical details not disclosed in the task scheduler and storage medium embodiments of this application, please refer to the description of the method embodiments of this application for understanding.

[0162] It should be understood that the "one embodiment" or "one embodiment" mentioned throughout the specification means that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the embodiment of the present application. Therefore, "in one embodiment" or "in one embodiment" appearing throughout the specification may not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in various embodiments of the embodiment of the present application, the size of the sequence number of the above-mentioned processes does not mean the order of execution, and the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present application. The above-mentioned sequence number of the embodiment of the present application is only for description and does not represent the advantages and disadvantages of the embodiment. It should be noted that in this article, the term "include", "include" or any other variant thereof is intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements that are not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of more restrictions, the elements defined by the sentence "include one..." do not exclude the existence of other identical elements in the process, method, article or device including the element.

[0163] In several embodiments provided in the embodiments of the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored, or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.

[0164] The units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units; they may be located in one place or distributed on multiple network units; some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0165] In addition, all functional units in the embodiments of the present application can be integrated into one processing unit, or each unit can be separately used as a unit, or two or more units can be integrated into one unit; the above integrated unit can be implemented in the form of hardware or in the form of hardware plus software functional units. It can be understood by ordinary technicians in this field that all or part of the steps of implementing the above method embodiments can be completed by hardware related to program instructions, and the aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps of the above method embodiments.

[0166] The above is only a specific implementation of the embodiment of the present application, but the protection scope of the embodiment of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or replacements within the technical scope disclosed in the embodiment of the present application, which should be included in the protection scope of the embodiment of the present application. Therefore, the protection scope of the embodiment of the present application should be based on the protection scope of the claims.

Claims

1. A task scheduling method, characterized in that: Applied to a task scheduler, the task scheduler includes a resource management unit and an instruction control unit, and the task scheduling method includes: Assembling the received input thread data into a shader task through the resource management unit; the input thread data includes an extended first control field segment, and the first control field segment is used to determine whether the shader task needs to execute a software control instruction; When the shader task does not need to execute the software control instruction, directly sending the shader task to the shader; In the case where the shader task needs to execute a software control instruction, after the instruction control unit executes the software control instruction, the shader task is sent to the shader.

2. The method according to claim 1, characterized in that The executing software control instruction includes at least one of the following: scalar data calculation, asynchronous data loading, and modifying input thread data.

3. The method according to claim 1, characterized in that The input thread data further includes an extended second control field segment, and the second control field segment is used to determine whether to cache the task data composed of the input thread data.

4. The method according to claim 3, characterized in that The method further comprises: When the first control domain segment indicates that the shader task needs to execute a software control instruction, or when the second control domain segment indicates that task data composed of the input thread data needs to be cached, it is determined that the software control instruction needs to be executed.

5. The method according to claim 4, characterized in that The priority of the first control field segment is higher than that of the second control field segment.

6. The method according to claim 1, characterized in that The task scheduler further includes an output arbitration unit. Before sending the shader task to the shader, the method further includes: The shader task request is arbitrated by the output arbitration unit; the shader task request is used to send the shader task to the shader.

7. The method according to claim 6, characterized in that The shader task request includes at least one of the following: a task data write request from the resource manager unit, and a task data asynchronous load write request from an instruction controller or a task data write request after instruction calculation.

8. The method according to claim 6, characterized in that The shader includes a data dependency counter, and sending the shader task to the shader includes: An initial value of a data dependency counter of the shader task is set based on the arbitrated data dependency relationship of the shader task.

9. The method according to claim 8, characterized in that The shader includes a shader execution unit, and the data dependency counter is included in the shader execution unit.

10. The method according to claim 9, characterized in that The shader further includes a shader storage unit; and the step of sending the shader task to the shader further includes: storing the task data of the arbitrated shader task to the shader storage unit, The value of the data dependency counter is updated based on the number of times the task data is written into the shader storage unit.

11. The method according to claim 10, characterized in that The method further comprises: In response to the data dependency counter indicating that the data dependency relationship is resolved, instructing the shader to execute the shader task.

12. The method according to claim 11, characterized in that The updating of the value of the data dependency counter based on the number of times the task data is written into the shader storage unit comprises: A subtraction operation is performed on the value of the data dependency counter based on the number of times; when the value of the data dependency counter is 0, it indicates that the data dependency relationship is released.

13. The method according to claim 6, characterized in that The shader includes a shader execution unit, and sending the shader task to the shader includes: writing task information of the arbitrated shader task into the shader execution unit; the task information includes a task type and a shader instruction address.

14. The task scheduling method according to claim 3, characterized in that: The method further comprises: Sending the instruction address to the instruction control unit through the resource management unit; The software control instruction is acquired by the instruction control unit based on the instruction address.

15. The task scheduling method according to claim 14, characterized in that: The method further comprises: In the case where the second control domain segment is used to determine the task data composed of the cached input thread data, the task data is sent to the storage unit corresponding to the instruction control unit through the resource management unit; The execution instruction is run by the instruction control unit to calculate the task data stored in the storage unit, and the task data after the instruction calculation is issued.

16. The task scheduling method according to claim 14, characterized in that: The method further comprises: In the case where the second control domain segment is used to determine not to cache the task data consisting of the input thread data, the instruction control unit runs the execution instruction to load asynchronous data, and sends the asynchronous data and the task data.

17. The task scheduling method according to claim 1, characterized in that: The resource management unit assembles the received input thread data into a shader task, including: When the number of input thread data with the same attribute received by the resource management unit reaches N within a first time period, assembling the N input thread data into the shader task; or Through the resource management unit, within the first time period, the number of input thread data with the same attributes received is M, and when no new input thread data is received in the second time period, the M input thread data are assembled into the shader task; wherein the second time period is a time period located after the first time period and adjacent to the first time period in timing; M and N are both positive integers, and M is less than N.

18. A task scheduler, characterized in that: The task scheduler includes a resource management unit and an instruction control unit, wherein: The resource management unit is configured to assemble received input thread data into a shader task, the input thread data including an extended first control field segment, the first control field segment being used to determine whether the shader task needs to execute a software control instruction; The resource management unit is further configured to directly send the shader task to the shader when the shader task does not need to execute the software control instruction; The resource management unit is further configured to, when the shader task needs to execute a software control instruction, send the shader task to the shader after the instruction control unit executes the software control instruction.

19. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, which, after being executed, can implement the task scheduling method described in any one of claims 1 to 17.

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