A smart storage chip integrating an edge computing data processing system

Abstract

This invention provides an intelligent storage chip integrating an edge computing data processing system, relating to the field of electronic digital data processing. It includes a data acquisition module, an edge computing module, a data storage module, and a chip management module. The data acquisition module receives externally input information data; the edge computing module performs computational analysis on the data; the data storage module stores the processed data; and the chip management module controls and manages the chip's computational and storage functions. By adding an edge computing module, this chip utilizes computing power to process edge tasks while simultaneously managing data storage, effectively improving the retrieval efficiency and access speed of stored data.

Description

Technical Field

[0001] This invention relates to the field of electronic digital data processing, and more specifically to an intelligent storage chip that integrates an edge computing data processing system. Background Technology

[0002] In today's era of rapid development in big data and the Internet of Things, various devices and sensors are constantly generating massive amounts of data that need to be collected, processed, stored, and managed quickly and efficiently. However, traditional data storage systems often cannot meet the demands of real-time big data processing, especially in scenarios involving large volumes of data with high time sensitivity, facing numerous problems such as data transmission latency, insufficient storage space, and low data processing capabilities. Therefore, how to achieve efficient data processing and intelligent storage on edge devices has become a critical technical problem that urgently needs to be solved.

[0003] The foregoing description of the background art is intended only to facilitate understanding of the invention. This description does not endorse or acknowledge any common general knowledge in the materials mentioned.

[0004] Many memory chips have been developed. Extensive research and reference have revealed existing memory chip systems, such as the one disclosed in publication number CN118802816B. These systems typically include: a memory interaction module, a header information processing module, a data processing module, and a data output module. The memory interaction module reads the header and individual sub-data of the target data packet for the first time and sends them to the header information processing module. The header information processing module determines the first matching relationship between the header and individual sub-data and each downstream channel. The memory interaction module reads the target data packet a second time and sends it to the data processing module. The data processing module determines the second matching relationship between the first-in-first-out (FIFO) cache sequence of the data output module and each downstream channel, and based on the first and second matching relationships, sends the data to the data output module. The data output module then sends the data to the corresponding downstream channel. However, this chip system does not utilize data processing capabilities to improve the efficiency of data storage, retrieval, and access, thus failing to meet the needs of big data scenarios. Summary of the Invention

[0005] The purpose of this invention is to address the shortcomings by proposing an intelligent storage chip that integrates an edge computing data processing system.

[0006] The present invention adopts the following technical solution:

[0007] A smart storage chip integrating an edge computing data processing system includes a data acquisition module, an edge computing module, a data storage module, and a chip management module;

[0008] The data acquisition module is used to receive externally input information data, the edge computing module is used to perform calculation and analysis processing on the data, the data storage module is used to save the processed data, and the chip management module is used to control and manage the chip's computing and storage functions.

[0009] The data acquisition module includes a data interface unit, a data filtering unit, and a data caching unit. The data interface unit is used to connect to external devices and directly receive external data. The data filtering unit is used to filter out redundant information in the received data. The data caching unit is used to temporarily store the filtered data.

[0010] The edge computing module includes a computing classification unit, a task execution unit, and a storage optimization unit. The computing classification unit is used to identify and classify the data in the data cache unit, the task execution unit is used to process the task data, and the storage optimization unit is used to process the data to be stored.

[0011] The data storage module includes a data storage unit, a storage allocation unit, and a retrieval and retrieval unit. The data storage unit is used to store data information, the storage allocation unit is used to allocate storage areas for the data information, and the retrieval and retrieval unit is used to retrieve stored data.

[0012] The chip management module includes a function control unit, a transmission control unit, and a region management unit. The function control unit provides a control interface to operate the function opening and closing of the edge computing module. The transmission control unit controls the transmission direction of data in the data cache unit based on the function opening and closing status. The region management unit is used to control and manage the storage area in the data storage unit.

[0013] Furthermore, the storage optimization unit includes a data compression processor, a status acquisition processor, and a region calculation processor. The data compression processor is used to compress the received data to be stored. The status acquisition processor is used to acquire the storage status of each storage region. The region calculation processor is used to select a suitable storage region for the data to be stored through calculation.

[0014] Furthermore, the process by which the regional computing processor selects a storage region includes the following steps:

[0015] S1. Extract the tag information from the data to be stored;

[0016] S2. Obtain the retrieval information of each tag in the data storage module;

[0017] S3. Calculate the retrieval index P of the data to be stored according to the following formula:

[0018] ;

[0019] Where m(i) represents the number of data items containing the i-th label, c(i) represents the number of times the data containing the i-th label is retrieved, and n is the number of labels contained in the data to be stored;

[0020] S4. Calculate the call index of the stored data in each storage area, and obtain the call index P(i) of each storage area after averaging.

[0021] S5. Select the storage region that is closest to the retrieval index of the data to be stored as the target region;

[0022] S6. Determine whether the remaining space in the target area is greater than the data size to be stored. If yes, send the target area and the data to be stored together to the data storage module. If no, proceed to step S7.

[0023] S7. Use the lower-level storage area as the new target area and return to step S6.

[0024] Furthermore, the region management unit includes a setting interaction processor and a data migration processor. The setting interaction processor is used to set the hierarchical information of the storage region, and the data migration processor migrates the stored data between different storage regions according to the retrieval status of the stored data.

[0025] Furthermore, the data migration processor calculates the actual call value Q of the stored data according to the following formula:

[0026] ;

[0027] Where a is the protection value, m c The actual number of times the stored data is accessed is t, the storage time of the data is t0, and the start time is t0.

[0028] The data migration processor compares the actual call values ​​of stored data in two adjacent storage areas. When the actual call value of stored data in a lower-level storage area is greater than that in a higher-level storage area, the two stored data are migrated to each other's storage areas. If there is insufficient storage space after migration, only one of the stored data is migrated.

[0029] The beneficial effects achieved by this invention are:

[0030] This system, by adding an edge computing module to the chip, can both process edge tasks and perform computational analysis on the storage. It stores data in appropriate areas and, by dividing the storage areas into different levels and configuring different retrieval weights and communication resources for different levels, can effectively improve data retrieval efficiency and access speed, meeting the storage needs of big data.

[0031] To further understand the features and technical content of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are for reference and illustration only and are not intended to limit the present invention. Attached Figure Description

[0032] Figure 1 This is a schematic diagram of the overall structural framework of the present invention;

[0033] Figure 2 This is a schematic diagram of the data acquisition module of the present invention;

[0034] Figure 3 This is a schematic diagram of the edge computing module of the present invention;

[0035] Figure 4 This is a schematic diagram of the data storage module of the present invention;

[0036] Figure 5 This is a schematic diagram of the chip management module of the present invention;

[0037] Figure 6 This is a comparison chart of test data for the present invention. Detailed Implementation

[0038] The following specific embodiments illustrate the implementation of the present invention. Those skilled in the art can understand the advantages and effects of the present invention from the content disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and various details in this specification can also be modified and changed based on different viewpoints and applications without departing from the spirit of the present invention. Furthermore, the accompanying drawings of the present invention are for simple illustrative purposes only and are not depictions of actual dimensions; this is stated beforehand. The following embodiments will further describe the relevant technical content of the present invention in detail, but the disclosed content is not intended to limit the scope of protection of the present invention.

[0039] Example 1: This example provides an intelligent storage chip that integrates an edge computing data processing system, combined with... Figure 1 It includes a data acquisition module, an edge computing module, a data storage module, and a chip management module.

[0040] The data acquisition module is used to receive externally input information data, the edge computing module is used to perform calculation and analysis processing on the data, the data storage module is used to save the processed data, and the chip management module is used to control and manage the chip's computing and storage functions.

[0041] The data acquisition module includes a data interface unit, a data filtering unit, and a data caching unit. The data interface unit is used to connect to external devices and directly receive external data. The data filtering unit is used to filter out redundant information in the received data. The data caching unit is used to temporarily store the filtered data.

[0042] The edge computing module includes a computing classification unit, a task execution unit, and a storage optimization unit. The computing classification unit is used to identify and classify the data in the data caching unit, the task execution unit is used to process the task data, and the storage optimization unit is used to process the data to be stored.

[0043] The data storage module includes a data storage unit, a storage allocation unit, and a retrieval and retrieval unit. The data storage unit is used to store data information, the storage allocation unit is used to allocate storage areas for the data information, and the retrieval and retrieval unit is used to retrieve stored data.

[0044] The chip management module includes a function control unit, a transmission control unit, and a region management unit. The function control unit provides a control interface to operate the function opening and closing of the edge computing module. The transmission control unit controls the transmission direction of data in the data cache unit based on the function opening and closing status. The region management unit is used to control and manage the storage area in the data storage unit.

[0045] The storage optimization unit includes a data compression processor, a status acquisition processor, and a region calculation processor. The data compression processor is used to compress the received data to be stored. The status acquisition processor is used to acquire the storage status of each storage region. The region calculation processor is used to select a suitable storage region for the data to be stored through calculation.

[0046] The process by which the regional computing processor selects a storage region includes the following steps:

[0047] S1. Extract the tag information from the data to be stored.

[0048] S2. Obtain the retrieval information of each tag in the data storage module.

[0049] S3. Calculate the retrieval index P of the data to be stored according to the following formula:

[0050] .

[0051] Where m(i) represents the number of data items containing the i-th label, c(i) represents the number of times the data containing the i-th label is accessed, and n is the number of labels contained in the data to be stored.

[0052] S4. Calculate the call index of the stored data in each storage area, and obtain the call index P(i) of each storage area after averaging.

[0053] S5. Select the storage region that is closest to the retrieval index of the data to be stored as the target region.

[0054] S6. Determine whether the remaining space in the target area is greater than the size of the data to be stored. If yes, send the target area and the data to be stored together to the data storage module. If no, proceed to step S7.

[0055] S7. Use the lower-level storage area as the new target area and return to step S6.

[0056] The region management unit includes a setting interaction processor and a data migration processor. The setting interaction processor is used to set the hierarchical information of the storage region, and the data migration processor migrates the stored data between different storage regions according to the retrieval status of the stored data.

[0057] The data migration processor calculates the actual retrieval value Q of the stored data according to the following formula:

[0058] .

[0059] Where a is the protection value, m c The actual number of times the stored data is accessed is t, the storage time of the data is t0, and the start time is t0.

[0060] The data migration processor compares the actual call values ​​of stored data in two adjacent storage areas. When the actual call value of stored data in a lower-level storage area is greater than that in a higher-level storage area, the two stored data are migrated to each other's storage areas. If there is insufficient storage space after migration, only one of the stored data is migrated.

[0061] Example 2: This example includes all the contents of Example 1, and provides an intelligent storage chip integrating an edge computing data processing system, including a data acquisition module, an edge computing module, a data storage module and a chip management module.

[0062] The data acquisition module is used to receive externally input information data, the edge computing module is used to perform calculation and analysis processing on the data, the data storage module is used to save the processed data, and the chip management module is used to control and manage the chip's computing and storage functions.

[0063] Combination Figure 2 The data acquisition module includes a data interface unit, a data filtering unit, and a data caching unit. The data interface unit is used to connect to external devices and directly receive external data. The data filtering unit is used to filter out redundant information in the received data. The data caching unit is used to temporarily store the filtered data.

[0064] Combination Figure 3 The edge computing module includes a computing classification unit, a task execution unit, and a storage optimization unit. The computing classification unit is used to identify and classify the data in the data caching unit, the task execution unit is used to process the task data, and the storage optimization unit is used to process the data to be stored.

[0065] Combination Figure 4 The data storage module includes a data storage unit, a storage allocation unit, and a retrieval and retrieval unit. The data storage unit is used to store data information, the storage allocation unit is used to allocate storage areas for the data information, and the retrieval and retrieval unit is used to retrieve stored data.

[0066] Combination Figure 5 The chip management module includes a function control unit, a transmission control unit, and a region management unit. The function control unit provides a control interface to operate the function opening and closing of the edge computing module. The transmission control unit controls the transmission direction of data in the data cache unit based on the function opening and closing status. The region management unit is used to control and manage the storage area in the data storage unit.

[0067] The data interface unit includes a high-speed transmission processor, a protocol conversion processor, and a data verification processor. The high-speed transmission processor is used to transmit data between the chip and external devices. The protocol conversion processor is used to convert data between different protocols. The data verification processor is used to verify the received data to ensure the integrity and accuracy of the data.

[0068] The data filtering unit includes a redundancy detection processor, a filtering and reduction processor, and a tagging and restoration processor. The redundancy detection processor is used to detect redundant segments in the data, the filtering and reduction processor is used to delete redundant segments in the data, and the tagging and restoration processor is used to tag the information of the redundant segments in order to restore the original data.

[0069] The data cache unit includes a high-speed information register, a data write processor, and a data read processor. The high-speed information register is used to record received data information, the data write processor is used to write received data into the high-speed information register, and the data read processor is used to read data information from the high-speed information register.

[0070] The computational classification unit includes a classification feature register, a classification recognition processor, and a directional transmission processor. The classification feature register is used to store feature information of different data types. The classification recognition processor performs type recognition on the received data based on the feature information. The directional transmission processor transmits the received data to the task execution unit or the storage optimization unit based on the type recognition result.

[0071] The types of data received are divided into task data and data to be stored.

[0072] The task execution unit includes a task parsing processor, an execution calculation processor, and a data feedback processor. The task parsing processor is used to parse and process task data. The execution calculation processor performs calculations on the data based on the parsing results. The data feedback processor stores the calculation results in a data storage module or feeds them back to an external device based on the task requirements.

[0073] The storage optimization unit includes a data compression processor, a status acquisition processor, and a region calculation processor. The data compression processor is used to compress the received data to be stored. The status acquisition processor is used to acquire the storage status of each storage region. The region calculation processor is used to select a suitable storage region for the data to be stored through calculation.

[0074] The process by which the regional computing processor selects a storage region includes the following steps:

[0075] S1. Extract the tag information from the data to be stored.

[0076] S2. Obtain the retrieval information of each tag in the data storage module.

[0077] S3. Calculate the retrieval index P of the data to be stored according to the following formula:

[0078] .

[0079] Where m(i) represents the number of data items containing the i-th label, c(i) represents the number of times the data containing the i-th label is accessed, and n is the number of labels contained in the data to be stored.

[0080] It is important to note that the labels are sorted from largest to smallest based on the number of data containing the label, i.e., m(i)>=m(i+1).

[0081] S4. Calculate the call index of the stored data in each storage area, and obtain the call index P(i) of each storage area after averaging.

[0082] S5. Select the storage region that is closest to the retrieval index of the data to be stored as the target region.

[0083] S6. Determine whether the remaining space in the target area is greater than the size of the data to be stored. If yes, send the target area and the data to be stored together to the data storage module. If no, proceed to step S7.

[0084] S7. Use the lower-level storage area as the new target area and return to step S6.

[0085] The data storage unit includes a data information register and a region hierarchical processor. The data information register is used to actually store data, and the region hierarchical processor is used to divide the data information register into multiple levels of regions.

[0086] The storage allocation unit includes a region monitoring processor and a region writing processor. The region monitoring processor is used to monitor the storage status of each storage region, and the region writing processor is used to write the data to be stored into the target region.

[0087] The retrieval and retrieval unit includes a data retrieval processor and a retrieval and statistics processor. The data retrieval processor is used to retrieve content from the data storage unit, and the retrieval and statistics processor is used to retrieve the retrieved data and perform statistics.

[0088] It is important to note that the higher the region level, the higher the retrieval priority and the faster the call speed.

[0089] The function control unit includes an interface display processor and a setting reading processor. The interface display processor is used to output interface code to an external device and display the setting interface. The setting reading processor is used to read the function parameters in the setting interface.

[0090] The transmission control unit includes a parameter change detection processor and a channel disable processor. The parameter change detection processor is used to detect changes in the functional parameters, and the channel disable processor disables the corresponding data transmission channel based on the functional parameters.

[0091] The region management unit includes a setting interaction processor and a data migration processor. The setting interaction processor is used to set the hierarchical information of the storage region, and the data migration processor migrates the stored data between different storage regions according to the retrieval status of the stored data.

[0092] The data migration processor calculates the actual retrieval value Q of the stored data according to the following formula:

[0093] .

[0094] Where a is the protection value, m c The actual number of times the stored data is accessed is t, the storage time of the data is t0, and the start time is t0.

[0095] The data migration processor compares the actual call values ​​of stored data in two adjacent storage areas. When the actual call value of stored data in a lower-level storage area is greater than that in a higher-level storage area, the two stored data are migrated to each other's storage areas. If there is insufficient storage space after migration, only one of the stored data is migrated.

[0096] The 'i' mentioned above is an ordinal number used to represent the sequence number and has no actual meaning.

[0097] The following is a portion of the code in this chip system:

[0098] # Data Acquisition Module

[0099] class DataAcquisitionModule:

[0100] def __init__(self):

[0101] self.data_interface_unit = DataInterfaceUnit()

[0102] self.data_filtering_unit = DataFilteringUnit()

[0103] self.data_cache_unit = DataCacheUnit()

[0104] def receive_data(self, external_data):

[0105] # Data Receiving Process

[0106] data = self.data_interface_unit.connect_and_receive(external_data)

[0107] filtered_data = self.data_filtering_unit.filter(data)

[0108] self.data_cache_unit.cache_data(filtered_data)

[0109] return filtered_data

[0110] class DataInterfaceUnit:

[0111] def connect_and_receive(self, external_data):

[0112] # Simulated data reception

[0113] print("Received external data:", external_data)

[0114] return external_data

[0115] # Edge computing module

[0116] class EdgeComputingModule:

[0117] def __init__(self):

[0118] self.computation_classification_unit =ComputationClassificationUnit()

[0119] self.task_execution_unit = TaskExecutionUnit()

[0120] self.storage_optimization_unit = StorageOptimizationUnit()

[0121] class ComputationClassificationUnit:

[0122] def classify(self, data):

[0123] # Categorized Data

[0124] print("Classified data...")

[0125] # Assuming the classification result

[0126] return {"classified_data": data}

[0127] class TaskExecutionUnit:

[0128] def execute(self, data):

[0129] # Execute task processing

[0130] print("Task processing...")

[0131] # Assuming the processed data

[0132] return {"processed_data": data}

[0133] class StorageOptimizationUnit:

[0134] def optimize(self, data):

[0135] # Optimize data storage

[0136] print("Optimize data storage...")

[0137] # Assuming optimized data

[0138] return {"optimized_data": data}

[0139] # Data storage module

[0140] class DataStorageUnit:

[0141] def save_data(self, data):

[0142] # Storing data

[0143] print("Save data:", data)

[0144] class StorageAllocationUnit:

[0145] def allocate(self, data):

[0146] # Allocate storage area

[0147] print("Allocate storage area...")

[0148] return {"allocated_data": data}

[0149] class RetrievalCallUnit:

[0150] def retrieve(self, query):

[0151] # Retrieve Data

[0152] print("Data retrieved, query criteria:", query)

[0153] return {"retrieved_data": query}

[0154] # Chip Management Module

[0155] class ChipManagementModule:

[0156] def __init__(self):

[0157] self.function_control_unit = FunctionControlUnit()

[0158] self.transmission_control_unit = TransmissionControlUnit()

[0159] self.area_management_unit = AreaManagementUnit()

[0160] class AreaManagementUnit:

[0161] def manage_area(self, storage_area):

[0162] # Manage storage areas

[0163] print("Manage storage area:", storage_area).

Claims

1. A smart storage chip integrating an edge computing data processing system, characterized in that: The system includes a data acquisition module, an edge computing module, a data storage module, and a chip management module. The data acquisition module receives externally input information and provides it to the edge computing module. The edge computing module includes a computing classification unit, a task execution unit, and a storage optimization unit. The computing classification unit identifies and classifies the data in the data acquisition module and transmits the received data to the task execution unit or the storage optimization unit based on the identification results. The task execution unit processes the task data, and the storage optimization unit processes the data to be stored. The chip management module includes a function control unit, a transmission control unit, and a region management unit. The function control unit provides a control interface to operate the edge computing module's functions. The transmission control unit... The transmission direction of data in the data acquisition module is controlled based on the on / off state of the function. The area management unit is used to control and manage the storage areas in the data storage unit. The storage optimization unit includes a data compression processor, a status acquisition processor, and an area calculation processor. The data compression processor is used to compress the received data to be stored. The status acquisition processor is used to acquire the storage status of each storage area. The area calculation processor selects a suitable storage area for the data to be stored through calculation. The process of the area calculation processor selecting a storage area includes the following steps: S1, extracting the tag information from the data to be stored; S2, acquiring the retrieval information of each tag in the data storage module; S3, calculating the retrieval index P of the data to be stored according to the following formula: Where m(i) represents the number of data containing the i-th tag, c(i) represents the number of times the data containing the i-th tag is called, and n is the number of tags contained in the data to be stored; S4, calculate the call index of the data stored in each storage area, and obtain the call index P(i) of each storage area after averaging; S5, take the storage area with the call index closest to the data to be stored as the target area; S6, determine whether the remaining space of the target area is greater than the data size of the data to be stored. If so, send the target area and the data to be stored together to the data storage module. If not, proceed to step S7; S7, take the storage area of ​​the lower level as the new target area and return to step S6; The region management unit includes a setting interaction processor and a data migration processor. The setting interaction processor is used to set the hierarchical information of the storage region, and the data migration processor migrates the stored data between different storage regions according to the access status of the stored data. The data migration processor calculates the actual access value Q of the stored data according to the following formula: Where a is the protection value, m c t represents the actual number of times the stored data is accessed, t represents the storage time of the stored data, and t0 represents the start time. The data migration processor compares the actual access values ​​of the stored data in two adjacent storage areas. When the actual access value of the stored data in the lower-level storage area is greater than the actual access value of the stored data in the higher-level storage area, the two stored data are migrated to each other's storage areas. If there is insufficient storage space after migration, only one of the stored data is migrated.

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