Broadband low-phase-noise small-step frequency synthesis system

Abstract

The invention belongs to the field of radio frequency microwave time-frequency control, and relates to a broadband low-phase-noise small-step frequency synthesis system which comprises a reference frequency generation circuit, a frequency mixing phase-locked source circuit and an auxiliary locking circuit. The reference frequency generation circuit generates a reference signal with fine frequency stepping by using a DDS (Direct Digital Synthesizer) in combination with a frequency division phase-locked loop; the output end of the reference frequency generation circuit is connected with the reference input end of the frequency mixing phase-locked source circuit; the frequency-mixing phase-locking circuit acquires a feedback signal with a low frequency multiplication ratio by utilizing a twice frequency-mixing mode, and performs phase discrimination on the feedback signal and a reference signal to obtain a target signal; the auxiliary locking circuit is embedded in the frequency mixing phase-locked source circuit through an analog switch. A reference frequency generation circuit is arranged to generate reference frequencies required by phase-locked loops respectively, a frequency mixing phase-locked source circuit generates a finally synthesized low-phase-noise broadband signal, the reference frequencies and the frequency mixing phase-locked source circuit progressively generate accurate synthesis of required frequencies, and the output requirements of small stepping and ultra wide band are met.

Description

Technical Field

[0001] The present application belongs to the field of radio frequency microwave time-frequency control, and in particular relates to a broadband low phase noise small step frequency synthesis system. Background Art

[0002] Frequency source is the core component of modern electronic information system, which can provide high-quality clock, local oscillator or excitation signal for radar, communication, electronic countermeasure, microwave measuring instrument and other systems. With the development of electronic technology and the improvement of system application requirements, frequency synthesis technology is constantly developing in the direction of low phase noise, low spurious, agile frequency, small step, small size, wide bandwidth and low cost.

[0003] Phase noise is a key indicator of the frequency source, and has a decisive influence on the receiver sensitivity, communication bit error rate, radar detection capability, etc. To achieve low phase noise, small step, wide bandwidth frequency synthesis, direct synthesis, fractional frequency phase-locked loop, hybrid frequency synthesis and other technical routes can be used. Direct synthesis uses frequency division, frequency multiplication, and mixing devices to generate different frequency combinations. It has the advantages of low additional phase noise and fast switching speed, but it is bulky, complex circuit and high cost when achieving small step and wide bandwidth output. Fractional frequency phase-locked loop has the advantages of wide output bandwidth and high frequency resolution, but the inevitable phase leakage and integer boundary spurs affect the spectrum purity, and the Δ-Σ noise that is difficult to be completely suppressed by the loop filter will further affect the phase noise performance of the frequency source. Hybrid frequency synthesis technology combines direct synthesis (DS), phase-locked loop (PLL), direct digital synthesis (DDS) and other technologies to give full play to the advantages of different synthesis technologies. While achieving low phase noise, small step, wide bandwidth frequency source, it tries to take into account other requirements such as agile frequency conversion, small size, and low cost.

[0004] Hybrid frequency synthesis technology includes different methods such as DDS combined with PLL and multi-loop mixing and phase locking. For example, an existing low phase noise broadband phase-locked source uses an in-loop mixing architecture to down-convert the VCO output and then phase-lock it with the DDS fine step reference, thereby reducing the division ratio of the loop. However, its down-conversion frequency standard is generated with the help of another phase-locked loop, and its additional phase noise is still introduced into the main loop by the mixer. A Ku-band phase-locked source is also disclosed, which uses a comb spectrum to generate a local oscillator and mix it outside the PLL loop to up-convert the intermediate frequency signal generated by the phase-locked loop to the Ku band. The additional phase noise of the comb spectrum local oscillator is low, which improves the phase noise of the synthesized signal, but its output frequency is subject to the selection of the comb spectrum by the switch filter array, and it is difficult to achieve small step and ultra-wideband output. Summary of the invention

[0005] The purpose of the present application is to provide a broadband low phase noise small step frequency synthesis system to solve the problem that the existing output frequency is restricted by the selection of the comb spectrum by the switching filter array, making it difficult to achieve small step and ultra-wideband output.

[0006] The technical solution of the present application is: a broadband low phase noise small step frequency synthesis system, including a reference frequency generating circuit, a mixing phase-locked source circuit and an auxiliary locking circuit; the reference frequency generating circuit uses DDS combined with a frequency division phase-locked loop to generate a reference signal with fine frequency steps; the output end of the reference frequency generating circuit is connected to the reference input end of the mixing phase-locked source circuit; the mixing phase-locked circuit obtains a feedback signal with a low frequency multiplication ratio by mixing twice, performs phase discrimination between the feedback signal and the reference signal, tunes the broadband VCO, and obtains the target signal; the auxiliary locking circuit is embedded in the mixing phase-locked source circuit through an analog switch, and can generate an auxiliary loop voltage to pre-tune the broadband VCO.

[0007] Preferably, the reference frequency generating circuit comprises a first comb spectrum generator, a direct digital frequency synthesizer, a first mixer, a second mixer, a first phase detector and a narrowband VCO; a power divider is provided at the output end of the first comb spectrum generator, which can divide the reference signal provided by the first comb spectrum generator into three paths to the direct digital frequency synthesizer, the first phase detector and the first mixer; the direct digital frequency synthesizer can synthesize the reference signal into a narrowband signal with fine frequency steps; the first mixer mixes the signal of the direct digital frequency synthesizer with the reference signal after power division and inputs it to the first phase detector; the intermediate frequency output end of the second mixer is connected to the first phase detector, the local oscillator input end can receive the reference signal after power division, and the radio frequency input end is connected to the output end of the narrowband VCO; the first phase detector can receive the output signals of the second mixer and the first mixer for phase detection and tune the narrowband VCO; the narrowband VCO generates a reference signal with fine steps.

[0008] Preferably, the mixing phase-locked source circuit includes a frequency division filter circuit, a two-frequency mixing circuit and a phase-locked source circuit; the input end of the frequency division filter circuit receives a fine-step reference signal, and sends it to the two-frequency mixing circuit, the phase-locked source circuit and the auxiliary locking circuit after frequency division and filtering; the two-frequency mixing circuit and the phase-locked source circuit are connected end to end; the two-frequency mixing circuit can mix the output signal of the phase-locked source circuit and the output signal of the frequency division filter circuit twice, and input them into the phase-locked source circuit; the phase-locked source circuit can perform phase detection and tuning on the output signal of the two-frequency mixing circuit and the output signal of the frequency division filter circuit; the auxiliary locking circuit is embedded in the phase-locked source circuit.

[0009] Preferably, the frequency division and filtering circuit includes a multi-way frequency divider and a switch filter; the input end of the multi-way frequency divider is connected to the output end of the reference frequency generating circuit, and the output end is connected to the switch filter and the phase-locked source circuit; the output end of the switch is connected to the double mixing circuit.

[0010] Preferably, the double-mixing circuit includes a third mixer, a fourth mixer, a first single-pole double-throw switch, a second single-pole double-throw switch and a second comb spectrum generator; the input end of the second comb spectrum generator is connected to the output end of the frequency division filter circuit, and the output end is connected to the third mixer; the input end of the third mixer is connected to the phase-locked source circuit and the output end of the second comb spectrum generator, and the output end is connected to the first single-pole double-throw switch; the input end of the fourth mixer is connected to the first single-pole double-throw switch and the output end of the frequency division filter circuit; the first single-pole double-throw switch can send the output signal of the third mixer to the fourth mixer or the second single-pole double-throw switch; the second double-throw switch can send the signal of the fourth mixer or the first single-pole double-throw switch to the phase-locked source circuit.

[0011] Preferably, the phase-locked source circuit includes a second phase detector, a third single-pole double-throw switch, a broadband VCO and a single-way frequency divider; the input end of the second phase detector is connected to the output end of the twice-mixing circuit and the frequency division filter circuit, and the output end is connected to the third single-pole double-throw switch; the third single-pole double-throw switch can output the output signal of the auxiliary locking circuit or the second phase detector to the broadband VCO, and the broadband VCO is connected in series between the third single-pole double-throw switch and the single-way frequency divider; the single-way frequency divider divides the output signal of the broadband VCO, sends it to the input end of the twice-mixing circuit and the auxiliary locking circuit, and realizes the final signal output.

[0012] Preferably, the auxiliary locking circuit includes a third phase detector and a delay holding circuit; the third phase detector can receive the output signal of the single-way frequency divider and the output signal of the frequency division filter circuit, and send it to the delay holding circuit after phase detection, and the output end of the delay holding circuit is connected to the third single-pole double-throw switch.

[0013] The broadband low phase noise small step frequency synthesis system of the present application generates the reference frequency required by each phase-locked loop by setting a reference frequency generating circuit, and generates the final synthesized low phase noise broadband signal by a mixing phase-locked source circuit. The two are progressively generated to accurately synthesize the required frequency, thereby achieving small step and ultra-wideband output requirements.

[0014] The use of DDS to implement small-step frequency hopping has a faster frequency switching speed than the solution using a fractional frequency phase-locked loop, and the phase noise is not affected by the delta-sigma noise of the fractional frequency division. The generated DDS signal is not directly used as the reference frequency, but a section with the least spurious and image components is selected and combined with the f generated by the first comb spectrum generator.LO1 The frequency is up-converted and moved to a higher frequency to be input into the first phase detector. In the phase-locked loop composed of the first phase detector and the narrowband VCO, the in-loop mixing technology is used to convert the synthesized reference frequency f x Down-convert to baseband so that (f x -f LO2 )×N=f DDS +f LO1 Compared to using f DDS ×N=f x The phase-locking method adopted by the present invention improves f x The frequency resolution can ensure that the frequency hopping step is fine enough when the ultra-wideband signal is synthesized in the mixer phase-locked source circuit in the low phase noise loop of the subsequent stage. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solution provided by the present application, the following is a brief introduction to the accompanying drawings. Obviously, the accompanying drawings described below are only some embodiments of the present application.

[0016] Figure 1 This is a schematic diagram of the overall circuit structure of this application.

[0017] 1. The first comb spectrum generator; 2. The direct digital frequency synthesizer; 3. The first mixer; 4. The second mixer; 5. The first phase detector; 6. The narrowband VCO; 7. The power divider; 8. The third mixer; 9. The fourth mixer; 10. The first single-pole double-throw switch; 11. The second single-pole double-throw switch; 12. The second comb spectrum generator; 13. The second phase detector; 14. The third single-pole double-throw switch; 15. The broadband VCO; 16. The single-channel frequency divider; 17. The third phase detector; 18. The delay holding circuit. DETAILED DESCRIPTION

[0018] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0019] A broadband, low phase noise, small step frequency synthesis system, such as Figure 1As shown, it includes a reference frequency generating circuit, a mixing phase-locked source circuit and an auxiliary locking circuit; the reference frequency generating circuit uses DDS combined with a frequency division phase-locked loop to generate a reference signal with fine frequency steps; the output end of the reference frequency generating circuit is connected to the reference input end of the mixing phase-locked source circuit; the mixing phase-locked circuit obtains a feedback signal with a low frequency multiplication ratio by mixing twice, performs phase discrimination between the feedback signal and the reference signal, tunes the broadband VCO15, and obtains the target signal; the auxiliary locking circuit is embedded in the mixing phase-locked source circuit through an analog switch, and can generate an auxiliary loop voltage to pre-tune the broadband VCO15.

[0020] The reference frequency generating circuit is set to generate the reference frequency required by each phase-locked loop, and the final synthesized low phase noise broadband signal is generated by the mixing phase-locked source circuit. The two are progressively combined to produce accurate synthesis of the required frequency, achieving small step and ultra-wideband output requirements.

[0021] The use of DDS to implement small-step frequency hopping has a faster frequency switching speed than the solution using a fractional frequency phase-locked loop, and the phase noise is not affected by the delta-sigma noise of the fractional frequency division. The generated DDS signal is not directly used as the reference frequency, but a section with the least spurious and image components is selected and combined with the f generated by the first comb spectrum generator. LO1 The frequency is up-converted and moved to a higher frequency to be input into the first phase detector. In the phase-locked loop composed of the first phase detector and the narrowband VCO, the in-loop mixing technology is used to convert the synthesized reference frequency f x Down-convert to baseband so that (f x -f LO2 )×N=f DDS +f LO1 Compared to using f DDS ×N=f x The phase-locking method adopted by the present invention improves f x The frequency resolution can ensure that the frequency hopping step is fine enough when the ultra-wideband signal is synthesized in the mixer phase-locked source circuit in the low phase noise loop of the subsequent stage.

[0022] Preferably, the reference frequency generating circuit comprises a first comb spectrum generator 1, a direct digital frequency synthesizer 2, a first mixer 3, a second mixer 4, a first phase detector 5 and a narrowband VCO 6; a power divider 7 is provided at the output end of the first comb spectrum generator 1, which can divide the reference signal provided by the first comb spectrum generator 1 into three paths to the direct digital frequency synthesizer 2, the first phase detector 5 and the first mixer 3; the direct digital frequency synthesizer 2 can synthesize the reference signal into a narrowband signal with fine frequency steps; the first mixer 3 mixes the signal of the direct digital frequency synthesizer 2 with the reference signal after power division and inputs it to the first phase detector 5; the intermediate frequency output end of the second mixer 4 is connected to the first phase detector 5, the local oscillator input end can receive the reference signal after power division, and the radio frequency input end is connected to the output end of the narrowband VCO 6; the first phase detector 5 can receive the output signals of the second mixer 4 and the first mixer 3 for phase detection and tune the narrowband VCO 6; the narrowband VCO 6 generates a reference signal with fine steps.

[0023] Both the comb spectrum generator and the phase-locked loop have the effect of frequency multiplication. When the frequency multiplication ratio is the same, the additional phase noise of the comb spectrum generator to the multiplied signal is lower. Through the cooperation of two mixers and the phase detector, the corresponding frequency signal can be accurately and quickly extracted.

[0024] Preferably, the frequency-mixing phase-locked source circuit includes a frequency-division filtering circuit, a two-frequency-mixing circuit and a phase-locked source circuit; the input end of the frequency-division filtering circuit receives a fine-step reference signal, which is sent to the two-frequency-mixing circuit, the phase-locked source circuit and the auxiliary locking circuit after frequency division and filtering; the two-frequency-mixing circuit and the phase-locked source circuit are connected end to end; the two-frequency-mixing circuit can perform two-frequency mixing on the output signal of the phase-locked source circuit and the output signal of the frequency-division filtering circuit, and input them into the phase-locked source circuit; the phase-locked source circuit can perform phase discrimination and tuning on the output signal of the two-frequency-mixing circuit and the output signal of the frequency-division filtering circuit; the auxiliary locking circuit is embedded in the phase-locked source circuit. By adopting the method of frequency-division filtering and two-frequency mixing to accurately extract the signal, it is possible to prevent the occurrence of false locking.

[0025] Preferably, the frequency division and filtering circuit includes a multi-way frequency divider and a switch filter; the input end of the multi-way frequency divider is connected to the output end of the reference frequency generating circuit, and the output end is connected to the switch filter and the phase-locked source circuit; the output end of the switch is connected to the double frequency mixing circuit. The multi-way frequency divider is used to realize multi-way output and analysis of the signal, thereby improving the phase-locked efficiency.

[0026] Preferably, the double mixing circuit includes a third mixer 8, a fourth mixer 9, a first single-pole double-throw switch 10, a second single-pole double-throw switch 11 and a second comb spectrum generator 12; the input end of the second comb spectrum generator 12 is connected to the output end of the frequency division filter circuit, and the output end is connected to the third mixer 8; the input end of the third mixer 8 is connected to the phase-locked source circuit and the output end of the second comb spectrum generator 12, and the output end is connected to the first single-pole double-throw switch 10; the input end of the fourth mixer 9 is connected to the first single-pole double-throw switch 10 and the output end of the frequency division filter circuit; the first single-pole double-throw switch 10 can send the output signal of the third mixer 8 to the fourth mixer 9 or the second single-pole double-throw switch 11; the second double-throw switch can send the signal of the fourth mixer 9 or the first single-pole double-throw switch 10 to the phase-locked source circuit.

[0027] In the low phase noise loop mixer phase-locked source circuit, a frequency divider and a comb spectrum generator are combined to generate a reference frequency f x A series of frequency combinations are formed by using a two-stage mixer with a single-pole double-throw switch to convert the main loop output frequency f y Down-convert to the reference frequency f ref equal, thus avoiding the additional phase noise caused by the frequency doubling of the phase-locked loop.

[0028] Preferably, the phase-locked source circuit includes a second phase detector 13, a third single-pole double-throw switch 14, a broadband VCO 15 and a single-way frequency divider 16; the input end of the second phase detector 13 is connected to the output end of the twice-mixing circuit and the frequency division filter circuit, and the output end is connected to the third single-pole double-throw switch 14; the third single-pole double-throw switch 14 can output the output signal of the auxiliary locking circuit or the second phase detector 13 to the broadband VCO 15, and the broadband VCO 15 is connected in series between the third single-pole double-throw switch 14 and the single-way frequency divider 16; the single-way frequency divider 16 divides the output signal of the broadband VCO 15, sends it to the input end of the twice-mixing circuit and the auxiliary locking circuit, and realizes the final signal output.

[0029] The broadband VCO can achieve an octave tuning output. By cooperating with the frequency divider 20 at the subsequent stage, the output frequency can be reduced, so that the broadband VCO of different frequency bands can adapt to the feedback frequency range of the second phase detector and the third phase detector. Therefore, there is no need to adjust f y With f LO4 、f LO3 The frequency division and combination of OUT The frequency range makes the circuit structure more flexible.

[0030] Preferably, the auxiliary locking circuit includes a third phase detector 17 and a delay holding circuit 18; the third phase detector 17 can receive the output signal of the single-way frequency divider 16 and the output signal of the frequency division filter circuit, and send it to the delay holding circuit 18 after phase detection, and the output end of the delay holding circuit 18 is connected to the third single-pole double-throw switch 14.

[0031] The in-loop mixer phase-locked loop may face the possibility of mislocking, because the phase detector may capture the image frequency generated by the mixer and phase-lock the wrong frequency. In the loop formed by the first phase detector 5, since the bandwidth of the synthesized reference frequency is not wide, a narrowband voltage-controlled oscillator is selected to provide a low phase noise synthesized signal while excluding the image frequency due to its narrowband characteristics, eliminating the possibility of mislocking. In the loop formed by the second phase detector 13, since the output frequency band is very wide, both the target frequency and the image frequency may fall within the band of VCO19, so a dual-loop auxiliary locking circuit is proposed to eliminate the situation of loop mislocking. Before the main loop is locked, the main loop is switched to the auxiliary locking circuit using a single-pole double-throw switch (SPDT18), so that the auxiliary loop formed by the third phase detector 17 and VCO19 is locked to the target frequency in advance, and then the loop is instantly switched back to the main loop formed by the second phase detector 13 and VCO. During this process, the delay hold circuit 18 can maintain the tuning voltage of the VCO in the loop, so that the main loop is locked quickly without being disturbed by the image frequency.

[0032] As a specific implementation method, the following is described with a specific example:

[0033] A specific implementation method of a small-step low-phase-noise frequency source is given, including the selection of key components and the division of frequency bands. The frequency source is realized by adjusting the reference frequency f x and mixing LO f LO3 、f LO4 , which can cover the output frequency range of 10GHz to 20GHz.

[0034] The constant temperature crystal oscillator provides a 100MHz signal, which is amplified and used to excite the first comb spectrum generator (SICG257) to generate rich harmonic signals. The filter selects the harmonic signal f with a frequency of 1600MHz. clk As the clock of DDS5 (AD9956), take the harmonic signal f with a frequency of 3200MHz LO2 In the DDS5 output frequency band, the 100MHz to 130MHz frequency band with the least harmonic and image components is selected as the fine step reference signal f DDS Then, f DDS As the intermediate frequency, f clkAs the local oscillator, it is input to the first mixer (BW360) for up-conversion to obtain a reference signal f of 1700MHz to 1730MHz PFD1 The first phase detector (LTC6945), narrowband VCO (MCRO3245A) and second mixer (BW350) are used to generate a fine step reference frequency f covering 3215MHz~3280MHz in an in-loop mixing architecture. x Among them, the output frequency of the narrowband VCO is f x In the loop, the local oscillator signal f LO2 Down-converting produces a frequency range of 15MHz to 80MHz. PFD2 The signal is fed back to the first phase detector. Here, the first phase detector (LTC6945) adopts a frequency division architecture, that is, the high frequency f PFD1 The signal is input to the VCO feedback port of the phase detector chip, and the low frequency f PFD2 The signal is input to the reference end of the phase detector, that is, when the loop is locked, (f x -f LO2 )×N=f DDS +f LO1 .

[0035] The multi-way divider is composed of a cascade of a two-way divider SID002 and a multi-way clock distributor AD9516-5, which can generate the reference signal f required by the second phase detector (ADF4002) and the third phase detector (LTC6945). ref , the excitation signal f of the second comb generator (SICG257) drive , and the local oscillator signal fLO3 required for in-loop mixing. Among them, fLO3 is available in and The second comb spectrum generator generates the local oscillator signal f required for the in-loop mixing. LO4 , select f by switching the filter drive The third, fourth, fifth, and sixth harmonics of 2f x , and 3f x .

[0036] The main loop consisting of the second phase detector (ADF4002), broadband VCO (SIV022), fourth mixer (BW373), and third mixer (ADEX-10L+) is responsible for synthesizing the final required frequency f OUT , covering 10GHz~20GHz. Among them, the third mixer and the fourth mixer will feedback frequency f y Downconvert until it is equal to f ref Equal. yFirst, with the higher frequency f LO4 Down-convert, and then use SPDT21 (BW111) and SPDT16 (BW111) to select whether to connect with the lower frequency f LO3 mixing.

[0037] The dual-loop auxiliary locking circuit consisting of the third phase detector (LTC6945), broadband VCO (SIV022) and SPDT18 (SF303MD) is responsible for pre-tuning the broadband VCO to f OUT , and then the auxiliary loop is switched to the main loop through the switch. During this period, the delay hold circuit (SX27AMD) adjusts the tuning voltage hold time of the broadband VCO by configuring appropriate capacitors to ensure that the output frequency of the broadband VCO does not drift significantly during the loop switching process.

[0038] Table 1 gives the OUT When covering 10GHz~20GHz, the feedback frequency obtained by dividing by two is f y (covering 5GHz~10GHz) segmentation and the corresponding local oscillator and reference frequency setting method. Among them, the reference frequency f x The setup method gives f y With f LO4 、f LO3 In fact, when the output frequency band changes, just adjust f LO4 、f LO3 By filtering the selected harmonic frequency components and appropriately setting the frequency division ratio of the frequency divider 20, different ultra-wideband output frequencies can be adapted. The reference frequency f is determined according to the settings in Table 1. x After taking the value, calculate the locking time of the loop composed of the first phase detector and the narrowband VCO, f PFD2 =f x -3200MHz, and then the output frequency f of DDS is obtained DDS .

[0039] Table 1f OUT Covering 10GHz~20GHz output frequency f x With f y The non-distribution method

[0040]

[0041] Finally, it should be noted that: the drawings of the embodiments disclosed in the present invention only involve structures related to the embodiments disclosed in the present invention, and other structures can refer to the general design. In the absence of conflict, the same embodiment and different embodiments of the present invention can be combined with each other;

[0042] Finally: The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A broadband, low phase noise, small step frequency synthesis system, characterized by: It includes a reference frequency generating circuit, a mixing phase-locked source circuit and an auxiliary locking circuit; The reference frequency generating circuit utilizes DDS combined with a frequency division phase locked loop to generate a reference signal with fine frequency steps; The output end of the reference frequency generating circuit is connected to the reference input end of the mixing phase-locked source circuit; The mixing phase-locked circuit obtains a feedback signal with a low frequency multiplication ratio by means of two mixing steps, performs phase discrimination between the feedback signal and a reference signal, and tunes a broadband VCO (15) to obtain a target signal; The auxiliary locking circuit is embedded in the mixer phase-locked source circuit through an analog switch, and can generate an auxiliary loop voltage to pre-tune the broadband VCO (15).

2. The broadband low phase noise small step frequency synthesis system as claimed in claim 1, characterized in that: The reference frequency generating circuit comprises a first comb spectrum generator (1), a direct digital frequency synthesizer (2), a first mixer (3), a second mixer (4), a first phase detector (5) and a narrowband VCO (6); a power divider (7) is provided at the output end of the first comb spectrum generator (1), which can divide the reference signal provided by the first comb spectrum generator (1) into three paths to the direct digital frequency synthesizer (2), the first phase detector (5) and the first mixer (3); the direct digital frequency synthesizer (2) can synthesize the reference signal into a narrowband signal with fine frequency steps. The first mixer (3) mixes the signal of the direct digital frequency synthesizer (2) with the reference signal after power division, and inputs the mixed signal into the first phase detector (5); the intermediate frequency output end of the second mixer (4) is connected to the first phase detector (5), the local oscillator input end is capable of receiving the reference signal after power division, and the radio frequency input end is connected to the output end of the narrowband VCO (6); the first phase detector (5) is capable of receiving the output signals of the second mixer (4) and the first mixer (3) for phase discrimination, and tuning the narrowband VCO (6); the narrowband VCO (6) generates a fine-step reference signal.

3. The broadband low phase noise small step frequency synthesis system as claimed in claim 1, characterized in that: The mixing phase-locked source circuit includes a frequency division filter circuit, a two-frequency mixing circuit and a phase-locked source circuit; the input end of the frequency division filter circuit receives a fine-step reference signal, and sends it to the two-frequency mixing circuit, the phase-locked source circuit and the auxiliary locking circuit after frequency division and filtering; the two-frequency mixing circuit and the phase-locked source circuit are connected end to end; The two-frequency mixing circuit can perform two-frequency mixing on the output signal of the phase-locked source circuit and the output signal of the frequency-division filtering circuit, and input the mixed signals into the phase-locked source circuit; the phase-locked source circuit can perform phase discrimination and tuning on the output signal of the two-frequency mixing circuit and the output signal of the frequency-division filtering circuit; The auxiliary locking circuit is embedded in the phase-locked source circuit.

4. The broadband low phase noise small step frequency synthesis system as claimed in claim 3, characterized in that: The frequency division and filtering circuit includes a multi-way frequency divider and a switch filter; the input end of the multi-way frequency divider is connected to the output end of the reference frequency generating circuit, and the output end is connected to the switch filter and the phase-locked source circuit; the output end of the switch is connected to the double mixing circuit.

5. The broadband low phase noise small step frequency synthesis system as claimed in claim 3, characterized in that: The double frequency mixing circuit comprises a third mixer (8), a fourth mixer (9), a first single-pole double-throw switch (10), a second single-pole double-throw switch (11) and a second comb spectrum generator (12); the input end of the second comb spectrum generator (12) is connected to the output end of the frequency division filter circuit, and the output end is connected to the third mixer (8); the input end of the third mixer (8) is connected to the phase-locked source circuit and the output end of the second comb spectrum generator (12), and the output end is connected to the first single-pole double-throw switch (10); the input end of the fourth mixer (9) is connected to the first single-pole double-throw switch (10) and the output end of the frequency division filter circuit; the first single-pole double-throw switch (10) can send the output signal of the third mixer (8) to the fourth mixer (9) or the second single-pole double-throw switch (11); the second double-throw switch can send the signal of the fourth mixer (9) or the first single-pole double-throw switch (10) to the phase-locked source circuit.

6. The broadband low phase noise small step frequency synthesis system as claimed in claim 3, characterized in that: The phase-locked source circuit comprises a second phase detector (13), a third single-pole double-throw switch (14), a broadband VCO (15) and a single-channel frequency divider (16); the input end of the second phase detector (13) is connected to the output end of the double-frequency mixing circuit and the frequency division filter circuit, and the output end is connected to the third single-pole double-throw switch (14); the third single-pole double-throw switch (14) can output the output signal of the auxiliary locking circuit or the second phase detector (13) to the broadband VCO (15), and the broadband VCO (15) is connected in series between the third single-pole double-throw switch (14) and the single-channel frequency divider (16); the single-channel frequency divider (16) divides the output signal of the broadband VCO (15), sends it to the input end of the double-frequency mixing circuit and the auxiliary locking circuit, and realizes the final signal output.

7. The broadband low phase noise small step frequency synthesis system as claimed in claim 6, characterized in that: The auxiliary locking circuit comprises a third phase detector (17) and a delay holding circuit (18); the third phase detector (17) can receive the output signal of the single-channel frequency divider (16) and the output signal of the frequency division filter circuit, and send the signal to the delay holding circuit (18) after phase detection; the output end of the delay holding circuit (18) is connected to the third single-pole double-throw switch (14).

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