Multi-device synchronous control method, device, equipment and medium for defect detection system

Abstract

The embodiment of the present invention discloses a multi-device synchronization control method of a defect detection system, wherein the defect detection system includes a primary master device, multiple secondary master devices, and the others are slave devices; the method includes: the primary master device receives a device synchronization trigger signal, generates a first synchronization signal to trigger the secondary master device to generate a second synchronization signal, and sends it to the corresponding slave device; after receiving the second synchronization signal, the slave device generates a third synchronization signal and sends it to the corresponding master device; after receiving the third synchronization signal, the master device determines that at least one camera device and at least one light source device are synchronized according to the third synchronization signal; in the case of successful synchronization, controls at least one camera device and at least one light source device to synchronously perform commands for lighting the light source and collecting images to perform defect detection. The present invention can improve the accuracy of device synchronization and the accuracy of defect detection.

Description

Technical Field

[0001] The present invention relates to the field of industrial automation visual inspection technology, and in particular to a multi-device synchronous control method, device, computer equipment and computer-readable storage medium for a defect detection system. Background Art

[0002] In recent years, the demand for lithium batteries from 3C products has steadily increased, and with the gradual expansion of the market size of new energy vehicles and the demand for energy storage batteries, the scale of lithium battery production in my country has expanded year by year. The lithium-ion battery separator is an important component of lithium-ion batteries. It is located between the positive and negative electrodes inside the battery, ensuring the passage of lithium ions while hindering the transmission of electrons. Surface defect detection of the separator has become an important part of the product quality control process. Machine vision detection technology based on optical image sensing is the trend of surface defect detection methods. High-speed acquisition of accurate images is strongly related to detection efficiency.

[0003] The image acquisition system for diaphragm surface defect detection mainly includes line scan cameras, light sources, image acquisition boards, industrial computers, encoders, etc. The image acquisition system usually has multiple cameras and multiple light sources to meet the detection algorithm's requirements for multi-angle and multi-light source images. The entire system needs to synchronously control the camera exposure and light source lighting. For example, Figure 1 In the application scenario shown, it is necessary to control at least one camera and the corresponding light source to light up, so as to capture the image of the corresponding field of view. Figure 1 In the application scenario shown, the slave acquisition card is synchronized with the master acquisition card through a pulse signal, and each acquisition card controls the camera exposure and light source lighting based on the synchronization signal. For example, if slave acquisition card 1 needs to obtain bright field, dark field, and backlight field images, the bright field image requires the bright field light source to be lit when camera 1 is exposed, the dark field image requires all light sources to be extinguished when camera 1 is exposed, and the backlight field image requires the backlight field light source to be lit when camera 1 is exposed. Since different images at the same position need to be obtained, a line scan camera is used, and the three field images are quickly cycled according to the bright field, dark field, and backlight field.

[0004] In the related technical scheme, in the pulse signal synchronization method, the host sends information to the slave unidirectionally, and the host cannot know whether the slave performs the operation. If the camera does not respond to the operation, it will cause the field sequence of the acquisition card to be disordered. If the light source does not respond to the operation, the corresponding image behavior will be black, which appears as a black line in the bright field, seriously affecting the host computer's judgment of the defect. Summary of the invention

[0005] Based on this, it is necessary to propose a multi-device synchronous control method, device, computer equipment and computer-readable storage medium for a defect detection system to address the above problems.

[0006] In the first part of the present invention, a multi-device synchronous control method of a defect detection system is provided, wherein the defect detection system includes at least one camera device and at least one light source device, wherein the at least one camera device and the at least one light source device include a primary master device, a plurality of secondary master devices, and the others are slave devices;

[0007] The method comprises:

[0008] The primary master device receives the device synchronization trigger signal, generates a first synchronization signal, and triggers the secondary master device to generate a second synchronization signal, and sends the second synchronization signal to the slave device corresponding to the secondary master device;

[0009] After receiving the second synchronization signal, the at least one slave device generates a third synchronization signal according to the received first synchronization signal, and sends the third synchronization signal to the corresponding master device;

[0010] After receiving the third synchronization signal, the master device determines, according to the third synchronization signal, that at least one camera device and at least one light source device are synchronized;

[0011] In the case that the at least one camera device and the at least one light source device are synchronized successfully, commands are issued to control the at least one camera device and the at least one light source device to synchronously light up the light source and collect images to perform defect detection.

[0012] Optionally, there is one less primary master device and at least one slave device corresponding to each master device, and the master device and at least one slave device corresponding to the master device constitute a device group; at least one master device is connected to the defect detection system through the same bus; at least one slave device corresponding to a master device is connected to the master device through the same bus; wherein the bus includes a clock line and a data line, and multiple devices connected to the same bus communicate through the bus in a time-division multiplexing manner.

[0013] Optionally, the first synchronization signal and the second synchronization signal are basic synchronization frames, and the basic synchronization frame includes a first field, a second field, a third field, a fourth field and a fifth field; wherein the first field is a start field, which is used for serial data alignment; the second field is an ack field, the length of the ack field is 4 bits, and the ack field includes a sync field and a sub_err field, wherein the sync field and the sub_er field are used to identify the device synchronization status; the third field is an idle field; the fourth field is an end field, the length of the end field is 4 bits, and the end field includes an en field, wherein the en field is used to identify the validity of the basic synchronization frame; the fifth field is a crc8 field, and the crc8 field is used for verification.

[0014] Optionally, the method also includes: performing initialization operations on the at least one camera device and the at least one light source device to determine the synchronization working parameters corresponding to each camera device and each light source device, wherein the synchronization working parameters include one or more of device level, time slot parameters, and device command execution order, and the device level includes a first-level master device, a second-level master device, and a slave device.

[0015] Optionally, the method further includes: when the secondary master device receives the first synchronization signal, detecting the start field in the received first synchronization signal, and if the start field is detected to be normal, setting the sync field in the ack field of the second synchronization signal to 1, obtaining the value of the sub_err field of the ack field from the received first synchronization signal, and determining the value of the sub_err field of the ack field of the second synchronization signal by using the obtained value of the sub_err field; generating the second synchronization signal according to the determined sync field and sub_err field;

[0016] And / or, when the slave device receives the second synchronization signal, it detects the start field in the received second synchronization signal. If the start field is detected to be normal, the sync field in the ack field of the third synchronization signal is set to 1, and the value of the sub_err field of the ack field is obtained from the received second synchronization signal. The value of the sub_err field of the ack field of the third synchronization signal is determined by the obtained value of the sub_err field; and the third synchronization signal is generated according to the determined sync field and sub_err field.

[0017] Optionally, the method further includes: if the sync or sub_err bit field of the ack field in the first synchronization signal received by the secondary master device is not equal to a preset value, setting the en field of the end field in the second synchronization signal to a preset abnormal value to identify that the primary master device is abnormal; generating a second synchronization signal according to the determined en field;

[0018] And / or, if the ack field sync or sub_err bit field in the second synchronization signal received from the slave device is not equal to a preset value, the en field of the end field in the third synchronization signal is set to a preset abnormal value to identify the abnormality of the master device corresponding to the slave device; and a third synchronization signal is generated based on the determined en field.

[0019] Optionally, the step of controlling the at least one camera device and the at least one light source device to synchronously execute the command of lighting the light source and capturing the image to perform defect detection when the at least one camera device and the at least one light source device are successfully synchronized, further includes: controlling the at least one camera device and the at least one light source device to execute the preset image capture command or the light source lighting command when the devices at all levels are synchronized to obtain the image to be detected for defect detection, and performing defect detection based on the image to be detected;

[0020] The method further includes: if there is a synchronization anomaly in at least one device, not caching the image corresponding to the current image acquisition command or the light source lighting command, and not performing defect detection until the device synchronization is successful.

[0021] In the second part of the present invention, a multi-device synchronous control device of a defect detection system is provided, wherein the defect detection system includes at least one camera device and at least one light source device, wherein the at least one camera device and the at least one light source device include a primary master device, a plurality of secondary master devices, and the others are slave devices;

[0022] The device comprises:

[0023] A first synchronization module, used for the primary master device to receive a device synchronization trigger signal, generate a first synchronization signal to trigger the secondary master device to generate a second synchronization signal, and send the second synchronization signal to the slave device corresponding to the secondary master device;

[0024] A second synchronization module, configured for the at least one slave device to generate a third synchronization signal according to the received first synchronization signal after receiving the second synchronization signal, and send the third synchronization signal to the corresponding master device;

[0025] A synchronization confirmation module, configured to determine, after the master device receives the third synchronization signal, that at least one camera device and at least one light source device are synchronized according to the third synchronization signal;

[0026] The defect detection module is used to control the at least one camera device and the at least one light source device to synchronously light up the light source and collect images when the at least one camera device and the at least one light source device are synchronized successfully, so as to perform defect detection.

[0027] In the third part of the present invention, a computer device is provided, the computer device includes a memory and a processor, the memory has executable code, when the executable code runs on the processor to implement multiple devices of the defect detection system as described in the first part.

[0028] In a fourth aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium is used to store a computer program, wherein the computer program is used to execute multiple devices of the defect detection system described in the first aspect.

[0029] The embodiments of the present invention have the following beneficial effects:

[0030] After adopting the multiple devices, apparatuses, computer devices and readable storage media of the defect detection system provided by the embodiment of the present invention, in the defect detection system, when defect detection is required, it is first necessary to determine that the camera device for collecting images and the corresponding light source device are synchronized during the image collection process. Specifically, first determine a primary master device and at least one secondary master device and at least one slave device corresponding to each master device in the camera device and the light source device, then the primary master device receives the device synchronization trigger signal, generates a first synchronization signal to trigger the secondary master device to generate a second synchronization signal, and sends it to the slave device corresponding to the secondary master device; after receiving the second synchronization signal, the at least one slave device generates a third synchronization signal according to the received first synchronization signal, and sends it to the corresponding master device; after receiving the third synchronization signal, the master device determines that at least one camera device and at least one light source device are synchronized according to the third synchronization signal; when the synchronization of the at least one camera device and the at least one light source device is successful, control the at least one camera device and the at least one light source device to synchronously perform the light source lighting and image collection commands to perform defect detection; when there is an abnormality in the device synchronization, no defect detection is performed. Through the above-mentioned multi-device control method, the synchronization between multiple camera devices and multiple light source devices can be determined, and each device can be controlled to synchronously execute preset commands to ensure the accuracy of defect detection under device synchronization; and, in the above-mentioned multi-device control method, there is also an error correction mechanism for synchronization anomalies, which can enable the defect detection system to cope with more complex application scenarios and improve the fault tolerance of defect detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0032] in:

[0033] Figure 1 A schematic diagram of multiple devices arranged in a defect detection system in a related technical solution;

[0034] Figure 2 A schematic diagram of multiple device connections of a defect detection system in one embodiment;

[0035] Figure 3 A schematic diagram of a multi-device process of a defect detection system in one embodiment;

[0036] Figure 4 A schematic diagram of the structure of a basic synchronization frame in an embodiment;

[0037] Figure 5 A schematic diagram of a transmission process of a device synchronization anomaly in one embodiment;

[0038] Figure 6 A schematic diagram of transmission of abnormal information of non-synchronization of a primary device in an embodiment;

[0039] Figure 7 A schematic diagram of the composition of a multi-device synchronization control device for a defect detection system in an embodiment

[0040] Figure 8 A schematic diagram of the structure of a computer device for running multiple devices of the defect detection system in one embodiment. DETAILED DESCRIPTION

[0041] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0042] In this embodiment, a multi-device of a defect detection system is provided for synchronous control of devices of the defect detection system. In this embodiment, the defect detection system includes at least one camera device and at least one light source device, wherein at least one light source device can be a light source corresponding to different fields of view, such as a dark field light source, a bright field light source, etc.

[0043] In this embodiment, the defect detection system includes at least one camera device and at least one light source device which can be divided into different device groups. Each device group refers to a collection corresponding to multiple devices that are controlled simultaneously. In a device group, one device is a master device and the other devices are slave devices. For example, the camera device in a device group is a master device and the other devices, such as a light source device, are slave devices.

[0044] In this example, see Figure 2, multiple devices are connected by physical lines. In a defect detection system, it includes multiple master devices, which are connected by a bus. Among them, it includes a primary master device corresponding to the master device and multiple secondary master devices, which is a primary protocol. Furthermore, under a master device, it also includes multiple slave devices. Under a device group, a master device and multiple slave devices are connected by a bus, which is a secondary protocol. That is to say, in such a Figure 2 In the application scenario shown, multiple master devices share a bus, and multiple slave devices are mounted on the corresponding master device through a bus. The bus corresponding to each level of protocol contains a clock line and a data line. Under multiple devices on a bus, the communication of the corresponding bus is time-division multiplexed by the multiple devices mounted on it.

[0045] It should be noted that in this embodiment, the number of devices supported by each level of protocol is not fixed, and can be flexibly set and expanded according to the specific situation of the defect detection system. In addition, there is no need for direct physical connection between devices in different device groups, and synchronization of multiple devices in different groups can be achieved through the secondary protocol.

[0046] For further information, see Figure 3 , a schematic diagram of the multi-device flow of the above-mentioned defect detection system is given, wherein the method includes: Figure 3 The following steps are shown:

[0047] Step S101: the primary master device receives a device synchronization trigger signal and generates a first synchronization signal to trigger the secondary master device to generate a second synchronization signal and send the second synchronization signal to the slave device corresponding to the secondary master device.

[0048] In a scenario where defect detection is required, the defect detection system sends a trigger signal to multiple devices included in the defect detection system, here, to the corresponding first-level master device. In other words, the first-level master device receives the device synchronization trigger signal in the defect detection system to trigger the synchronization of multiple devices for defect detection to achieve the acquisition of defect detection images. After receiving the device synchronization trigger signal, the first-level master device generates a first synchronization signal to synchronize to the second-level master device, and the second-level master device generates a second synchronization signal and sends the second synchronization signal to the first-level master device.

[0049] In this embodiment, the first synchronization signal and the second synchronization signal are both a type of basic synchronization frame in this embodiment, wherein the basic synchronization frame includes 5 basic fields, wherein the basic synchronization frame includes a first field, a second field, a third field, a fourth field and a fifth field.

[0050] The five fields are described below.

[0051] The first field is a start field, which is used as a synchronization start field for serial data alignment and is sent by a primary master device or a secondary master device. Specifically, it is a fixed field, for example, 8'h5a.

[0052] The second field is the ack field, which is sent by the slave devices under the same level protocol in time slots. For example, under the first level protocol, the acks corresponding to the first level devices 1, 2, and 3 correspond to the following: Figure 4 ack1, ack2, ack3 shown in . For further information, please refer to Table 1, which shows a schematic diagram of the composition of the ack field:

[0053] Table 1: Schematic diagram of the composition of the ack field

[0054]

[0055] The length of the ack field is 4 bits, including bit0, bit1, bit2, and bit3. The meaning of each field is as follows:

[0056] Bit3 is fixed to 0;

[0057] Bit 2 corresponds to the sync field, which indicates synchronization. "1" indicates that the device corresponding to the time slot has received the start field and has synchronized.

[0058] Bit 1 is the sub_err field, indicating that the sub-level abnormality is only "1" indicates that the corresponding sub-level device is out of synchronization, that is, the sync field and sub_er field are used to identify the device synchronization status;

[0059] Bit0 is a reserved field, namely, the rev field.

[0060] The third field is the idle field, which indicates that the field is idle. It is fixed to 4'ha and is sent by the master device at this level.

[0061] The fourth field is the end field, which is sent by the master device at this level and has a length of 4 bits. For details, please refer to the following Table 2, which shows a schematic diagram of the composition of the end field.

[0062] Table 2: Schematic diagram of the composition of the end field

[0063]

[0064] The end field includes four fields: bit0, bit1, bit2, and bit3. The meaning of each field is as follows:

[0065] Bit3 is fixed to 1;

[0066] Bit2 and bit1 are reserved fields, namely, rev fields;

[0067] Bit0 corresponds to the en field, which is used to identify the validity of the basic synchronization frame, where "1" indicates that the current command is valid. It is used to indicate the failure of the corresponding secondary device or slave device synchronization signal when the primary device synchronization is abnormal. It is used when the primary device sends the secondary protocol. The default value is 1 under the primary protocol.

[0068] The fifth field is a crc8 field, and the crc8 field is used for verification.

[0069] See also Figure 4 , gives the structure of the basic synchronization frame, the basic synchronization frame is transmitted bit by bit from left to right. Figure 2 In the example shown, taking the synchronous support of 3 devices as an example, the basic synchronization frame supports a maximum of 7 devices, and therefore, contains 4 time slots corresponding to the idle field. Furthermore, if more devices need to be supported, the ack field and the idle field need to be further extended.

[0070] After receiving the device synchronization trigger signal, the primary master device is triggered by the device synchronization trigger signal to generate a first synchronization signal, wherein the first synchronization signal is a primary synchronization frame, which is a type of basic synchronization frame. The primary master device sends the first synchronization signal to the secondary master device, and the secondary master device is triggered by the first synchronization signal to generate a second synchronization signal to the corresponding slave device.

[0071] In the second synchronization signal, the secondary master sends the strat field, the sync bit field in the ack field is fixed to 1, and the bit value of sub_err in the ack field in the previous synchronization signal is added to the frame to add the end field and the crc8 field, thereby generating the second synchronization signal. After sending the start signal, the secondary master waits for a preset time slot, and then sends the ack field, the end field, and the crc8 field.

[0072] Step S102: After receiving the second synchronization signal, the at least one slave device generates a third synchronization signal according to the received first synchronization signal, and sends the third synchronization signal to the corresponding master device.

[0073] Step S103: after receiving the third synchronization signal, the secondary master device determines, according to the third synchronization signal, whether at least one camera device and at least one light source device are synchronized.

[0074] In this step, after receiving the second synchronization signal, if the slave device detects the frame header information (start field) in the second synchronization signal, it means that the device has been synchronized, and then generates a third synchronization signal. In the third synchronization signal, the sync field in the ack field is set to 1, the bit value of the sub_err of the ack field is extracted from the previous synchronization frame, and the corresponding end field and crc8 field are added to generate the third synchronization signal, and then the third synchronization signal is sent to the corresponding secondary master device, so that the secondary master device can understand the corresponding synchronization status of the corresponding slave device. In the transmission of the third synchronization signal, the strat field is sent first, and then after waiting for the preset time slot, the ack field and other fields are sent.

[0075] In one embodiment, after receiving the second synchronization signal, the slave device needs to detect the frame header information in the three synchronization signals to indicate that the corresponding device has been successfully synchronized. By sending three basic synchronization frames instead of just one basic synchronization frame, the reliability of device synchronization can be improved.

[0076] The following describes the situation of the synchronization signal when the device synchronization is abnormal.

[0077] In the process of the primary device being abnormal and transmitting the primary device abnormality to the secondary device (the primary master device being abnormal and transmitting to the secondary master device; or the master device being abnormal and transmitting to the corresponding slave device), the corresponding function is implemented in the secondary master device. Specifically, in the primary device, if the sybc or sub_err bit in the ack field of other time slots is detected to be abnormal, it is transmitted to the corresponding secondary device through the en field bit in the end field in the secondary protocol.

[0078] Step S104: When the at least one camera device and the at least one light source device are synchronized, control the at least one camera device and the at least one light source device to synchronously light up the light source and capture images to perform defect detection.

[0079] In this embodiment, if the main device has determined that the corresponding device is synchronized, it means that the camera device and the light source device are synchronized. In this case, the captured image is correct. Therefore, in this step, only when the device synchronization is normal, the corresponding captured image is obtained and subsequent defect detection actions are performed to improve the accuracy and reliability of defect detection.

[0080] When the camera device and the light source device are synchronized, they execute commands at the same time to obtain images under different light sources and angles. In this process, the basic synchronization frame is used to ensure that the command execution time of each device (the time to light up the light source and collect the image) is consistent. This can prevent the situation where other devices obtain wrong results due to abnormalities or disturbances in individual devices, thereby improving the accuracy of defect detection.

[0081] If the basic synchronization frame determines that there is an abnormality in device synchronization, that is, after receiving the first synchronization signal, the second synchronization signal, and the third synchronization signal, after detecting the start field, further parse the ack field and end field corresponding to other time slots, and determine whether there is an abnormality in device synchronization based on the ack field and the end field. If there is no abnormality, you can continue to execute the execution command corresponding to each device, and perform subsequent defect detection; if there is an abnormality, the execution command will not be stored in the cache, but cached in the fifo, and it is necessary to wait until all devices are synchronized normally (here, the device needs to cache 8 execution commands for synchronization) before executing the corresponding command. Here, after each successful device synchronization, the corresponding execution command is updated in the fifo.

[0082] In this embodiment, before defect detection is performed, each device included in the defect detection system needs to be initialized, wherein the initialization process needs to determine the corresponding working mode of each device, for example, it is necessary to determine the device level corresponding to the device and the relationship between the related devices, that is, to determine whether the device is a primary master device, a secondary master device, a slave device, and which master device the slave device corresponds to. And determine the waiting time slot corresponding to each device, that is, the preset time slot; and also determine the device command execution order. That is to say, the at least one camera device and the at least one light source device are initialized to determine the corresponding synchronization working parameters of each camera device and each light source device, wherein the synchronization working parameters include one or more of the device level, time slot parameters, and device command execution order.

[0083] The following is a schematic diagram of the transmission process of a device synchronization exception.

[0084] See also Figure 5 As shown in the figure, light green represents the start field, yellow represents the ack field, orange represents the idle field, blue represents the end field, dark green represents the crc8 field, and the red part represents the abnormal field in the above fields. After receiving the synchronization signal sent by the upper-level device, each level of equipment needs to send a further synchronization signal to the lower-level device.

[0085] In such Figure 5In the application scenario shown, the 4 rows of data corresponding to the first synchronization correspond to the basic synchronization frames corresponding to the first synchronization of the device and the first synchronization of the first group of secondary devices, the first synchronization of the second group of devices, and the first synchronization of the third group of secondary devices. Figure 5 Whether there is an abnormality in the basic synchronization frame shown, it can be known that in the first synchronization, the third secondary device in the second group is out of synchronization (corresponding to the ack3 field), wherein the corresponding sync field is abnormal.

[0086] like Figure 5 In the second synchronization shown, the 4 lines of data corresponding to the second synchronization correspond to the basic synchronization frames corresponding to the second synchronization of the device and the second synchronization of the first group of secondary devices, the second synchronization of the second group of devices, and the second synchronization of the third group of secondary devices. In the second synchronization, the first-level device 2 notifies other first-level devices through the corresponding sub_err field, and the first-level devices 1 and 3 simultaneously notify their respective subordinate second-level devices of abnormal conditions through the en field in the end field of the basic synchronization frame.

[0087] like Figure 5 In the 32nd synchronization shown, the 4 rows of data corresponding to the 3rd synchronization correspond to the basic synchronization frames corresponding to the 3rd synchronization of the device and the 3rd synchronization of the 1st group of secondary devices, the 3rd synchronization of the 2nd group of devices, and the 3rd synchronization of the 3rd group of secondary devices. In the third synchronization, all devices are normal.

[0088] For further information, see Figure 6 , where there is a situation where the first-level device is not synchronized with the transmission of abnormal information. Specifically, light green represents the start field, yellow represents the ack field, orange represents the idle field, blue represents the end field, dark green represents the crc8 field, and the red part represents the field with abnormalities in the above fields.

[0089] In such Figure 6 In the first synchronization shown, the 4 lines of data corresponding to the first synchronization correspond to the basic synchronization frames corresponding to the first synchronization of the device and the first synchronization of the first group of secondary devices, the first synchronization of the second group of devices, and the first synchronization of the third group of secondary devices. In the first synchronization, the sync field corresponding to the primary device 3 is 0 (there is an abnormality in the corresponding ack3 field). If the primary device 3 is not synchronized, it will not send the secondary synchronization instruction to the subordinate secondary device. The primary devices 1 and 2 will send the indication of the failure of the secondary device synchronization signal through the en field in the end field to convey the information of the device abnormality. In the case of Figure 6In the second synchronization shown, the 4 rows of data corresponding to the second synchronization respectively correspond to the second synchronization of the device and the basic synchronization frames corresponding to the second synchronization of the first group of secondary devices, the second synchronization of the second group of devices, and the second synchronization of the third group of secondary devices, wherein there is no abnormality in the second synchronization.

[0090] In another optional embodiment, a multi-device synchronization control device for a defect detection system is provided, wherein the defect detection system includes at least one camera device and at least one light source device, wherein the at least one camera device and the at least one light source device include a primary master device, multiple secondary master devices, and the others are slave devices; Figure 7 As shown, the device comprises:

[0091] The first synchronization module 101 is used for the primary master device to receive a device synchronization trigger signal, generate a first synchronization signal to trigger the secondary master device to generate a second synchronization signal, and send the second synchronization signal to the slave device corresponding to the secondary master device;

[0092] A second synchronization module 102, configured for the at least one slave device to generate a third synchronization signal according to the received first synchronization signal after receiving the second synchronization signal, and send the third synchronization signal to the corresponding master device;

[0093] A synchronization confirmation module 103, configured to determine, after the master device receives the third synchronization signal, whether at least one camera device and at least one light source device are synchronized according to the third synchronization signal;

[0094] The defect detection module 104 is used to control the at least one camera device and the at least one light source device to synchronously light up the light source and capture images when the at least one camera device and the at least one light source device are successfully synchronized, so as to perform defect detection.

[0095] In an optional embodiment, at least one primary master device and at least one slave device corresponding to each master device, the master device and at least one slave device corresponding to the master device constitute a device group; at least one master device is connected to the defect detection system through the same bus; at least one slave device corresponding to a master device is connected to the master device through the same bus; wherein the bus includes a clock line and a data line, and multiple devices connected to the same bus communicate through the bus in a time-division multiplexing manner.

[0096] In an optional embodiment, the first synchronization signal and the second synchronization signal are basic synchronization frames, and the basic synchronization frame includes a first field, a second field, a third field, a fourth field and a fifth field;

[0097] Among them, the first field is the start field, which is used for serial data alignment;

[0098] The second field is an ack field, the length of the ack field is 4 bits, and the ack field includes a sync field and a sub_err field, wherein the sync field and the sub_err field are used to identify the synchronization status of the device;

[0099] The third field is the idle field;

[0100] The fourth field is an end field, the length of the end field is 4 bits, and the end field includes an en field, wherein the en field is used to identify the validity of the basic synchronization frame;

[0101] The fifth field is a crc8 field, and the crc8 field is used for verification.

[0102] In an optional embodiment, if Figure 7 As shown, the device also includes an initialization module 105, which is used to perform initialization operations on the at least one camera device and the at least one light source device to determine the synchronization working parameters corresponding to each camera device and each light source device, wherein the synchronization working parameters include one or more of device level, time slot parameters, and device command execution order, and the device level includes a first-level master device, a second-level master device, and a slave device.

[0103] In an optional embodiment, the first synchronization module 101 is also used for: when the secondary master device receives the first synchronization signal, detecting the start field in the received first synchronization signal; if the start field is detected to be normal, setting the sync field in the ack field of the second synchronization signal to 1; obtaining the value of the sub_err field of the ack field from the received first synchronization signal; and determining the value of the sub_err field of the ack field of the second synchronization signal based on the obtained value of the sub_err field; and generating a second synchronization signal based on the determined sync field and sub_err field.

[0104] In an optional embodiment, the second synchronization module 102 is also used for: when the slave device receives the second synchronization signal, detecting the start field in the received second synchronization signal; if the start field is detected to be normal, setting the sync field in the ack field of the third synchronization signal to 1; obtaining the value of the sub_err field of the ack field from the received second synchronization signal; and determining the value of the sub_err field of the ack field of the third synchronization signal based on the obtained value of the sub_err field; and generating the third synchronization signal according to the determined sync field and sub_err field.

[0105] In an optional embodiment, the first synchronization module 101 is also used for: if the sync or sub_err bit field of the ack field in the first synchronization signal received by the secondary master device is not equal to a preset value, then setting the en field of the end field in the second synchronization signal to a preset abnormal value to identify the abnormality of the first-level master device; and generating a second synchronization signal based on the determined en field.

[0106] In an optional embodiment, the second synchronization module 102 is also used for: if the ack field sync or sub_err bit field in the second synchronization signal received from the slave device is not equal to a preset value, then setting the en field of the end field in the third synchronization signal to a preset abnormal value to identify the abnormality of the master device corresponding to the slave device; and generating a third synchronization signal based on the determined en field.

[0107] In an optional embodiment, the defect detection module 104 is also used to control at least one camera device and at least one light source device to execute a preset image acquisition command or a light source lighting command when all levels of equipment are synchronized, so as to obtain an image to be detected for defect detection, and perform defect detection based on the image to be detected; or, if there is a synchronization anomaly in at least one device, the image corresponding to the current image acquisition command or light source lighting command is not cached, and defect detection is not performed until the device synchronization is successful.

[0108] Figure 8 The internal structure diagram of a computer device that implements the above-mentioned defect detection system in one embodiment is shown. The computer device can be a terminal or a server. Figure 8 As shown, the computer device includes a processor, a memory and a network interface connected via a system bus. The memory includes a non-volatile storage medium and an internal memory. The non-volatile storage medium of the computer device stores an operating system and may also store a computer program. When the computer program is executed by the processor, the processor can implement the above method. The internal memory may also store a computer program. When the computer program is executed by the processor, the processor can implement the above method. Those skilled in the art can understand that Figure 8 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0109] After adopting the multiple devices, apparatuses, computer devices and readable storage media of the defect detection system provided by the embodiment of the present invention, in the defect detection system, when defect detection is required, it is first necessary to determine that the camera device for collecting images and the corresponding light source device are synchronized during the image collection process. Specifically, first determine a primary master device and at least one secondary master device and at least one slave device corresponding to each master device in the camera device and the light source device, then the primary master device receives the device synchronization trigger signal, generates a first synchronization signal to trigger the secondary master device to generate a second synchronization signal, and sends it to the slave device corresponding to the secondary master device; after receiving the second synchronization signal, the at least one slave device generates a third synchronization signal according to the received first synchronization signal, and sends it to the corresponding master device; after receiving the third synchronization signal, the master device determines that at least one camera device and at least one light source device are synchronized according to the third synchronization signal; when the synchronization of the at least one camera device and the at least one light source device is successful, control the at least one camera device and the at least one light source device to synchronously perform the light source lighting and image collection commands to perform defect detection; when there is an abnormality in the device synchronization, no defect detection is performed. Through the above-mentioned multi-device control method, the synchronization between multiple camera devices and multiple light source devices can be determined, and each device can be controlled to synchronously execute preset commands to ensure the accuracy of defect detection under device synchronization; and, in the above-mentioned multi-device control method, there is also an error correction mechanism for synchronization anomalies, which can enable the defect detection system to cope with more complex application scenarios and improve the fault tolerance of defect detection.

[0110] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the program can be stored in a non-volatile computer-readable storage medium. When the program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0111] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0112] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A multi-device synchronous control method for a defect detection system, characterized in that: The defect detection system comprises at least one camera device and at least one light source device, wherein the at least one camera device and the at least one light source device include a primary master device, a plurality of secondary master devices, and the others are slave devices; The method comprises: The primary master device receives the device synchronization trigger signal, generates a first synchronization signal, and triggers the secondary master device to generate a second synchronization signal, and sends the second synchronization signal to the slave device corresponding to the secondary master device; After receiving the second synchronization signal, at least one of the slave devices corresponding to the secondary master device generates a third synchronization signal according to the received second synchronization signal, and sends the third synchronization signal to the second master device; After receiving the third synchronization signal, the second master device determines, according to the third synchronization signal, that at least one camera device and at least one light source device are synchronized; When the synchronization between the at least one camera device and the at least one light source device is successful, control the at least one camera device and the at least one light source device to synchronously execute commands for lighting the light source and collecting images to perform defect detection; The first synchronization signal and the second synchronization signal are basic synchronization frames, and the basic synchronization frame includes a first field and a second field; the first field is a start field, which is used for data alignment corresponding to the basic synchronization frame; the second field is an ack field, and the ack field includes a sync field and a sub_err field, wherein the sync field and the sub_err field are used to identify the synchronization status of the device; The method further comprises: When receiving the first synchronization signal, the secondary master device detects the start field in the received first synchronization signal, and if the start field is detected to be normal, determines that the sync field in the ack field of the second synchronization signal is 1, obtains the value of the sub_err field of the ack field from the received first synchronization signal, and determines the obtained value of the sub_err field as the value of the sub_err field of the ack field of the second synchronization signal; generates a second synchronization signal according to the determined sync field and sub_err field; When the slave device of the secondary master device receives the second synchronization signal, it detects the start field in the received second synchronization signal. If the start field is detected to be normal, it determines that the sync field in the ack field of the third synchronization signal is 1, obtains the value of the sub_err field of the ack field from the received second synchronization signal, and determines the obtained value of the sub_err field as the value of the sub_err field of the ack field of the third synchronization signal; and generates the third synchronization signal according to the determined sync field and sub_err field.

2. The multi-device synchronous control method of the defect detection system according to claim 1, characterized in that: The primary master device and at least one secondary master device each correspond to at least one slave device, and the primary master device or the secondary master device and at least one slave device corresponding to the primary master device or the secondary master device constitute a device group; The primary master device and the secondary master device are connected to the defect detection system via the same bus; At least one slave device corresponding to the primary master device or the secondary master device is connected to the primary master device or the secondary master device via the same bus; The bus includes a clock line and a data line, and multiple devices connected to the same bus communicate through the bus in a time-division multiplexing manner.

3. The multi-device synchronous control method of the defect detection system according to claim 1, characterized in that: The method further comprises: Initialization operations are performed on the at least one camera device and the at least one light source device to determine the synchronization working parameters corresponding to each camera device and each light source device, wherein the synchronization working parameters include one or more of device level, time slot parameters, and device command execution sequence, and the device level includes a first-level master device, a second-level master device, and a slave device.

4. The multi-device synchronous control method of the defect detection system according to claim 2, characterized in that: The basic synchronization frame further includes a fourth field, the fourth field is an end field, the end field includes an en field, and the en field is used to identify the validity of the basic synchronization frame. The method further includes: If the sync or sub_err field of the ack field in the first synchronization signal received by the secondary master device is not equal to the preset value, the en field of the end field in the second synchronization signal is set to a preset abnormal value to identify the primary master device as abnormal; Generating the second synchronization signal according to the determined sync field and sub_err field includes: generating the second synchronization signal according to the determined sync field, sub_err field and en field; and / or, If the sync or sub_err field of the ack field in the second synchronization signal received by the slave device corresponding to the secondary master device is not equal to the preset value, the en field of the end field in the third synchronization signal is set to a preset abnormal value to identify that the secondary master device corresponding to the slave device is abnormal; Generating the third synchronization signal according to the determined sync field and sub_err field includes: generating the third synchronization signal according to the determined sync field, sub_err field and en field.

5. A multi-device synchronization control device for a defect detection system, characterized in that: The defect detection system comprises at least one camera device and at least one light source device, wherein the at least one camera device and the at least one light source device include a primary master device, a plurality of secondary master devices, and the others are slave devices; The device comprises: A first synchronization module, used to control the primary master device to perform an operation of receiving a device synchronization trigger signal and generating a first synchronization signal, so as to trigger the secondary master device to generate a second synchronization signal and send it to a slave device corresponding to the secondary master device; A second synchronization module, used for controlling at least one of the slave devices corresponding to the secondary master device to generate a third synchronization signal according to the received second synchronization signal and send the third synchronization signal to the second master device after receiving the second synchronization signal; a synchronization confirmation module, configured to control the second master device to determine, after receiving the third synchronization signal, that at least one camera device and at least one light source device are synchronized according to the third synchronization signal; A defect detection module, used to control the at least one camera device and the at least one light source device to synchronously execute commands for lighting the light source and collecting images, so as to perform defect detection, when the at least one camera device and the at least one light source device are successfully synchronized; The first synchronization signal and the second synchronization signal are basic synchronization frames, and the basic synchronization frame includes a first field and a second field; the first field is a start field, which is used for data alignment corresponding to the basic synchronization frame; the second field is an ack field, and the ack field includes a sync field and a sub_err field, wherein the sync field and the sub_err field are used to identify the synchronization status of the device; When receiving the first synchronization signal, the secondary master device detects the start field in the received first synchronization signal, and if the start field is detected to be normal, determines that the sync field in the ack field of the second synchronization signal is 1, obtains the value of the sub_err field of the ack field from the received first synchronization signal, and determines the obtained value of the sub_err field as the value of the sub_err field of the ack field of the second synchronization signal; generates a second synchronization signal according to the determined sync field and sub_err field; When the slave device of the secondary master device receives the second synchronization signal, it detects the start field in the received second synchronization signal. If the start field is detected to be normal, it determines that the sync field in the ack field of the third synchronization signal is 1, obtains the value of the sub_err field of the ack field from the received second synchronization signal, and determines the obtained value of the sub_err field as the value of the sub_err field of the ack field of the third synchronization signal; and generates the third synchronization signal according to the determined sync field and sub_err field.

6. A computer device, characterized in that: The computer device includes a memory and a processor, the memory has executable code, and when the executable code runs on the processor, the multi-device synchronous control method of the defect detection system as described in any one of claims 1 to 4 is implemented.

7. A computer-readable storage medium, wherein the computer-readable storage medium is used to store a computer program, wherein the computer program is used to execute the multi-device synchronization control method of the defect detection system according to any one of claims 1 to 4.

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