Control method and related apparatus

Abstract

Embodiments of the present application provide a control method and related device, and relate to the technical field of terminals. The method is applied to an electronic device, the electronic device comprising a first decision layer, a second decision layer and a hardware layer, the first decision layer being a layer between the second decision layer and the hardware layer, and the method comprising: in a case where the first decision layer determines that communication between the hardware layer and the second decision layer is normal, the first decision layer instructing a first control mode to be used to control a running state of hardware in the hardware layer. Alternatively, in a case where the first decision layer determines that communication between the hardware layer and the second decision layer is abnormal, the first decision layer instructing a second control mode to be used to control the running state of the hardware in the hardware layer. In this way, by configuring at least two control modes for the electronic device and selectively using one of the control modes to control the electronic device, the control flexibility of the electronic device can be improved.

Description

Technical Field

[0001] The present application relates to the field of terminal technology, and in particular to a control method and related devices. Background Art

[0002] With the rapid development of terminal technology, controlling terminal performance is becoming increasingly important. Currently, the performance of electronic devices is primarily controlled through thermal zones. The thermal framework is a temperature control framework that controls the performance of electronic devices based on temperature.

[0003] However, the flexibility of performance control using thermal zones to control the performance of electronic devices needs to be further improved. Summary of the Invention

[0004] The present invention provides a control method and related devices, which are applied in the field of terminal technology. By configuring at least two control modes for an electronic device and selectively using one of the control modes to control the electronic device, the control flexibility of the electronic device can be improved.

[0005] In a first aspect, an embodiment of the present application provides a control method, which is applied to an electronic device. The electronic device includes a first decision layer, a second decision layer, and a hardware layer. The first decision layer is a layer between the second decision layer and the hardware layer. The method includes:

[0006] If the first decision layer determines that the communication between the hardware layer and the second decision layer is normal, the first decision layer instructs the operating state of the hardware in the hardware layer to be controlled using the first control method. Alternatively, if the first decision layer determines that the communication between the hardware layer and the second decision layer is abnormal, the first decision layer instructs the operating state of the hardware in the hardware layer to be controlled using the second control method.

[0007] In the first control mode, the second decision layer participates in the control of the operating state of the hardware in the hardware layer. In the second control mode, the second decision layer does not participate in the control of the operating state of the hardware in the hardware layer.

[0008] In an embodiment of the present application, when the communication between the hardware layer and the second decision layer is normal, the second decision layer participates in the control of the operating status of the hardware in the hardware layer, and when the communication between the hardware layer and the second decision layer is abnormal, the second decision layer does not participate in the control of the operating status of the hardware in the hardware layer. In this way, one of at least two control methods can be selected according to actual conditions to control the electronic device, thereby improving the control flexibility of the electronic device.

[0009] In conjunction with the first aspect, in one possible implementation, the method further includes:

[0010] The first decision layer obtains a first heartbeat instruction from the hardware layer; the first decision layer transmits a second heartbeat instruction to the second decision layer in response to the first heartbeat instruction; then, if the first decision layer obtains a third heartbeat instruction within the first target time period, it determines that the communication between the hardware layer and the second decision layer is normal, or if the first decision layer does not obtain the third heartbeat instruction within the first target time period, it determines that the communication between the hardware layer and the second decision layer is abnormal.

[0011] The first target time period is calculated from the time when the first decision layer transmits the second heartbeat instruction to the second decision layer, and the third heartbeat instruction includes an instruction fed back by the second decision layer in response to the second heartbeat instruction.

[0012] The first target time period can be set as needed, for example, to 5 seconds, 10 seconds, etc. Optionally, it can be set based on the time required for the heartbeat instruction.

[0013] In an embodiment of the present application, the hardware layer, the first decision layer, and the second decision layer can transmit heartbeat instructions to each other. In this way, it is possible to promptly determine whether the second decision layer is in a normal operating state, that is, to determine whether the communication between the hardware layer and the second decision layer is normal. In this way, when the second decision layer is in an abnormal operating state, it can be promptly known, so that the control mode of the electronic device can be switched from the first control mode to the second control mode in a timely manner, thereby reducing the risk of control failure of the electronic device. In addition, the hardware layer reuses the first decision layer as an interface for communicating with the second decision layer. In this way, even if there is no communication interface between the hardware layer and the second decision layer, communication between the hardware layer and the second decision layer can be achieved, thereby transmitting the operating parameters of the hardware in the hardware layer and the heartbeat instructions to the second decision layer. In this way, the internal framework adjustment of the electronic device can be reduced.

[0014] In conjunction with the first aspect, in one possible implementation, the hardware layer includes a controller for at least obtaining and transmitting a heartbeat instruction, the first heartbeat instruction is cyclically transmitted by the controller at a first time interval, and the method further includes:

[0015] The first decision layer transmits a fourth heartbeat instruction to the controller in response to the third heartbeat instruction, and the controller obtains the time of receiving the fourth heartbeat instruction as the starting time of the first time interval.

[0016] The first time interval can be set as needed, for example, 300 milliseconds, etc., and is not limited here. It should be noted that the shorter the first time interval, the more timely it is to detect that the second decision layer has entered an abnormal state.

[0017] In this embodiment, the first decision layer transmits the fourth heartbeat instruction to the controller. In this way, the controller can continue to transmit the first heartbeat instruction only when it determines that the second decision layer is in normal operating state. This can reduce the waste of transmission resources caused by the controller continuing to transmit the first heartbeat instruction when the second decision layer is in an abnormal state, that is, when the second decision layer cannot respond to the heartbeat instruction. This can thereby improve the resource utilization of the electronic device.

[0018] In conjunction with the first aspect, in one possible implementation, after the first decision layer determines that communication between the hardware layer and the second decision layer is abnormal, the method further includes:

[0019] The first decision layer obtains a fifth heartbeat instruction from the second decision layer, where the fifth heartbeat instruction includes an instruction transmitted when the second decision layer switches from an abnormal operation state to a normal operation state;

[0020] The first decision layer transmits a sixth heartbeat instruction to the hardware layer in response to the fifth heartbeat instruction;

[0021] When the first decision layer obtains the seventh heartbeat instruction, it determines that the communication between the hardware layer and the second decision layer switches from abnormal to normal. The seventh heartbeat instruction includes an instruction fed back by the hardware layer in response to the sixth heartbeat instruction.

[0022] The fifth heartbeat instruction may be a instruction initiated by the second decision layer when it discovers that it has switched from an abnormal operating state to a normal operating state. It should be noted that the fifth heartbeat instruction may be a single instruction transmitted when the second decision layer switches to a normal operating state, or it may be a cyclical instruction transmitted after the second decision layer switches to a normal operating state. That is, when the second decision layer returns to a normal operating state, the fifth heartbeat instruction is continuously transmitted, so that the second decision layer can be informed in a timely manner whether it will be offline again.

[0023] In an embodiment of the present application, when the second decision layer discovers that it has switched from an abnormal operating state to a normal operating state, it notifies the first decision layer and the hardware layer through a heartbeat instruction. In this way, the communication between the hardware layer and the second decision layer can be restored to normal, that is, the second decision layer can be discovered in time when it has returned to a normal operating state, so that it can switch to the first control mode in time. As a result, the timeliness of the control mode switching can be improved.

[0024] In combination with the first aspect, in a possible implementation, the fifth heartbeat instruction is cyclically transmitted by the second decision layer at a second time interval, and the method further includes:

[0025] The first decision layer transmits the eighth heartbeat instruction to the second decision layer in response to the seventh heartbeat instruction, and the second decision layer obtains the time until the eighth heartbeat instruction as the starting time of the second time interval.

[0026] The second time interval can be set as needed and is not limited here. It should be noted that the shorter the second time interval, the more timely it is to detect that the second decision layer has re-entered the abnormal operation state.

[0027] In this embodiment, the first decision layer transmits the eighth heartbeat instruction to the second decision layer. In this way, the second decision layer can continue to transmit the fifth heartbeat instruction only after determining that the second decision layer is in normal operating state. This can reduce the waste of transmission resources caused by the abnormal communication link between the second decision layer and the first decision layer, that is, when the second decision layer cannot obtain the heartbeat instruction, the second decision layer still continues to transmit the fifth heartbeat instruction, thereby improving the resource utilization of the electronic device.

[0028] In conjunction with the first aspect, in one possible implementation, the electronic device further includes a control system for controlling hardware in the hardware layer. After the first decision layer determines that communication between the hardware layer and the second decision layer is abnormal, the method further includes:

[0029] The second decision layer sends control commands to the first decision layer and the control system respectively. The control commands are generated by the second decision layer in normal operation when it adopts the second control method for control. The control commands indicate commands for controlling the operating status of the hardware in the hardware layer. When the first decision layer obtains the control command from the second decision layer, it determines that the communication between the hardware layer and the second decision layer switches from abnormal to normal.

[0030] In an embodiment of the present application, the second decision layer sends control commands to the first decision layer and the control system respectively. Therefore, even if the second decision layer cannot know that it has entered an abnormal operating state and has not transmitted the fifth heartbeat instruction, the first decision layer can promptly know that the second decision layer has recovered from the abnormal operating state to the normal operating state, thereby improving the timeliness and accuracy of confirming the status of the second decision layer.

[0031] In conjunction with the first aspect, in one possible implementation, controlling the operating state of hardware in the hardware layer using a first control method includes:

[0032] The first decision layer obtains an operating parameter set from the hardware layer, and the operating parameter set includes the operating parameters of part or all of the hardware during the operation of the electronic device; the first decision layer transmits the operating parameter set to the second decision layer; the second decision layer controls the operating status of the hardware in the hardware layer based on the operating parameter set.

[0033] In conjunction with the first aspect, in one possible implementation, the second decision layer includes a first performance decision module and a deployment module, the first performance decision module is configured with one or more first performance control algorithms, and the deployment module is configured to deploy a performance control policy generated by the first performance decision module. The electronic device also includes a control system for controlling hardware in the hardware layer. The second decision layer controls the operating state of the hardware in the hardware layer based on the operating parameter set, including:

[0034] The first performance decision module calls at least one first performance control algorithm, processes all operating parameters in the operating parameter set through at least one first performance control algorithm, and obtains a first performance control strategy for the electronic device; the deployment module generates a control command based on the first performance control strategy, and transmits the control command to the control system; the control system controls the operating status of the hardware in the hardware layer based on the control command.

[0035] In an embodiment of the present application, all operating parameters in the operating parameter set are processed by at least one first performance control algorithm, that is, the control strategy of the electronic device can be determined by more operating parameters, thereby improving the control accuracy of the electronic device.

[0036] In conjunction with the first aspect, in one possible implementation, the hardware layer includes a controller for at least obtaining operating parameters of first hardware in the hardware layer, and the first decision layer obtains the operating parameter set from the hardware layer, including:

[0037] An operating parameter of the first hardware is obtained from the controller, and an operating parameter of the second hardware is obtained from the hardware layer.

[0038] In the embodiment of the present application, operating parameters collected from different sources can be obtained, so that the control strategy of the electronic device can be determined based on more operating parameters, thereby improving the control accuracy of the electronic device.

[0039] In conjunction with the first aspect, in one possible implementation, the first decision layer includes a second performance decision module, the second performance decision module is configured with a second performance control algorithm, and uses a second control method to control the operating state of hardware in the hardware layer, including:

[0040] The second performance decision module calls a second performance control algorithm, processes some operating parameters in the operating parameter set through the second performance control algorithm, and obtains a second performance control strategy for the electronic device;

[0041] The first decision layer controls the operating state of the hardware in the hardware layer based on the second performance control strategy.

[0042] In an embodiment of the present application, some operating parameters in the operating parameter set are processed by a second performance control algorithm, that is, the control strategy of the electronic device is determined by fewer parameters. In this way, fewer computing power resources are required, thereby saving the computing power resources required to control the electronic device.

[0043] In conjunction with the first aspect, in one possible implementation, when the first decision layer determines that communication between the hardware layer and the second decision layer is normal, the first decision layer instructs the use of a first control method to control the operating state of hardware in the hardware layer, including:

[0044] When the first decision layer determines that the communication between the hardware layer and the second decision layer is normal and the temperature of the electronic device is lower than the first temperature threshold, the first decision layer instructs to control the operating state of the hardware in the hardware layer using the first control method.

[0045] In conjunction with the first aspect, in one possible implementation, when the first decision layer determines that communication between the hardware layer and the second decision layer is abnormal, the first decision layer instructs the use of the second control method to control the operating state of the hardware in the hardware layer, including:

[0046] When the first decision layer determines that the communication between the hardware layer and the second decision layer is abnormal and the temperature of the electronic device is lower than the first temperature threshold, the first decision layer instructs to use the second control method to control the operating state of the hardware in the hardware layer.

[0047] In conjunction with the first aspect, in one possible implementation, the method further includes:

[0048] When the first decision layer determines that the temperature of the electronic device is higher than the second temperature threshold, the first decision layer instructs to control the operating state of the hardware in the hardware layer using a third control method.

[0049] The second temperature threshold is greater than or equal to the first temperature threshold. In the third control mode, the first decision layer and the second decision layer do not participate in controlling the operating state of the hardware in the hardware layer.

[0050] The third control method may be a simpler control method than the first control method.

[0051] In an embodiment of the present application, when the first decision layer determines that the temperature of the electronic device is higher than the second temperature threshold, the electronic device is controlled by a third control method, and the third control method can be a simpler control method compared to the first control method. In this way, the computing power resources required to control the electronic device can be reduced.

[0052] In a second aspect, an embodiment of the present application provides a control device, which may be an electronic device or a chip or chip system within an electronic device. The control device may include a display unit and a processing unit. When the control device is an electronic device, the display unit may be a display screen. The display unit is configured to perform the display step, so that the electronic device implements a control method described in the first aspect or any possible implementation of the first aspect. When the control device is an electronic device, the processing unit may be a processor. The control device may also include a storage unit, which may be a memory. The storage unit is configured to store instructions, and the processing unit executes the instructions stored in the storage unit, so that the electronic device implements a control method described in the first aspect or any possible implementation of the first aspect. When the control device is a chip or chip system within an electronic device, the processing unit may be a processor. The processing unit executes the instructions stored in the storage unit, so that the electronic device implements a control method described in the first aspect or any possible implementation of the first aspect. The storage unit may be a storage unit within the chip (e.g., a register, a cache, etc.), or a storage unit within the electronic device located outside the chip (e.g., a read-only memory, a random access memory, etc.).

[0053] In a third aspect, an embodiment of the present application provides an electronic device, comprising a processor and a memory, wherein the memory is used to store code instructions, and the processor is used to run the code instructions to execute the method described in the first aspect or any possible implementation of the first aspect.

[0054] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, in which a computer program or instruction is stored. When the computer program or instruction is run on a computer, the computer executes the method described in the first aspect or any possible implementation of the first aspect.

[0055] In a fifth aspect, an embodiment of the present application provides a computer program product comprising a computer program, which, when the computer program runs on a computer, enables the computer to execute the method described in the first aspect or any possible implementation of the first aspect.

[0056] In a sixth aspect, the present application provides a chip or chip system, comprising at least one processor and a communication interface, wherein the communication interface and the at least one processor are interconnected via a line, and the at least one processor is configured to execute a computer program or instruction to perform the method described in the first aspect or any possible implementation of the first aspect. The communication interface in the chip may be an input / output interface, a pin, or a circuit.

[0057] In a possible implementation, the chip or the chip system described above in the application further includes at least one memory in which instructions are stored. The memory can be a storage unit inside the chip, for example, a register, a cache, etc., or a storage unit of the chip (for example, a read-only memory, a random access memory, etc.).

[0058] It should be understood that the second aspect to the sixth aspect of the application correspond to the technical solution of the first aspect of the application, and the beneficial effects obtained by each aspect and the corresponding feasible implementation are similar, which will not be described again. BRIEF DESCRIPTION OF DRAWINGS

[0059] Figure 1 is a structural block diagram of an electronic device provided by an embodiment of the application;

[0060] Figure 2 is a schematic diagram for confirming whether a software layer is normally running, provided by an embodiment of the application;

[0061] Figure 3 is a flowchart of a control method provided by an embodiment of the application;

[0062] Figure 4 is a flowchart of another control method provided by an embodiment of the application;

[0063] Figure 5 is a flowchart of another control method provided by an embodiment of the application;

[0064] Figure 6 is a flowchart of another control method provided by an embodiment of the application;

[0065] Figure 7 is a flowchart of another control method provided by an embodiment of the application;

[0066] Figure 8 is a structural schematic diagram of a chip provided by an embodiment of the application. DETAILED DESCRIPTION

[0067] In order to clearly describe the technical solutions of the embodiments of the application, the following briefly introduces some terms and technologies involved in the embodiments of the application:

[0068] 1. Advanced RISC Machine (ARM) is a 32-bit reduced instruction set processor architecture. The ARM architecture is suitable for mobile communication and other electronic devices that require high portability. ARM processors are widely used in embedded systems and various consumer electronics, such as smartphones, tablet computers, multimedia players, and computers.

[0069] The key feature of the ARM architecture is its unique ARM instruction set system, optimized for different application scenarios. The ARM architecture is designed to operate at the highest possible clock frequency, reducing the number of infrequently used instructions, thereby reducing chip complexity and power consumption. Furthermore, ARM processors typically have a large number of registers, enabling fast execution of program instructions.

[0070] In general, the ARM architecture is a reduced instruction set computer structure, but it is not a simple single-cycle instruction system. On the contrary, most instructions of the ARM processor are fixed-length, which can speed up the execution of common operations.

[0071] 2. The Basic Input / Output System (BIOS) is a set of programs embedded in a read-only memory (ROM) chip on the computer's motherboard. It stores the computer's most important basic input / output (BIO) programs, the post-boot self-test program, and the system startup program. It reads and writes detailed system configuration information from the complementary metal oxide semiconducting (CMOS) chip. Its primary function is to provide the lowest-level, most direct hardware configuration and control for the computer. The BIOS also provides some system parameters to the operating system. System hardware changes are hidden by the BIOS, and programs use BIOS functions rather than directly controlling the hardware. In some systems, the abstraction layer provided by the BIOS is bypassed and hardware components are controlled directly.

[0072] 3. The embedded controller (EC) is a separate processor that manages the entire system before and during startup. The BIOS doesn't start running until the EC initializes the internal physical environment. In a PC, the EC is always on, whether the computer is on or off, unless the battery and adapter are completely removed. When the computer is off, the EC remains running, waiting for the user's power-on message. After startup, the EC controls the keyboard, charging indicator light, fan, and other indicators. It even controls the system's standby and hibernation states.

[0073] 4. Other terms

[0074] In the embodiments of this application, terms such as "first" and "second" are used to distinguish between identical or similar items with substantially the same functions and effects. For example, the terms "first chip" and "second chip" are used solely to distinguish between different chips and do not define their order. Those skilled in the art will understand that terms such as "first" and "second" do not define the quantity or execution order, and do not necessarily define differences.

[0075] It should be noted that in the embodiments of this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described in this application as "exemplary" or "for example" should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0076] In the embodiments of the present application, "at least one" refers to one or more, and "more" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: the existence of A alone, the existence of A and B at the same time, and the existence of B alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, or c can represent: a, b, c, ab, a--c, bc, or abc, where a, b, c can be single or multiple.

[0077] 5、电子设备

[0078] The electronic devices of the embodiments of the present application may include handheld devices, vehicle-mounted devices, etc. with data processing functions. For example, some electronic devices include: mobile phones, tablet computers, PDAs, personal computers (PCs), mobile internet devices (MIDs), wearable devices, virtual reality (VR) devices, augmented reality (AR) devices, wireless terminals in industrial control, wireless terminals in self-driving, wireless terminals in remote medical surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, wireless terminals in smart homes, cellular phones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices or other processing devices connected to wireless modems, vehicle-mounted devices, wearable devices, terminal devices in 5G networks or future evolved public land mobile communication networks (PLMNs). Terminal equipment in a land mobile network (PLMN), etc., is not limited to this in the embodiments of the present application.

[0079] As an example and not a limitation, in the embodiments of the present application, the electronic device may also be a wearable device. Wearable devices may also be referred to as wearable smart devices, which are a general term for wearable devices that are intelligently designed and developed using wearable technology for daily wear, such as glasses, gloves, watches, clothing, and shoes. A wearable device is a portable device that is worn directly on the body or integrated into the user's clothes or accessories. Wearable devices are not only hardware devices, but also achieve powerful functions through software support, data interaction, and cloud interaction. Broadly speaking, wearable smart devices include those that are fully functional, large in size, and can achieve complete or partial functions without relying on smartphones, such as smart watches or smart glasses, as well as those that only focus on a certain type of application function and need to be used in conjunction with other devices such as smartphones, such as various smart bracelets and smart jewelry for vital sign monitoring.

[0080] In addition, in the embodiments of the present application, the electronic device can also be a terminal device in the Internet of Things (IoT) system. IoT is an important part of the future development of information technology. Its main technical feature is to connect objects to the network through communication technology, thereby realizing an intelligent network of human-machine interconnection and object-to-object interconnection.

[0081] The electronic devices in the embodiments of the present application may also be referred to as: terminal equipment, user equipment (UE), mobile station (MS), mobile terminal (MT), access terminal, user unit, user station, mobile station, mobile station, remote station, remote terminal, mobile device, user terminal, terminal, wireless communication equipment, user agent or user device, etc.

[0082] In the embodiments of the present application, the electronic device or each network device includes a hardware layer, an operating system layer running on the hardware layer, and an application layer running on the operating system layer. The hardware layer includes hardware such as a central processing unit (CPU), a memory management unit (MMU), and memory (also known as main memory). The operating system can be any one or more computer operating systems that implement business processing through processes, such as a Linux operating system, a Unix operating system, an Android operating system, an iOS operating system, or a Windows operating system. The application layer includes applications such as browsers, address books, word processing software, and instant messaging software.

[0083] The following examples illustrate the scenarios of the embodiments of the present application.

[0084] In some example situations, electronic devices are performing some large tasks, such as video rendering tasks, and high frame rate display tasks for game screens. At this time, the hardware in the electronic device may be in a high-load state. For example, the central processing unit (CPU), graphics processing unit (GPU) and other hardware may be in a high-load state. The hardware in a high-load state also generates more heat. In this way, as the heat accumulates, the temperature of the electronic device gradually rises. If the temperature of the electronic device is too high, there is a risk of burning. Therefore, it is necessary to control the performance of the electronic device to reduce the temperature of the electronic device, such as limiting the frequency of the CPU.

[0085] In related technologies, the performance of electronic devices is primarily controlled using thermal zones. The thermal framework is a temperature control framework that controls the performance of electronic devices based on temperature.

[0086] However, the related art mainly controls the performance of electronic devices in a thermal zone manner. That is, in the related art, only one control method is used to control the performance of electronic devices. As a result, the flexibility of controlling the electronic devices is insufficient.

[0087] In view of this, an embodiment of the present application proposes a control method and related devices, by configuring at least two control modes in an electronic device, and selecting one of the control modes to control the operating status of the hardware in the electronic device according to the operating conditions of the electronic device. In this way, the flexibility of controlling the electronic device can be improved.

[0088] In order to better understand the embodiments of the present application, the structure of the electronic device according to the embodiments of the present application is introduced below:

[0089] Electronic devices can adopt layered architecture, event-driven architecture, microkernel architecture, microservice architecture, cloud architecture, or ARM architecture.

[0090] This embodiment takes the Windows operating system of ARM architecture as an example to illustrate the structure of the electronic device.

[0091] Figure 1 This is a block diagram of the structure of an electronic device provided in an embodiment of the present application. The layered architecture divides the software into several layers, each with a clear role and division of labor, and the layers communicate with each other through software interfaces or hardware interfaces. In some embodiments, the electronic device is divided into multiple layers, from bottom to top, namely the hardware layer, BIOS layer, software core layer, and operating system turbo (OS Turbo) layer.

[0092] The hardware layer may include the EC, CPU, GPU, battery, battery charging module, wireless local area network (WLAN) module, display, chip, chip-built-in temperature sensor, onboard sensor, fan module, keyboard, and fiber-optic temperature sensor (Distributed Temperature Sensing, DTS) for collecting power supply temperature. The EC may include a module for collecting information from the chip-built-in temperature sensor (tsensor), a module for collecting keyboard hot key information, an interface for controlling fan speed, and heartbeat module 1 (also known as the first heartbeat module). The EC is deployed with a fan table that defines the mapping between temperature and speed, thereby controlling fan speed based on temperature.

[0093] The BIOS layer includes an original equipment manufacturer (OEM) table module, a BIOS device information module, and an escape mechanism module. The OEM table module records information required by the software core layer, such as information required by the power consumption performance decision module.

[0094] Among them, the BIOS device information module, also known as the BIOS device parameter module, can record status information transmitted by various hardware, including but not limited to temperature sensor information (for example, indicating the temperature collected by the temperature sensor), battery capacity information (for example, indicating the remaining battery capacity), fan speed information (for example, indicating the current fan speed), power supply status information (for example, indicating whether DC or AC is currently used), screen information (for example, indicating whether the screen is open or closed), electronic device lid information (for example, indicating whether the electronic device lid is open or closed), electronic device cooling information (for example, indicating the current cooling method of the electronic device), WLAN information (for example, indicating the network resources of the WLAN), Open Digital Video (ODVx) information (for example, indicating the data volume or frame rate of the video displayed by the electronic device), EC source code language (ACPI source language, ASL) information (for example, indicating the ASL code called by the EC), CPU information (for example, indicating the current CPU frequency and the number of cores currently used), GPU information (for example, indicating the current GPU frequency), display information (for example, indicating whether the display is turned on or the display brightness of the display) and WLAN information (for example, indicating the data transmission rate of the WLAN), etc. The escape mechanism module may include an extended thermal zone mechanism for controlling electronic devices, a heartbeat mechanism for transmitting heartbeat instructions, etc. The heartbeat mechanism may be implemented through a heartbeat module 2 (also called a second heartbeat module).

[0095] The core software layer (also referred to as a strategy optimization layer, or simply a software layer) can include a power consumption performance decision module, a power consumption performance deployment module (also referred to as a deployment module), and an interface module. The power consumption performance decision module can include decision module 1, decision module 2, decision module 3, and decision module 4. Each processing module (also referred to as a decision module) can be configured with a different performance decision algorithm (also referred to as a performance control algorithm). The power consumption performance deployment module can generate control commands for controlling hardware in the hardware layer. For example, the control commands can include, but are not limited to, CPU frequency adjustment commands, CPU core dialing commands, GPU frequency adjustment commands, fan control commands, charging rate control commands, backlight brightness commands, WLAN rate control commands, and CPU capability limitation commands. The interface module can include, but is not limited to, a performance power consumption control interface (which can be referred to as a power consumption control interface, a performance control interface, or a control interface) for issuing control commands, a BIOS interface for communicating with the BIOS layer, a windows interface for communicating with the windows system, and an OS Turbo interface for communicating with the OS Turbo layer.

[0096] The BIOS interface can include an interface for obtaining an OEM table, an interface for obtaining information from a BIOS device information module, and an interface for transmitting a heartbeat instruction, among others. Optionally, the BIOS interface can also serve as an interface for transmitting instructions to the BIOS layer, i.e., the BIOS interface can serve as a heartbeat module 3 (also referred to as a third heartbeat module) for transmitting a heartbeat instruction to the BIOS. The performance power consumption control interface for issuing control commands can include, but is not limited to, a GPU software development kit (Software Development Kit, SDK), a Bluetooth and WLAN driver, and an inbox driver for power path management (PPM), among others. The information that can be obtained by the windows interface can include, but is not limited to, the work load of the windows system, the windows system power slider information (e.g., indicating the performance level selected by the user), and the game mode of the windows system, among others. The OS Turbo interface can obtain a new OEM table and a new ODVx from the OS Turbo layer. The new OEM table can replace the OEM table from the BIOS layer, i.e., the core software layer controls the hardware of the electronic device based on the new OEM table. The new ODVx can replace the ODVx from the BIOS layer.

[0097] OS Turbo is a system-level performance and power optimization engine, which is based on the related technologies of windows system, application and driver, BIOS firmware, etc., and deeply goes into the bottom layer of PC through the software and hardware cooperation capability, and optimizes the bottom layer process of CPU and GPU through the superposition algorithm and capability. Optionally, the OS Turbo layer can be configured with a scene recognition mechanism for recognizing the use scene of the electronic device and a chip tuning mechanism for optimizing the chip capability, etc.

[0098] In the embodiment of the present application, the core software layer establishes performance and power optimization decision and deployment capability. The PC developer or OS Turbo inputs the OEM table based on the pre-defined strategy of the core software layer according to the need, and the core software layer makes performance and power optimization decision and executes according to the OEM table through collecting system information. The BIOS layer can establish PC developer OEM table reporting, system information collection and active reporting capability, including boot process OEM table reporting, passive collection of temperature sensor information, battery capacity, power state, lid device state and other information. The EC layer: deploy the fan table pre-defined by the PC developer, poll system information and threshold overrun to actively report to the BIOS layer, and provide fan speed setting interface, etc.

[0099] In the embodiment, the electronic device is configured with at least two control modes to control the electronic device, including a first control mode and a second control mode. In the first control mode, the software layer participates in the control of the hardware in the hardware layer. However, the software layer may have abnormal situations, such as the software layer stopping running caused by the software layer being uninstalled, and the software layer temporarily stopping running caused by the system freezing, etc. At this time, the electronic device can be controlled through the second control mode, and in the second control mode, the software layer does not participate in the control of the hardware in the hardware layer, so that the control of the electronic device can be continued.

[0100] Optionally, whether the software layer is normally running can be determined through the transmission of the heartbeat instruction and the transmission of the control command.

[0101] Please refer to Figure 2 , Figure 2 is a schematic diagram for confirming whether the software layer is normally running provided in the embodiment of the present application. As Figure 2As shown, the EC initiates a heartbeat command, triggering the BIOS layer to initiate a heartbeat command to the software layer. If the software layer is operating normally, the software layer will respond to the heartbeat command received by the BIOS layer, triggering the BIOS layer to transmit a response heartbeat command to the EC. Furthermore, if the software layer is unable to operate normally at this time, that is, operating abnormally, the software layer can initiate a reverse heartbeat command to the BIOS layer upon learning that it has recovered from abnormal operation, triggering the BIOS layer to initiate a reverse heartbeat command to the EC. The EC can then transmit a reverse response heartbeat command to the BIOS layer, triggering the BIOS layer to transmit a reverse response heartbeat command to the software layer. In this way, the software layer can know that the BIOS and EC layers have received the reverse heartbeat command initiated by the software layer. In addition, it is possible that the software layer cannot know that it has entered an abnormal operating state, which may not trigger the software layer to initiate a reverse heartbeat instruction to the BIOS layer. Therefore, an embodiment of the present application sets up a control distribution mechanism of a system-on-a-chip (SOC). That is, when the software layer sends a control command to the SOC, it also synchronously sends the control command to the BIOS. In this way, even if the software layer cannot know that it has entered an abnormal operating state, it will send a control command to the BIOS layer when it recovers to a normal operating state. Then, when the BIOS layer obtains the control command, it can also know that the software layer has recovered to a normal operating state.

[0102] In addition, the software layer may also obtain the first operating parameter read from the EC and the second operating parameter read from the BIOS layer.

[0103] The following embodiments provide exemplary descriptions of a software layer in a normal operating state and a software layer in a stopped operating state and then switched back to an abnormal operating state.

[0104] First, the following describes how to control the performance of electronic equipment when the software layer is in normal operation.

[0105] See also Figure 3 , Figure 3 Schematic diagram of a control method provided in an embodiment of the present application. Figure 3 The method shown may include:

[0106] S302. Turn on the electronic device.

[0107] S304: The first parameter acquisition module in the EC obtains first operating parameters of each first hardware of the electronic device.

[0108] Among them, the first parameter acquisition module may refer to a module for collecting the operating parameters of the hardware. In this embodiment, the first parameter acquisition module may be used to collect the operating parameters of the hardware that has a communication link with the EC. Optionally, the first hardware may include but is not limited to a temperature sensor and a keyboard. The operating parameters of the temperature sensor may include the temperature information it collects, and the operating parameters of the keyboard may include whether the hot key combination is triggered and what kind of hot key combination is triggered. Exemplarily, the first parameter acquisition module may be as follows: Figure 1 The temperature acquisition module and hot key acquisition module in the EC shown are shown. The temperature acquisition module in the EC can be used to read the information of the temperature sensor built into the chip, and the hot key acquisition module in the EC can be used to read the information of the keyboard of the electronic device, and then determine which hot key of the electronic device is triggered, thereby determining the operating status of the electronic device. For example, the electronic device is configured so that shortcut key 1 (such as ctrl) + shortcut key 2 (such as Z) turns on the performance mode, and shortcut key 1 + shortcut key 3 (such as X) turns on the power saving mode. In this way, if the EC detects the hot key combination of shortcut key 1 + shortcut key 2, the module with performance control capability can determine that the electronic device is in performance mode.

[0109] Optionally, the first parameter acquisition module may be a first operating parameter acquired at a certain frequency. This is related to the performance and acquisition method of the first parameter acquisition module, and no limitation is imposed on the specific acquisition frequency and acquisition method.

[0110] S306 . The first parameter collection module in the EC transmits the first operating parameter to the BIOS layer.

[0111] In this embodiment, the EC can transmit the first operating parameter to the BIOS layer according to a certain period, for example, a transmission period synchronized with the acquisition frequency of the first operating parameter, or the period of the EC transmitting the first operating parameter is greater than the acquisition frequency of the first operating parameter.

[0112] S308. The first heartbeat module in the EC transmits a first initiate heartbeat instruction to the BIOS layer.

[0113] Optionally, the first heartbeat module can transmit the first heartbeat initiation instruction to the BIOS layer according to a certain period, or it can transmit the first heartbeat initiation instruction after a certain time interval after obtaining the response instruction, or it can transmit the first heartbeat initiation instruction to the BIOS layer when the first operating parameter is collected. There is no limitation here.

[0114] Generally, both the EC and the BIOS layers are in normal operation, that is, the communication between the EC and the BIOS layers is always connected. In this embodiment, the first heartbeat module in the EC transmits the first heartbeat instruction to the BIOS layer to trigger the BIOS layer to continue transmitting the heartbeat instruction to the software layer, thereby determining whether the software layer is alive. This can also be understood as determining whether the software layer can operate normally, or whether the communication between the software layer and the EC is normal, or whether the communication between the BIOS layer and the software layer is normal.

[0115] S310: A second parameter acquisition module in the BIOS layer obtains second operating parameters of each second hardware of the electronic device.

[0116] Among them, the second parameter acquisition module can refer to a module for collecting the operating parameters of the hardware. In this embodiment, the second parameter acquisition module can be used to collect the operating parameters of the hardware that has a communication link with the BIOS layer. Optionally, the second hardware can include but is not limited to hardware other than the first hardware, such as an onboard temperature sensor, a DTS sensor, a battery, a fan, and a lid device. The second operating parameter can refer to Figure 1 The information description related to the BIOS device information module in the BIOS is not repeated here. For example, the electronic device lid device information indicates the operating parameters of the lid device.

[0117] S312: The second heartbeat module in the BIOS layer transmits a second heartbeat initiation instruction to the software layer based on the first heartbeat initiation instruction.

[0118] S314. The third heartbeat module in the software layer transmits a first response heartbeat instruction to the BIOS layer based on the second initiating heartbeat instruction.

[0119] In this embodiment, if the software layer is in a normal working state, the software layer can transmit the first response heartbeat instruction to the BIOS layer.

[0120] S316: The second heartbeat module in the BIOS layer notifies the second parameter collection module.

[0121] In this embodiment, after the second heartbeat module in the BIOS layer obtains the first response heartbeat instruction, it can determine that the software layer is in normal operation, and then notify the second parameter acquisition module, thereby transmitting the first operating parameters and the second operating parameters to the software layer through the second parameter acquisition module.

[0122] S318. The second parameter acquisition module in the BIOS layer transmits the first operating parameter and the second operating parameter to the software layer.

[0123] In this embodiment, the first operating parameter and the second operating parameter may be packaged together and transmitted to the software layer.

[0124] S320: A software performance decision module in the software layer generates a first performance control strategy for the electronic device based on the first operating parameter and the second operating parameter.

[0125] Among them, the first performance control strategy may include one or more schemes related to performance control. For example, adjusting the CPU frequency, adjusting the GPU frequency, adjusting the charging rate, adjusting the display brightness, adjusting the WLAN data transmission rate, adjusting the fan speed, etc. can be adjusted according to the required performance, and are not limited here. Exemplarily, the electronic device has turned on the performance mode, and is currently executing a game task that does not require an Internet connection, then the CPU frequency, the GPU frequency, the WLAN data transmission rate, etc. can be increased. Another example, the electronic device has turned on the performance mode, and is currently executing a game task that requires an Internet connection, and the temperature is high at this time, then the CPU frequency, the GPU frequency, the WLAN data transmission rate, the display brightness, and the charging rate can be increased. Another example, the electronic device has turned on the power saving mode, then the CPU frequency, the GPU frequency, the display brightness, and the charging rate can be reduced.

[0126] Optionally, the first operating parameter and the second operating parameter may form a parameter set, and the software performance decision module may generate a first performance control strategy for the electronic device based on some or all of the parameters in the parameter set.

[0127] It is understandable that how to generate the first performance control strategy based on the first operating parameter and the second operating parameter can be determined according to an actual algorithm and is not limited here. Figure 1 The power consumption performance decision module is shown.

[0128] In one possible implementation, the software performance decision module is configured with at least one performance control algorithm. Based on actual circumstances, one of the performance control algorithms may be invoked to generate a first performance control policy. Optionally, the performance control algorithms may include, but are not limited to, performance control algorithm 1 configured in decision module 1, performance control algorithm 2 configured in decision module 2, performance control algorithm 3 configured in decision module 3, and performance control algorithm 4 configured in decision module 4.

[0129] S322: The software performance decision module in the software layer transmits the first performance control strategy to the performance deployment module in the software layer.

[0130] S324. The performance deployment module in the software layer generates a control command based on the first performance control strategy.

[0131] In this embodiment, illustratively, the first performance control strategy includes increasing the CPU frequency, and a control command for adjusting the CPU frequency is generated.

[0132] S326: Transmit control commands to the control system and BIOS layer.

[0133] In this embodiment, the control system may be a SOC, and the operating state of the hardware is controlled by the SOC. For example, when the control system obtains a control command to reduce the CPU frequency, it controls the CPU frequency to reduce.

[0134] S328. The second heartbeat module in the BIOS layer transmits a second heartbeat response instruction to the EC based on the first heartbeat response instruction.

[0135] S330 : The EC responds to the second response heartbeat instruction and returns to execute step S308 .

[0136] In this embodiment, the EC may retransmit the first heartbeat initiation instruction to the BIOS layer only after receiving the second heartbeat reply instruction, thereby initiating a new round of determination of whether the software layer is operating normally. Alternatively, the EC may retransmit the first heartbeat initiation instruction to the BIOS layer after a certain interval after receiving the second heartbeat reply instruction.

[0137] In another possible implementation, the EC may start timing after transmitting the first heartbeat initiation instruction for the first time, and transmit the first heartbeat initiation instruction for the second time after a certain interval.

[0138] It is understandable that the EC retransmits the first initiating heartbeat instruction to the BIOS layer only after obtaining the second response heartbeat instruction. In this way, the waste of instruction transmission caused by still transmitting the heartbeat instruction to the software layer even though the software layer is unable to respond to the heartbeat can be reduced, thereby improving the resource utilization of the system.

[0139] It should be noted that in this embodiment, the periodicity of the EC's first heartbeat-initiating instruction transmission can be set by counting the frequency of software layer anomalies. For example, the higher the anomaly frequency, the shorter the periodicity of the EC's first heartbeat-initiating instruction transmission. In other words, the shorter the interval between EC transmissions of the first heartbeat-initiating instruction, the higher the frequency of first heartbeat-initiating instruction transmissions. This allows for timely detection of software layer anomalies and, therefore, for timely switching of control modes.

[0140] In another possible implementation, S308, the first heartbeat module in the EC transmits the first initiation heartbeat instruction to the BIOS layer, and S310, the second parameter acquisition module in the BIOS layer obtains the second operating parameters of each second hardware of the electronic device, which can be independent of each other, that is, there is no execution order constraint between S308 and S310, that is, the transmission of operating parameters and the transmission of heartbeat instructions are independent.

[0141] In another possible implementation, step S316, in which the second heartbeat module in the BIOS layer notifies the second parameter acquisition module, is not necessary. Specifically, the second parameter acquisition module transmits the first and second operating parameters to the software layer after acquiring them. This allows the software layer to promptly acquire the parameters and determine the control strategy. By setting step S316, parameters can be transmitted only when the software layer is determined to be operating normally. This reduces the waste of resources required for parameter transmission when parameters are transmitted to the software layer even when the software layer is in an abnormal state, thereby improving system resource utilization.

[0142] In another possible implementation, in S318, the step of transmitting the first operating parameter and the second operating parameter to the software layer by the second parameter acquisition module in the BIOS layer can also choose to send the first operating parameter and the second operating parameter in a time-sharing manner, without the need to package the first operating parameter and the second operating parameter together for transmission.

[0143] It is understandable that, generally speaking, the higher the performance, the higher the power consumption. Therefore, control of performance can also be understood as control of power consumption.

[0144] The following example illustrates the situation where the software layer is in a stopped state and then switches back to an abnormal state. The situation where the software layer is in a stopped state and then switches back to an abnormal state can be divided into at least the following situations:

[0145] Scenario 1: The software layer learns that it has entered an abnormal operating state;

[0146] Case 2: The software layer is unaware that it has entered an abnormal operating state.

[0147] Therefore, the above situations are explained respectively.

[0148] First, the specific implementation of this application is described using scenario 1.

[0149] See also Figure 4 , Figure 4 This is a flow chart of another control method provided in the embodiment of the present application. Figure 4 The method shown may include:

[0150] S402. Turn on the electronic device.

[0151] S404: The first parameter acquisition module in the EC obtains first operating parameters of each first hardware of the electronic device.

[0152] S406 : The first parameter collection module in the EC transmits the first operating parameter to the BIOS layer.

[0153] S408. The first heartbeat module in the EC transmits a first initiate heartbeat instruction to the BIOS layer.

[0154] S410: A second parameter acquisition module in the BIOS layer obtains second operating parameters of each second hardware of the electronic device.

[0155] S412: The second heartbeat module in the BIOS layer transmits a second heartbeat initiation instruction to the software layer based on the first heartbeat initiation instruction.

[0156] Among them, S402-S412 can refer to the description of the above embodiment and are not repeated here.

[0157] S414: The second heartbeat module in the BIOS layer starts timing.

[0158] In this embodiment, the timing may be started after the second heartbeat initiation instruction is transmitted.

[0159] S416: The second heartbeat module in the BIOS layer determines whether the accumulated timing time reaches a preset time.

[0160] In this embodiment, the preset time is used to evaluate whether the software layer has not responded to the heartbeat instruction for a long time, thereby determining whether the software layer is in a normal operating state. Optionally, the preset time can be set according to actual conditions, for example, to 10 seconds.

[0161] S418: If the accumulated time reaches the preset time, the second heartbeat module in the BIOS layer determines whether the first response heartbeat instruction is obtained.

[0162] S420: If the second heartbeat module in the BIOS layer does not obtain the first response heartbeat instruction, it notifies the BIOS performance decision module in the BIOS layer.

[0163] In this embodiment, if the second heartbeat module reaches the preset time when the accumulated timing time reaches the preset time and does not obtain the first response heartbeat instruction, it can be considered that the software layer is in an abnormal operating state. At this time, the operating state of the hardware of the electronic device is controlled by the BIOS performance decision module.

[0164] Optionally, if a first response heartbeat instruction is obtained, step S426 is executed.

[0165] S422: The BIOS performance decision module in the BIOS layer generates a second performance control strategy for the electronic device based on the first operating parameter.

[0166] In another possible implementation, the BIOS performance decision module may also generate a second performance control strategy for the electronic device based on the second operating parameter. Figure 1 An extended thermalzone mechanism module. In general, since the performance of the BIOS layer is poor compared to that of the software layer, the operating parameters on which the BIOS performance decision module makes decisions can optionally be fewer than the operating parameters on which the software performance decision module makes decisions. Optionally, the performance control algorithms (also known as performance decision algorithms) configured by the software performance decision module and the BIOS performance decision can be different. Exemplarily, the complexity of the algorithm configured by the software performance decision module is higher than the complexity of the algorithm configured by the BIOS performance decision.

[0167] Optionally, the BIOS performance decision module can refer to the relevant description of the software performance decision module, which is not repeated here.

[0168] In a possible implementation, the BIOS performance decision module may be configured with a performance control algorithm, and the BIOS performance decision module may generate the second performance control policy based on the configured performance control algorithm.

[0169] Exemplarily, this performance control algorithm can be an extended thermal zone mechanism. Specifically, the BIOS performance decision module simulates the thermal zone mechanism to control the performance of the electronic device. For example, the fan speed can be controlled based on the temperature of the electronic device. The higher the temperature, the higher the speed. This improves the heat dissipation of the CPU and GPU, allowing them to better utilize their performance, thereby enhancing the performance of the electronic device.

[0170] It is understandable that if the BIOS layer is configured with an interface connected to the control system, the BIOS layer can generate a control command based on the second performance control policy and transmit it to the control system.

[0171] S424: The third heartbeat module in the software layer transmits a third heartbeat initiation instruction to the BIOS layer.

[0172] In this embodiment, the software layer recovers from the abnormal operating state to the normal operating state, and the communication between the software layer and the BIOS layer and EC can be restored to normal. At this time, the third heartbeat module in the software layer transmits the third heartbeat instruction to the BIOS layer, thereby notifying the BIOS layer and EC that the software layer has recovered to the normal operating state.

[0173] S426: The second heartbeat module in the BIOS layer notifies the second parameter collection module.

[0174] S428. The second parameter acquisition module in the BIOS layer transmits the first operating parameter and the second operating parameter to the software layer.

[0175] S430: The software performance decision module in the software layer generates a first performance control strategy for the electronic device based on the first operating parameter and the second operating parameter.

[0176] Among them, S426-S430 can refer to the description of the above embodiment and are not repeated here.

[0177] S432: The second heartbeat module in the BIOS layer transmits a fourth initiate heartbeat instruction to the EC based on the third initiate heartbeat instruction.

[0178] S434. The first heartbeat module in the EC transmits a third response heartbeat instruction to the BIOS layer based on the fourth initiation heartbeat instruction.

[0179] In this embodiment, optionally, when the EC obtains the fourth initiate heartbeat instruction, it may restart transmitting the first initiate heartbeat instruction to the EC.

[0180] S436: The second heartbeat module in the BIOS layer transmits a fourth heartbeat response instruction to the software layer based on the third heartbeat response instruction.

[0181] In this embodiment, when the software layer obtains the fourth response heartbeat instruction, it can determine that the BIOS layer and the EC have learned that it has recovered to a normal operating state.

[0182] S438. After obtaining the fourth heartbeat response instruction, the software layer responds to the fourth heartbeat response instruction and returns to execute step S424.

[0183] Optionally, after obtaining the fourth response heartbeat instruction, the software layer may retransmit the third initiation heartbeat instruction after a period of time.

[0184] In another possible implementation, step S426, in which the second heartbeat module in the BIOS layer notifies the second parameter acquisition module, may not be necessary, and the second parameter acquisition module may be replaced by continuously transmitting the first operating parameter and the second operating parameter.

[0185] In another possible implementation, after obtaining the fourth response heartbeat instruction, the software layer may or may not return to execute step S424. However, through step S438, after an abnormal operation occurs in the software layer, it can be judged in time through a two-way heartbeat whether an abnormality occurs again in the software layer.

[0186] The above embodiment describes the specific implementation of the present application based on scenario 1. The following describes the specific implementation of the present application based on scenario 2.

[0187] See also Figure 5 , Figure 5 A flowchart of another control method provided in an embodiment of the present application.

[0188] S502. Turn on the electronic device.

[0189] S504: The first parameter acquisition module in the EC obtains first operating parameters of each first hardware of the electronic device.

[0190] S506 : The first parameter collection module in the EC transmits the first operating parameter to the BIOS layer.

[0191] S508. The first heartbeat module in the EC transmits a first initiate heartbeat instruction to the BIOS layer.

[0192] S510: A second parameter acquisition module in the BIOS layer acquires second operating parameters of each second hardware of the electronic device.

[0193] S512: The second heartbeat module in the BIOS layer transmits a second heartbeat initiation instruction to the software layer based on the first heartbeat initiation instruction.

[0194] S514: The second heartbeat module in the BIOS layer starts timing.

[0195] S516: The second heartbeat module in the BIOS layer determines whether the accumulated timing time reaches a preset time.

[0196] S518: If the accumulated time reaches the preset time, the second heartbeat module in the BIOS layer determines whether the first response heartbeat instruction is obtained.

[0197] S520: If the second heartbeat module in the BIOS layer does not obtain the first response heartbeat instruction, it notifies the BIOS performance decision module in the BIOS layer.

[0198] S522: The BIOS performance decision module in the BIOS layer generates a second performance control strategy for the electronic device based on the first operating parameter.

[0199] S524: The second parameter acquisition module in the BIOS layer transmits the first operating parameter and the second operating parameter to the software layer.

[0200] In this embodiment, even if the software layer is in an abnormal operating state, the BIOS layer can continue to transmit the first operating parameter and the second operating parameter to the software layer, so that the software layer can generate control commands in a timely manner when it recovers to a normal operating state.

[0201] S526: The software performance decision module in the software layer generates a first performance control strategy for the electronic device based on the first operating parameter and the second operating parameter.

[0202] S528. The software performance decision module in the software layer transmits the first performance control strategy to the performance deployment module in the software layer.

[0203] S530: The performance deployment module in the software layer generates a control command based on the first performance control strategy.

[0204] Among them, S502-S530 can refer to the description of the above embodiment and are not repeated here.

[0205] S532: The performance deployment module in the software layer transmits control commands to the control system and the BIOS layer.

[0206] It is understandable that the software layer may not be able to predict when an abnormality will occur. For example, the abnormality may occur before generating the first performance control policy, before transmitting the first performance control policy, before generating a control command, or before issuing a control command. However, in any case, as long as the software layer returns to normal operation, it will continue to execute the next step based on the original step. In this way, the software layer will eventually issue a control command. When the BIOS layer obtains the control command, it will know that the software layer has returned to normal operation.

[0207] S534: The second heartbeat module in the BIOS layer notifies the EC.

[0208] In the embodiment of the present application, after receiving the control command, the BIOS can know that the software layer has returned to normal operation and notify the EC. Optionally, a notification command can be transmitted to the EC to instruct the software layer to return to normal operation.

[0209] S536. EC returns to execute step S508.

[0210] In this embodiment, the EC returns to execute step 508 so as to monitor the status of the software layer.

[0211] In another possible implementation, the step of S534, in which the second heartbeat module in the BIOS layer notifies the EC, may not be necessary. The EC then cyclically transmits the first initiating heartbeat instruction, and the running status of the software layer can be promptly learned based on the response heartbeat instruction.

[0212] In general, the following steps may be used to recover from a software freeze:

[0213] Processing method 1: Send soc performance control command.

[0214] Solution 2: Execute active heartbeat.

[0215] After receiving any processing, the BIOS layer initiates its own heartbeat. After confirming that the software layer is functioning properly, the BIOS and EC switch back to the first control mode (EC+BIOS). This switch between BIOS and EC control modes is transparent to the software layer, which maintains the first control mode. If the software layer is confirmed to be operating abnormally, the second control mode (software layer + BIOS layer + EC) is maintained.

[0216] The following embodiments further illustrate the conditions for when to use the software layer and when to use the BIOS layer to make decisions.

[0217] First, the specific implementation of when to adopt the first decision-making layer to make decisions is further explained.

[0218] See also Figure 6 , Figure 6 A flowchart of another control method provided in an embodiment of the present application.

[0219] like Figure 6 As shown, if the software layer is in normal operation, the temperature of the electronic device can be determined. If the temperature of the electronic device is lower than temperature point A (for example, 95 degrees), the performance of the electronic device is controlled through the software layer. If the temperature of the electronic device is higher than temperature point A and lower than temperature point B (for example, 98 degrees), the performance of the electronic device is controlled through the thermal zone mechanism. If the temperature of the electronic device is higher than temperature point B, the electronic device is forcibly powered off.

[0220] Optionally, the thermal zone mechanism may be implemented through EC, or implemented in other layers except the software layer and the BIOS layer, which is not limited here.

[0221] Optionally, the temperature of the electronic device may be obtained by averaging the acquired temperature values ​​through the BIOS layer, or one of the temperature values ​​may be selected as the temperature value of the electronic device.

[0222] The manner in which the software layer controls the performance of the electronic device may refer to the description of the above embodiment and will not be elaborated here.

[0223] Secondly, the specific implementation of when to use the second decision-making layer to make decisions is further explained.

[0224] See also Figure 7 , Figure 7 A flowchart of another control method provided in an embodiment of the present application.

[0225] like Figure 7 As shown, if the software layer is in an abnormal running state, at this time, if the temperature of the electronic device is lower than temperature point A, the performance of the electronic device is controlled by the BIOS layer based on the extended thermal zone mechanism. If the temperature of the electronic device is higher than temperature point A and lower than temperature point B (for example, 98 degrees), the performance of the electronic device is controlled by the thermal zone mechanism. If the temperature of the electronic device is higher than temperature point B, the electronic device is forced to power off.

[0226] It should be noted that the extended thermal zone mechanism and the thermal zone mechanism can be the same or different mechanisms. For example, the extended thermal zone mechanism has more parameters, different strategies, etc. than the thermal zone mechanism.

[0227] The manner in which the BIOS layer controls the performance of the electronic device can refer to the description of the above embodiments, which will not be repeated here.

[0228] In this embodiment, by dividing the temperature into multiple intervals, and then selecting different ways to control the performance of the electronic device according to the temperature interval in which the electronic device is located, the control flexibility can be further improved. In addition, according to the real-time state of the system including the system temperature, the system performance and temperature are flexibly controlled, and full coverage of control at any temperature is realized.

[0229] The technical solutions of the present application and the technical solutions of the present application will be described in detail below. The following specific embodiments can be implemented independently, or can be combined with each other. For the same or similar concepts or processes, some embodiments can not be repeated.

[0230] The embodiment of the present application provides a control method, which can include:

[0231] In the case where the first decision layer determines that the communication between the hardware layer and the second decision layer is normal, the first decision layer instructs to control the running state of the hardware in the hardware layer by using a first control mode; wherein in the first control mode, the second decision layer participates in the control of the running state of the hardware in the hardware layer.

[0232] In the case where the first decision layer determines that the communication between the hardware layer and the second decision layer is abnormal, the first decision layer instructs to control the running state of the hardware in the hardware layer by using a second control mode; wherein in the second control mode, the second decision layer does not participate in the control of the running state of the hardware in the hardware layer.

[0233] In this embodiment, the first decision layer can be a BIOS layer as shown in Figure 1 the second decision layer can be a software layer as shown in Figure 1 The software layer is shown, and the hardware layer can be as follows Figure 1 Whether the communication between the hardware layer and the second decision layer is normal can be determined by whether the communication between the EC in the hardware layer and the second decision layer is normal. It can be understood that the layer for executing the control function can be selected according to actual needs, and there is no limitation here. How the first decision layer determines whether the communication between the hardware layer and the second decision layer is normal can be referred to Figure 3-Figure 5 In addition, how the first decision layer participates in the control of the operating state of the hardware in the hardware layer, and how the second decision layer participates in the control of the operating state of the hardware in the hardware layer, can be referred to Figure 3-Figure 5 The relevant description is not repeated here.

[0234] In another possible implementation, the lifespan of the hardware of the electronic device and other conditions may also be controlled.

[0235] In another possible implementation, when the first control method is used for control, the electronic device can also be controlled by jointly using the first decision layer and the second decision layer. For example, the performance control strategies generated by the first decision layer and the second decision layer are integrated to obtain a fused performance control strategy.

[0236] In another possible implementation, the first decision layer may be combined with other modules to control the electronic device.

[0237] In a possible implementation, the control method further includes:

[0238] The first decision layer obtains a first heartbeat instruction from the hardware layer; the first decision layer transmits a second heartbeat instruction to the second decision layer in response to the first heartbeat instruction; if the first decision layer obtains a third heartbeat instruction within the first target time period, it determines that the communication between the hardware layer and the second decision layer is normal, or if the first decision layer does not obtain the third heartbeat instruction within the first target time period, it determines that the communication between the hardware layer and the second decision layer is abnormal.

[0239] The first target time period is calculated from the time when the first decision layer transmits the second heartbeat instruction to the second decision layer, and the third heartbeat instruction includes an instruction fed back by the second decision layer in response to the second heartbeat instruction.

[0240] In another possible implementation, the second decision layer may broadcast a heartbeat instruction. When the first decision layer obtains the heartbeat instruction broadcast by the first decision layer, it confirms that the second decision layer is in a normal operating state; if the first decision layer does not obtain the heartbeat instruction broadcast by the second decision layer for a long time, it confirms that the second decision layer is in an abnormal operating state.

[0241] In a possible implementation, the control method further includes that the hardware layer includes a controller configured to at least acquire and transmit the heartbeat instructions, the first heartbeat instruction is transmitted by the controller in a first time interval, and the method further includes:

[0242] The first decision layer transmits a fourth heartbeat instruction to the controller in response to the third heartbeat instruction, and the controller takes a time of acquiring the fourth heartbeat instruction as a starting time of the first time interval.

[0243] The controller may, for example, be an EC in the Figure 1

[0244] In another possible implementation, the first decision layer may not transmit the second heartbeat instruction in response to the third heartbeat instruction, and the controller may retransmit the first heartbeat instruction.

[0245] In a possible implementation, after the first decision layer determines that the communication between the hardware layer and the second decision layer is abnormal, the method further includes:

[0246] The first decision layer acquires a fifth heartbeat instruction from the second decision layer, the fifth heartbeat instruction includes an instruction transmitted by the second decision layer when the second decision layer switches from the abnormal running state to the normal running state; the first decision layer transmits a sixth heartbeat instruction to the hardware layer in response to the fifth heartbeat instruction; and the first decision layer determines that the communication between the hardware layer and the second decision layer switches from abnormal to normal when a seventh heartbeat instruction is acquired, the seventh heartbeat instruction includes an instruction fed back by the hardware layer in response to the sixth heartbeat instruction.

[0247] In another possible implementation, the second decision layer may broadcast an instruction when it recovers to the normal running state, and the first decision layer confirms that the second decision layer recovers to the normal running state when the first decision layer reacquires the instruction broadcast by the second decision layer.

[0248] In a possible implementation, the fifth heartbeat instruction is transmitted by the second decision layer in a second time interval, and the method further includes:

[0249] The first decision layer transmits an eighth heartbeat instruction to the second decision layer in response to the seventh heartbeat instruction, and the second decision layer takes a time of acquiring the eighth heartbeat instruction as a starting time of the second time interval.

[0250] In another possible implementation, the first decision layer may not transmit the second heartbeat instruction, and the second decision layer transmits a heartbeat instruction to the first decision layer at a certain time to prove that it is maintained in the normal running state.

[0251] For example, the first heartbeat instruction may be, for example, a first initiation heartbeat instruction in the Figure 3-Figure 5 Figure 3-Figure 5 ​​The second heartbeat instruction in the initiation, the third heartbeat instruction can be, for example, Figure 3-Figure 5 The first response heartbeat instruction in; the fourth heartbeat instruction can be, for example, Figure 3-Figure 5 The second response heartbeat instruction in; the fifth heartbeat instruction can be, for example, Figure 3-Figure 5 The third heartbeat instruction in the initiation; the sixth heartbeat instruction may be, for example, Figure 3-Figure 5 The fourth heartbeat instruction in the initiation; the seventh heartbeat instruction may be, for example, Figure 3-Figure 5 The third response heartbeat instruction in; the eighth heartbeat instruction may be, for example, Figure 3-Figure 5 The fourth response heartbeat instruction in.

[0252] In one possible implementation, the electronic device further includes a control system for controlling hardware in the hardware layer. After the first decision layer determines that communication between the hardware layer and the second decision layer is abnormal, the method further includes:

[0253] The second decision layer sends control commands to the first decision layer and the control system respectively. The control commands are generated by the second decision layer in normal operation when it adopts the second control method for control. The control commands indicate commands for controlling the operating status of the hardware in the hardware layer. When the first decision layer obtains the control command from the second decision layer, it determines that the communication between the hardware layer and the second decision layer switches from abnormal to normal.

[0254] The control system may be, for example, an SOC.

[0255] In another possible implementation, the second decision layer may not transmit the control command to the first decision layer.

[0256] In one possible implementation, the first control method is used to control the operating state of hardware in the hardware layer, including:

[0257] The first decision layer obtains an operating parameter set from the hardware layer, and the operating parameter set includes the operating parameters of part or all of the hardware during the operation of the electronic device; the first decision layer transmits the operating parameter set to the second decision layer; the second decision layer controls the operating status of the hardware in the hardware layer based on the operating parameter set.

[0258] The operating parameter set may include operating parameters read by the BIOS and / or operating parameters read by the EC.

[0259] In one possible implementation, the second decision layer includes a first performance decision module and a deployment module, the first performance decision module is configured with one or more first performance control algorithms, and the deployment module is configured to deploy a performance control policy generated by the first performance decision module. The electronic device also includes a control system for controlling hardware in the hardware layer. The second decision layer controls the operating state of the hardware in the hardware layer based on the operating parameter set, including:

[0260] The first performance decision module calls at least one first performance control algorithm, processes all operating parameters in the operating parameter set through at least one first performance control algorithm, and obtains a first performance control strategy for the electronic device; the deployment module generates a control command based on the first performance control strategy, and transmits the control command to the control system; the control system controls the operating status of the hardware in the hardware layer based on the control command.

[0261] Exemplarily, the first performance decision module may be, for example Figure 3-Figure 5 The software performance decision module in the second performance decision module can be, for example, Figure 3-Figure 5 BIOS performance decision module in.

[0262] In another possible implementation, some operating parameters in the operating parameter set may be processed by at least one first performance control algorithm.

[0263] In another possible implementation, the first performance decision module and the deployment module may also be the same module.

[0264] In one possible implementation, the hardware layer includes a controller for obtaining at least operating parameters of first hardware in the hardware layer, and the first decision layer obtains the operating parameter set from the hardware layer, including:

[0265] An operating parameter of the first hardware is obtained from the controller, and an operating parameter of the second hardware is obtained from the hardware layer.

[0266] In another possible implementation, the first decision layer may also only obtain the operating parameters of the first hardware from the controller or the operating parameters of the second hardware from the hardware layer.

[0267] In one possible implementation, the first decision layer includes a second performance decision module, the second performance decision module is configured with a second performance control algorithm, and uses a second control method to control the operating state of hardware in the hardware layer, including:

[0268] The second performance decision module calls the second performance control algorithm, processes some operating parameters in the operating parameter set through the second performance control algorithm, and obtains the second performance control strategy of the electronic device; the first decision layer controls the operating status of the hardware in the hardware layer based on the second performance control strategy.

[0269] The second performance control algorithm may be, for example, an extended thermal zone mechanism.

[0270] In a possible implementation, when the first decision layer determines that communication between the hardware layer and the second decision layer is normal, the first decision layer instructs the operating state of the hardware in the hardware layer to be controlled using the first control method, including:

[0271] When the first decision layer determines that the communication between the hardware layer and the second decision layer is normal and the temperature of the electronic device is lower than the first temperature threshold, the first decision layer instructs to control the operating state of the hardware in the hardware layer using the first control method.

[0272] The first temperature threshold may be temperature point A, for example.

[0273] In another possible implementation, the first control method may be used to control the operating status of the hardware in the hardware layer at all temperatures.

[0274] In a possible implementation, when the first decision layer determines that communication between the hardware layer and the second decision layer is abnormal, the first decision layer instructs the second control method to be used to control the operating state of the hardware in the hardware layer, including:

[0275] When the first decision layer determines that the communication between the hardware layer and the second decision layer is abnormal and the temperature of the electronic device is lower than the first temperature threshold, the first decision layer instructs to use the second control method to control the operating state of the hardware in the hardware layer.

[0276] In another possible implementation, the second control method may be used to control the operating status of the hardware in the hardware layer at all temperatures.

[0277] In one possible implementation, when the first decision layer determines that the temperature of the electronic device is higher than the second temperature threshold, the first decision layer instructs the use of a third control method to control the operating status of the hardware in the hardware layer; wherein the second temperature threshold is greater than or equal to the first temperature threshold, and in the third control method, the first decision layer and the second decision layer do not participate in the control of the operating status of the hardware in the hardware layer.

[0278] Among them, the third control mode can be, for example, Figure 6-Figure 7 The thermal zone mechanism in.

[0279] In another possible implementation, a third decision layer having the same capabilities as the second decision layer may be provided, and the third control mode may be implemented through the third decision layer.

[0280] It should be noted that the module names involved in the embodiments of the present application can be defined as other names as long as the functions of each module can be achieved, and there is no specific restriction on the names of the modules.

[0281] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in the embodiments of the present application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0282] The control method of the embodiment of the present application has been described above. The device for executing the above method provided by the embodiment of the present application is described below. Those skilled in the art will understand that the method and device can be combined and referenced with each other, and the relevant device provided by the embodiment of the present application can perform the steps in the above-mentioned list sorting method.

[0283] The control method provided in the embodiment of the present application can be applied to electronic devices with communication functions. The electronic devices include terminal devices. The specific device form of the terminal device can refer to the above related descriptions and will not be repeated here.

[0284] An embodiment of the present application provides a terminal device, which includes: a processor and a memory; the memory stores computer-executable instructions; the processor executes the computer-executable instructions stored in the memory, so that the terminal device executes the above method.

[0285] like Figure 8 A schematic diagram of the structure of a chip provided in an embodiment of the present application: The chip 800 includes one or more (including two) processors 801 , a communication circuit 802 , a communication interface 803 , and a memory 804 .

[0286] In some implementations, the memory 804 stores the following elements: executable modules or data structures, or a subset thereof, or an extended set thereof.

[0287] The method described in the above embodiment of the present application can be applied to the processor 801, or implemented by the processor 801. The processor 801 may be an integrated circuit chip with signal processing capabilities. During the implementation process, each step of the above method can be completed by an integrated logic circuit of the hardware in the processor 801 or an instruction in the form of software. The above-mentioned processor 801 can be a general-purpose processor (for example, a microprocessor or a conventional processor), a digital signal processor (digital signal processing, DSP), an application specific integrated circuit (application specific integrated circuit, ASIC), a field-programmable gate array (field-programmable gate array, FPGA) or other programmable logic devices, discrete gates, transistor logic devices or discrete hardware components. The processor 801 can implement or execute the methods, steps and logic block diagrams related to each processing disclosed in the embodiment of the present application.

[0288] The steps of the method described in conjunction with the embodiments of the present application can be directly embodied as being executed by a hardware decoding processor, or can be executed by a combination of hardware and software modules in the decoding processor. Among them, the software module can be located in a mature storage medium in the field such as a random access memory, a read-only memory, a programmable read-only memory, or an electrically erasable programmable read only memory (EEPROM). The storage medium is located in the memory 804, and the processor 801 reads the information in the memory 804 and completes the steps of the above method in combination with its hardware.

[0289] The processor 801 , the memory 804 , and the communication interface 803 may communicate with each other via a communication line 802 .

[0290] In the above embodiment, the instructions stored in the memory for execution by the processor may be implemented in the form of a computer program product, wherein the computer program product may be pre-written in the memory or downloaded and installed in the memory in the form of software.

[0291] The embodiments of the present application also provide a computer-readable storage medium. The computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the above-mentioned method is implemented. The methods described in the above embodiments can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. If implemented in software, the functions can be stored as one or more instructions or codes on a computer-readable medium or transmitted on a computer-readable medium. Computer-readable media can include computer storage media and communication media, and can also include any medium that can transfer a computer program from one place to another. The storage medium can be any target medium that can be accessed by a computer.

[0292] In one possible implementation, a computer-readable medium may include RAM, ROM, compact disc read-only memory (CD-ROM) or other optical disc storage, magnetic disk storage or other magnetic storage devices, or any other medium intended to carry or store the desired program code in the form of instructions or data structures and accessible by a computer. Moreover, any connection is appropriately referred to as a computer-readable medium. For example, if a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL) or wireless technology (such as infrared, radio and microwave) is used to transmit software from a website, server or other remote source, the coaxial cable, fiber optic cable, twisted pair, DSL or wireless technology such as infrared, radio and microwave are included in the definition of medium. Disk and optical disc as used herein include optical disc, laser disc, optical disc, digital versatile disc (DVD), floppy disk and Blu-ray disc, where disks generally reproduce data magnetically, while optical discs reproduce data optically using lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0293] An embodiment of the present application provides a computer program product, which includes a computer program. When the computer program is executed, the computer executes the above method.

[0294] The embodiments of the present application are described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processing unit of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable device to produce a machine, so that the instructions executed by the processing unit of the computer or other programmable data processing device generate instructions for implementing the steps in the process. Figure 1a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0295] The above specific implementation methods further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above are only specific implementation methods of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, equivalent replacements, improvements, etc. made on the basis of the technical solutions of the present invention should be included in the scope of protection of the present invention.

Claims

1. A control method, characterized in that: Applied to an electronic device, the electronic device includes a first decision layer, a second decision layer, and a hardware layer, the first decision layer being a layer between the second decision layer and the hardware layer, the method comprising: When the first decision layer determines that the communication between the hardware layer and the second decision layer is normal, the first decision layer instructs to use a first control method to control the operating state of the hardware in the hardware layer; wherein, in the first control method, the second decision layer participates in controlling the operating state of the hardware in the hardware layer; When the first decision layer determines that the communication between the hardware layer and the second decision layer is abnormal, the first decision layer instructs the second decision layer to control the operating state of the hardware in the hardware layer using a second control method; wherein, in the second control method, the second decision layer does not participate in the control of the operating state of the hardware in the hardware layer; The electronic device further includes a control system for controlling hardware in the hardware layer. After the first decision layer determines that communication between the hardware layer and the second decision layer is abnormal, the method further includes: The second decision layer sends control commands to the first decision layer and the control system respectively, wherein the control commands are generated by the second decision layer in a normal operating state when controlling in the second control mode, and the control commands indicate commands for controlling the operating state of the hardware in the hardware layer; When the first decision layer obtains the control command from the second decision layer, the first decision layer determines that the communication between the hardware layer and the second decision layer switches from abnormal to normal.

2. The method according to claim 1, characterized in that The method further comprises: The first decision layer obtains a first heartbeat instruction from the hardware layer; The first decision layer transmits a second heartbeat instruction to the second decision layer in response to the first heartbeat instruction; If the first decision layer obtains the third heartbeat instruction within the first target time period, it determines that the communication between the hardware layer and the second decision layer is normal; or if the first decision layer does not obtain the third heartbeat instruction within the first target time period, it determines that the communication between the hardware layer and the second decision layer is abnormal; The first target time period is calculated from the time when the first decision layer transmits the second heartbeat instruction to the second decision layer, and the third heartbeat instruction includes an instruction fed back by the second decision layer in response to the second heartbeat instruction.

3. The method according to claim 2, characterized in that The hardware layer includes a controller for at least acquiring and transmitting a heartbeat instruction, wherein the first heartbeat instruction is cyclically transmitted by the controller at a first time interval. The method further includes: The first decision layer transmits a fourth heartbeat instruction to the controller in response to the third heartbeat instruction, and the controller obtains the time of receiving the fourth heartbeat instruction as the starting time of the first time interval.

4. The method according to any one of claims 1 to 3, characterized in that After the first decision layer determines that communication between the hardware layer and the second decision layer is abnormal, the method further includes: The first decision layer obtains a fifth heartbeat instruction from the second decision layer, where the fifth heartbeat instruction includes an instruction transmitted when the second decision layer switches from an abnormal operation state to a normal operation state; The first decision layer transmits a sixth heartbeat instruction to the hardware layer in response to the fifth heartbeat instruction; When the first decision layer obtains the seventh heartbeat instruction, it determines that the communication between the hardware layer and the second decision layer switches from abnormal to normal. The seventh heartbeat instruction includes an instruction fed back by the hardware layer in response to the sixth heartbeat instruction.

5. The method according to claim 4, characterized in that The fifth heartbeat instruction is cyclically transmitted by the second decision layer at a second time interval, and the method further includes: The first decision layer transmits an eighth heartbeat instruction to the second decision layer in response to the seventh heartbeat instruction, and the second decision layer obtains the time of the eighth heartbeat instruction as the starting time of the second time interval.

6. The method according to any one of claims 1 to 3 and 5, characterized in that The first control method is used to control the operating state of the hardware in the hardware layer, including: The first decision layer obtains an operating parameter set from the hardware layer, where the operating parameter set includes operating parameters of part or all of the hardware during the operation of the electronic device; The first decision layer transmits the set of operating parameters to the second decision layer; The second decision layer controls the operating state of the hardware in the hardware layer based on the operating parameter set.

7. The method according to claim 6, characterized in that The second decision layer includes a first performance decision module and a deployment module, the first performance decision module is configured with one or more first performance control algorithms, and the deployment module is configured to deploy a performance control policy generated by the first performance decision module. The electronic device also includes a control system for controlling the hardware in the hardware layer. The second decision layer controls the operating state of the hardware in the hardware layer based on the operating parameter set, including: The first performance decision module calls at least one first performance control algorithm, processes all operating parameters in the operating parameter set by the at least one first performance control algorithm, and obtains a first performance control strategy for the electronic device; The deployment module generates a control command based on the first performance control strategy and transmits the control command to the control system; The control system controls the operating status of the hardware in the hardware layer based on the control command.

8. The method according to claim 6, characterized in that The hardware layer includes a controller at least for obtaining operating parameters of first hardware in the hardware layer, and the first decision layer obtains an operating parameter set from the hardware layer, including: An operating parameter of a first hardware from the controller is obtained, and an operating parameter of a second hardware from the hardware layer is obtained.

9. The method according to claim 6, characterized in that The first decision layer includes a second performance decision module, the second performance decision module is configured with a second performance control algorithm, and the second control method is used to control the operating state of the hardware in the hardware layer, including: The second performance decision module calls the second performance control algorithm, processes part of the operating parameters in the operating parameter set by the second performance control algorithm, and obtains a second performance control strategy for the electronic device; The first decision layer controls the operating status of the hardware in the hardware layer based on the second performance control strategy.

10. The method according to any one of claims 1-3, 5, 7-9, characterized in that When the first decision layer determines that the communication between the hardware layer and the second decision layer is normal, the first decision layer instructs to control the operating state of the hardware in the hardware layer using a first control method, including: When the first decision layer determines that the communication between the hardware layer and the second decision layer is normal and the temperature of the electronic device is lower than a first temperature threshold, the first decision layer instructs to control the operating status of the hardware in the hardware layer using a first control method.

11. The method according to any one of claims 1-3, 5, 7-9, characterized in that When the first decision layer determines that the communication between the hardware layer and the second decision layer is abnormal, the first decision layer instructs to use a second control method to control the operating state of the hardware in the hardware layer, including: When the first decision layer determines that the communication between the hardware layer and the second decision layer is abnormal and the temperature of the electronic device is lower than a first temperature threshold, the first decision layer instructs to use a second control method to control the operating status of the hardware in the hardware layer.

12. The method according to claim 10, characterized in that The method further comprises: When the first decision layer determines that the temperature of the electronic device is higher than the second temperature threshold, the first decision layer instructs the use of a third control method to control the operating status of the hardware in the hardware layer; wherein, the second temperature threshold is greater than or equal to the first temperature threshold, and in the third control method, the first decision layer and the second decision layer do not participate in the control of the operating status of the hardware in the hardware layer.

13. An electronic device, characterized in that: The electronic device includes: one or more processors and a memory; the memory is coupled to the one or more processors, the memory is used to store computer program code, the computer program code includes computer instructions, and the one or more processors call the computer instructions to enable the electronic device to execute the method as described in any one of claims 1 to 12.

14. A chip system, characterized in that: The chip system is applied to an electronic device, and the chip system includes one or more processors, and the one or more processors are used to call computer instructions so that the electronic device executes the method as described in any one of claims 1 to 12.

15. A computer-readable storage medium, characterized in that The computer-readable storage medium comprises computer instructions, and when the computer instructions are executed on an electronic device, the electronic device is caused to perform the method according to any one of claims 1 to 12.

16. A computer program product, characterized in that The computer program product comprises a computer program code, and when the computer program code is run on an electronic device, the electronic device is caused to perform the method according to any one of claims 1 to 12.

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