Portable high computing power product and information processing method

Abstract

The present application relates to a portable high-computing power product and information processing method, the high-computing power product includes a conversion chip, an NPU chip, a Type-C interface and a cooling fan, wherein: the Type-C interface is connected to the conversion chip, used to connect an external terminal, and transmit the USB signal sent by the external terminal to the conversion chip; the conversion chip is connected to the NPU chip, used to convert the USB signal into a PCIE signal, and transmit the PCIE signal to the NPU chip; the NPU chip is used to process the PCIE signal; the cooling fan is used to dissipate heat for the NPU chip. With the high-computing power product of the present application, there is no need to disassemble the main device, which effectively reduces the complexity of product use.

Description

Technical Field

[0001] The present application relates to the field of chip technology, and in particular to a portable high-computing power product and an information processing method. Background Art

[0002] The use environment of traditional gold finger PCIE computing power cards is limited. They can usually only be installed in large devices with PCIE card slots. For small devices such as laptops and microcomputers, gold finger PCIE computing power cards cannot be used directly. Moreover, traditional gold finger PCIE computing power cards need to be disassembled and assembled before use. Once used in combination, if you want to transfer them to other products for use, you need to disassemble and reassemble them, which is complicated and increases the time cost of installation and disassembly. Summary of the invention

[0003] Based on this, it is necessary to provide a portable high-computing power product and information processing method that does not require disassembly of the main device, thereby effectively reducing the complexity of product use.

[0004] A portable high-computing product, comprising: a conversion chip, an NPU chip, a Type-C interface and a cooling fan, wherein:

[0005] The Type-C interface is connected to the conversion chip and is used to connect to an external terminal and transmit the USB signal sent by the external terminal to the conversion chip;

[0006] The conversion chip is connected to the NPU chip, and is used to convert the USB signal into a PCIE signal, and transmit the PCIE signal to the NPU chip;

[0007] The NPU chip is used to process the PCIE signal;

[0008] The cooling fan is used to dissipate heat for the NPU chip.

[0009] In one of the embodiments, the number of the NPU chips is n, where n is a positive integer greater than or equal to 1; when n≥2, the n NPU chips are connected to each other using a HCCS interface.

[0010] In one of the embodiments, the number of the cooling fans is the same as the number of the NPU chips;

[0011] Each of the cooling fans is respectively arranged near the corresponding NPU chip position for heat dissipation.

[0012] In one of the embodiments, the conversion chip is connected to one of the n NPU chips via a PCIE GEN4×4 interface.

[0013] In one embodiment, an external power supply interface is included, wherein:

[0014] The external power supply interface is used to provide power to the conversion chip, the NPU chip and the cooling fan after the external power supply is turned on.

[0015] In one embodiment, the rated input power of the external power interface is 240 watts, the rated input voltage is 20 volts, and the rated input current is 12 amperes.

[0016] In one embodiment, a FAN interface is included, wherein:

[0017] The FAN interface is an interface for connecting the cooling fan and is connected to the conversion chip via a pulse width modulation circuit.

[0018] In one embodiment, a PCIE memory is included, wherein:

[0019] The conversion chip is used to transmit the PCIE signal to the PCIE memory when the PCIE signal is a read-write signal, or to transmit the PCIE signal to the NPU chip when the PCIE signal is a non-read-write signal;

[0020] The PCIE memory is used to read and write data based on the PCIE signal of the read and write type;

[0021] The NPU chip is used to process information of the non-read and write PCIE signals.

[0022] In one embodiment, the NPU chip has on-chip memory, wherein:

[0023] The on-chip memory is used to cache the data generated by the NPU chip during information processing or the PCIE signal.

[0024] In one embodiment, the external terminal includes at least one of a notebook, a desktop, a microcomputer or a server.

[0025] An information processing method is applied to the high computing power product described in the above embodiment, and the method includes:

[0026] Receive USB signals carrying media content;

[0027] Convert the USB signal into a PCIE signal;

[0028] The core of the NPU chip is called based on the PCIE signal, so as to use the core to perform a corresponding information processing process based on the PCIE signal.

[0029] The above-mentioned portable high-computing power product and information processing method include a conversion chip, an NPU chip, a Type-C interface and a cooling fan. By connecting the conversion chip with the Type-C interface and the NPU chip, it is connected to an external terminal (i.e., a host device) through the Type-C interface, and the USB signal sent by the external terminal is transmitted to the conversion chip. The conversion chip can convert the USB signal into a PCIE signal, so the NPU chip processes the PCIE signal, so there is no need to disassemble the external terminal, plug and play, and no installation time is required; in addition, considering the use of the Type-C interface to connect to external devices, when it is not needed, the data cable inserted into the Type-C interface can be directly unplugged without wasting disassembly time; finally, considering the heat generation of high-computing power products, a cooling fan is used to dissipate the heat for the conversion chip, which can effectively control the product temperature to avoid overheating problems. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0031] Figure 1 A diagram of an application environment of a portable high-computing-power product in one embodiment;

[0032] Figure 2 A schematic diagram of the structure of a high computing power product in an embodiment;

[0033] Figure 3 A schematic diagram of the structure of a high computing power product in another embodiment;

[0034] Figure 4 A schematic diagram of the structure of a switch device of a PWM circuit in an embodiment;

[0035] Figure 5 A schematic diagram of a waveform output corresponding to when the voltage of the input signal in the embodiment is greater than or less than the reference voltage;

[0036] Figure 6 A schematic diagram of the structure of a high computing power product in another embodiment;

[0037] Figure 7 This is a schematic diagram of the appearance of a high computing power product in one embodiment;

[0038] Figure 8 The figure is a flowchart of an information processing method in one embodiment. DETAILED DESCRIPTION

[0039] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0040] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0041] It can be understood that the “connection” in the following embodiments should be understood as “electrical connection”, “communication connection”, etc. if the connected circuits, modules, components, etc. have electrical signals or data transmission between each other.

[0042] It can be understood that “at least one” means one or more, “plurality” means two or more, and “at least a portion of an element” means a part or all of an element.

[0043] It should also be understood that the terms "include / comprise" or "have" etc. specify the existence of stated features, wholes, steps, operations, components, parts or combinations thereof, but do not exclude the possibility of the existence or addition of one or more other features, wholes, steps, operations, components, parts or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the relevant listed items.

[0044] The portable high computing power product provided in the embodiments of the present application can be applied to Figure 1 In the application environment shown. The application environment includes a portable high-computing product 102, a notebook 104, a server 106, and a desktop 108. That is to say, the high-computing product 102 of the present application can be applied to the notebook 104, the server 106, the desktop 108, and other devices that require high computing power. For example, when a user uses a notebook 104, a server 106, or a desktop 108 for model training or reasoning, the high-computing product 102 of the present application can be connected through a data cable of a Type-C interface, thereby providing a powerful computing power for the notebook 104, the server 106, or the desktop 108, thereby effectively improving the rate of model training or reasoning.

[0045] It should be pointed out that in addition to the notebook 104, server 106 and desktop 108 involved in the above-mentioned application environment, the high computing power product 102 of the present application can also be applied to microcomputers and other small electronic devices that require high computing power.

[0046] like Figure 2 As shown, the portable high computing power product provided by the present application includes a conversion chip 202, an NPU chip 204, a Type-C interface 206 and a cooling fan 208, wherein:

[0047] The Type-C interface 206 is connected to the conversion chip 202 and is used to connect to an external terminal and transmit the USB signal sent by the external terminal to the conversion chip 202;

[0048] The conversion chip 202 is connected to the NPU chip 204 and is used to convert the USB signal into a PCIE signal and transmit the PCIE signal to the NPU chip 204;

[0049] NPU chip 204, used for processing PCIE signals;

[0050] The cooling fan 208 is used to dissipate heat for the NPU chip 204 .

[0051] The USB signal may be a USB4 signal. USB4 (Universal Serial Bus Generation 4) is a high-speed data transmission interface standard that aims to combine multiple protocols into a single physical interface to achieve a higher transmission speed. The USB4 signal may be a computer signal of a high-speed data transmission interface standard, and the USB4 signal may be converted by the conversion chip 202 to obtain a PCIE signal that can be recognized by the NPU chip 204.

[0052] The external terminal (i.e., the main device) may include at least one of a notebook, a desktop, a microcomputer, or a server. The external terminal may have a USB4.0 interface, so that the connection between the external terminal and the high-computing-power product can be achieved through a data cable, that is, one end of the data cable is a USB4.0 connector for connecting to an external device, and the other end is a Type-C connector for connecting to a high-computing-power product; in addition, the external terminal may have a Thunderbolt port, such as Mac devices usually use a Thunderbolt port, so that a data cable with a Thunderbolt connector at one end and a Type-C connector at the other end can be used to achieve the connection between the external terminal and the high-computing-power product. At this time, the external terminal sends a Thunderbolt signal (i.e., the signal corresponding to the Thunderbolt port), and the conversion chip 202 can convert the Thunderbolt signal into a PCIE signal.

[0053] The NPU (Neural Processing Unit) chip 204 may be a microprocessor for processing neural network calculations, and is mainly used in the field of AI (Artificial Intelligence), such as target tracking based on deep learning, face recognition, and application scenarios such as text images and text videos based on large language models.

[0054] For example, when using the high computing power product of the present application (hereinafter referred to as this product), a TYPE-C USB4.0 data cable is used to connect this product to the HOST device. When this product is in EP (EndPoint) mode only, this product belongs to the Device device, waiting for the communication connection of the HOST device. After the communication connection is completed, the HOST device transmits the USB4 signal to the conversion chip 202 through the Type-C interface 206. The conversion chip 202 converts the USB4 signal into a PCIE signal, and then transmits the PCIE signal to the NPU chip 204. The NPU chip 204 controls the PCIE signal to call the kernel and perform corresponding information processing to achieve the purpose of improving computing power and enhancing performance. In addition, the cooling fan 208 can start to dissipate heat when the temperature of the NPU chip 204 reaches the preset temperature. For example, assuming that the USB4 signal sent by the HOST device is a face recognition signal carrying an image, after being converted into a PCIE signal and the NPU chip 204 receives the PCIE signal, the NPU chip 204 extracts facial features from the image, and then performs face recognition based on the facial features, thereby quickly realizing the face recognition process.

[0055] Among them, in EP mode, the type value in the PCIE configuration header is 0. This product plays the role of an endpoint or a slave, and can be responsible for receiving and processing read and write signals (i.e., read and write signals) and data processing signals (i.e., non-read and write signals) from the root endpoint or other devices.

[0056] The host device (i.e., HOST device) can be a computer that provides services in the network, such as a laptop, desktop, microcomputer, or server. The device (i.e., slave device) can refer to the high-computing product applied for. In EP mode, the external device is the host device, and this product is the slave device.

[0057] PCIE (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard and an interface standard for connecting high-speed components. PCIE signals are high-speed serial computer expansion bus standard signals, mainly including data signals and auxiliary signals. The data signals are mainly composed of different Lanes, and each Lane contains a set of data transmission differential signals and a set of data reception differential signals. Common PCIE ×1, PCIE ×4, PCIE ×8 and PCIE ×16 represent 1, 4, 8 and 16 Lanes respectively. These Lanes support full-duplex communication, and each Lane contains two pairs of differential signals, one pair for sending data and one pair for receiving data.

[0058] In the above embodiment, the product includes a conversion chip, an NPU chip, a Type-C interface and a cooling fan. The conversion chip is connected to the Type-C interface and the NPU chip, thereby connecting to an external terminal (i.e., a host device) through the Type-C interface, and the USB signal sent by the external terminal is transmitted to the conversion chip. The conversion chip can convert the USB signal into a PCIE signal, so the NPU chip processes the PCIE signal, so there is no need to disassemble the external terminal, plug and play, and no installation time is required; in addition, considering the use of the Type-C interface to connect to external devices, when it is not needed, the data cable inserted into the Type-C interface can be directly unplugged without wasting disassembly time; finally, considering the heat generation of high-computing power products, a cooling fan is used to dissipate the heat for the conversion chip, which can effectively control the product temperature to avoid overheating problems.

[0059] In one embodiment, the number of NPU chips 204 may be n, where n is a positive integer greater than or equal to 1; when n≥2, the n NPU chips 204 are connected using HCCS interfaces, such as Figure 3 As shown, Figure 3 Two NPU chips 204 are shown in the figure; by setting up multiple NPU chips 204, the computing power of this product can be effectively improved. For example, in the process of model training, such as training a network model or a generative model for multi-target tracking, multiple NPU chips 204 are used for parallel processing, which can greatly shorten the training time of the model; in particular, for online model training, using multiple NPU chips 204 for parallel processing can meet application scenarios with high immediacy requirements.

[0060] In one embodiment, the number of cooling fans 208 may be one or more. When the number of NPU chips 204 is multiple, the number of cooling fans 208 may be the same as the number of NPU chips 204. Each cooling fan 208 may be respectively arranged near the corresponding NPU chip 204 for heat dissipation, so that when the temperature of each NPU chip 204 rises, the heat can be quickly dissipated.

[0061] In one embodiment, the conversion chip 202 is connected to one of the n NPU chips 204 through a PCIE GEN4×4 interface. Considering that the n NPU chips 204 are connected using an HCCS interface, other NPU chips also achieve connection with the conversion chip 202. For example, when n=2, the NPU chip 204 includes an NPU chip 1 and an NPU chip 2. Figure 3 As shown, the conversion chip 202 is connected to the NPU chip 1 via the PCIE GEN4×4 interface. Since the NPU chip 1 and the NPU chip 2 are connected via the HCCS interface, the NPU chip 2 is also connected to the conversion chip 202 .

[0062] In one embodiment, the product further includes an external power interface 210, wherein the external power interface 210 is used to provide power to the conversion chip 202, the NPU chip 204 and the cooling fan 208 after the external power is turned on.

[0063] The rated input power of the external power interface 210 may be 240 watts, the rated input voltage may be 20 volts, and the rated input current may be 12 amperes.

[0064] In addition, the external power interface 210 can be connected to the corresponding NPU chip 204 through the DCDC power module, the main power supply, and PMU1 and PMU2 respectively, so that after the external power supply is turned on through the external power interface 210, power is provided to the conversion chip 202, the NPU chip 204 and the cooling fan 208.

[0065] The DCDC power module is a DC-DC converter module. The main power supply can be a 3.8V power supply. PMU1 and PMU2 are power management units for managing the corresponding NPU chip 204.

[0066] In one embodiment, the product further includes a FAN interface, wherein the FAN interface is an interface for connecting the cooling fan 208 and is connected to the conversion chip 202 via a pulse width modulation circuit.

[0067] Among them, the pulse width modulation circuit (Pulse Width Modulation, PWM) can be used to adjust the pulse width of the pulse signal, including but not limited to adjusting the period and duty cycle of the pulse signal. It can be implemented through a PWM controller integrated in the NPU chip 204, a microcontroller or a DSP (Digital Signal Processor) chip, or it can be implemented using discrete devices.

[0068] The FAN interface may be an interface for connecting the cooling fan 208, such as Figure 3 As shown, it includes two interfaces, FAN1 and FAN2, where the numbers 1 and 2 represent two different FAN interfaces. It should be noted that the number of FAN interfaces is the same as the number of cooling fans, and the number of cooling fans 208 and the number of NPU chips 204 can be the same.

[0069] Specifically, the PWM circuit may include a switch device, one end of which may be used to receive an input electrical signal. The switch state of the switch device is adjusted according to the voltage of the input electrical signal, so that the voltage at the other end of the switch device changes, thereby realizing the output of a pulse signal. By adjusting the input electrical signal, the on-time and off-time of the switch device can be changed, thereby realizing adjustable pulse width.

[0070] In one example, see Figure 4 , the switching device may be a power amplifier. The input electrical signal may be input from the positive input terminal of the power amplifier, the negative input terminal of the power amplifier may be used to connect a reference power supply, and the output terminal may be used to output a pulse signal. The reference power supply is used to provide a reference voltage. In this example, the reference power supply may be a sawtooth wave generator; in another example, the reference power supply may be a DC power supply.

[0071] like Figure 5 As shown, the input electrical signal is x(t). When the voltage of the input electrical signal is greater than the reference voltage, the output end of the power amplifier outputs a high level; when the voltage of the input electrical signal is less than the reference voltage, the output end of the power amplifier outputs a low level. By adjusting the waveform of the input electrical signal and / or the waveform of the reference voltage, the pulse width of the pulse signal can be adjusted. Furthermore, by modulating the rectangular wave pulse signal output by the PWM circuit, a pulse of a corresponding waveform can be output, including but not limited to a triangular wave, a rectangular wave, and a sawtooth wave.

[0072] In one embodiment, the NPU chip 204 may have an on-chip memory, wherein: the on-chip memory is used to cache data generated by the NPU chip 204 during information processing or PCIE signals.

[0073] The on-chip memory may be integrated on the NPU chip 204, or may be independently provided in the product.

[0074] For example, during the model training process, the computer can transfer the training set (such as the images required for training) to the on-chip memory through the Type-C interface 206 of this product for caching, so that when needed, it can be read from the on-chip memory for model training.

[0075] In one embodiment, in addition to the NPU chip 204, a PCIE memory 212 for data storage can also be provided in this product. Therefore, this product can not only provide high computing power in AI scenarios, but also be used to store data, which greatly improves the purpose of this product. Specifically, Figure 6 As shown, the product may further include a PCIE memory 212, wherein: a conversion chip 202 is used to transmit the PCIE signal to the PCIE memory 212 when the PCIE signal is a read-write signal, or to transmit the PCIE signal to the NPU chip 204 when the PCIE signal is a non-read-write signal;

[0076] PCIE memory 212, used for reading and writing data based on PCIE signals of read and write type;

[0077] The NPU chip 204 is used to process information of non-read and non-write PCIE signals.

[0078] Among them, this product may include a PCIE slot for plugging and unplugging the PCIE memory 212, which is connected to the conversion chip 202; in addition, this product may not require a PCIE slot, similar to the NPU chip 204 and the conversion chip 202 being directly connected through the PCIE GEN4×4 interface.

[0079] The PCIE memory 212 may be a memory with a PCIE interface, such as a memory card or hard disk with a PCIE interface. The memory card or hard disk may be a solid-state memory card or solid-state hard disk, or a non-solid-state memory card or non-solid-state hard disk.

[0080] For example, when using this product, a TYPE-C USB4.0 data cable is used to connect this product to a HOST device. When this product is in EP-only mode, this product belongs to a Device device, waiting for the communication connection of the HOST device. After the communication connection is completed, the HOST device transmits the USB4 signal to the conversion chip 202 through the Type-C interface 206. The conversion chip 202 converts the USB4 signal into a PCIE signal, and then determines whether the PCIE signal is a read-write signal or a non-read-write signal. If it is a read-write signal, the PCIE signal is sent to the PCIE memory 212 to store the data in the PCIE signal; if it is a non-read-write signal, the PCIE signal is sent to the NPU chip 204, so that the NPU chip 204 controls the PCIE signal to call the kernel and perform corresponding information processing to achieve the purpose of improving computing power and enhancing performance.

[0081] For example, assuming that the USB4 signal sent by the HOST device is a face recognition signal carrying an image, after being converted into a PCIE signal, since the PCIE signal is a face recognition signal, that is, a non-read-write signal, at this time, the PCIE signal is transmitted to the NPU chip 204, and the NPU chip 204 extracts facial features from the image, and then performs face recognition based on the facial features, thereby quickly realizing the face recognition process. In addition, assuming that the USB4 signal sent by the HOST device is a write signal carrying an image, after being converted into a PCIE signal, since the PCIE signal is a write signal, that is, a read-write signal, at this time, the PCIE signal is transmitted to the PCIE memory 212, thereby storing the carried image.

[0082] In one embodiment, the components (except the Type-C interface and the cooling fan) in the high computing power products of the above embodiments can be integrated on a motherboard, and the motherboard is placed in a detachable box with cooling holes, so as to obtain a portable high computing power product, such as Figure 7 As shown, the product is small and easy to carry, and there is no need to disassemble the HOST device, it is plug and play.

[0083] In one embodiment, Figure 8 As shown, an information processing method is provided, which is applied to the high computing power product described in the above embodiment, and the method includes:

[0084] S802, receiving a USB signal carrying media content.

[0085] The media content may be at least one of text, image or video. The USB signal may be a USB4 signal, which may specifically include a read-write signal or a non-read-write signal.

[0086] In one embodiment, when the high-computing-power product is in EP mode, a USB signal carrying media content is transmitted through the Type-C interface, and then the USB signal is transmitted to a conversion chip.

[0087] S804, converting the USB signal into a PCIE signal.

[0088] Among them, PCIE (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard and an interface standard for connecting high-speed components. PCIE signals are signals of the high-speed serial computer expansion bus standard.

[0089] In one embodiment, the USB signal is converted into a PCIE signal through a conversion chip; in addition, the conversion chip can also determine whether the PCIE signal is a read-write signal or a non-read-write signal; if it is a non-read-write signal, the PCIE signal is transmitted to the NPU chip; if it is a read-write signal, the PCIE signal is transmitted to the PCIE memory.

[0090] S806, calling the kernel of the NPU chip based on the PCIE signal, so as to use the kernel to perform a corresponding information processing process based on the PCIE signal.

[0091] For example, assuming that the USB signal sent by the HOST device is a face recognition signal carrying an image, after being converted into a PCIE signal and the NPU chip receives the PCIE signal, the NPU chip uses the core to implement the face recognition process, such as extracting facial features from the image, and then performing face recognition based on the facial features, thereby quickly implementing the face recognition process.

[0092] In one embodiment, if the USB signal is a write signal carrying an image, and the corresponding PCIE signal is a read-write signal, the PCIE signal is transmitted to the PCIE memory, so that the image is stored in the PCIE memory.

[0093] In the above embodiment, a portable high-computing power product is provided, including a conversion chip, an NPU chip, a Type-C interface and a cooling fan. By connecting the conversion chip with the Type-C interface and the NPU chip, a USB signal sent by an external terminal is received through the Type-C interface and transmitted to the conversion chip. The conversion chip can convert the USB signal into a PCIE signal, so the NPU chip processes the PCIE signal, so there is no need to disassemble the external terminal, plug and play, and no installation time is required; in addition, considering the use of the Type-C interface to connect to external devices, when it is not needed, the data cable inserted into the Type-C interface can be directly unplugged without wasting disassembly time; finally, considering the heat generation of high-computing power products, a cooling fan is used to dissipate the heat for the conversion chip, which can effectively control the product temperature to avoid overheating problems.

[0094] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic description of the above terms does not necessarily refer to the same embodiment or example.

[0095] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0096] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the present application. It should be noted that, for a person of ordinary skill in the art, several modifications and improvements may be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A portable high-computing product, characterized in that: It includes a Type-C interface, a cooling fan, a conversion chip integrated on a mainboard, and n NPU chips. The mainboard is placed in a detachable box with cooling holes, wherein: The Type-C interface is connected to the conversion chip and is used to connect to an external terminal. In the EP-only mode, the external terminal is a master device and the high-computing-power product is a slave device, waiting for the communication connection of the external terminal and transmitting the USB signal sent by the external terminal to the conversion chip; the external terminal is a notebook or desktop computer providing services in the network and has a USB4 interface; the connection between the external device and the high-computing-power product is achieved through a data cable, and the two ends of the data cable are a USB4 connector and a Type-C connector respectively, the USB4 connector is used to connect to the external terminal, and the Type-C connector is used to connect to the high-computing-power product; the USB signal is a USB4 signal; The conversion chip is connected to one of the n NPU chips through a PCIE GEN4×4 interface, and is used to convert the USB signal into a PCIE signal and transmit the PCIE signal to the NPU chip; n is a positive integer greater than or equal to 2, and the n NPU chips are connected using a HCCS interface; The NPU chip is a microprocessor in the field of artificial intelligence that processes neural network calculations and is used to process information on the PCIE signal, including target tracking based on deep learning, face recognition, and Wensheng images and videos based on large language models; The cooling fan is used to dissipate heat for the NPU chip.

2. The product according to claim 1, characterized in that The number of the cooling fans is the same as the number of the NPU chips; Each of the cooling fans is respectively arranged near the corresponding NPU chip position for heat dissipation.

3. The product according to claim 1, characterized in that Includes external power supply interface, including: The external power supply interface is used to provide power to the conversion chip, the NPU chip and the cooling fan after the external power supply is turned on.

4. The product according to claim 1, characterized in that Includes FAN interface, including: The FAN interface is an interface for connecting the cooling fan and is connected to the conversion chip via a pulse width modulation circuit.

5. The product according to claim 4, characterized in that The pulse width modulation circuit is used to adjust the period and duty cycle of the pulse signal.

6. The product according to any one of claims 1 to 5, characterized in that The NPU chip has on-chip memory, including: The on-chip memory is used to cache the data generated by the NPU chip during information processing or the PCIE signal.

7. The product according to claim 6, characterized in that The on-chip memory is also used to cache the training set transmitted through the Type-C interface during the model training process, so that it can be directly read for model training when needed.

8. The product according to any one of claims 1 to 5, characterized in that Including PCIE memory, including: The conversion chip is used to transmit the PCIE signal to the PCIE memory when the PCIE signal is a read-write signal, or to transmit the PCIE signal to the NPU chip when the PCIE signal is a non-read-write signal; The PCIE memory is used to read and write data based on the PCIE signal of the read and write type; The NPU chip is used to process information of the non-read and write PCIE signals.

9. The product according to any one of claims 1 to 5, characterized in that The external terminal also has a lightning port, the external terminal is connected via a lightning connector of a data cable, and the high computing power product is connected via a Type-C connector of the data cable; The conversion chip is also used to convert the lightning signal sent by the external terminal into a PCIE signal.

10. An information processing method, characterized in that: Applied to the high computing power product according to any one of claims 1 to 9, the method comprises: Receive USB signals carrying media content; Convert the USB signal into a PCIE signal; The core of the NPU chip is called based on the PCIE signal, so as to use the core to perform a corresponding information processing process based on the PCIE signal.

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