Semiconductor package structure

Abstract

The application provides a semiconductor packaging structure. The semiconductor packaging structure comprises a semiconductor substrate, a printed circuit board and a molded package, the printed circuit board is located on a part of the surface of the molded package, the molded package has a first accommodating groove, and the printed circuit board covers the first accommodating groove; a semiconductor laser chip is located on one side of the exposed surface of the printed circuit board or one side of the exposed surface of the molded package, and the semiconductor laser chip is electrically connected with the printed circuit board; a driving chip is located in the first accommodating groove and is electrically connected with the printed circuit board, wherein the driving chip completely fills the first accommodating groove. According to the application, the driving chip is located in the first accommodating groove of the molded package, so that the driving chip and the molded package have a common occupied area in the semiconductor packaging structure, thereby achieving the purpose of reducing the size of the semiconductor packaging structure.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuits, and in particular, to a semiconductor packaging structure. BACKGROUND

[0002] In a classic time-of-flight measurement, the principle of direct time-of-flight (D-ToF, hereinafter referred to as D-ToF) is relatively direct, that is, a light pulse is directly emitted, and then the time interval between the reflected light pulse and the emitted light pulse is measured to obtain the time of flight of the light, which is usually used in a single-point ranging system.

[0003] In a conventional packaging method, the D-ToF structure has a high heat dissipation requirement, and is usually packaged with a ceramic substrate. In the D-ToF structure, the chips and circuit devices are exposed in space, which leads to an insecure packaging and a large size of the packaging structure.

[0004] Therefore, there is an urgent need for a semiconductor packaging structure that can at least reduce the size of the chip packaging. SUMMARY

[0005] The main purpose of the present application is to provide a semiconductor packaging structure to solve the problem of a large size of the packaging structure in the prior art.

[0006] In order to achieve the above-mentioned purpose, according to one aspect of the present application, a semiconductor packaging structure is provided, comprising: a semiconductor substrate, comprising a printed circuit board and a molded package, the printed circuit board being located on a part of the surface of the molded package, and the molded package having a first accommodating groove therein, and the printed circuit board covering the first accommodating groove; a semiconductor laser chip, located on one side of the exposed surface of the printed circuit board or on one side of the exposed surface of the molded package, and the semiconductor laser chip being electrically connected to the printed circuit board; a driving chip located in the first accommodating groove and electrically connected to the printed circuit board, wherein the driving chip completely fills the first accommodating groove.

[0007] Further, the semiconductor laser chip has a first projection on the molded package, the driving chip has a second projection on the molded package, and the first projection and the second projection do not overlap.

[0008] Further, it further comprises: a metal substrate located between the semiconductor laser chip and the printed circuit board or between the semiconductor laser chip and the molded package, wherein, in the case that the semiconductor laser chip is located on one side of the exposed surface of the printed circuit board, the metal substrate is located between the semiconductor laser chip and the printed circuit board, and in the case that the semiconductor laser chip is located on one side of the exposed surface of the molded package, the metal substrate is located between the semiconductor laser chip and the molded package.

[0009] Further, the plurality of second accommodating grooves are formed in the molding package, the printed circuit board covers the plurality of second accommodating grooves, and the semiconductor package structure further comprises: a plurality of first electronic elements located in the plurality of second accommodating grooves, each of the first electronic elements being electrically connected to the printed circuit board, the plurality of first electronic elements corresponding to the plurality of second accommodating grooves in one-to-one correspondence, each of the first electronic elements completely filling each of the second accommodating grooves, and the semiconductor laser chip having a first projection on the molding package, each of the first electronic elements having a third projection on the molding package, and the first projection and the third projection not overlapping.

[0010] Further, the semiconductor package structure further comprises: a first support portion located on the exposed surface of the printed circuit board and surrounding the semiconductor laser chip; and a first super-lens located on a side of the first support portion away from the printed circuit board, the first super-lens, the first support portion, and the semiconductor substrate forming a first sealed cavity, and the semiconductor laser chip being located in the first sealed cavity.

[0011] Further, the semiconductor package structure further comprises: a photodetector chip located on the exposed surface of the printed circuit board and spaced apart from the semiconductor laser chip, wherein, in the case that the semiconductor package structure comprises the first support portion, the first support portion is spaced apart from the photodetector chip.

[0012] Further, a straight line passing through the center of the photodetector chip and parallel to the exposed surface of the printed circuit board is a first center line, a straight line passing through the center of the semiconductor laser chip and parallel to the exposed surface of the printed circuit board is a second center line, and the first center line and the second center line are collinear.

[0013] Further, the semiconductor package structure further comprises: a second support portion located on the printed circuit board and surrounding the photodetector chip; and a second super-lens located on a side of the second support portion away from the printed circuit board, the second support portion, the second super-lens, and the semiconductor substrate forming a second sealed cavity, and the photodetector chip being located in the second sealed cavity.

[0014] Further, the plurality of third accommodating grooves are formed in the molding package, the printed circuit board covers the plurality of third accommodating grooves, and the semiconductor package structure further comprises: a plurality of second electronic elements located in the plurality of third accommodating grooves, each of the second electronic elements being electrically connected to the printed circuit board, the plurality of second electronic elements corresponding to the plurality of third accommodating grooves in one-to-one correspondence, each of the second electronic elements completely filling each of the third accommodating grooves, and the photodetector chip having a fourth projection on the molding package, each of the second electronic elements having a fifth projection on the molding package, and the fourth projection and the fifth projection not overlapping.

[0015] Further, the semiconductor laser chip comprises a vertical cavity surface emitting laser, and the photodetector chip comprises a single electron avalanche diode.

[0016] The technical scheme of the present application can quickly lead the heat generated by the semiconductor devices in the semiconductor packaging structure out, and meanwhile, the packaging stability of the driving chip in the semiconductor packaging structure is improved. The semiconductor packaging structure comprises a semiconductor substrate, a semiconductor laser chip and a driving chip. The molding package is used as the heat dissipation substrate in the semiconductor packaging structure, and the printed circuit board is located on part of the surface of the molding package. Since the heat dissipation coefficient of the molding package is greater than that of the printed circuit board, the heat generated by the semiconductor devices on the printed circuit board can be led out to prevent the semiconductor devices from being damaged by the heat. The semiconductor laser chip electrically connected with the printed circuit board is located on the exposed surface of the printed circuit board away from the molding package and / or the exposed surface of the molding package. The driving chip is located in the first accommodating groove in the molding package and contacts the printed circuit board. The molding package for packaging the semiconductor devices can cover the driving chip, thereby improving the stability of the driving chip in the semiconductor packaging structure and the packaging strength of the driving chip. Since the driving chip is completely filled in the first accommodating groove in the molding package, the driving chip and the heat dissipation substrate of the semiconductor packaging structure do not occupy different packaging areas in the semiconductor packaging structure, and the driving chip and the molding package have a common occupied area in the semiconductor packaging structure, thereby reducing the size of the semiconductor packaging structure. BRIEF DESCRIPTION OF DRAWINGS

[0017] The accompanying drawings, which form a part of the specification, are included to provide a further understanding of the application and are incorporated herein in conjunction with the description of the application. The embodiments of the present application, illustrated in the drawings and described below, serve to explain embodiments of the present application. These embodiments should not be considered as limiting the present application in any way.

[0018] Figure 1 A cross-sectional structure schematic diagram of one embodiment of the semiconductor packaging structure according to the present application is shown;

[0019] Figure 2 A cross-sectional structure schematic diagram of another embodiment of the semiconductor packaging structure according to the present application is shown;

[0020] Figure 3 A cross-sectional structure schematic diagram of another embodiment of the semiconductor packaging structure according to the present application is shown;

[0021] Figure 4 A projection schematic diagram of the semiconductor laser chip and the photodetector chip on the molding package in another embodiment of the semiconductor packaging structure is shown;

[0022] Figure 5A cross-sectional structure schematic diagram of a semiconductor package structure according to another embodiment of the present application is shown. Figure 3 A cross-sectional structure schematic diagram of a semiconductor package structure according to another embodiment of the present application is shown.

[0023] Figure 6 A cross-sectional structure schematic diagram of a semiconductor package structure according to another embodiment of the present application is shown.

[0024] Figure 7 A cross-sectional structure schematic diagram of a semiconductor package structure according to another embodiment of the present application is shown. Figure 6 A cross-sectional structure schematic diagram of a semiconductor package structure according to another embodiment of the present application is shown.

[0025] Wherein, the above-mentioned drawings include the following reference signs:

[0026] 10, a molding package; 20, a printed circuit board; 30, a semiconductor laser chip; 40, a driving chip; 50, a photoelectric detector chip; 60, a metal base; 70, a first electronic element; 80, a first support part; 90, a first super-lens; 100, a second electronic element; 110, a fixing glue; 120, a second support part; 130, a second super-lens; 140, a first middle line; 150, a second middle line. DETAILED DESCRIPTION

[0027] It should be noted that the embodiments and features of the present application can be combined if there is no conflict. The present application will be described in detail below with reference to the accompanying drawings and embodiments.

[0028] In order to make the technical personnel in the art better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings and embodiments. Obviously, the described embodiments are only a part of the embodiments of the present application, not all. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor should belong to the scope of protection of the present application.

[0029] It should be noted that the terms "first", "second" and the like in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, not necessarily to describe a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not necessarily limit to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0030] As mentioned in the background section, traditional chip packaging structures typically use ceramic substrates for heat dissipation. However, because the chip and circuit components are exposed in this type of packaging, the structure is not robust and is relatively large. To address these technical problems, the inventors of this application provide a semiconductor packaging structure.

[0031] In some alternative implementations, the inventors of this application provide a semiconductor packaging structure, such as... Figure 1 As shown, the semiconductor package structure includes a semiconductor substrate, a semiconductor laser chip 30, and a driver chip 40. The semiconductor substrate includes a printed circuit board 20 and a molded package 10. The printed circuit board 20 is located on a portion of the surface of the molded package 10, and the molded package 10 has a first receiving groove. The printed circuit board 20 covers the first receiving groove. The semiconductor laser chip 30 is located on one side of the exposed surface of the printed circuit board 20 or on one side of the exposed surface of the molded package 10. The driver chip 40 is located in the first receiving groove and is electrically connected to the printed circuit board 20. The driver chip 40 completely fills the first receiving groove.

[0032] Specifically, the printed circuit board 20 can be a flexible printed circuit board, and the molded package 10 can be an epoxy molded package.

[0033] Specifically, since the printed circuit board 20 is located on a portion of the surface of the molded package 10, the semiconductor substrate may include the printed circuit board 20 and the molded package 10 stacked sequentially; or the semiconductor substrate may include a first portion consisting of the printed circuit board 20 and the molded package 10 stacked sequentially, and a second portion consisting only of the molded package 10. It is understood that the first and second portions are interconnected. Therefore, when the semiconductor substrate includes the printed circuit board 20 and the molded package 10 stacked sequentially, the exposed surface is the exposed surface of the printed circuit board 20 away from the molded package 10, and the semiconductor laser chip 30 is located on the exposed surface of the printed circuit board 20 away from the molded package 10. When the semiconductor substrate may include a first portion consisting of the printed circuit board 20 and the molded package 10 stacked sequentially, and a second portion consisting only of the molded package 10, the semiconductor laser chip 30 may be located on the exposed surface of the printed circuit board 20 in the first portion away from the molded package 10, such as... Figure 1 As shown, and / or the aforementioned semiconductor laser chip 30 may be located on the exposed surface of the molded package 10 in the second part that is not covered by the printed circuit board 20, such as...Figure 2 Further, the semiconductor laser chip 30 is electrically connected with the printed circuit board 20. Exemplarily, the semiconductor laser chip 30 can be connected with the printed circuit board 20 by wire bonding, and in the case that the semiconductor laser chip 30 is located on the exposed surface of the molded package 10, the semiconductor laser chip 30 can be further fixed by the fixing glue 110 to achieve the purpose of fixed packaging, and optionally, the fixing glue 110 can be insulating glue.

[0034] Specifically, as shown in Figure 2 The driving chip 40 is in contact with the printed circuit board 20, thereby achieving the electrical connection between the driving chip 40 and the printed circuit board 20, so that the driving chip 40 is used to drive the semiconductor laser chip 30 located on the printed circuit board 20 to emit light. Further, in order to strengthen the stability of the driving chip 40 in the semiconductor packaging structure, the driving chip 40 can be packaged in the molded package 10 to achieve the integration of the driving chip 40 and the molded package 10. Therefore, the molded package 10 has a first accommodating groove corresponding to the driving chip 40, that is, in the case that the driving chip 40 is located in the first accommodating groove, the driving chip 40 completely fills the first accommodating groove, thereby not only reducing the size of the semiconductor packaging structure, but also further strengthening the stability of the semiconductor packaging structure, and because the molded package 10 itself has good heat dissipation effect, the semiconductor packaging structure also has high efficiency.

[0035] Since heat is generated during the operation of the semiconductor device, the existing semiconductor packaging method usually adopts a thermoelectric separation packaging structure. In the above embodiments of the present application, in order to more quickly discharge the heat generated by the semiconductor device in the semiconductor packaging structure while improving the packaging stability of the driving chip 40 in the semiconductor packaging structure, a molded package 10 is used as a heat dissipation substrate in the semiconductor packaging structure, so that the printed circuit board 20 is located on part of the surface of the molded package 10. Optionally, the thermal conductivity of the above molded plastic package can be 2 W / (m·K), and the thermal conductivity of the above printed circuit board can be 0.3 W / (m·K). As can be seen from the above, the molded plastic package has good heat dissipation capacity, so as to achieve the purpose of discharging the heat generated by the semiconductor device on the printed circuit board 20 and preventing the heat from damaging the semiconductor device. Moreover, since the above molded package 10 for packaging the semiconductor device can cover the driving chip 40, the stability of the driving chip 40 in the semiconductor packaging structure is improved. In addition, since the driving chip 40 completely fills the first accommodating groove in the molded package 10, the driving chip 40 and the molded package 10 are integrated, which avoids the additional occupation of the surface area of the printed circuit board 20 by the driving chip 40, thereby reducing the size of the semiconductor packaging structure. Further, since the molded package 10 also has good tensile strength, impact strength, heat resistance, dimensional stability, and processing advantages, etc., the above molded package 10 can increase the flatness and strength of the printed circuit board 20.

[0036] In some optional embodiments, the semiconductor laser chip 30 has a first projection on the molded package 10, and the driving chip 40 has a second projection on the molded package 10. The molded package 10 corresponding to the first projection is a heat area of the semiconductor packaging structure. When the driving chip is located in the molded package corresponding to the heat area, the heat area will affect the performance of the semiconductor device, i.e., the driving chip is prone to thermal drift due to heat, causing electronic signal interference. Therefore, in order to avoid thermal drift of the driving chip and reduce electronic signal interference, the first projection and the second projection are determined so that the first projection and the second projection do not overlap.

[0037] Specifically, in one optional embodiment, the semiconductor package structure includes a semiconductor substrate, a semiconductor laser chip 30 and a driving chip 40, wherein the semiconductor substrate includes a printed circuit board 20 and a molding package 10 stacked together, the semiconductor laser chip 30 is located on a side surface of the printed circuit board 20 away from the molding package 10, the driving chip 40 is located in the molding package 10, the molding package 10 has a first accommodating groove, the driving chip 40 is located in the first accommodating groove and fills the first accommodating groove completely, and the driving chip 40 is electrically connected to the printed circuit board 20. Further, a projection of the semiconductor laser chip 30 on the printed circuit board 20 and a projection of the semiconductor laser chip 30 on the molding package 10 correspond to a first projection, a projection of the driving chip 40 on the molding package 10 corresponds to a second projection, and the first projection and the second projection do not overlap.

[0038] Specifically, in another optional embodiment, the semiconductor substrate includes a first part in which the printed circuit board 20 and the molding package 10 are stacked together and a second part in which only a single-layer molding package 10 without being covered by the printed circuit board 20 is included, the first part and the second part are connected to each other, the semiconductor laser chip 30 is located on an exposed surface of the single-layer molding package 10 without being covered by the printed circuit board 20, the driving chip 40 is located in the molding package 10, the molding package 10 has a first accommodating groove, the driving chip 40 fills the first accommodating groove completely, and the driving chip 40 is electrically connected to the printed circuit board 20. Further, a projection of the semiconductor laser chip 30 on the molding package 10 corresponds to a first projection, a projection of the driving chip 40 on the molding package 10 corresponds to a second projection, and the first projection and the second projection do not overlap.

[0039] Further, in the case where the semiconductor substrate includes a first part in which the printed circuit board 20 and the molding package 10 are stacked together and a second part in which only a single-layer molding package 10 without being covered by the printed circuit board 20 is included, and the first part and the second part are connected to each other, if the semiconductor laser chip 30 includes a plurality of semiconductor laser chips, part of the semiconductor laser chips 30 can be located on a side surface of the printed circuit board 20 away from the molding package 10, and the other part of the semiconductor laser chips 30 can be located on an exposed surface of the single-layer molding package 10 without being covered by the printed circuit board 20.

[0040] In some optional embodiments, in order to make the semiconductor laser chip 30 and the printed circuit board 20 electrically connected, or in order to make the semiconductor laser chip 30 better transfer heat to the molded package 10 and export from the molded package 10, the above semiconductor packaging structure can further comprise a metal base 60, specifically, the metal base 60 can be located between the semiconductor laser chip 30 and the printed circuit board 20, and also can be located between the semiconductor laser chip 30 and the molded package 10. Wherein, in the case that the semiconductor laser chip 30 is located on one side of the exposed surface of the printed circuit board 20, the metal base 60 is located between the semiconductor laser chip 30 and the printed circuit board 20, as shown in FIG. 2A, and in the case that the semiconductor laser chip 30 is located on one side of the exposed surface of the molded package 10, the metal base 60 is located between the semiconductor laser chip 30 and the molded package 10, as shown in FIG. 2B. Figure 1 Figure 2

[0041] Wherein, the material of the above metal base 60 can include but is not limited to copper, gold, silver and the like, the metal base 60 is also used to connect the negative electrode of the semiconductor laser chip 30 with the printed circuit board 20, optionally, the thermal conductivity of the semiconductor laser chip 30 can be 120 W / (m·K), the thermal conductivity of the metal base 60 can be 200 W / (m·K) and above, and the metal base 60 is connected with the printed circuit board 20 or the molded package 10 as a whole metal material, so that the heat of the semiconductor laser chip 30 can be directly transferred to the printed circuit board 20 or the molded package 10, thereby improving the heat dissipation efficiency of the semiconductor laser chip 30, and further improving the heat dissipation efficiency of the semiconductor packaging structure. Optionally, in order to further improve the heat dissipation efficiency of the semiconductor packaging structure, the vertical projection area of the metal base 60 on the molded package 10 is greater than the vertical projection area of the semiconductor laser chip 30 on the molded package 10.

[0042] ​​More specifically, in the semiconductor package structure described above, where the semiconductor substrate includes a printed circuit board 20 and a molded package 10 stacked together, since the semiconductor laser chip 30 is located on the side of the printed circuit board 20 away from the exposed surface of the molded package 10, the metal substrate 60 is located between the semiconductor laser chip 30 and the printed circuit board 20. In the semiconductor package structure described above, where the semiconductor substrate includes a first portion consisting of a printed circuit board 20 and a molded package 10 stacked together, and a second portion consisting only of the molded package 10, with the first and second portions interconnected and the semiconductor laser chip 30 located on the side of the exposed surface of the molded package 10, the metal substrate 60 can be located between the semiconductor laser chip 30 and the printed circuit board 20. Between the printed circuit board 20 and the molded package 10; in the above semiconductor package structure, the semiconductor substrate includes a first part in which the printed circuit board 20 and the molded package 10 are stacked and a second part in which only the molded package 10 is included. The first part and the second part are connected to each other, and the semiconductor laser chip 30 includes a plurality of semiconductor laser chips. When a portion of the semiconductor laser chips 30 is located on the side of the printed circuit board 20 away from the exposed surface of the molded package 10, the aforementioned metal substrate 60 is present between the portion of the semiconductor laser chips 30 and the printed circuit board 20. When another portion of the semiconductor laser chips 30 is located on the side of the exposed surface of the molded package 10, the aforementioned metal substrate 60 is present between the other portion of the semiconductor laser chips 30 and the molded package 10.

[0043] To reduce the package size of semiconductor packaging structures, such as Figure 1 As shown, in some optional embodiments, the molded package 10 has a plurality of second receiving slots, the printed circuit board 20 covers the plurality of second receiving slots, and the semiconductor package structure also includes a plurality of first electronic components 70 located in the plurality of second receiving slots. Each first electronic component 70 is electrically connected to the printed circuit board 20, and the plurality of first electronic components 70 correspond one-to-one with the plurality of second receiving slots. Each first electronic component 70 completely fills each second receiving slot, and the semiconductor laser chip 30 has a first projection on the molded package 10, and each first electronic component 70 has a third projection on the molded package 10. The first projection and the third projection do not overlap.

[0044] In the above embodiment, the projection of the semiconductor laser chip 30 on the molded package 10 is a first projection, and since the semiconductor laser chip 30 generates heat during operation, the region in the molded package 10 corresponding to the first projection of the semiconductor laser chip 30 is a heat region. When an electronic component is located in the heat region, the performance of the electronic component is affected, i.e., the electronic component is prone to thermal drift and other phenomena, which causes electronic signal interference. Therefore, the above electronic component is arranged in the molded package 10 outside the first projection, i.e., the molded package 10 has a plurality of second accommodating grooves, and each second accommodating groove is completely filled with each electronic component, so that the projection of each electronic component in the molded package 10 is a third projection, and the first projection and the third projection do not overlap.

[0045] Specifically, the first electronic component 70 can include a resistance, a capacitance, or an inductance, etc. in the same circuit structure as the semiconductor laser chip 30. Alternatively, the first electronic component 70 can be a packaged electronic component with a certain elasticity. For example, the resistance can be a mixture of metal powder and glass glaze powder, which is printed on the surface of the printed circuit board 20 by silk screen printing, and the resistance completely fills the second accommodating groove in the molded package 10. For example, the capacitance can be a patch capacitor, i.e., a multilayer (laminated or stacked) chip ceramic capacitor, also known as a patch capacitor, a chip capacitor, etc. The ceramic dielectric film with electrodes is stacked in a staggered manner and sintered at a high temperature to form a ceramic chip. Metal layers are formed on both ends of the ceramic chip as external electrodes, thereby forming a structure similar to a monolith. The structure has stronger elasticity relative to the molded package 10, so that the first electronic component 70 with stronger elasticity is packaged in the molded package 10, which further increases the elasticity of the molded package 10, thereby improving the packaging elasticity of the semiconductor packaging structure and improving the reliability of the semiconductor packaging structure.

[0046] Further, as shown in Figure 1 The size of the driving chip 40 is greater than the size of the first electronic component 70, the plurality of first electronic components 70 and the driving chip 40 are arranged at intervals, and the plurality of first electronic components 70 can be distributed around the semiconductor laser chip 30 at intervals, or the plurality of first electronic components 70 and the driving chip 40 can be distributed at intervals on any side of the semiconductor laser chip 30.

[0047] In order to provide a good working environment for the semiconductor laser chip 30, so that the semiconductor laser chip 30 is not affected by the external environment (wherein the environmental influence can be erosion of water, gas, etc.), as shown in Figure 1As shown, in some optional embodiments, the semiconductor package structure can further include a first support portion 80 and a first superlens head 90. The first support portion 80 is located on the exposed surface of the printed circuit board 20 and surrounds the semiconductor laser chip 30. The first superlens head 90 is located on the side of the first support portion 80 away from the printed circuit board 20, and the first superlens head 90, the first support portion 80 and the semiconductor substrate have a first sealed cavity therebetween, and the semiconductor laser chip 30 is located in the first sealed cavity, so that the semiconductor laser chip 30 is isolated from external moisture and the like. Further, since the semiconductor laser chip 30 further includes the first superlens head 90, and since the superlens itself has strong focusing ability, the relative light intensity of the light received by the semiconductor laser chip 30 after the light passes through the first superlens head 90 is also relatively large. In addition, since the distance between the superlens and the semiconductor laser chip 30 can be closer, the size of the semiconductor package structure can be smaller.

[0048] Optionally, the first superlens head 90 can be a multivariate optical element (MOE). Since the unit structure of the first superlens head 90 is usually on the order of half a wavelength, the first superlens head 90 can have a microstructure, which can be arranged in the shape of a cylinder, a square, a rhombic column, etc. Further, by adjusting the shape and size (including height) of the microstructure, the first superlens head 90 can achieve different phase modulations for different regions of light. For example, the height of each microstructure in the first superlens head 90 can be consistent, and the gap between adjacent microstructures can be inconsistent. Further, the gap between adjacent microstructures can be less than the wavelength, so as to achieve diffraction of light. Through diffraction, the light can be adjusted, including adjustment of the phase of the light and / or adjustment of the angle of the light, etc.

[0049] Further, in order to measure and receive the laser emitted by the semiconductor laser chip 30, the semiconductor package structure can further include a photodetector chip 50, which is located on the exposed surface of the printed circuit board 20 and is spaced apart from the semiconductor laser chip 30. Figure 3

[0050] Further, as shown in FIG. 4, the semiconductor package structure can further include a photodetector chip 50, which is located on the exposed surface of the printed circuit board 20 and is spaced apart from the semiconductor laser chip 30. Figure 3 ​As shown, the semiconductor packaging structure in this embodiment may further include a metal substrate 60, located between the semiconductor laser chip 30 and the printed circuit board 20, or between the semiconductor laser chip 30 and the molded package 10. Optionally, the metal substrate 60 may also be located between the photodetector chip 50 and the printed circuit board 20, or between the photodetector chip 50 and the molded package 10. Further, as... Figure 3 As shown, the semiconductor packaging structure in this embodiment may further include a plurality of first electronic components 70, which correspond one-to-one with the plurality of second receiving slots in the molded package 10, and each first electronic component 70 completely fills each corresponding second receiving slot. Further, as... Figure 3 As shown, the semiconductor packaging structure may further include the first support portion 80 and the first superlens head 90, wherein, when the semiconductor packaging structure includes the first support portion 80, the first support portion 80 is disposed at a distance from the photodetector chip 50.

[0051] Optionally, when the semiconductor substrate includes a printed circuit board 20 and a molded package 10 stacked together, the photodetector chip 50 may be located on the side of the printed circuit board 20 away from the exposed surface of the molded package 10 and electrically connected to the printed circuit board 20; or alternatively, when the semiconductor substrate includes a molded package 10 and a printed circuit board 20 located on a portion of the surface of the molded package 10, the photodetector chip 50 may be located on the side of the exposed surface of the molded package 10 and electrically connected to the printed circuit board 20.

[0052] In some alternative implementations, such as Figure 4 As shown, in order to make it easier for the laser emitted by the semiconductor laser chip 30 to be received by the photodetector chip 50 according to a fixed rule, a straight line passing through the center of the photodetector chip 50 and parallel to the exposed surface of the printed circuit board 20 is defined as the first centerline 140, and a straight line passing through the center of the semiconductor laser chip 30 and parallel to the exposed surface of the printed circuit board 20 is defined as the second centerline 150, so that the first centerline 140 and the second centerline 150 are collinear. Optionally, according to this embodiment, the depth sensing efficiency of the system including the semiconductor laser chip 30 and the photodetector chip 50 can also be improved. Furthermore, since the semiconductor laser chip 30 and the photodetector chip 50 are collinearly arranged, the opening of the projection device corresponding to the semiconductor laser chip 30 can also be reduced, thereby reducing the size of the opening of the projection device corresponding to the semiconductor laser chip 30.

[0053] Similarly, in some alternative implementations, such as Figure 3As shown, in order to make the photodetector have a better working interval, the semiconductor packaging structure can further include a second support portion 120 and a second super-lens head 130, wherein the second support portion 120 is located on the printed circuit board 20 and surrounds the photodetector chip 50; the second super-lens head 130 is located on the side of the second support portion 120 away from the printed circuit board 20, and the second support portion 120, the second super-lens head 130 and the semiconductor substrate have a second sealed cavity therebetween, and the photodetector chip 50 is located in the second sealed cavity.

[0054] In the above embodiments, the first sealed cavity and the second sealed cavity are isolated from each other, and optionally, the materials of the first support portion 80 and the second support portion 120 can be a molding material. Optionally, the second super-lens head 130 can be a multi-variable optical element (MOE), wherein the unit structure of the second super-lens head 130 is usually in the order of half a wavelength, and the second super-lens head 130 can have a microstructure, which can be arranged in the shape of a cylinder, a square, a rhombic column and the like, and further, by adjusting the shapes and sizes (including height) of the microstructures, the second super-lens head 130 can achieve different phase modulations for light rays in different regions, and for example, the height of each microstructure in the second super-lens head 130 can be consistent, and the gap between adjacent microstructures is inconsistent. Further, the gap between adjacent microstructures can be less than the wavelength, so as to achieve diffraction of the light rays, and by diffraction, the light rays can be adjusted, including adjusting the phase of the light rays and / or adjusting the angle of the light rays.

[0055] Similarly, in some optional embodiments, as shown in Figure 3 As shown, the semiconductor packaging structure further includes a plurality of second electronic elements 100, in order to reduce the packaging size of the semiconductor packaging structure, the molding package 10 has a plurality of third accommodating grooves, the printed circuit board 20 covers the plurality of third accommodating grooves, and the plurality of electronic elements are located in the plurality of third accommodating grooves, each second electronic element 100 contacts the printed circuit board 20, the plurality of second electronic elements 100 correspond one-to-one to the plurality of third accommodating grooves, each second electronic element 100 completely fills each third accommodating groove, and the photodetector chip 50 has a fourth projection on the molding package 10, each second electronic element 100 has a fifth projection on the molding package 10, and the fourth projection and the fifth projection do not overlap. Optionally, as shown in Figure 3 As shown, the driving chip 40 can be located in the molding package 10 between the semiconductor laser chip 30 and the photodetector chip 50, and optionally, the driving chip 40 can also be located in the molding package 10 on the side of the semiconductor laser chip 30 away from the photodetector chip 50, as shown in Figure 6 As shown.

[0056] Further, in the D-ToF scheme, due to the fast speed of light, the receiving time in daily use is generally in the sub-nanosecond level, and the detector needs to respond immediately when the photon arrives, therefore, in the D-ToF scheme, a single-photon avalanche diode (SPAD) or an avalanche photodiode (APD) is usually selected, wherein the SPAD chip is a device that can generate a response current in sub-nanosecond time, and its working principle is to use a reverse-biased photodiode to work in a very small voltage range beyond the breakdown voltage but not yet broken down, at this time, the diode is in a very sensitive working interval, therefore, as long as there is a weak light signal, it can trigger an avalanche current, and the corresponding speed is extremely fast. Therefore, the SPAD chip is easy to trigger counting in the avalanche region by a single free electron, thereby causing false counting, and the SPAD chip is greatly affected by dark noise, and the inventors have found that the factors causing dark counting include free electrons generated inside the detector due to heat. In the SPAD chip manufactured through a manufacturing process and a doping process, because the device has a shockley-read-hall (SRH) defect, the ability to release and capture carriers is stronger, therefore, in a cmos below the size of deep sub-micron (DSM), the voltage drop requires higher doping concentration and smaller PN junction scale, which may lead to higher defect density and stronger acceleration field, making the phenomenon of dark counting effect more obvious. Therefore, in the above embodiment, the projection area of the photodetector chip 50 on the printed circuit board 20 or the molded package 10 corresponds to the heat-sensitive area of the photodetector chip 50, so that when the plurality of second electronic elements 100 are located in the heat-sensitive area of the photodetector chip 50, the plurality of second electronic elements 100 will affect the photodetector chip 50, making the phenomenon of dark counting effect of the photodetector chip 50 more obvious. Therefore, in the case that the projection of the photodetector chip 50 on the molded package 10 is a fourth projection, and the projection of each second electronic element 100 on the molded package 10 is a fifth projection, the fourth projection and the fifth projection do not overlap, as shown in FIG. 8 and as shown in FIG. 9, thereby avoiding that the second electronic element 100 is located in the heat-sensitive area of the photodetector chip 50. Figure 5 Figure 7

[0057] ​​Optionally, when the projection of the semiconductor laser chip 30 onto the molded package 10 is the first projection, the projection of the photodetector chip 50 onto the molded package 10 is the fourth projection, and the projection of the driver chip 40 onto the molded package 10 is the second projection, the second projection is located between the first projection (located within the dashed box between the driver chip 40 and the first electronic component 70) and the fourth projection (located within the dashed box between the driver chip 40 and the second electronic component 100), such as... Figure 5 As shown, or the aforementioned second projection is located on the side of the first projection (within the dashed box between the driver chip 40 and the first electronic component 70) that is away from the fourth projection, such as... Figure 7 As shown, optionally, the distance between the second projection and the first projection is less than the distance between the second projection and the fourth projection. That is, the first electronic component 70 serves as the electronic component at the projection end of the semiconductor package structure, and the second electronic component 100 serves as the electronic component at the receiving end of the semiconductor package structure. Through the above arrangement, the first electronic component 70 and the second electronic component 100 can be arranged according to the principle of proximity, thereby making the lines of the first electronic component 70 (which belongs to the projection end) and the lines of the second electronic component 100 (which belongs to the receiving end) shorter, resulting in less impedance in the lines and thus improving signal accuracy.

[0058] Optionally, the third projection of each first electronic component 70 on the molded package 10 may be located on the side of the first projection away from the fourth projection, and the fifth projection of each second electronic component 100 on the molded package 10 may be located on the side of the fourth projection away from the first projection. Optionally, the distance between the first projection and the third projection is less than the distance between the first projection and the fifth projection, and the distance between the fourth projection and the fifth projection is less than the distance between the fourth projection and the third projection.

[0059] The aforementioned semiconductor laser chip 30 may include, but is not limited to, light-emitting diodes (LEDs), vertical-cavity surface-emitting lasers (VCSELs), and laser diodes (LDs), while the aforementioned photodetector chip 50 may include, but is not limited to, photodiodes (PDs), avalanche photodiodes (APDs), and single-photon avalanche photodiodes (SPADs). In some optional embodiments, since VCSELs have advantages such as high modulation rate, good coupling characteristics with the light source, low energy consumption, and low production cost, and single-electron avalanche diodes have advantages such as high sensitivity, high resolution, and low noise, the aforementioned semiconductor laser chip 30 may be a VCSEL, and the aforementioned photodetector chip 50 may be a single-electron avalanche diode.

[0060] From the above description, it can be seen that the above-mentioned embodiments of the present application achieve the following technical effects:

[0061] The molded package is used as the heat dissipation substrate in the semiconductor packaging structure, the printed circuit board is located on part of the surface of the molded package, heat generated by the semiconductor device on the printed circuit board is dissipated, and the semiconductor device is prevented from being damaged by heat. The semiconductor laser chip electrically connected to the printed circuit board is located on the exposed surface of the printed circuit board away from the molded package and / or the exposed surface of the molded package. The driving chip is located in the first accommodating groove in the molded package, and the driving chip is in contact with the printed circuit board. Therefore, the above-mentioned molded package for packaging the semiconductor device can cover the driving chip, thereby improving the stability of the driving chip in the semiconductor packaging structure and improving the packaging strength of the driving chip. Since the driving chip is completely filled in the first accommodating groove in the molded package, the driving chip and the molded package are integrated. The driving chip and the heat dissipation substrate of the semiconductor packaging structure do not occupy different packaging areas in the semiconductor packaging structure, the driving chip and the molded package have a common occupied area in the semiconductor packaging structure, and the size of the semiconductor packaging structure is reduced.

[0062] The above only describes the preferred embodiments of the present application and is not intended to limit the present application. Those skilled in the art can make various modifications and changes to the present application. Any modification, equivalent replacement, improvement, etc. within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A semiconductor package structure, comprising: The semiconductor package structure comprises: a semiconductor substrate, which comprises a printed circuit board and a molded package, the printed circuit board is located on a part of the surface of the molded package, and the molded package has a first accommodating groove, and the printed circuit board covers the first accommodating groove; a semiconductor laser chip, which is located on one side of the exposed surface of the printed circuit board or one side of the exposed surface of the molded package, and the semiconductor laser chip is electrically connected with the printed circuit board; a driving chip, which is located in the first accommodating groove and is electrically connected with the printed circuit board, wherein the driving chip completely fills the first accommodating groove; the semiconductor laser chip has a first projection on the molded package, the driving chip has a second projection on the molded package, and the first projection and the second projection do not overlap.

2. The semiconductor package structure of claim 1, wherein, Further comprising: a metal substrate, which is located between the semiconductor laser chip and the printed circuit board or between the semiconductor laser chip and the molded package, wherein when the semiconductor laser chip is located on one side of the exposed surface of the printed circuit board, the metal substrate is located between the semiconductor laser chip and the printed circuit board, and when the semiconductor laser chip is located on one side of the exposed surface of the molded package, the metal substrate is located between the semiconductor laser chip and the molded package.

3. The semiconductor package structure of claim 1, wherein, The molded package has a plurality of second accommodating grooves, the printed circuit board covers the plurality of second accommodating grooves, and the semiconductor package structure further comprises: a plurality of first electronic elements, which are located in the plurality of second accommodating grooves, each of the first electronic elements is electrically connected with the printed circuit board, the plurality of first electronic elements correspond to the plurality of second accommodating grooves one by one, each of the first electronic elements completely fills each of the second accommodating grooves, and the semiconductor laser chip has a first projection on the molded package, each of the first electronic elements has a third projection on the molded package, and the first projection and the third projection do not overlap.

4. The semiconductor package structure of claim 1, wherein, Further comprising: a first support part, which is located on the exposed surface of the printed circuit board and surrounds the semiconductor laser chip; a first super-lens, which is located on the side of the first support part away from the printed circuit board, and the first super-lens, the first support part and the semiconductor substrate have a first sealed cavity, and the semiconductor laser chip is located in the first sealed cavity.

5. The semiconductor package structure of any one of claims 1 to 4, wherein, Further comprising: a photodetector chip, which is located on the exposed surface of the printed circuit board and is spaced apart from the semiconductor laser chip, wherein when the semiconductor package structure comprises a first support part, the first support part is spaced apart from the photodetector chip.

6. The semiconductor package structure of claim 5, wherein, A straight line passing through the center of the photodetector chip and parallel to the exposed surface of the printed circuit board is a first center line, and a straight line passing through the center of the semiconductor laser chip and parallel to the exposed surface of the printed circuit board is a second center line, and the first center line and the second center line are collinear.

7. The semiconductor package structure of claim 5, wherein, Further comprising: A second support portion is located on the printed circuit board and surrounds the periphery of the photodetector chip; A second hyperlens is located on the side of the second support portion away from the printed circuit board, and a second sealed cavity is formed between the second support portion, the second hyperlens, and the semiconductor substrate, and the photodetector chip is located in the second sealed cavity.

8. The semiconductor package structure of claim 5, wherein, The molded package has a plurality of third receiving grooves, and the printed circuit board covers the plurality of third receiving grooves, and the semiconductor package structure further comprises: A plurality of second electronic elements are located in the plurality of third receiving grooves, each of the second electronic elements is in contact with the printed circuit board, the plurality of second electronic elements correspond to the plurality of third receiving grooves one-to-one, each of the second electronic elements completely fills each of the third receiving grooves, and the photodetector chip has a fourth projection on the molded package, each of the second electronic elements has a fifth projection on the molded package, and the fourth projection and the fifth projection do not overlap.

9. The semiconductor package structure of claim 5, wherein, The semiconductor laser chip comprises a vertical cavity surface emitting laser, and the photodetector chip comprises a single electron avalanche diode.

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