Light emitting diode and light emitting device

Abstract

The application relates to the technical field of semiconductor manufacturing, in particular to a light-emitting diode which comprises an epitaxial stack, a dielectric layer, a metal reflection layer, a substrate and an oxidation protection layer, the epitaxial stack comprises a first semiconductor layer, a light-emitting layer and a second semiconductor layer in sequence along the direction from the upper surface to the lower surface, the dielectric layer is arranged on the lower surface of the epitaxial stack, the dielectric layer has a plurality of through holes, the metal reflection layer is arranged on the side of the dielectric layer far from the epitaxial stack and is electrically connected to the epitaxial stack through the through holes, the substrate is arranged on the side of the metal reflection layer far from the epitaxial stack, and the oxidation protection layer covers the sidewall of the metal reflection layer. Therefore, the metal migration phenomenon of the metal reflection layer can be effectively avoided, the light-emitting diode can be prevented from leaking, and the quality of the light-emitting diode is improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a light-emitting diode and a light-emitting device. Background Technology

[0002] A light-emitting diode (LED) is a semiconductor light-emitting element, typically made of semiconductors such as GaN, GaAs, GaP, and GaAsP. Its core is a PN junction that emits light. LEDs possess advantages such as high luminous intensity, high efficiency, small size, and long lifespan, and are considered one of the most promising light sources available today. LEDs are widely used in lighting, monitoring and command systems, high-definition broadcasting, high-end cinemas, office displays, interactive conferencing, virtual reality, and other fields.

[0003] Currently, to improve the light extraction efficiency of LED chips, a metal reflective layer or an ODR (Optical Discharge Reflection) structure combining a metal reflective layer and a dielectric layer is typically designed on the metal bonding layer side. This reflects the light emitted from the metal bonding layer side to the light extraction side of the epitaxial stack, thereby improving the light extraction efficiency. Considering Ag's high reflectivity and good thermal and electrical conductivity, Ag mirrors are usually chosen when designing the metal reflective layer. However, Ag is prone to migration, leading to chip leakage. To address this issue, existing technologies pattern the Ag mirror, coating its surface with a barrier layer. This design typically increases the chip fabrication steps and process complexity, resulting in higher costs.

[0004] It should be noted that the information disclosed in this background section is intended only to enhance the understanding of the overall background of the present invention, and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0005] This invention provides a light-emitting diode (LED) comprising an epitaxial stack, a dielectric layer, a metal reflective layer, a substrate, and an oxide protective layer. The epitaxial stack has opposing upper and lower surfaces, and sequentially includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer along the direction from the upper to the lower surface. The dielectric layer is disposed on the lower surface of the epitaxial stack and has multiple vias. The metal reflective layer is disposed on the side of the dielectric layer away from the epitaxial stack, and is electrically connected to the epitaxial stack through the vias. The substrate is disposed on the side of the metal reflective layer away from the epitaxial stack. The oxide protective layer covers the sidewalls of the metal reflective layer.

[0006] The present invention also provides a light-emitting device, which includes a light-emitting diode, wherein the light-emitting diode is any of the light-emitting diodes described above.

[0007] The present invention provides a light-emitting diode and a light-emitting device. By setting an oxide protective layer on the sidewall of the metal reflective layer, the metal reflective layer can be effectively prevented from migrating, thus avoiding leakage of the light-emitting diode. This eliminates the need for patterning the metal reflective layer and setting an additional blocking layer, thereby improving the quality of the light-emitting diode, simplifying the process, and reducing production costs.

[0008] Other features and advantages of the present invention will be set forth in the following description, and some of the technical features and advantages may be apparent from the description or learned by practicing the invention. Attached Figure Description

[0009] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, some of the drawings in the following description are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0010] Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of the present invention;

[0011] Figure 2 yes Figure 1 A magnified view of a portion of the image;

[0012] Figure 3 This is a schematic diagram of the side structure of a substrate provided in an embodiment of the present invention;

[0013] Figure 4 This is a schematic diagram of the FIB of a light-emitting diode provided in an embodiment of the present invention;

[0014] Figure 5 This is a schematic diagram of the structure of a light-emitting diode provided in another embodiment of the present invention;

[0015] Figure 6 This is a schematic diagram of the side structure of a substrate provided in another embodiment of the present invention.

[0016] Figure label:

[0017] 10-Epipolar stack; 101-Upper surface; 102-Lower surface; 103-First semiconductor layer; 104-Light emitting layer; 105-Second semiconductor layer; 12-Passivation layer; 14-First electrode; 16-Dielectric layer; 18-Metal reflective layer; 20-Bonding layer; 22-Substrate; 24-Second electrode; 26-Current diffusion layer; 31-First epitaxial sidewall; 32-Second epitaxial sidewall; 40-Oxide protective layer; 42-Channel; 44-Vacuum; 50-Sidewall; A-Inflection point; B-Angle; d1-Distance from inflection point to upper surface of light emitting layer; H1-Thickness of first semiconductor layer; W1-Vertical projection length; W2-Wide of channel; W3-Projection width of light emitting diode; S1-Thickness of oxide protective layer. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. The technical features designed in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0019] In the description of this invention, it should be understood that the terms "center," "lateral," "upper," "lower," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more. Additionally, the term "comprising" and any variations thereof mean "at least comprising."

[0020] Please see Figures 1 to 4 , Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of the present invention. Figure 2 yes Figure 1 A magnified view of a portion of the diagram. Figure 3 This is a schematic diagram of the side structure of the substrate 22 provided in an embodiment of the present invention; Figure 4This is a schematic diagram of the FIB of a light-emitting diode according to an embodiment of the present invention. It should be noted that... Figure 3 It can be understood as Figure 1 This is a schematic diagram of the substrate 22 when the light-emitting diode is viewed from the left to the right. The FIB schematic diagram refers to an image obtained by performing microscopic analysis of the light-emitting diode using focused ion beam (FIB) technology.

[0021] To achieve at least one or more of the aforementioned advantages, a first embodiment of the present invention provides a light-emitting diode (LED). As shown in the figure, the LED includes an epitaxial stack 10, a dielectric layer 16, a metal reflective layer 18, a substrate 22, and an oxide protective layer 40.

[0022] The epitaxial stack 10 has an upper surface 101 and a lower surface 102 opposite to each other. The epitaxial stack 10 includes a first semiconductor layer 103, a light-emitting layer 104 and a second semiconductor layer 105 in sequence along the direction from the upper surface 101 to the lower surface 102.

[0023] The epitaxial stack 10 can be formed on the growth substrate by methods such as physical vapor deposition (PVD), chemical vapor deposition (CVD), epitaxy growth technology, or atomic layer deposition (ALD). The first semiconductor layer 103 and the second semiconductor layer 105 are semiconductors with different conductivity types, electrical properties, and polarities, depending on the doped elements to provide electrons or holes; for example, when the first semiconductor layer 103 is n-type, the second semiconductor layer 105 is p-type. The light-emitting layer 104 is formed between the first semiconductor layer 103 and the second semiconductor layer 105. Electrons and holes recombine in the light-emitting layer 104 under the drive of a current, converting electrical energy into light energy to emit light. The wavelength of the light emitted by the light-emitting diode can be adjusted by changing the physical and chemical composition of one or more layers of the epitaxial light-emitting layer 104; and vice versa. In this embodiment, a light-emitting diode with the first semiconductor layer 103 being n-type and the second semiconductor layer 105 being p-type is used as an example.

[0024] The light-emitting layer 104 provides the region for electron-hole recombination and light radiation. Different materials can be selected depending on the emission wavelength. The light-emitting layer 104 can be a single heterostructure (SH), a double heterostructure (DH), a double-sided double heterostructure (DDH), or a multi-quantum well (MQW). The light-emitting layer 104 includes a well layer and a barrier layer, wherein the barrier layer has a larger band gap than the well layer. By adjusting the composition ratio of the semiconductor material in the light-emitting layer 104, it is desired to radiate light of different wavelengths. In this embodiment, the semiconductor epitaxial stack 100 is a semiconductor material layer capable of radiating ultraviolet, blue, green, yellow, red, and infrared light, specifically a material in the 200nm-950nm range, such as common nitrides, specifically a gallium nitride-based semiconductor epitaxial stack 100. Gallium nitride-based epitaxial stacks are commonly doped with elements such as aluminum and indium, mainly providing radiation in the 200-550nm wavelength band; or common aluminum gallium indium phosphide-based or aluminum gallium arsenide-based semiconductor epitaxial stacks 100, mainly providing radiation in the 550-950nm wavelength band. To improve luminous efficiency, this can be achieved by changing the depth of the quantum wells, the number of paired quantum wells and quantum barriers, the thickness, and / or other characteristics in the light-emitting layer 104. In this embodiment, the semiconductor epitaxial stack 10 is preferably composed of AlGaInP-based or GaAs-based materials.

[0025] A dielectric layer 16 is disposed on the lower surface 102 of the epitaxial stack 10, and the dielectric layer 16 has multiple conductive vias. These vias expose the epitaxial stack 10. The dielectric layer 16 is light-transmitting. The material of the dielectric layer 16 may include transparent compounds such as silicon nitride, silicon oxide, and titanium oxide, and their stacked combinations, for example, it may be a Bragg mirror (DBR) formed by repeatedly stacking two materials with different refractive indices.

[0026] A metal reflective layer 18 is disposed on the side of the dielectric layer 16 away from the epitaxial stack 10, and the metal reflective layer 18 is electrically connected to the epitaxial stack 10 through vias. The metal reflective layer 18 can be made of a metal. The metal reflective layer 18 can have a reflectivity of more than 90%, and can be formed of a metal or alloy containing at least one of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Ti, Cr, Zn, Pt, Au, and Hf. This metal reflective layer 18 can reflect light radiated from the epitaxial stack 10 toward the substrate 22 back to the epitaxial stack 10 and radiate it out from the light-emitting surface side.

[0027] The substrate 22 is disposed on the side of the metal reflective layer 18 away from the epitaxial stack 10. The substrate 22 is a conductive substrate 22, which can be silicon, silicon carbide, aluminum nitride, or a metal substrate 22, preferably copper, tungsten, copper-tungsten, or molybdenum substrate 22. In order to support the epitaxial stack 10 with sufficient mechanical strength, the thickness of the substrate 22 can be 50 μm or more.

[0028] An oxide protective layer 40 covers the sidewalls of the metal reflective layer 18. The material of the oxide protective layer 40 differs from that of the passivation layer 12. The oxide protective layer 40 may be made of silicon oxide. The oxide protective layer 40 is doped with at least one element from the group consisting of gallium, indium, tin, nickel, titanium, platinum, and gold. That is, the oxide protective layer 40 is at least doped with one or more compounds or elements composed of gallium, indium, tin, nickel, titanium, platinum, and gold. In some embodiments, the oxide protective layer 40 may be formed by laser dicing of a chip. For example, during laser dicing, the laser hits the chip cutting path, and some chip components are broken and melted due to the high intensity of the laser, sputtering onto the surrounding sidewalls. Oxidation products are generated during this process, adhering to the sidewalls and forming an oxide protective layer 40 of a certain thickness, which covers the sidewalls of the metal reflective layer 18. By setting the oxide protective layer 40, there is no need to perform patterning processing on the metal reflective layer 18 or set an additional blocking layer. This can effectively prevent metal migration in the metal reflective layer 18, avoid leakage in the light-emitting diode, improve the quality of the light-emitting diode, simplify the process, and reduce production costs.

[0029] In some embodiments, to further prevent metal migration, the upper surface of the oxide protective layer 40 is not lower than the lower surface of the second semiconductor layer 105. The lower surface of the oxide protective layer 40 is not higher than the upper surface of the substrate 22. The upper and lower surfaces of the oxide protective layer 40 can refer to the surfaces where its highest and lowest points are located.

[0030] In some embodiments, the upper surface of the oxide protective layer 40 is higher than the lower surface of the second semiconductor layer 105, and the oxide protective layer 40 extends upward from the lower surface of the second semiconductor layer 105 to a position higher than the upper surface of the second semiconductor layer 105.

[0031] In some embodiments, the height of the upper and lower surfaces of the oxide protective layer 40 can be adjusted by controlling the intensity of the laser, which can be 2-10W. Higher laser power, i.e., greater laser intensity, results in more oxide layers and a higher upper surface. Similarly, a high-intensity laser penetrates deeper, allowing the oxide protective layer 40 to have a lower lower surface. Conversely, a weaker laser will result in a less deep oxide protective layer 40. The laser power can be adjusted as needed to obtain an oxide protective layer of suitable specifications.

[0032] In some embodiments, the oxide protective layer 40 has a maximum thickness, and the thickness S1 of the oxide protective layer 40 gradually decreases from its maximum thickness toward the substrate 22 until it reaches a minimum thickness and then remains unchanged. This structure is formed by laser scribing, where the strongest laser beam results in the strongest fragmentation and sputtering, thus producing the most oxide nearby, while the weakest laser beam produces almost no oxide. This gradually thickened oxide protective layer 40 does not require additional processing and can be produced in one step during laser scribing, greatly simplifying the process and providing the advantage of protecting the metal reflective layer 18. Similarly, the thickness S1 of the oxide protective layer 40 gradually decreases from its maximum thickness toward the upper surface 101 of the epitaxial stack 10 until it reaches a minimum thickness and then remains unchanged. The maximum thickness of the oxide protective layer 40 can be located in the sidewall region of the second semiconductor layer 105.

[0033] In some embodiments, such as Figure 1 As shown, the projected width W3 of the light-emitting diode (LED) on the horizontal plane is minimum at the second semiconductor layer 105, and gradually increases towards the substrate 22 from its minimum width. It should be noted that, as shown in the figure, this projected width W3 does not include the oxide protective layer 40; that is, the width change of the LED after removing the oxide protective layer 40. Due to the laser scribing process, this change in projected width W3 is because the stronger the laser energy, the more of the original LED side surface at the second semiconductor layer 105 is removed, leaving less remaining, thus reducing the projected width W3. Furthermore, when the projected width W3 reaches its maximum, the subsequent laser intensity is almost nonexistent, so the projected width W3 remains almost unchanged after reaching its maximum.

[0034] In some embodiments, the light-emitting diode has a sidewall 50. The sidewall 50 has the smallest thickness at the second semiconductor 105, and the thickness of the sidewall 50 gradually increases from its smallest thickness toward the substrate 22. It should be noted that this sidewall 50 portion does not include the oxide protective layer 40. For example, the sidewall 50 may refer to the sidewall extending downward from the sidewall of the second semiconductor layer 105, through the sidewall of the dielectric layer 16, the sidewall of the metal reflective layer 18, the sidewall of the bonding layer 20, until it reaches the sidewall of the substrate 22. In some embodiments, as the thickness of the sidewall 50 gradually increases toward the substrate 22, it remains unchanged after reaching its maximum thickness. Due to the laser scribing process, the stronger the laser energy, the more of the original sidewall 50 of the light-emitting diode is removed, leaving less remaining. Furthermore, when the thickness of the sidewall 50 reaches its maximum thickness, the subsequent laser intensity is almost non-existent, so the thickness of the sidewall 50 remains almost unchanged.

[0035] In some embodiments, combined with Figure 3 and Figure 4As shown, multiple channels 42 exist on the sidewalls of the substrate 22, and the oxide protective layer 40 fills the channels 42. Each channel 42 has a maximum width, and the width W2 of the channel 42 gradually decreases from its maximum width to the lower surface of the substrate 22. Correspondingly, as shown in the figure, the width W2 of the channel 42 narrows from top to bottom. Adjacent channels 42 are connected to each other at their maximum width, meaning the upper portions of the channels 42 are interconnected and form a single unit. The maximum width of the channel 42 is typically the width at the upper surface of the channel 42. A hole 44 is formed at the bottom of each channel 42. The width of the channel 42 is minimum at the hole 44, and the width is also minimum at the bottommost end of the channel 42. Referring to the shape shown in the figure, the shape from the minimum width W2 of the channel 42 to the maximum width W2 of the channel 42 is roughly an inverted triangle shape. It should be noted that in the attached… Figure 3 For ease of understanding, the correspondence between channels 42 and holes 44, and the variation of the width W2 of channel 42, is only shown to indicate that each channel 42 and hole 44 is relatively symmetrical and corresponds one-to-one. However, this case is not limited to this. In reality, there may be various situations for each channel 42 and hole 44. For example, the heights of adjacent holes 44 may be inconsistent, or the maximum widths of each channel 42 may be inconsistent, or the areas of the maximum widths of each channel 42 may be inconsistent. However, channels 42 and holes 44 within the same channel 42 must satisfy the aforementioned width variation relationship.

[0036] In some embodiments, such as Figure 4 As shown, the surface morphology of the oxide protective layer 40 has a fish-scale-like texture. This fish-scale texture can be composed of multiple sheet-like units arranged in a certain thickness and height difference between each sheet-like unit. That is to say, the thickness and height of each sheet-like unit can be uneven and irregularly arranged. The reason for its formation is that during the laser dicing process of the chip, there are multiple 2-10W lasers. The first laser forms the first channel, the second laser forms the second channel, and sputters some oxide onto the adjacent first / third channel, and so on. Each channel will have some oxide sputtered from other parts, eventually forming a layered, irregular fish-scale-like texture. This fish-scale-like oxide protective layer 40 can effectively protect the metal reflective layer 18.

[0037] In some embodiments, the light-emitting diode may further include a passivation layer 12, a first electrode 14, a bonding layer 20, and a second electrode 24.

[0038] The passivation layer 12 is partially disposed on the outer side of the epitaxial stack 10, mainly serving a protective and insulating function. The material of the passivation layer 12 may include silicon oxide, etc. The sidewall morphology of the passivation layer 12 may be the same as the morphology after the first epitaxial sidewall 31 is connected to the second epitaxial sidewall 32.

[0039] The first electrode 14 is disposed on the upper surface 101 of the epitaxial stack 10. The first electrode 14 can be a single-layer structure, a double-layer structure, or a multi-layer structure. The first electrode 14 can be made of metallic materials, such as Cr, Pt, Au, Ni, Ti, Al, etc.

[0040] A bonding layer 20 is disposed between the metal reflective layer 18 and the substrate 22. The bonding layer 20 is used between the substrate 22 and the epitaxial stack 10 to improve the overall structural connection strength. The bonding layer 20 can be made of metal elements such as gold, tin, titanium, tungsten, nickel, platinum, indium, etc., and can be a single-layer structure or a multi-layer structure, or a combination of various materials.

[0041] The second electrode 24 is disposed on the side of the substrate 22 away from the epitaxial stack 10. The second electrode 24 can be made of a metallic material.

[0042] In some embodiments, a current diffusion layer 26 may be disposed below the second semiconductor layer 105. The current diffusion layer 26 serves to diffuse current, and the material of the current diffusion layer 26 may include gallium phosphide, etc. The dielectric layer 16 covers the current diffusion layer 26, and the current diffusion layer 26 is exposed in the vias of the dielectric layer 16. The metal reflective layer 18 is electrically connected to the current diffusion layer 26 through the vias.

[0043] The epitaxial stack 10 has a first epitaxial sidewall 31 and a second epitaxial sidewall 32 on the same side. The figure illustrates the first epitaxial sidewall 31 and the second epitaxial sidewall 32 on the left side as examples. The first epitaxial sidewall 31 is a portion of the sidewall on the first semiconductor layer 103. The second epitaxial sidewall 32 extends from a portion of the sidewall of the second semiconductor layer 105 toward the upper surface 101 of the epitaxial stack 10, passing through the sidewall of the light-emitting layer 104 until it reaches the sidewall of the first semiconductor layer 103. In other words, the second epitaxial sidewall 32 is substantially composed of a portion of the sidewall of the second semiconductor layer 105, the sidewall of the light-emitting layer 104, and a portion of the sidewall of the first semiconductor layer 103. Furthermore, the first epitaxial sidewall 31 connects to the second epitaxial sidewall 32, and a bend point A is formed at the connection between the first epitaxial sidewall 31 and the second epitaxial sidewall 32, with an included angle B greater than 90° at this bend point A. Compared to the traditional right-angled L-shaped sidewall, this invention forms a tilted two-segment sidewall by setting an inflection point A. This inflection point A is located on the sidewall of the first semiconductor layer 103 above the light-emitting layer 104. This makes it easier to clean organic matter during the resist removal process after chip dicing, and also facilitates the continuity of subsequent protective layers covering these sidewalls. Furthermore, since the inflection point A is located at the first semiconductor layer 103, the light-emitting layer 104 and the second semiconductor are not exposed. This avoids leakage and burn problems even if some organic matter remains, and ensures that the light-emitting layer 104 has a flat surface, making it less prone to organic matter residue, thereby reducing the risk of leakage. Optionally, the first epitaxial sidewall 31 is the portion extending from the upper surface 101 of the epitaxial stack 10 to the lower surface 102 of the epitaxial stack 10 to the inflection point A, which is located on the sidewall of the first semiconductor layer 103. Optionally, considering the influence of light emission effect, the included angle B can range from 91° to 120°.

[0044] In some embodiments, the distance from the inflection point A to the upper surface of the light-emitting layer 104 is defined as d1, and the thickness of the first semiconductor layer 103 is H1, where 0.05H1≤d1≤0.4H1. If d1 is less than 0.05H1, it means that the inflection point A is too close to the light-emitting layer 104, and organic matter may still adhere to the vicinity of the light-emitting layer 104, which can easily lead to leakage problems; if d1 is greater than 0.4H1, it means that the inflection point A is too high, resulting in a narrow dicing track, which is not conducive to subsequent process implementation.

[0045] In some embodiments, with the upper surface 101 of the epitaxial stack 10 as the reference plane, the angle between the extension line of the first epitaxial sidewall 31 and the upper surface 101 of the epitaxial stack 10 is 80° to 100°. In the illustrated embodiment, this angle is 90°, that is, the first epitaxial sidewall 31 is perpendicular to the upper surface 101 of the epitaxial stack 10.

[0046] In some embodiments, the vertical projection length W1 of the second epitaxial sidewall 32 located on one side of the epitaxial stack 10 onto the lower surface 102 of the epitaxial stack 10 ranges from 10 to 30 μm, that is, the overall width W1 of the second epitaxial sidewall 32 in the horizontal direction is 10 to 30 μm. Conversely, if it is greater than 30 μm, the remaining light-emitting layer is too small 104, which is not conducive to the light-emitting efficiency; if it is less than 10 μm, the dicing channel is too narrow, which is not conducive to the subsequent dicing process.

[0047] In some embodiments, the second epitaxial sidewall 32 extends at least across the entire second semiconductor layer 105. For example, the second epitaxial sidewall 32 may also extend downward to the underlying dielectric layer 16, etc.

[0048] Please see Figure 5 , Figure 5 This is a schematic diagram of the structure of a light-emitting diode provided in another embodiment of the present invention. Compared to Figure 1 The main difference in this embodiment of the light-emitting diode is that the oxide protective layer 40 extends upward to cover part of the passivation layer 12, that is, the oxide protective layer 40 covers part of the passivation layer 12.

[0049] Please see Figure 6 , Figure 6 This is a schematic diagram of the side structure of a substrate provided in another embodiment of the present invention. Compared to Figure 3 As shown, the main difference in this embodiment is that the shape of the channel 42 from its minimum width W2 to its maximum width W2 is a kind of inverted arc shape.

[0050] An embodiment of the present invention also provides a light-emitting device, which includes a light-emitting diode, wherein the light-emitting diode may be the light-emitting diode described in any of the above embodiments.

[0051] In summary, the light-emitting diode and light-emitting device provided by one embodiment of the present invention, by providing an oxide protective layer 40 on the sidewall of the metal reflective layer 18, can effectively avoid metal migration in the metal reflective layer 18 without patterning the metal reflective layer 18 or providing an additional blocking layer, thus preventing leakage of the light-emitting diode, improving the quality of the light-emitting diode, simplifying the process, and reducing production costs.

[0052] Furthermore, those skilled in the art should understand that although many problems exist in the prior art, each embodiment or technical solution of the present invention can be improved in only one or a few aspects, without necessarily solving all the technical problems listed in the prior art or the background art simultaneously. Those skilled in the art should understand that any content not mentioned in a claim should not be construed as a limitation on that claim.

[0053] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A light-emitting diode, characterized in that: The light-emitting diode includes: An epitaxial stack has opposing upper and lower surfaces, wherein the epitaxial stack sequentially comprises a first semiconductor layer, a light-emitting layer, and a second semiconductor layer along the direction from the upper surface to the lower surface; A dielectric layer is disposed on the lower surface of the epitaxial stack, and the dielectric layer has a plurality of through-holes; A metal reflective layer is disposed on the side of the dielectric layer away from the epitaxial stack, and the metal reflective layer is electrically connected to the epitaxial stack through the via. A substrate, the substrate being disposed on the side of the metal reflective layer away from the epitaxial stack; An oxide protective layer covers the sidewalls of the metal reflective layer; The oxide protective layer extends upward from a portion of the sidewall of the substrate and covers the sidewall of the dielectric layer.

2. The light-emitting diode according to claim 1, characterized in that: The upper surface of the oxide protective layer is higher than the lower surface of the second semiconductor layer, and the oxide protective layer extends upward from the lower surface of the second semiconductor layer to a point higher than the upper surface of the second semiconductor layer.

3. The light-emitting diode according to claim 1, characterized in that: The oxide protective layer is made of silicon oxide and is doped with at least one element from the group consisting of gallium, indium, tin, nickel, titanium, platinum and gold.

4. The light-emitting diode according to claim 1, characterized in that: The surface morphology of the oxide protective layer has a fish-scale-like texture, which is composed of multiple sheet-like units arranged together, with thickness and height differences between each sheet-like unit.

5. The light-emitting diode according to claim 1, characterized in that: The oxide protective layer has a maximum thickness at one point, and the thickness of the oxide protective layer gradually decreases from its maximum thickness toward the substrate.

6. The light-emitting diode according to claim 1, characterized in that: The oxide protective layer has a maximum thickness at one point, and the thickness of the oxide protective layer gradually decreases from its maximum thickness toward the upper surface of the epitaxial stack.

7. The light-emitting diode according to claim 1, characterized in that: The projection width of the light-emitting diode on the horizontal plane is the smallest at the second semiconductor layer, and the projection width gradually increases from its minimum width toward the substrate.

8. The light-emitting diode according to claim 1, characterized in that: The substrate has multiple channels on its sidewalls, the oxide protective layer fills the channels, the channels have a maximum width, and the width of the channels gradually decreases from their maximum width toward the lower surface of the substrate.

9. The light-emitting diode according to claim 8, characterized in that: The adjacent channels are connected to each other at the maximum width of the channel.

10. The light-emitting diode according to claim 8, characterized in that: Each of the channels forms a hole at its bottom end, and the width of the channel is minimized at the hole.

11. The light-emitting diode according to claim 8, characterized in that: The shape of the channel, from its minimum width to its maximum width, is an inverted triangle or an inverted arc.

12. The light-emitting diode according to claim 1, characterized in that: The light-emitting diode further includes a passivation layer, a first electrode, a bonding layer, and a second electrode. A portion of the passivation layer is disposed on the outside of the epitaxial stack. The first electrode is disposed on the upper surface of the epitaxial stack. The bonding layer is disposed between the metal reflective layer and the substrate. The second electrode is disposed on the side of the substrate away from the epitaxial stack.

13. The light-emitting diode according to claim 1, characterized in that: The epitaxial stack has a first epitaxial sidewall and a second epitaxial sidewall on the same side. The first epitaxial sidewall is a portion of the sidewall on the first semiconductor layer. The second epitaxial sidewall extends from the portion of the sidewall of the second semiconductor layer toward the upper surface of the epitaxial stack, through the sidewall of the light-emitting layer, and extends to the sidewall of the first semiconductor layer. The first epitaxial sidewall connects to the second epitaxial sidewall. An inflection point is formed at the connection between the first epitaxial sidewall and the second epitaxial sidewall, and an included angle is formed at the inflection point, wherein the included angle is greater than 90°.

14. The light-emitting diode according to claim 13, characterized in that: The first epitaxial sidewall is the portion extending from the upper surface of the epitaxial stack to the lower surface of the epitaxial stack to the inflection point, where the inflection point is located on the sidewall of the first semiconductor layer.

15. The light-emitting diode according to claim 13, characterized in that: The included angle ranges from 91° to 120°.

16. The light-emitting diode according to claim 13, characterized in that: The distance from the inflection point to the upper surface of the light-emitting layer is defined as d1, and the thickness of the first semiconductor layer is H1, where 0.05H1≤d1≤0.4H1.

17. The light-emitting diode according to claim 13, characterized in that: With the upper surface of the epitaxial stack as the reference plane, the angle between the extension line of the first epitaxial sidewall and the upper surface of the epitaxial stack is 80°~100°.

18. A light-emitting device, characterized in that: The light-emitting device includes a light-emitting diode, and the light-emitting diode is the light-emitting diode as described in any one of claims 1 to 17.

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