Enhanced design and use of longer low density parity check Wi-Fi codewords

Abstract

This disclosure describes systems, methods, and devices related to low density parity check (LDPC) Wi-Fi encoding and decoding. An apparatus may: identify a first basis matrix to generate a 1944-bit LDPC codeword; identifying a mask matrix to generate a second basis matrix for generating the 3888-bit LDPC codeword based on the first basis matrix, the entries of the mask matrix having values 0, 1, and-1; generating a second basis matrix by multiplying the first basis matrix by a mask matrix, the entries of the second basis matrix indicating respective cyclic shifts to be applied to the unit matrix; generating a parity check matrix by multiplying the second basis matrix by the unit matrix; generating a 3888-bit LDPC code word on the basis of the parity check matrix; and transmitting a frame including the LDPC codeword.

Description

Technical Field

[0001] The present disclosure relates generally to systems and methods for wireless communications, and more particularly to enhanced Wi-Fi codewords. Background Art

[0002] Wireless devices are becoming widely popular and are increasingly requesting access to wireless channels. The Institute of Electrical and Electronics Engineers (IEEE) is developing one or more standards that utilize Orthogonal Frequency-Division Multiple Access (OFDMA) in channel allocation. BRIEF DESCRIPTION OF THE DRAWINGS

[0003] Figure 1 The network diagram illustrates an example network environment according to one or more example embodiments of the present disclosure.

[0004] Figure 2 A schematic diagram of using low-density parity-check Wi-Fi codewords according to one or more example embodiments of the present disclosure is illustrated.

[0005] Figure 3 is an example basis matrix for low parity density check Wi-Fi coding of extended codewords according to one or more example embodiments of the present disclosure.

[0006] Figure 4 A graphical diagram illustrating the relationship between packet error rate and signal-to-noise ratio for conventional Wi-Fi codeword lengths and extended Wi-Fi codeword lengths according to one or more example embodiments of the present disclosure is shown.

[0007] Figure 5 A flow chart illustrating an illustrative process for low parity density check Wi-Fi encoding using extended codewords is shown, according to one or more example embodiments of the present disclosure.

[0008] Figure 6 Illustrated is a functional diagram of an exemplary communication station that may be suitable for use as user equipment according to one or more example embodiments of the present disclosure.

[0009] Figure 7 Illustrated is a block diagram of an example machine on which any one of one or more techniques (eg, methodologies) may be performed according to one or more example embodiments of the present disclosure.

[0010] Figure 8 is a block diagram of a radio architecture according to some examples.

[0011] Figure 9 One or more exemplary embodiments according to the present disclosure are illustrated for Figure 8 Example front-end module circuit in a radio architecture.

[0012] Figure 10 One or more exemplary embodiments according to the present disclosure are illustrated for Figure 8 Example radio IC circuit in a radio architecture.

[0013] Figure 11 One or more exemplary embodiments according to the present disclosure are illustrated for Figure 8 Example baseband processing circuitry in a radio architecture. DETAILED DESCRIPTION

[0014] The following description and accompanying drawings sufficiently illustrate the specific embodiments to enable those skilled in the art to implement them. Other embodiments may include structural, logical, electrical, process, algorithmic, and other changes. Portions and features of some embodiments may be included in other embodiments, or substituted for portions and features of other embodiments. The embodiments recited in the claims encompass all available equivalents of those claims.

[0015] The IEEE 802.11 technical standard defines wireless communications, including how Wi-Fi devices access and use wireless communication channels. Specifically, the IEEE 802.11 technical standard (e.g., starting with IEEE 802.11n-2009) defines the use of low-density parity-check (LDPC) codes as an alternative to convolutional codes for the physical layer (PHY) of the communications stack. In LDPC coding, a parity-check base matrix is ​​generated for a given code rate. The base matrix can be expanded to fit the requested information block size and adapt to the code rate.

[0016] In newer versions of the 802.11 standard (e.g., 802.11be), longer codeword lengths are allowed (e.g., due to increased bandwidth). For example, in 802.11be, there may be more codewords per symbol (e.g., in some cases, 48 ​​codewords per symbol). The existing codeword length in 802.11n is 1944 bits, and the LDPC base matrix defines the number of cyclic shifts to be applied to the information block being encoded and transmitted. When 802.11n was introduced, the number of coded bits per orthogonal frequency division multiple access (OFDMA) symbol was 1296 for two spatial streams, 64 quadrature amplitude modulation, and 40 MHz bandwidth. This means that a symbol contains fewer than one LDPC codeword.

[0017] In 802.11be, for two spatial streams, 4096QAM, and 320MHz bandwidth, the number of coded bits per OFDM symbol is as high as 94,080. This means that one symbol consists of 48 codewords. Even taking into account the symbol duration (for example, 802.11be has a 4-fold longer symbol duration), the number of LDPC codewords per symbol in 802.11be is 12 times higher than in 802.11n, which means that encoding and decoding throughput needs to be much higher.

[0018] One mitigating property of LDPC coding is parallel processing during decoding. However, the ability to perform parallel decoding is limited by the small codeword size and the large number of codewords per symbol. To accommodate the larger number of codewords per OFDM symbol in next-generation Wi-Fi, more decoding engines are needed to achieve higher throughput.

[0019] To address this issue, larger codewords can be designed to allow for more parallel processing while keeping the number of decoding engines small. In addition, properly designed longer codewords generally outperform shorter codewords.

[0020] Therefore, there is a need to enhance parallel decoding of longer LDPC codewords.

[0021] In one or more embodiments, the present disclosure uses an existing LDPC codeword of length 1944 as an example to illustrate the enhanced scheme. An existing parity check matrix with a codeword size of 1944 and a code rate of 5 / 6 is shown in Table 1 below, and its expansion size is Z=81. The final parity check matrix can be generated by expanding each element of the base matrix by cyclically shifting the 81x81 identity matrix n times, where n is equal to the number in Table 1. For example, if the upper left element of the base matrix is ​​13, then the 81x81 matrix corresponding to element 13 is cyclically shifted 13 times.

[0022] Table 1: Basis matrix for LDPC code with rate 5 / 6 and codeword size 1944:

[0023] 13 48 80 66 4 74 7 30 76 52 37 60 -1 49 73 31 74 73 23 -1 1 0 -1 -1 69 63 74 56 64 77 57 65 6 16 51 -1 64 -1 68 9 48 62 54 27 -1 0 0 -1 51 15 0 80 24 25 42 54 44 71 71 9 67 35 -1 58 -1 29 -1 53 0 -1 0 0 16 29 36 41 44 56 59 37 50 24 -1 65 4 65 52 -1 4 -1 73 52 1 -1 -1 0

[0024] In one or more embodiments, since the size of the base matrix in Table 1 is 4x24, by expanding each element with an 81x81 matrix, the size of the final expanded matrix is ​​324x 1944 (e.g., because 324=81x4 and 1944=81x24). In the base matrix, "0" indicates that no cyclic shift is applied to the 81x81 identity matrix, and "-1" indicates a zero matrix of size 81x81.

[0025] In one or more embodiments, in order to double the codeword size, it is proposed to apply a mask matrix on top of the basis matrix of Table 1 to generate a new basis matrix with double the number of rows and columns. The size of the mask matrix is ​​the same as the basis matrix in Table 1, that is, 4x24. Each element in the mask matrix takes a value from {1,0,-1}. Table 2 below gives an example of a mask matrix for operating the basis matrix of Table 1 and generating a double-sized basis matrix. The size of the mask matrix is ​​4x24 (e.g., the same size as the basis matrix in Table 1).

[0026] Table 2: Example mask matrix applied to the basis matrix of Table 1:

[0027] 0 0 0 0 0 0 0 0 0 0 0 0 -1 0 0 0 0 0 0 -1 0 0 -1 -1 1 1 1 1 1 1 1 1 1 1 1 -1 1 -1 1 1 1 1 0 0 -1 0 0 -1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1 0 -1 0 -1 0 0 -1 0 0 1 1 1 1 1 1 1 1 1 1 -1 1 1 1 1 -1 1 -1 0 0 0 -1 -1 0

[0028] In one or more embodiments, when a value of "0" in Table 2 is applied to a corresponding element in Table 1 at the same matrix position, the operation is defined as:

[0029]

[0030] In one or more embodiments, when a value of "1" in Table 2 is applied to a corresponding element in Table 1 at the same matrix position, the operation is defined as:

[0031]

[0032] In one or more embodiments, the position of the value "-1" in the mask matrix of Table 2 is exactly the same as the "-1" in the basis matrix of Table 1. Therefore, when the value "-1" in Table 2 is applied to the corresponding element in Table 1 at the same matrix position, the operation is defined as:

[0033]

[0034] In one or more embodiments, a larger basis matrix can be generated by applying the mask matrix in Table 2 to the basis matrix in Table 1 and using formulas (1)-(3). The size is 8x48, which doubles the number of rows and columns compared to the existing basis matrix in Table 1.

[0035] In one or more embodiments, the new base matrix can be used to generate double-sized LDPC codewords. The same expansion operation can also be applied to the new base matrix. (For example, by cyclically shifting the 81x81 unit matrix n times, each element of the new base matrix is ​​expanded, where n is equal to the element of the new base matrix). After the 81x81 matrix expansion, the size of the new parity check matrix is ​​648x3888, so that a new LDPC codeword of size 3888 can be generated using the new parity check matrix. The new LDPC codeword of size 3888 has a performance gain compared to the existing LDPC codeword of size 1944. For MCS13 (modulation and coding scheme), the gain is approximately 0.8dB, and for MCS 11 and MCS 9, the gain is approximately 0.5dB.

[0036] The benefits of using a mask matrix to generate a new parity-check matrix include: maintaining the same row weights for the 3888 LDPC codeword as for the existing 1944 LDPC codeword; maintaining the same column weights for the 3888 LDPC codeword as for the existing 1944 LDPC codeword; and expanding the size to Z = 81, the same as for the original 1944 LDPC codeword. These properties allow the 1944 LDPC codeword decoding engine to be reused for the new 3888 codeword, simply by remapping the connections between information bits and parity bits.

[0037] In one or more embodiments, mask matrices may also be generated for other code rates, for example, code rate 3 / 4 and code rate 1 / 2. Table 3 below shows a base matrix for an existing LDPC code with a codeword size of 1944 and a code rate of 3 / 4. Table 4 below shows an example of a mask matrix corresponding to the base matrix of Table 3.

[0038] Table 3: Basis matrix for LDPC codes with rate 3 / 4 and codeword size 1944

[0039] 48 29 28 39 9 61 -1 -1 -1 63 45 80 -1 -1 -1 37 32 22 1 0 -1 -1 -1 -1 4 49 42 48 11 30 -1 -1 -1 49 17 41 37 15 -1 54 -1 -1 -1 0 0 -1 -1 -1 35 76 78 51 37 35 21 -1 17 64 -1 -1 -1 59 7 -1 -1 32 -1 -1 0 0 -1 -1 9 65 44 9 54 56 73 34 42 -1 -1 -1 35 -1 -1 -1 46 39 0 -1 -1 0 0 -1 3 62 7 80 68 26 -1 80 55 -1 36 -1 26 -1 9 -1 72 -1 -1 -1 -1 -1 0 0 26 75 33 21 69 59 3 38 -1 -1 -1 35 -1 62 36 26 -1 -1 1 -1 -1 -1 -1 0

[0040] Table 4: Mask matrix for LDPC code with code rate 3 / 4 and codeword size 1944:

[0041] 0 0 0 0 0 0 -1 -1 -1 0 0 0 -1 -1 -1 0 0 0 0 0 -1 -1 -1 -1 1 1 1 1 1 1 -1 -1 -1 1 1 1 1 1 -1 1 -1 -1 -1 0 0 -1 -1 -1 0 0 0 0 0 0 0 -1 0 0 -1 -1 -1 0 0 -1 -1 0 -1 -1 0 0 -1 -1 1 1 1 1 1 1 1 1 1 -1 -1 -1 1 -1 -1 -1 1 1 0 -1 -1 0 0 -1 0 0 0 0 0 0 -1 0 0 -1 0 -1 0 -1 0 -1 0 -1 -1 -1 -1 -1 0 0 1 1 1 1 1 1 1 1 -1 -1 -1 1 -1 1 1 1 -1 -1 0 -1 -1 -1 -1 0

[0042] The above description is for illustration and is not intended to be limiting. Many other examples, configurations, processes, algorithms, etc. may exist, some of which are described in more detail below. Example embodiments will now be described with reference to the accompanying drawings.

[0043] Figure 1The network diagram illustrates an example network environment 100 according to one or more example embodiments of the present disclosure. The wireless network 100 may include one or more user devices 120 and one or more access points (APs) 102, which may communicate according to the IEEE 802.11 communication standard. The user device(s) 120 may be mobile devices that are not fixed (e.g., do not have a fixed location), or may be fixed devices.

[0044] In some embodiments, user equipment 120 and AP 102 may include Figure 4 Functional diagram and / or Figure 5 The example machine / system is similar to one or more computer systems.

[0045] One or more illustrative user devices 120 and / or AP 102 may be operated by one or more users 110. It should be noted that any addressable unit may be a station (STA). A STA may exhibit multiple different characteristics, each of which shapes its functionality. For example, a single addressable unit may be a portable STA, a quality-of-service (QoS) STA, a dependent STA, and a hidden STA. One or more illustrative user devices 120 and AP 102 may be STAs. One or more illustrative user devices 120 and / or AP 102 may operate as a personal basic service set (PBSS) control point / access point (PCP / AP). The user device(s) 120 (e.g., 124, 126, or 128) and / or the AP(s) 102 may include any suitable processor-driven device, including but not limited to mobile devices or non-mobile devices, such as stationary devices. For example, the user equipment(s) 120 and / or the AP(s) 102 may include: user equipment (UE), station (STA), access point (AP), software enabled AP (SoftAP), personal computer (PC), wearable wireless device (e.g., bracelet, watch, glasses, ring, etc.), desktop computer, mobile computer, laptop computer, Ultrabook TMcomputer, laptop computer, tablet computer, server computer, handheld computer, handheld device, Internet of Things (IoT) device, sensor device, PDA device, handheld PDA device, airborne device, non-airborne device, hybrid device (e.g., combining the functionality of a cellular phone with the functionality of a PDA device), consumer device, in-vehicle device, non-in-vehicle device, mobile or portable device, non-mobile or non-portable device, mobile phone, cellular phone, PCS device, PDA device including a wireless communication device, mobile or portable GPS device, DVB device, relatively small computing device, non-desktop computer, "carrysmall live large" (CSLL) device, ultra mobile device (UMD), ultra mobile PC (UMPC), mobile internet device (MID), "origami" device or computing device, dynamically composable computing computing (DCC) devices, context-aware devices, video devices, audio devices, A / V devices, set-top-boxes (STBs), Blu-ray disc (BD) players, BD recorders, digital video disc (DVD) players, high definition (HD) DVD players, DVD recorders, HDDVD recorders, personal video recorders (PVRs), broadcast HD receivers, video sources, audio sources, video sinks, audio sinks, stereo tuners, broadcast radio receivers, flat-panel displays, personal media players (PMPs), digital video cameras (DVCs), digital audio players, speakers, audio receivers, audio amplifiers, gaming devices, data sources, data sinks, digital still cameras (DSCs), media players, smartphones, televisions, music players, and the like. Other devices, including smart devices such as lights, climate control, vehicle components, home components, appliances, and the like, may also be included in this list.

[0046] As used herein, the term "Internet of Things (IoT) device" refers to any object (e.g., appliance, sensor, etc.) that has an addressable interface (e.g., Internet Protocol (IP) address, Bluetooth identifier (ID), near-field communication (NFC) ID, etc.) and can send information to one or more other devices via a wired or wireless connection. IoT devices can have passive communication interfaces, such as quick response (QR) codes, radio-frequency identification (RFID) tags, NFC tags, etc., or active communication interfaces, such as modems, transceivers, transmitter-receivers, etc. IoT devices may have a specific set of properties (e.g., device states or conditions, such as whether the IoT device is on or off, open or closed, idle or active, available for task execution or busy, etc., cooling or heating functions, environmental monitoring or recording functions, light functions, sound generation functions, etc.), which may be embedded in and / or controlled / monitored by a central processing unit (CPU), microprocessor, ASIC, etc., and configured to connect to an IoT network, such as a local ad hoc network or the Internet. For example, IoT devices may include, but are not limited to, refrigerators, toasters, ovens, microwave ovens, freezers, dishwashers, cutlery, hand tools, washing machines, dryers, stoves, air conditioners, thermostats, televisions, lamps, vacuum cleaners, sprinklers, electricity meters, gas meters, etc., as long as these devices are equipped with an addressable communication interface for communicating with the IoT network. IoT devices may also include cellular phones, desktop computers, laptop computers, tablet computers, personal digital assistants (PDAs), etc. Thus, an IoT network may be composed of a combination of "traditional" Internet-accessible devices (e.g., laptop or desktop computers, cell phones, etc.) as well as devices that do not typically have Internet connectivity (e.g., dishwashers, etc.).

[0047] The user device(s) 120 and / or the AP(s) 102 may also comprise, for example, mesh stations in a mesh network according to one or more IEEE 802.11 standards and / or 3GPP standards.

[0048] Any of the user device(s) 120 (e.g., user devices 124, 126, 128) and the AP(s) 102 can be configured to communicate with each other wirelessly or by wire via one or more communication networks 130 and / or 135. The user device(s) 120 can also communicate with each other peer-to-peer or directly with or without the AP(s) 102. Any of the communication networks 130 and / or 135 can include, but are not limited to, any combination of different types of suitable communication networks, such as, for example, a broadcast network, a cable network, a public network (e.g., the Internet), a private network, a wireless network, a cellular network, or any other suitable private and / or public network. In addition, any of the communication networks 130 and / or 135 can have any suitable communication range associated therewith and can include, for example, a global network (e.g., the Internet), a metropolitan area network (MAN), a wide area network (WAN), a local area network (LAN), or a personal area network (PAN). Furthermore, any of the communication networks 130 and / or 135 may include any type of media over which network traffic may be carried, including but not limited to coaxial cable, twisted pair wiring, optical fiber, hybrid fiber coaxial (HFC) media, microwave terrestrial transceivers, radio frequency communication media, white space communication media, ultra-high frequency communication media, satellite communication media, or any combination thereof.

[0049] Any of the user device(s) 120 (e.g., user devices 124, 126, 128) and the AP(s) 102 may include one or more communication antennas. The one or more communication antennas may be any suitable type of antenna corresponding to the communication protocol used by the user device(s) 120 (e.g., user devices 124, 126, and 128) and the AP(s) 102. Some non-limiting examples of suitable communication antennas include Wi-Fi antennas, Institute of Electrical and Electronics Engineers (IEEE) 802.11 family of standards-compliant antennas, directional antennas, non-directional antennas, dipole antennas, folded dipole antennas, patch antennas, multiple-input multiple-output (MIMO) antennas, omnidirectional antennas, quasi-omnidirectional antennas, and the like. The one or more communication antennas may be communicatively coupled to a radio component to transmit and / or receive signals, such as communication signals to and / or from the user device(s) 120 and / or the AP(s) 102.

[0050] Any of the user device(s) 120 (e.g., user devices 124, 126, 128) and AP(s) 102 can be configured to perform directional transmission and / or directional reception in conjunction with wireless communications in the wireless network. Any of the user device(s) 120 (e.g., user devices 124, 126, 128) and AP(s) 102 can be configured to perform such directional transmission and / or reception using a set of multiple antenna arrays (e.g., DMG antenna arrays, etc.). Each of the multiple antenna arrays can be used for transmission and / or reception in a specific corresponding direction or range of directions. Any of the user device(s) 120 (e.g., user devices 124, 126, 128) and AP(s) 102 can be configured to perform any given directional transmission toward one or more defined transmit sectors. Any of the user device(s) 120 (e.g., user devices 124, 126, 128) and AP(s) 102 can be configured to perform any given directional reception from one or more defined receive sectors.

[0051] MIMO beamforming in a wireless network can be implemented using RF beamforming and / or digital beamforming. In some embodiments, when performing a given MIMO transmission, user equipment 120 and / or AP(s) 102 can be configured to use all or a subset of their one or more communication antennas to perform MIMO beamforming.

[0052] Any of the user devices 120 (e.g., user devices 124, 126, 128) and the AP(s) 102 may include any suitable radio and / or transceiver to transmit and / or receive radio frequency (RF) signals in a bandwidth and / or channel corresponding to the communication protocol used by any of the user devices 120 and the AP(s) 102 to communicate with each other. The radio component may include hardware and / or software to modulate and / or demodulate communication signals according to a pre-established transmission protocol. The radio component may also have hardware and / or software instructions to communicate via one or more Wi-Fi and / or Wi-Fi Direct protocols, such as those standardized by the Institute of Electrical and Electronics Engineers (IEEE) 802.11 standards. In certain example embodiments, the radio assembly, in cooperation with the communication antenna, may be configured to communicate via a 2.4 GHz channel (e.g., 802.11b, 802.11g, 802.11n, 802.11ax), a 5 GHz channel (e.g., 802.11n, 802.11ac, 802.11ax), or a 60 GHz channel (e.g., 802.11ad, 802.11ay). An 800 MHz channel (e.g., 802.11ah) may be operable at 28 GHz and 40 GHz. It should be understood that this list of communication channels according to certain 802.11 standards is only a partial list, and other 802.11 standards (e.g., next generation Wi-Fi, or other standards) may be used. In some embodiments, non-Wi-Fi protocols may be used for communication between devices, such as Bluetooth, dedicated short-range communication (DSRC), ultra-high frequency (UHF) (e.g., IEEE 802.11af, IEEE 802.22), white space frequencies (e.g., white space), or other packetized radio communications. The radio components may include any known receiver and baseband suitable for communicating via the communication protocol. The radio components may also include a low noise amplifier (LNA), an additional signal amplifier, an analog-to-digital (A / D) converter, one or more buffers, and a digital baseband.

[0053] In one or more embodiments, reference Figure 1 , AP 102 and user equipment 120 may exchange frames 140. The frames may include an 802.11 PPDU with an LDPC codeword (e.g., Figure 2 as shown, and other 802.11 frames).

[0054] Figure 2A diagram 200 illustrating the use of extended Wi-Fi LDPC codewords according to one or more example embodiments of the present disclosure is shown.

[0055] refer to Figure 2 , AP 202 can communicate with STA 204. AP 202 can generate and transmit PPDU 206, which can include header 208, which can optionally indicate whether the codewords in PPDU 206 include all codewords of a previously transmitted PPDU. PPDU 206 can include a plurality of PHY codewords (e.g., CW1, CW2, ..., CWN) of N codewords. Optionally, PPDU 206 can include CRC field 210 to allow STA 204 to determine whether any codeword of PPDU 206 was not received by STA 204. The codewords of PPDU 206 can have the same length, thereby allowing PPDU 206 to avoid using sequence numbers for codewords and allowing STA 204 to determine which codewords have been received or not received without the need for sequence numbers.

[0056] Still refer to Figure 2 Since 802.11be allows 94,080 coded bits per OFDM symbol (e.g., symbol 1, symbol 2, ..., symbol M as shown in the figure) for two spatial streams, 4096QAM, and 320MHz bandwidth, a symbol can include 48 codewords. Therefore, a symbol can be used for a maximum of 48 codewords, and when N codewords is greater than 48 codewords, additional symbols can be used.

[0057] In one or more embodiments, decoder 232 may be a parallel processing decoder. Since row and column weights are the same, decoder 232 can decode codewords of both existing length 1944 bits and extended length 3888 bits. To accommodate the larger number of bits allowed per symbol, the 8x48 basis matrix for LDPC coding (e.g., Figure 3 Specifically, the new 8x48 base matrix can double the size of the codeword from 1944 to 3888. To double the codeword size, the encoder 230 can use a mask matrix (e.g., as shown in Table 2 or Table 4) on top of the base matrix (e.g., as shown in Table 1 or Table 3). Figure 3 The codeword generation is further explained.

[0058] The LDPC PPDU encoding process that encoder 230 can use to encode PPDU 206 is defined by 19.3.11.7.5 of the IEEE 802.11-2020 standard. In summary, the transmitting device can determine the number of available bits in the minimum number of OFDM symbols that the data field of the packet can fit into, and can determine the integer number of LDPC codewords to be transmitted and the length of the codewords to be used. Currently, the maximum LDPC codeword length is 1944, but it can be extended to 3844 using the techniques described herein. LDPC encoding may include data bits, shortening bits, and parity bits. Encoder 230 may discard shortening bits and punctured bits, leaving data bits and some parity bits. Some repeated data bits may be copied and added after the parity bits, resulting in data bits, parity bits, and copied repeated bits. The resulting LDPC codewords are sequentially converted into a bit stream and rearranged into blocks as part of the stream parsing process and data interleaver process specified in 19.3.11.7.6 and 19.3.11.8 of the IEEE 802.11-2020 standard. The constellation mapping between the bits at the interleaver output and the complex constellation points for QAM and phase-shift keying is defined in 19.3.11.9 of the IEEE 802.11-2020 standard. The transmission of LDPC codewords is defined in 19.3.11.11 of the IEEE 802.11-2020 standard.

[0059] Figure 3 is an example base matrix 300 for low parity density check Wi-Fi coding of extended codewords according to one or more example embodiments of the present disclosure.

[0060] refer to Figure 3 The base matrix 300 is an 8×48 matrix, which doubles the number of rows and columns of the existing base matrix shown in Table 1 for generating LDPC codewords in Wi-Fi. Figure 3 The base matrix 300 is shown divided into three parts, with the right side of the upper part connected to the left side of the middle part, and the right side of the middle part connected to the left side of the lower part (for example, due to the size of the matrix relative to the size of the drawing, the base matrix 300 is shown in separated parts rather than being shown completely from left to right on the page). Figure 3 The basis matrix 300 of can be generated by applying the mask matrix of Table 2 above to the elements of Table 1 above, as explained below.

[0061] In one or more embodiments, the codeword expansion operation may be applied to the base matrix 300 by cyclically shifting an 81x81 identity matrix (e.g., a square matrix with ones on the main diagonal and zeros elsewhere) n times, where n may be equal to the number of elements of the new base matrix 300. After the 81x81 matrix expansion, the new parity-check matrix may have dimensions of 648x3888, thereby allowing a new LDPC codeword size of 3888 bits.

[0062] In one or more embodiments, to generate Figure 2 The codeword of Table 2 is used as an extended LDPC codeword, and the mask matrix of Table 2 above can be applied to the elements of Table 1 as follows. When the value 0 in Table 2 is applied to the corresponding element in Table 1 at the same matrix position, the operation is defined by the above formula (1). When the value 1 in Table 2 above is applied to the corresponding element in Table 1 at the same matrix position, the operation is defined by the above formula (2). The position of the value "-1" in the mask matrix of Table 2 is the same as the "-1" in the basis matrix of Table 1. Therefore, when the value "-1" in Table 2 is applied to the corresponding element in Table 1 at the same matrix position, the operation is defined by the above formula (3). The result of applying the mask matrix of Table 2 to the basis matrix of Table 1 is a new basis matrix 300 for the extended length codeword.

[0063] Figure 4 A graphical diagram 400 illustrates packet error rate versus signal-to-noise ratio for conventional Wi-Fi codeword lengths and extended Wi-Fi codeword lengths, according to one or more example embodiments of the present disclosure.

[0064] refer to Figure 4Graph 400 shows the packet error rate (PER) for each signal-to-noise ratio (SNR) Wi-Fi LDPC codeword. PER 402 represents a 3888-bit LDPC Wi-Fi codeword using MCS 9. PER 404 represents a 1944-bit LDPC Wi-Fi codeword using MCS 9. PER 406 represents a 3888-bit LDPC Wi-Fi codeword using MCS 11. PER 408 represents a 1944-bit LDPC Wi-Fi codeword using MCS 11. PER 410 represents a 3888-bit LDPC Wi-Fi codeword using MCS 13. PER 412 represents a 1944-bit LDPC Wi-Fi codeword using MCS 13. As shown, the PER 402 of the longer LDPC codeword using MCS 9 is less than (e.g., this is an improvement in error rate) the PER 404 of the shorter LDPC codeword using MCS 9. The PER 406 of the longer LDPC codeword using MCS 11 is less than (e.g., this is an improvement in error rate) the PER 408 of the shorter LDPC codeword using MCS 11. The PER 410 of the longer LDPC codeword using MCS 13 is less than (e.g., this is an improvement in error rate) the PER 412 of the shorter LDPC codeword using MCS 13.

[0065] Figure 5 A flow chart illustrating an illustrative process 500 for low parity density check Wi-Fi encoding using extended codewords is shown, according to one or more example embodiments of the present disclosure.

[0066] At block 502, a device (e.g., Figure 1 AP 102 Figure 1 User equipment 120, Figure 2 AP 202 Figure 2 STA204, Figure 7 The enhanced codeword device 719 may identify a first base matrix (e.g., a base matrix in Table 1 or Table 3, or another base matrix for a different code rate). The first base matrix may be used to generate a 1944-bit Wi-Fi LDPC codeword, and its size may be 4x24.

[0067] At block 504 , the device may identify a mask matrix (e.g., the mask matrix of Table 2 or Table 4, or another 4×24 mask matrix for a different code rate) to use to expand the first base matrix into a second base matrix for generating a 3888-bit Wi-Fi LDPC codeword.

[0068] At block 506, the device may generate a second basis matrix by applying the mask matrix to (e.g., multiplying the entries of the mask matrix by) each entry of the first basis matrix. Since the mask matrix may be filled with 0, 1, and -1, and since the -1 of the mask matrix may be located at the same entry / position as in the first basis matrix, the application of the mask matrix may use formulas (1)-(3) above, such that each multiplication of 0*x, 1*x (e.g., for entry x of the first basis matrix), and -1*-1 produces a 2x2 matrix according to formulas (1)-(3) above. The second basis matrix may be an 8x48 matrix (e.g., as Figure 3 The entries of the second basis matrix can provide cyclic shifts to be applied to the entries of the identity matrix used when generating LDPC codewords (e.g., an 81x81 identity matrix used to generate a 648x3888 parity check matrix for generating a 3888-bit LDPC codeword).

[0069] At block 508, the device may generate a parity check matrix by applying the second base matrix to the identity matrix.The parity check matrix, which may be a 648x3888 matrix, is applied to bits used to generate the LDPC codeword by multiplying entries of the parity check matrix with the second base matrix.

[0070] At block 510, the device may generate a 3888-bit codeword based on a parity check matrix. Generating codewords based on a parity check matrix is ​​defined by the sections of the 802.11-2020 standard referenced above. Multiple 3888-bit codewords may be generated using the same process based on the number of bits to be transmitted.

[0071] At block 512, the device may transmit a frame having one or more codewords including the codeword (e.g., Figure 1 Frame 140, Figure 2 Due to the bandwidth extension of 802.11be, a frame may include one or more symbols of 94,080 bits, with any symbol including 48 LDPC codewords.

[0072] It is to be understood that the above description is intended to be illustrative, and is not intended to be restrictive.

[0073] Figure 6 FIG. 6 shows a functional diagram of an exemplary communication station 600 according to one or more exemplary embodiments of the present disclosure. In one embodiment, Figure 6 FIGURE 1 illustrates an example of an AP 102 ( Figure 1 ) or user equipment 120 ( Figure 1). The communication station 600 may also be suitable for use as a handheld device, a mobile device, a cellular phone, a smartphone, a tablet device, a netbook, a wireless terminal, a laptop computer, a wearable computer device, a femtocell, a high data rate (HDR) subscriber station, an access point, an access terminal, or other personal communication system (PCS) device.

[0074] Communication station 600 may include communication circuitry 602 and a transceiver 610 for transmitting and receiving signals to and from other communication stations using one or more antennas 601. Communication circuitry 602 may include circuitry operable for physical layer (PHY) communications and / or medium access control (MAC) communications that control access to a wireless medium, and / or any other communication layer for transmitting and receiving signals. Communication station 600 may also include processing circuitry 606 and memory 608 arranged to perform the operations described herein. In some embodiments, communication circuitry 602 and processing circuitry 606 may be configured to perform the operations detailed in the aforementioned figures, diagrams, and flows.

[0075] According to some embodiments, communication circuitry 602 may be configured to contend for a wireless medium and configure frames or packets for communication over the wireless medium. Communication circuitry 602 may be configured to transmit and receive signals. Communication circuitry 602 may also include circuitry for modulation / demodulation, upconversion / downconversion, filtering, amplification, and the like. In some embodiments, processing circuitry 606 of communication station 600 may include one or more processors. In other embodiments, two or more antennas 601 may be coupled to communication circuitry 602 configured to transmit and receive signals. Memory 608 may store information for configuring processing circuitry 606 to perform operations for configuring and transmitting message frames and performing the various operations described herein. Memory 608 may include any type of memory for storing information in a machine (e.g., computer) readable form, including non-transitory memory. For example, memory 608 may include a computer-readable storage device, read-only memory (ROM), random-access memory (RAM), magnetic disk storage media, optical storage media, flash memory devices, and other storage devices and media.

[0076] In some embodiments, the communication station 600 may be part of a portable wireless communication device, such as a personal digital assistant (PDA), a laptop or portable computer with wireless communication capabilities, a web tablet, a wireless telephone, a smartphone, a wireless headset, a pager, an instant messaging device, a digital camera, an access point, a television, a medical device (e.g., a heart rate monitor, a blood pressure monitor, etc.), a wearable computer device, or another device that can receive and / or transmit information wirelessly.

[0077] In some embodiments, communication station 600 may include one or more antennas 601. Antenna 601 may include one or more directional or omnidirectional antennas, such as dipole antennas, monopole antennas, patch antennas, loop antennas, microstrip antennas, or other types of antennas suitable for transmission of RF signals. In some embodiments, instead of two or more antennas, a single antenna with multiple apertures may be used. In these embodiments, each aperture may be considered a separate antenna. In some multiple-input multiple-output (MIMO) embodiments, the antennas may be effectively separated to obtain spatial diversity and to generate different channel characteristics between each antenna and the antenna of the transmitting station.

[0078] In some embodiments, communication station 600 may include one or more of the following: a keyboard, a display, a non-volatile memory port, multiple antennas, a graphics processor, an application processor, speakers, and other mobile device elements.The display may be an LCD screen including a touch screen.

[0079] Although the communication station 600 is illustrated as having several separate functional elements, two or more of these functional elements may be combined and implemented by a combination of software-configured elements (e.g., processing elements including digital signal processors (DSPs)) and / or other hardware elements. For example, some elements may include one or more microprocessors, DSPs, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), radio-frequency integrated circuits (RFICs), and combinations of various hardware and logic circuits for performing at least the functions described herein. In some embodiments, the functional elements of the communication station 600 may refer to one or more processes operating on one or more processing elements.

[0080] Certain embodiments may be implemented in one or a combination of hardware, firmware, and software. Other embodiments may also be implemented as instructions stored on a computer-readable storage device, which may be read and executed by at least one processor to perform the operations described herein. A computer-readable storage device may include any non-transitory memory mechanism for storing information in a machine (e.g., computer) readable form. For example, a computer-readable storage medium may include a read-only memory (ROM), a random access memory (RAM), a magnetic disk storage medium, an optical storage medium, a flash memory device, and other storage devices and media. In some embodiments, the communication station 600 may include one or more processors and may be configured to store instructions on a computer-readable storage device.

[0081] Figure 7 A block diagram of an example machine 700 or system is shown on which any one or more of the techniques (e.g., methodologies) discussed herein may be performed. In other embodiments, the machine 700 may operate as a standalone device or may be connected (e.g., networked) to other machines. In a networked deployment, the machine 700 may operate as a server machine, a client machine, or both in a server-client network environment. In one example, the machine 700 may function as a peer machine in a peer-to-peer (P2P) (or other distributed) network environment. The machine 700 may be a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a mobile phone, a wearable computer device, a web appliance, a network router, a switch, or a bridge, or any machine capable of executing instructions (sequential or otherwise) specifying actions for that machine (e.g., a base station). Further, while a single machine is illustrated, the term "machine" shall also be taken to include any collection of machines that individually or jointly execute a set (or multiple sets) of instructions to perform any one or more of the methodologies discussed herein, such as in cloud computing, software as a service (SaaS), or other computer cluster configuration.

[0082] Examples as described herein may include or may operate on logic or several components, modules or mechanisms. A module is a tangible entity (e.g., hardware) that is capable of performing a specified operation when in operation. A module includes hardware. In one example, the hardware may be specifically configured to perform a specific operation (e.g., hardwired). In another example, the hardware may include a configurable execution unit (e.g., a transistor, a circuit, etc.) and a computer-readable medium containing instructions, wherein the instructions configure the execution unit to perform a specific operation when in operation. This configuration may occur under the command of the execution unit or a loading mechanism. Therefore, when the device is in operation, the execution unit is communicatively coupled to the computer-readable medium. In this example, the execution unit may be a member of more than one module. For example, in operation, the execution unit may be configured by a first instruction set to implement a first module at one point in time and reconfigured by a second instruction set to implement a second module at a second point in time.

[0083] The machine (e.g., a computer system) 700 may include a hardware processor 702 (e.g., a central processing unit (CPU), a graphics processing unit (GPU), a hardware processor core, or any combination thereof), a main memory 704, and a static memory 706, some or all of which may communicate with each other via an interconnection link (e.g., a bus) 708. The machine 700 may also include a power management device 732, a graphics display device 710, an alphanumeric input device 712 (e.g., a keyboard), and a user interface (UI) navigation device 714 (e.g., a mouse). In one example, the graphics display device 710, the alphanumeric input device 712, and the UI navigation device 714 may be a touch screen display. The machine 700 may also include a storage device (i.e., a drive unit) 716, a signal generating device 718 (e.g., a speaker), an enhanced codeword device 719, a network interface device / transceiver 720 coupled to (one or more) antennas 730, and one or more sensors 728, such as a global positioning system (GPS) sensor, a compass, an accelerometer, or other sensors. The machine 700 may include an output controller 734, such as a serial (e.g., universal serial bus (USB)), parallel, or other wired or wireless (e.g., infrared (IR), near field communication (NFC), etc.) connection to communicate with or control one or more peripheral devices (e.g., a printer, a card reader, etc.). Operations according to one or more example embodiments of the present disclosure may be performed by a baseband processor. The baseband processor may be configured to generate corresponding baseband signals. The baseband processor may also include physical layer (PHY) and media access control layer (MAC) circuitry, and may also interface with the hardware processor 702 to generate and process baseband signals and control the operation of the main memory 704, storage device 716, and / or enhanced codeword device 719. The baseband processor may be provided on a single radio card, a single chip, or an integrated circuit (IC).

[0084] The storage device 716 may include a machine-readable medium 722 on which is stored one or more data structures or instructions 724 (e.g., software) embodying or utilized by any one or more of the techniques or functionality described herein. The instructions 724 may also reside, completely or at least partially, within the main memory 704, within the static memory 706, or within the hardware processor 702 during execution thereof by the machine 700. In one example, one or any combination of the hardware processor 702, the main memory 704, the static memory 706, or the storage device 716 may constitute a machine-readable medium.

[0085] Enhanced codeword device 719 may implement or perform any of the operations and processes described and illustrated above (eg, process 500 ).

[0086] It is to be understood that the above is only a subset of the functions that the enhanced codeword device 719 may be configured to perform, and other functions included throughout this disclosure may also be performed by the enhanced codeword device 719.

[0087] Although machine-readable medium 722 is illustrated as a single medium, the term “machine-readable medium” may include a single medium or multiple media (eg, a centralized or distributed database, and / or associated caches and servers) configured to store one or more instructions 724 .

[0088] Various embodiments may be implemented in whole or in part in software and / or firmware. This software and / or firmware may take the form of instructions contained in or on a non-transitory computer-readable storage medium. These instructions may then be read and executed by one or more processors to enable performance of the operations described herein. The instructions may take any suitable form, such as, but not limited to, source code, compiled code, interpreted code, executable code, static code, dynamic code, and the like. Such computer-readable media may include any tangible, non-transitory medium for storing information in a form readable by one or more computers, such as, but not limited to, read-only memory (ROM); random access memory (RAM); magnetic disk storage media; optical storage media; flash memory, and the like.

[0089] The term "machine-readable medium" may include any medium that is capable of storing, encoding, or carrying instructions for execution by the machine 700 and causing the machine 700 to perform any one or more of the techniques of the present disclosure, or capable of storing, encoding, or carrying data structures used by or associated with such instructions. Non-limiting examples of machine-readable media may include solid-state memory, as well as optical and magnetic media. In one example, large-scale machine-readable media include machine-readable media in which a plurality of particles have a rest mass. Specific examples of large-scale machine-readable media may include non-volatile memory, such as semiconductor memory devices (e.g., electrically programmable read-only memory (EPROM) or electrically erasable programmable read-only memory (EEPROM)) and flash memory devices; magnetic disks, such as internal hard disks and removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks.

[0090] Instructions 724 may also be sent or received over a communication network 726 using a transmission medium via the network interface device / transceiver 720 using any of a number of transmission protocols (e.g., frame relay, internet protocol (IP), transmission control protocol (TCP), user datagram protocol (UDP), hypertext transfer protocol (HTTP), etc.). Example communication networks may include a local area network (LAN), a wide area network (WAN), a packet data network (e.g., the Internet), a mobile phone network (e.g., a cellular network), a plain old telephone (POTS) network, a wireless data network (e.g., a wireless network known as The Institute of Electrical and Electronics Engineers (IEEE) 802.11 family of standards, known as ), IEEE 802.15.4 family of standards, and peer-to-peer (P2P) networks, among others. In one example, the network interface device / transceiver 720 may include one or more physical sockets (e.g., Ethernet, coaxial, or telephone sockets) or one or more antennas to connect to the communication network 726. In one example, the network interface device / transceiver 720 may include multiple antennas to communicate wirelessly using at least one of single-input multiple-output (SIMO), multiple-input multiple-output (MIMO), or multiple-input single-output (MISO) technology. The term "transmission medium" should be understood to include any intangible medium that can store, encode, or carry instructions for execution by the machine 700, and includes digital or analog communication signals or other intangible media to facilitate communication of such software.

[0091] In various implementations, the operations and processes described and shown above may be implemented or performed in any appropriate order as needed. Additionally, in some implementations, at least a portion of the operations may be performed in parallel. Additionally, in some implementations, less than or more than the operations described may be performed.

[0092] Figure 8 is a block diagram of a radio architecture 105A, 105B according to some embodiments, which may be used in Figure 1 The radio architecture 105A, 105B may be implemented in any of the example AP 102 and / or example STA 120. The radio architecture 105A, 105B may include radio front-end module (FEM) circuits 804a-b, radio IC circuits 806a-b, and baseband processing circuits 808a-b. As shown, the radio architecture 105A, 105B includes wireless local area network (WLAN) functionality and Bluetooth (BT) functionality, although embodiments are not limited thereto. In this disclosure, "WLAN" and "Wi-Fi" are used interchangeably.

[0093] The FEM circuits 804a-b may include WLAN or Wi-Fi FEM circuitry 804a and Bluetooth (BT) FEM circuitry 804b. The WLAN FEM circuitry 804a may include a receive signal path that includes circuitry configured to operate on WLAN RF signals received from one or more antennas 801, amplify the received signals, and provide an amplified version of the received signals to the WLAN radio IC circuitry 806a for further processing. The BT FEM circuitry 804b may include a receive signal path that includes circuitry configured to operate on BT RF signals received from one or more antennas 801, amplify the received signals, and provide an amplified version of the received signals to the BT radio IC circuitry 806b for further processing. The FEM circuitry 804a may also include a transmit signal path that may include circuitry configured to amplify WLAN signals provided by the radio IC circuitry 806a for wireless transmission by one or more of the antennas 801. Additionally, the FEM circuitry 804b may also include a transmit signal path that may include circuitry configured to amplify BT signals provided by the radio IC circuitry 806b for wireless transmission via one or more antennas. Figure 8 In the embodiment of FIG, while FEM 804 a and FEM 804 b are shown as being distinct from one another, the embodiments are not limited thereto and include within their scope the use of a FEM (not shown) that includes transmit paths and / or receive paths for both WLAN and BT signals, or the use of one or more FEM circuits where at least some of the FEM circuits share transmit and / or receive signal paths for both WLAN and BT signals.

[0094] As shown, the radio IC circuits 806a-b may include a WLAN radio IC circuit 806a and a BT radio IC circuit 806b. The WLAN radio IC circuit 806a may include a receive signal path that may include circuitry to downconvert WLAN RF signals received from the FEM circuit 804a and provide the baseband signals to the WLAN baseband processing circuit 808a. The BT radio IC circuit 806b may also include a receive signal path that may include circuitry to downconvert BT RF signals received from the FEM circuit 804b and provide the baseband signals to the BT baseband processing circuit 808b. The WLAN radio IC circuit 806a may also include a transmit signal path that may include circuitry to upconvert WLAN baseband signals provided by the WLAN baseband processing circuit 808a and provide the WLAN RF output signals to the FEM circuit 804a for subsequent wireless transmission via one or more antennas 801. The BT radio IC circuit 806b may also include a transmit signal path that may include circuitry to up-convert the BT baseband signal provided by the BT baseband processing circuit 808b and provide a BT RF output signal to the FEM circuit 804b for subsequent wireless transmission by the one or more antennas 801. Figure 8 In the embodiment, although the radio IC circuits 806a and 806b are shown as being distinct from each other, the embodiments are not limited thereto and include within their scope the use of a radio IC circuit (not shown) that includes a transmit signal path and / or receive signal path for both WLAN and BT signals, or the use of one or more radio IC circuits in which at least some of the radio IC circuits share transmit and / or receive signal paths for both WLAN and BT signals.

[0095] The baseband processing circuits 808a-b may include WLAN baseband processing circuitry 808a and BT baseband processing circuitry 808b. WLAN baseband processing circuitry 808a may include memory, such as a set of RAM arrays in a Fast Fourier Transform (FFT) or Inverse Fast Fourier Transform (IFT) block (not shown) of the WLAN baseband processing circuitry 808a. Each of the WLAN baseband circuitry 808a and the BT baseband circuitry 808b may also include one or more processors and control logic to process signals received from the respective WLAN or BT receive signal paths of the radio IC circuitry 806a-b and to generate respective WLAN or BT baseband signals for the transmit signal paths of the radio IC circuitry 806a-b. Each of the baseband processing circuitry 808a and 808b may also include physical layer (PHY) and medium access control layer (MAC) circuitry and may further interface with devices for generating and processing baseband signals and for controlling the operation of the radio IC circuitry 806a-b.

[0096] Still refer to Figure 8 According to the illustrated embodiment, the WLAN-BT coexistence circuit 813 may include logic for providing an interface between the WLAN baseband circuit 808a and the BT baseband circuit 808b to enable use cases requiring WLAN and BT coexistence. Furthermore, a switch 803 may be provided between the WLAN FEM circuit 804a and the BT FEM circuit 804b to allow switching between WLAN and BT radios as required by the application. Furthermore, while the antenna 801 is depicted as being connected to the WLAN FEM circuit 804a and the BT FEM circuit 804b, respectively, embodiments include within their scope the sharing of one or more antennas between the WLAN and BT FEMs, or the provision of more than one antenna connected to each of the FEMs 804a or 804b.

[0097] In some embodiments, the front-end module circuits 804a-b, the radio IC circuits 806a-b, and the baseband processing circuits 808a-b may be provided on a single radio card, such as wireless radio card 802. In some other embodiments, one or more antennas 801, the FEM circuits 804a-b, and the radio IC circuits 806a-b may be provided on a single radio card. In some other embodiments, the radio IC circuits 806a-b and the baseband processing circuits 808a-b may be provided on a single chip or integrated circuit (IC), such as IC 812.

[0098] In some embodiments, wireless radio card 802 may include a WLAN radio card and may be configured for Wi-Fi communications, although the scope of the embodiments is not limited in this respect. In some of these embodiments, radio architecture 105A, 105B may be configured to receive and transmit orthogonal frequency division multiplexed (OFDM) or orthogonal frequency division multiple access (OFDMA) communication signals over a multi-carrier communication channel. OFDM or OFDMA signals may include multiple orthogonal subcarriers.

[0099] In some of these multi-carrier embodiments, the radio architectures 105A, 105B may be part of a Wi-Fi communication station (STA), such as a wireless access point (AP), a base station, or a mobile device including a Wi-Fi device. In some of these embodiments, the radio architectures 105A, 105B may be configured to transmit and receive signals in accordance with a particular communication standard and / or protocol, such as any Institute of Electrical and Electronics Engineers (IEEE) standard, including 802.11n-2009, IEEE 802.11-2012, IEEE 802.11-2016, 802.11n-2009, 802.11ac, 802.11ah, 802.11ad, 802.11ay, 802.11be, and / or 802.11ax standards and / or proposed specifications for WLANs, although the scope of the embodiments is not limited in this respect. The radio architectures 105A, 105B may also be adapted to transmit and / or receive communications in accordance with other technologies and standards.

[0100] In some embodiments, the radio architectures 105A, 105B may be configured for high-efficiency Wi-Fi (HEW) communications in accordance with the IEEE 802.11ax standard. In these embodiments, the radio architectures 105A, 105B may be configured to communicate in accordance with OFDMA technology, although the scope of the embodiments is not limited in this respect.

[0101] In some other embodiments, the radio architectures 105A, 105B may be configured to transmit and receive signals transmitted using one or more other modulation techniques, such as spread spectrum modulation (e.g., direct sequence code division multiple access (DS-CDMA) and / or frequency hopping code division multiple access (FH-CDMA)), time-division multiplexing (TDM) modulation, and / or frequency-division multiplexing (FDM) modulation, although the scope of the embodiments is not limited in this respect.

[0102] In some embodiments, as Figure 8 As further shown, the BT baseband circuit 808 b may comply with a Bluetooth (BT) connectivity standard, such as Bluetooth, Bluetooth 8.0, or Bluetooth 6.0, or any other iteration of the Bluetooth standard.

[0103] In some embodiments, the radio architecture 105A, 105B may include other radio cards, such as a cellular radio card configured for cellular (e.g., 5GPP, such as LTE, LTE-Advanced, or 7G communications).

[0104] In some IEEE 802.11 embodiments, the radio architectures 105A, 105B can be configured for communication over a variety of channel bandwidths, including bandwidths having center frequencies of approximately 900 MHz, 2.4 GHz, 5 GHz, and bandwidths of approximately 2 MHz, 4 MHz, 5 MHz, 5.5 MHz, 6 MHz, 8 MHz, 10 MHz, 20 MHz, 40 MHz, 80 MHz (with continuous bandwidth), or 80+80 MHz (160 MHz) (with non-contiguous bandwidth). In some embodiments, a 920 MHz channel bandwidth can be used. However, the scope of the embodiments is not limited to the above center frequencies.

[0105] Figure 9 WLAN FEN circuit 804a according to some embodiments is shown. Although described in conjunction with WLAN FEM circuit 804a Figure 9 , but can be combined with the example BT FEM circuit 804b ( Figure 8 ) to describe Figure 9 , although other circuit configurations may also be appropriate.

[0106] In some embodiments, the FEM circuit 804a may include a TX / RX switch 902 to switch between transmit mode and receive mode operation. The FEM circuit 804a may include a receive signal path and a transmit signal path. The receive signal path of the FEM circuit 804a may include a low-noise amplifier (LNA) 906 to amplify the received RF signal 903 and provide an amplified received RF signal 907 as an output (e.g., to the radio IC circuits 806a-b ( Figure 8 )). The transmit signal path of circuit 804a may include a power amplifier (PA) to amplify an input RF signal 909 (e.g., provided by radio IC circuits 806a-b), and one or more filters 912, such as a band-pass filter (BPF), a low-pass filter (LPF), or other type of filter, to generate an RF signal 915 for subsequent transmission via an example duplexer 914 (e.g., by antenna 801 ( Figure 8 ) in one or more of the following.

[0107] In some dual-mode embodiments for Wi-Fi communications, the FEM circuit 804a may be configured to operate in either the 2.4 GHz spectrum or the 5 GHz spectrum. In these embodiments, the receive signal path of the FEM circuit 804a may include a receive signal path duplexer 904 to separate the signals from each spectrum, and provide a separate LNA 906 for each spectrum, as shown. In these embodiments, the transmit signal path of the FEM circuit 804a may also include a power amplifier 910 and a filter 912, such as a BPF, LPF, or another type of filter for each spectrum, and a transmit signal path duplexer 904 to provide the signal of one of the different spectrums onto a single transmit path for subsequent transmission by the antenna 801 ( Figure 8 In some embodiments, BT communications may utilize a 2.4 GHz signal path and may utilize the same FEM circuit 804a as used for WLAN communications.

[0108] Figure 10 The radio IC circuit 806a is shown in accordance with some embodiments. The radio IC circuit 806a is suitable for use as a WLAN or BT radio IC circuit 806a / 606b ( Figure 8 ) is an example of a circuit, although other circuit configurations may also be appropriate. Alternatively, the example BT radio IC circuit 806b may be described in conjunction with the example BT radio IC circuit 806b. Figure 10 .

[0109] In some embodiments, radio IC circuit 806a may include a receive signal path and a transmit signal path. The receive signal path of radio IC circuit 806a may include at least mixer circuit 1002, such as a downconversion mixer circuit, amplifier circuit 1006, and filter circuit 1008. The transmit signal path of radio IC circuit 806a may include at least filter circuit 1012 and mixer circuit 1014, such as an upconversion mixer circuit. Radio IC circuit 806a may also include synthesizer circuit 1004 for synthesizing frequency 1005 for use by mixer circuit 1002 and mixer circuit 1014. According to some embodiments, mixer circuits 1002 and / or 1014 may each be configured to provide direct conversion functionality. Compared to standard superheterodyne mixer circuits, the latter type of circuit exhibits a much simpler architecture and can mitigate any flicker noise introduced therewith, for example, by using OFDM modulation. Figure 10 Only a simplified version of the radio IC circuitry is shown, and although not shown, embodiments may include more than one component for each of the depicted circuits. For example, mixer circuit 1014 may each include one or more mixers, and filter circuits 1008 and / or 1012 may each include one or more filters, such as one or more BPFs and / or LPFs, as required by the application. For example, when the mixer circuits are direct conversion types, they may each include two or more mixers.

[0110] In some embodiments, the mixer circuit 1002 may be configured to generate a plurality of mixers from the FEM circuits 804a-b ( Figure 8 ) down-converts the received RF signal 907. The amplifier circuit 1006 may be configured to amplify the down-converted signal, and the filter circuit 1008 may include an LPF configured to remove unwanted signals from the down-converted signal to generate an output baseband signal 1007. The output baseband signal 1007 may be provided to the baseband processing circuits 808a-b ( Figure 8 ) for further processing. In some embodiments, output baseband signal 1007 can be a zero-frequency baseband signal, although this is not a requirement. In some embodiments, mixer circuit 1002 can include a passive mixer, although the scope of the embodiments is not limited in this respect.

[0111] In some embodiments, mixer circuit 1014 may be configured to upconvert input baseband signal 1011 based on synthesized frequency 1005 provided by synthesizer circuit 1004 to generate RF output signal 909 for FEM circuits 804a-b. Baseband signal 1011 may be provided by baseband processing circuits 808a-b and may be filtered by filter circuit 1012. Filter circuit 1012 may include an LPF or a BPF, although the scope of the embodiments is not limited in this respect.

[0112] In some embodiments, mixer circuit 1002 and mixer circuit 1014 may each include two or more mixers and may be configured for quadrature downconversion and / or upconversion, respectively, with the aid of combiner 1004. In some embodiments, mixer circuit 1002 and mixer circuit 1014 may each include two or more mixers, each configured for image rejection (e.g., Hartley image rejection). In some embodiments, mixer circuit 1002 and mixer circuit 1014 may each be configured for direct downconversion and / or direct upconversion, respectively. In some embodiments, mixer circuit 1002 and mixer circuit 1014 may be configured for superheterodyne operation, although this is not a requirement.

[0113] According to one embodiment, the mixing circuit 1002 may include: a quadrature passive mixer (eg, for in-phase (I) and quadrature-phase (Q) paths). In such an embodiment, the Figure 9 The RF input signal 907 may be downconverted to provide I and Q baseband output signals to be sent to a baseband processor.

[0114] The quadrature passive mixers may be driven by zero-degree and ninety-degree time-varying LO switching signals provided by a quadrature circuit that may be configured to receive the LO frequency (fLO) from a local oscillator or synthesizer, such as synthesizer 1004 ( Figure 10 ) LO frequency 1005. In some embodiments, the LO frequency can be the carrier frequency, while in other embodiments, the LO frequency can be some fraction of the carrier frequency (e.g., one-half the carrier frequency, one-third the carrier frequency). In some embodiments, the zero-degree and ninety-degree time-varying switching signals can be generated by a synthesizer, although the scope of the embodiments is not limited in this respect.

[0115] In some embodiments, the LO signal can vary in duty cycle (the percentage of a cycle that the LO signal is high) and / or offset (the difference between the start points of the cycles). In some embodiments, the LO signal can have an 85% duty cycle and an 80% offset. In some embodiments, each branch of the mixer circuit (e.g., the in-phase (I) and quadrature-phase (Q) paths) can operate at an 80% duty cycle, which can result in a significant reduction in power consumption.

[0116] RF input signal 907( Figure 9 ) may include balanced signals, although the scope of the embodiments is not limited in this respect. The I and Q baseband output signals may be provided to a low noise amplifier, such as amplifier circuit 1006 ( Figure 10 ) or filter circuit 1008 ( Figure 10 ).

[0117] In some embodiments, output baseband signal 1007 and input baseband signal 1011 may be analog baseband signals, although the scope of the embodiments is not limited in this respect. In some alternative embodiments, output baseband signal 1007 and input baseband signal 1011 may be digital baseband signals. In these alternative embodiments, the radio IC circuitry may include analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuitry.

[0118] In some dual-mode embodiments, separate radio IC circuitry may be provided to process signals for each spectrum, or for other spectrums not mentioned herein, although the scope of the embodiments is not limited in this respect.

[0119] In some embodiments, the synthesizer circuit 1004 may be a fractional-N synthesizer or a fractional-N / N+1 synthesizer, although the scope of the embodiments is not limited in this respect, as other types of frequency synthesizers may be appropriate. For example, the synthesizer circuit 1004 may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer including a phase-locked loop with a frequency divider. According to some embodiments, the synthesizer circuit 1004 may include a digital synthesizer circuit. One advantage of using a digital synthesizer circuit is that, while it may still include some analog components, its footprint can be much smaller than that of an analog synthesizer circuit. In some embodiments, the frequency input to the synthesizer circuit 1004 may be provided by a voltage-controlled oscillator (VCO), although this is not a requirement. The divider control input may be further controlled by the baseband processing circuit 808a-b ( Figure 8) is provided, depending on the desired output frequency 1005. In some embodiments, the divider control input (e.g., N) can be determined from a lookup table (e.g., within a Wi-Fi card) based on the channel number and channel center frequency determined or indicated by the example application processor 810. The application processor 810 can include or otherwise be connected to one of the example secure signal converter 101 or the example receive signal converter 103 (e.g., depending on which device the example radio architecture is implemented on).

[0120] In some embodiments, synthesizer circuit 1004 can be configured to generate a carrier frequency as output frequency 1005, while in other embodiments, output frequency 1005 can be a fraction of the carrier frequency (e.g., half the carrier frequency, one-third the carrier frequency). In some embodiments, output frequency 1005 can be an LO frequency (fLO).

[0121] Figure 11 FIGURE 8 illustrates a functional block diagram of a baseband processing circuit 808a according to some embodiments. The baseband processing circuit 808a is a circuit that can be used as a baseband processing circuit 808a ( Figure 8 ) is an example of a circuit, although other circuit configurations may also be appropriate. Alternatively, Figure 10 The example can be used to implement Figure 8 An example BT baseband processing circuit 808b.

[0122] Baseband processing circuitry 808a may include circuitry for processing signals received from radio IC circuitry 806a-b ( Figure 8 ) and a transmit baseband processor (TX BBP) 1104 for generating a transmit baseband signal 1011 for the radio IC circuits 806a-b. The baseband processing circuit 808a may also include control logic 1106 for coordinating the operation of the baseband processing circuit 808a.

[0123] In some embodiments (e.g., when analog baseband signals are exchanged between baseband processing circuits 808a-b and radio IC circuits 806a-b), baseband processing circuit 808a may include ADC 1110 to convert analog baseband signals 1109 received from radio IC circuits 806a-b into digital baseband signals for processing by RX BBP 1102. In these embodiments, baseband processing circuit 808a may also include DAC 1112 to convert digital baseband signals from TX BBP 1104 into analog baseband signals 1111.

[0124] In some embodiments, for example, where OFDM or OFDMA signals are communicated via baseband processor 808a, transmit baseband processor 1104 may be configured to generate an OFDM or OFDMA signal suitable for transmission by performing an inverse fast Fourier transform (IFFT). Receive baseband processor 1102 may be configured to process the received OFDM or OFDMA signal by performing an FFT. In some embodiments, receive baseband processor 1102 may be configured to detect the presence of an OFDM or OFDMA signal by performing autocorrelation to detect a preamble, such as a short preamble, and to detect the presence of an OFDM or OFDMA signal by performing cross-correlation to detect a long preamble. The preamble may be part of a predetermined frame structure for Wi-Fi communication.

[0125] Return Reference Figure 8 In some embodiments, antenna 801 ( Figure 8 ) can each include one or more directional or omnidirectional antennas, such as dipole antennas, monopole antennas, patch antennas, loop antennas, microstrip antennas, or other types of antennas suitable for transmitting RF signals. In some multiple-input multiple-output (MIMO) embodiments, the antennas can be effectively separated to exploit spatial diversity and the different channel characteristics that can be generated. Antennas 801 can each include a set of phased array antennas, although embodiments are not limited to this.

[0126] Although the radio architectures 105A, 105B are shown as having several separate functional elements, one or more of these functional elements may be combined and implemented by a combination of software-configured elements (e.g., processing elements including digital signal processors (DSPs)) and / or other hardware elements. For example, some elements may include one or more microprocessors, DSPs, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), radio-frequency integrated circuits (RFICs), and combinations of various hardware and logic circuits for performing at least the functions described herein. In some embodiments, a functional element may refer to one or more processes operating on one or more processing elements.

[0127] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. The terms "computing device," "user device," "communication station," "station," "handheld device," "mobile device," "wireless device," and "user equipment" (UE) as used herein refer to a wireless communication device, such as a cellular phone, a smartphone, a tablet, a netbook, a wireless terminal, a laptop computer, a femtocell, a high data rate (HDR) subscriber station, an access point, a printer, a point of sale device, an access terminal, or other personal communication system (PCS) device. The device can be mobile or fixed.

[0128] As used within this document, the term "communication" is intended to include sending, or receiving, or both sending and receiving. This may be particularly useful in a claim when describing the organization of data that is sent by one device and received by another device, but only the functionality of one of the devices is required for the claim to infringe. Similarly, a two-way exchange of data between two devices (both devices sending and receiving during the exchange) may be described as "communication" when only the functionality of one of the two devices is claimed. The term "communication" as used herein with respect to wireless communication signals includes sending wireless communication signals and / or receiving wireless communication signals. For example, a wireless communication unit capable of communicating wireless communication signals may include a wireless transmitter that sends wireless communication signals to at least one other wireless communication unit, and / or a wireless communication receiver that receives wireless communication signals from at least one other wireless communication unit.

[0129] As used herein, unless otherwise indicated, the use of ordinal adjectives "first," "second," "third," etc. to describe common objects simply indicates that different instances of similar objects are being referred to and is not intended to imply that the objects so described must be in a given sequence in time, space, ranking, or in any other manner.

[0130] As used herein, the term "access point" (AP) may be a fixed station. An access point may also be referred to as an access node, a base station, an evolved Node B (eNodeB), or some other similar terminology known in the art. An access terminal may also be referred to as a mobile station, a user equipment (UE), a wireless communication device, or some other similar terminology known in the art. Embodiments disclosed herein generally relate to wireless networks. Some embodiments may relate to wireless networks operating in accordance with one of the IEEE 802.11 standards.

[0131] Some embodiments may be used in conjunction with various devices and systems, for example, a personal computer (PC), a desktop computer, a mobile computer, a laptop computer, a notebook computer, a tablet computer, a server computer, a handheld computer, a handheld device, a personal digital assistant (PDA) device, a handheld PDA device, an on-board device, an off-board device, a hybrid device, an in-vehicle device, a non-in-vehicle device, a mobile or portable device, a consumer device, a non-mobile or non-portable device, a wireless communication station, a wireless communication device, a wireless access point (AP), a wired or wireless router, a wired or wireless modem, a video device, an audio device, an audio-visual (A / V) device, a wired or wireless network, a wireless area network, a wireless video area network (WVAN), a local area network (LAN), a wireless LAN (WLAN), a personal area network (PAN), a wireless PAN (WPAN), and the like.

[0132] Some embodiments may be used in conjunction with: one-way and / or two-way radio communication systems, cellular radiotelephone communication systems, mobile phones, cellular phones, wireless phones, personal communication system (PCS) devices, PDA devices containing wireless communication devices, mobile or portable global positioning system (GPS) devices, devices containing GPS receivers or transceivers or chips, devices containing RFID elements or chips, multiple input multiple output (MIMO) transceivers or devices, single input multiple output (SIMO) transceivers or devices, multiple input single output (MISO) transceivers or devices, devices with one or more internal antennas and / or external antennas, digital video broadcast (DVB) devices or systems, multi-standard radio devices or systems, wired or wireless handheld devices (e.g., smart phones), wireless application protocol (WAP) devices, and the like.

[0133] Some embodiments may be used in conjunction with one or more types of wireless communication signals and / or systems conforming to one or more wireless communication protocols, such as radio frequency (RF), infrared (IR), frequency-division multiplexing (FDM), orthogonal FDM (OFDM), time-division multiplexing (TDM), time-division multiple access (TDMA), extended TDMA (E-TDMA), general packet radio service (GPRS), extended GPRS, code-division multiple access (CDMA), wideband CDMA (WCDMA), CDMA 2000, single-carrier CDMA, multi-carrier CDMA, multi-carrier modulation (MDM), discrete multi-tone (DMT), Global Positioning System (GPS), Wi-Fi, Wi-Max, ZigBee, ultra-wideband (UWB), global system for mobile communications (GSM), 2G, 2.5G, 3G, 3.5G, 4G, fifth generation (5G) mobile networks, 3GPP, long term evolution (LTE), LTE-Advanced, enhanced data rates for GSM Evolution (EDGE), etc. Other embodiments may be used in various other devices, systems and / or networks.

[0134] The following examples relate to further embodiments.

[0135] Embodiments according to the present disclosure are disclosed in particular in the accompanying claims directed to a method, a storage medium, an apparatus and a computer program product, wherein any feature mentioned in one claim category (e.g., method) may also be claimed in another claim category (e.g., system). Dependencies or back-references in the accompanying claims are selected for formal reasons only. However, any subject matter resulting from a deliberate back-reference to any preceding claim (especially multiple dependencies) may also be claimed, so that any combination of claims and their features is disclosed and may be claimed regardless of the dependencies selected in the accompanying claims. Claimable subject matter includes not only the combination of features recited in the accompanying claims, but also any other combination of features in the claims, wherein each feature mentioned in a claim may be combined with any other feature or combination of other features in the claims. In addition, any embodiment and feature described or depicted herein may be claimed in a separate claim and / or in any combination with any embodiment or feature described or depicted herein or with any feature of the accompanying claims.

[0136] The above description of one or more implementations provides illustration and description, but is not intended to be exhaustive or to limit the scope of the embodiments to the precise forms disclosed. Modifications and variations are possible in light of the above teachings or may be acquired from practicing the various embodiments.

[0137] Example 1 may be an apparatus for a device for low-density parity check (LDPC) Wi-Fi encoding and decoding, the apparatus comprising a processing circuit coupled to a storage device, the processing circuit being configured to: identify a first base matrix associated with generating a 1944-bit LDPC codeword, the first base matrix having 4 rows and 24 columns; identify a mask matrix associated with generating a second base matrix based on the first base matrix, the mask matrix having 4 rows and 24 columns, entries of the mask matrix including values ​​of 0, 1, and -1, and the second base matrix associated with generating a 3888-bit LDPC codeword; Generate a second base matrix by multiplying each entry of the first base matrix by each entry of the mask matrix, the second base matrix having 8 rows and 48 columns, the entries of the second base matrix indicating corresponding cyclic shifts to be applied to an identity matrix having 81 rows and 81 columns; generate a parity check matrix by multiplying each entry of the second base matrix by each entry of the identity matrix, the parity check matrix having 648 rows and 3888 columns; generate an LDPC codeword comprising 3888 bits based on the parity check matrix; and cause the device to transmit a frame comprising the LDPC codeword.

[0138] Example 2 may include an apparatus as described in Example 1 and / or some other example herein, wherein multiplying each entry of the first basis matrix by each entry of the mask matrix includes: for entry x applied to entry 0, generating a first 2x2 matrix with x and -1 in a first row and -1 and x in a second row, for entry x applied to entry 1, generating a second 2x2 matrix with -1 and x in a first row and x and -1 in a second row, and for entry -1 applied to entry -1, generating a third 2x2 matrix with -1 and -1 in a first row and -1 and -1 in a second row.

[0139] Example 3 may include an apparatus as described in Example 1 and / or any other example herein, wherein, for a code rate of 5 / 6, a first row of the mask matrix is ​​[0 0 0 0 0 0 0 0 0 0 0 0 -1 0 0 0 0 0 0 -1 0 0 -1-1].

[0140] Example 4 may include an apparatus as described in Example 3 and / or any other example herein, wherein a second row of the mask matrix is ​​[1 1 1 1 1 1 1 1 1 1 1 -1 1 -1 1 1 1 1 0 0 -1 0 0 -1].

[0141] Example 5 may include an apparatus as described in Example 4 and / or any other example herein, wherein a third row of the mask matrix is ​​[0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1 0 -1 0 -1 0 0 -1 0 0].

[0142] Example 6 may include the apparatus of Example 1 and / or any other example herein, wherein, for a code rate of 3 / 4, a first row of the mask matrix is ​​[0 0 0 0 0 0 -1-1 -1 0 0 0 -1-1 -1 0 00 0 0 -1-1 -1-1].

[0143] Example 7 may include an apparatus as described in Example 6 and / or some other example herein, wherein a second row of the mask matrix is ​​[1 1 1 1 1 1 -1-1 -1 1 1 1 1 1 -1 1 -1-1 -1 0 0 -1-1 -1].

[0144] Example 8 may include an apparatus as described in Example 7 and / or any other example herein, wherein a third row of the mask matrix is ​​[0 0 0 0 0 0 0 -1 0 0 -1-1 -1 0 0 -1-1 0 -1-1 0 0 -1-1].

[0145] Example 9 may include an apparatus as described in Example 8 and / or some other example herein, wherein a fourth row of the mask matrix is ​​[1 1 1 1 1 1 1 1 -1-1 -1 1 -1-1 -1 1 1 0 -1-1 0 0 -1].

[0146] Example 10 may include an apparatus as described in Example 9 and / or any other example herein, wherein a fifth row of the mask matrix is ​​[0 0 0 0 0 0 -1 0 0 -1 0 -1 0 -1 0 -1-1 -1-1 -1 00].

[0147] Example 11 may include an apparatus as described in Example 10 and / or some other example herein, wherein a sixth row of the mask matrix is ​​[1 1 1 1 1 1 1 1 -1-1 -1 1 -1 1 1 1 -1-1 0 -1-1 -1-10].

[0148] Example 12 may include a method as in any of Examples 1-11 and / or some other example herein, wherein the frame includes 94080-bit symbols including 48 LDPC codewords including the LDPC codeword.

[0149] Example 13 may include a computer-readable storage medium including instructions to, when executed by a processing circuit of a device for low-density parity check (LDPC) Wi-Fi encoding and decoding, cause the processing circuit to: identify a first base matrix associated with generating a 1944-bit LDPC codeword, the first base matrix having 4 rows and 24 columns; identify a mask matrix associated with generating a second base matrix based on the first base matrix, the mask matrix having 4 rows and 24 columns, entries of the mask matrix including values ​​of 0, 1, and -1, and the second base matrix associated with generating a 3888-bit LDPC codeword. word; generating a second base matrix by multiplying each entry of the first base matrix by each entry of the mask matrix, the second base matrix having 8 rows and 48 columns, the entries of the second base matrix indicating corresponding cyclic shifts to be applied to an identity matrix having 81 rows and 81 columns; generating a parity check matrix by multiplying each entry of the second base matrix by each entry of the identity matrix, the parity check matrix having 648 rows and 3888 columns; generating an LDPC codeword including 3888 bits based on the parity check matrix; and causing the device to transmit a frame including the LDPC codeword.

[0150] Example 14 may include a computer-readable medium as described in Example 13 and / or some other example herein, wherein multiplying each entry of the first basis matrix by each entry of the mask matrix includes: for entry x applied to entry 0, generating a first 2x2 matrix with x and -1 in a first row and -1 and x in a second row, for entry x applied to entry 1, generating a second 2x2 matrix with -1 and x in a first row and x and -1 in a second row, and for entry -1 applied to entry -1, generating a third 2x2 matrix with -1 and -1 in a first row and -1 and -1 in a second row.

[0151] Example 15 may include a computer-readable medium as described in Example 13 and / or some other example herein, wherein, for a code rate of 5 / 6, a first row of the mask matrix is ​​[0 0 0 0 0 0 0 0 0 0 00-1 0 0 0 0 0 0-1 00-1-1].

[0152] Example 16 may include a computer-readable medium as described in Example 15 and / or some other example herein, wherein a second row of the mask matrix is ​​[1 1 1 1 1 1 1 1 1 1 1 -1 1 -1 1 1 1 1 0 0 -1 0 0 -1].

[0153] Example 17 may include the computer-readable medium of Example 16 and / or any other example herein, wherein a third row of the mask matrix is ​​[0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1 0 -1 0 -1 00 -1 0 0].

[0154] Example 18 may include the computer-readable medium of Example 13 and / or any other example herein, wherein, for a code rate of 3 / 4, the first row of the mask matrix is ​​[0 0 0 0 0 0 -1-1 -1 00 0 -1-1 -1 0 0 0 0 0-1-1 -1-1].

[0155] Example 19 may include the computer-readable medium of Example 18 and / or some other example herein, wherein a second row of the mask matrix is ​​[1 1 1 1 1 1 -1-1 -1 1 1 1 1 1 -1 1 -1-1-1 0 0 -1-1 -1].

[0156] Example 20 may include the computer-readable medium of Example 19 and / or any other example herein, wherein a third row of the mask matrix is ​​[0 0 0 0 0 0 0 -1 0 0 -1-1 -1 0 0 -1-1 0-1-1 0 0-1-1].

[0157] Example 21 may include a computer-readable medium as described in Example 20 and / or some other example herein, wherein a fourth row of the mask matrix is ​​[1 1 1 1 1 1 1 1 -1-1 -1 1 -1-1 -1 1 1 0-1-1 0 0-1].

[0158] Example 22 may include the computer-readable medium of Example 21 and / or some other example herein, wherein a fifth row of the mask matrix is ​​[0 0 0 0 0 0 -1 0 0 -1 0 -1 0 -1 0 -1-1-1-1-1 0 0].

[0159] Example 23 may include a computer-readable medium as described in Example 22 and / or some other example herein, wherein a sixth row of the mask matrix is ​​[1 1 1 1 1 1 1 1 -1-1 -1 1 -1 1 1 1 -1-1 0-1 -1-1 -1 0].

[0160] Example 24 may include a method comprising: a method for low-density parity check (LDPC) Wi-Fi encoding and decoding, the method comprising: identifying, by processing circuitry of a device, a first base matrix associated with generating a 1944-bit LDPC codeword, the first base matrix having 4 rows and 24 columns; identifying, by the processing circuitry, a mask matrix associated with generating a second base matrix based on the first base matrix, the mask matrix having 4 rows and 24 columns, entries of the mask matrix including values ​​0, 1, and -1, and the second base matrix associated with generating a 3888-bit LDPC codeword; and Each entry of a base matrix is ​​multiplied by each entry of the mask matrix to generate a second base matrix, the second base matrix having 8 rows and 48 columns, and the entries of the second base matrix indicate corresponding cyclic shifts to be applied to an identity matrix having 81 rows and 81 columns; the processing circuit generates a parity check matrix by multiplying each entry of the second base matrix by each entry of the identity matrix, the parity check matrix having 648 rows and 3888 columns; the processing circuit generates an LDPC codeword including 3888 bits based on the parity check matrix; and the processing circuit causes the device to transmit a frame including the LDPC codeword.

[0161] Example 25 may include a method as described in Example 24 and / or some other example herein, wherein the frame includes 94080-bit symbols, the symbols including 48 LDPC codewords including the LDPC codeword.

[0162] Example 26 may include an apparatus comprising an apparatus for: identifying a first base matrix associated with generating a 1944-bit LDPC codeword, the first base matrix having 4 rows and 24 columns; identifying a mask matrix associated with generating a second base matrix based on the first base matrix, the mask matrix having 4 rows and 24 columns, the entries of the mask matrix including the values ​​0, 1, and -1, and the second base matrix associated with generating a 3888-bit LDPC codeword; generating the second base matrix by multiplying each entry of the first base matrix by each entry of the mask matrix, the second base matrix having 8 rows and 48 columns, the entries of the second base matrix indicating corresponding cyclic shifts to be applied to an identity matrix having 81 rows and 81 columns; generating a parity check matrix by multiplying each entry of the second base matrix by each entry of the identity matrix, the parity check matrix having 648 rows and 3888 columns; generating an LDPC codeword comprising 3888 bits based on the parity check matrix; and causing the device to transmit a frame comprising the LDPC codeword.

[0163] Example 27 may include one or more non-transitory computer-readable media that include instructions that, when executed by one or more processors of an electronic device, cause the electronic device to perform one or more elements of a method described in or related to any of Examples 1-26 or any other method or process described herein.

[0164] Example 28 may include an apparatus including logic, modules, and / or circuits for performing one or more elements of the method described in or related to any of Examples 1-26, or any other method or process described herein.

[0165] Example 29 may include methods, techniques, or processes as described in or related to any of Examples 1-26, or portions thereof.

[0166] Example 30 may include a device comprising: one or more processors and one or more computer-readable media comprising instructions that, when executed by the one or more processors, cause the one or more processors to perform a method, technique, or process as described in or related to any of Examples 1-26, or portions thereof.

[0167] Example 31 may include a method of communicating in a wireless network as shown and described herein.

[0168] Example 32 may include a system for providing wireless communications as shown and described herein.

[0169] Example 33 may include an apparatus for providing wireless communications as shown and described herein.

[0170] Certain aspects of the present disclosure are described above with reference to block diagrams and flow charts of systems, methods, apparatus, and / or computer program products according to various implementations. It will be understood that one or more blocks of the block diagrams and flow charts, and combinations of blocks in the block diagrams and flow charts, respectively, may be implemented by computer-executable program instructions. Similarly, depending on some implementations, some blocks of the block diagrams and flow charts may not necessarily need to be executed in the order presented, or may not necessarily need to be executed at all.

[0171] These computer-executable program instructions can be loaded onto a special-purpose computer or other specific machine, processor, or other programmable data processing device to produce a specific machine, such that the instructions executed on the computer, processor, or other programmable data processing device create a device for implementing one or more functions specified in one or more blocks of the flowchart. These computer program instructions can also be stored in a computer-readable storage medium or memory, and these instructions can direct the computer or other programmable data processing device to operate in a specific manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including an instruction device that implements one or more functions specified in one or more blocks of the flowchart. As an example, certain implementations may provide a computer program product comprising a computer-readable storage medium having computer-readable program code or program instructions embodied therein, wherein the computer-readable program code is suitable for being executed to implement one or more functions specified in one or more blocks of the flowchart. The computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational elements or steps are executed on the computer or other programmable device to produce a computer-implemented process, such that the instructions executed on the computer or other programmable device provide elements or steps for implementing the functions specified in one or more blocks of the flowchart.

[0172] Thus, the blocks of the block diagrams and flow diagrams support combinations of means for performing the specified functions, combinations of elements or steps for performing the specified functions, and program instruction means for performing the specified functions. It will also be understood that each block of the block diagrams and flow diagrams, and combinations of blocks in the block diagrams and flow diagrams, can be implemented using a dedicated hardware-based computer system that performs the specified functions, elements, or steps, or can be implemented using a combination of dedicated hardware and computer instructions.

[0173] Conditional language such as "can," "might," "may," or "could," etc., unless specifically stated otherwise or understood otherwise within the context of use, is generally intended to convey that certain implementations may include, while other implementations do not, certain features, elements, and / or operations. Thus, such conditional language is generally not intended to imply that features, elements, and / or operations are in any way required by one or more implementations, or to imply that one or more implementations necessarily include logic for determining, with or without user input or prompting, whether such features, elements, and / or operations are included in any particular implementation or are to be performed in any particular implementation.

[0174] Many modifications and other implementations of the disclosure described herein will be apparent having the benefit of the teachings given in the foregoing description and the associated drawings. Therefore, it is to be understood that the disclosure is not limited to the specific implementations disclosed, and that modifications and other implementations are intended to be included within the scope of the appended claims. Although specific terms are employed herein, they are used in a general descriptive sense only and not for purposes of limitation.

Claims

1. An apparatus for a device for low-density parity check (LDPC) Wi-Fi encoding and decoding, the apparatus comprising a processing circuit coupled to a storage device, the processing circuit being configured to: Identifying a first base matrix associated with generating a 1944-bit LDPC codeword, the first base matrix having 4 rows and 24 columns; Identifying a mask matrix associated with generating a second base matrix based on the first base matrix, the mask matrix having 4 rows and 24 columns, entries of the mask matrix including values ​​of 0, 1, and -1, and the second base matrix being associated with generating a 3888-bit LDPC codeword; generating a second base matrix by multiplying each entry of the first base matrix by each entry of the mask matrix, the second base matrix having 8 rows and 48 columns, the entries of the second base matrix indicating corresponding cyclic shifts to be applied to an identity matrix having 81 rows and 81 columns; generating a parity check matrix by multiplying each entry of the second base matrix by each entry of the identity matrix, the parity check matrix having 648 rows and 3888 columns; generating an LDPC codeword comprising 3888 bits based on the parity check matrix; and The device is caused to transmit a frame including the LDPC codeword.

2. The device according to claim 1, wherein: Multiplying each entry of the first basis matrix by each entry of the mask matrix comprises: For entry x applied to entry 0, a first 2x2 matrix is ​​generated with x and -1 in the first row and -1 and x in the second row, For entry x applied to entry 1, a second 2x2 matrix is ​​generated with -1 and x in the first row and x and -1 in the second row, and For entry -1 applied to entry -1, a third 2x2 matrix is ​​generated with -1 and -1 in the first row and -1 and -1 in the second row.

3. The device according to claim 1, wherein: For a code rate of 5 / 6, the first row of the mask matrix is ​​[0 0 0 00 0 0 0 0 0 0-1 0 0 0 0 0 0-1 0 0-1-1].

4. The device according to claim 3, wherein: The second row of the mask matrix is ​​[1 1 1 11 1 1 1 1 1-1 1-1 1 1 1 1 0 0-1 0 0-1].

5. The device according to claim 4, wherein: The third row of the mask matrix is ​​[0 0 0 00 0 0 0 0 0 00 0-1 0-1 0-1 0 0-1 0 0].

6. The device according to claim 1, wherein: For a code rate of 3 / 4, the first row of the mask matrix is ​​[0 0 0 00 0-1-1-1 0 0 0-1-1-1 0 0 0 0 0-1-1-1-1].

7. The device according to claim 6, wherein: The second row of the mask matrix is ​​[1 1 1 11 1-1-1-1 1 11 1-1 1-1-1-1 0 0-1-1-1].

8. The device according to claim 7, wherein: The third row of the mask matrix is ​​[0 0 0 00 0 0-1 0 0-1-1-1 0 0-1-1 0-1-1 0 0-1-1].

9. The device of claim 8, wherein: The fourth row of the mask matrix is ​​[1 1 1 11 1 1 1-1-1-11-1-1-1 1 1 0-1-1 0 0-1].

10. The device of claim 9, wherein: The fifth row of the mask matrix is ​​[0 0 0 00 0-1 0 0-10-1 0-1 0-1 0-1 0-1-1-1-1-1 0 0].

11. The device of claim 10, wherein: The sixth row of the mask matrix is ​​[1 1 11 1 1 1 1-1-1-1 1-1 1 1 1-1-1 0-1-1-1-1 0].

12. The device according to any one of claims 1 to 11, wherein: The frame includes 94080-bit symbols, and the symbols include 48 LDPC codewords including the LDPC codeword.

13. A computer-readable storage medium comprising instructions that, when executed by a processing circuit of a device for low-density parity check (LDPC) Wi-Fi encoding and decoding, cause the processing circuit to: Identifying a first base matrix associated with generating a 1944-bit LDPC codeword, the first base matrix having 4 rows and 24 columns; Identifying a mask matrix associated with generating a second base matrix based on the first base matrix, the mask matrix having 4 rows and 24 columns, entries of the mask matrix including values ​​of 0, 1, and -1, and the second base matrix being associated with generating a 3888-bit LDPC codeword; generating a second base matrix by multiplying each entry of the first base matrix by each entry of the mask matrix, the second base matrix having 8 rows and 48 columns, the entries of the second base matrix indicating corresponding cyclic shifts to be applied to an identity matrix having 81 rows and 81 columns; generating a parity check matrix by multiplying each entry of the second base matrix by each entry of the identity matrix, the parity check matrix having 648 rows and 3888 columns; generating an LDPC codeword comprising 3888 bits based on the parity check matrix; and The device is caused to transmit a frame including the LDPC codeword.

14. The computer readable medium of claim 13, wherein: Multiplying each entry of the first basis matrix by each entry of the mask matrix comprises: For entry x applied to entry 0, a first 2x2 matrix is ​​generated with x and -1 in the first row and -1 and x in the second row, For entry x applied to entry 1, a second 2x2 matrix is ​​generated with -1 and x in the first row and x and -1 in the second row, and For entry -1 applied to entry -1, a third 2x2 matrix is ​​generated with -1 and -1 in the first row and -1 and -1 in the second row.

15. The computer-readable medium of claim 13, wherein: For a code rate of 5 / 6, the first row of the mask matrix is ​​[0 0 0 0 0 0 0 0 0 0 0-1 0 0 0 0 0 0-1 0 0-1-1].

16. The computer-readable medium of claim 15, wherein: The second row of the mask matrix is ​​[1 1 1 1 11 1 1 1 1-1 1-1 1 1 1 1 0 0-1 0 0-1].

17. The computer-readable medium of claim 16, wherein: The third row of the mask matrix is ​​[0 0 0 0 00 0 0 0 0 0 0-1 0-1 0-1 0 0-1 0 0].

18. The computer-readable medium of claim 13, wherein: For a code rate of 3 / 4, the first row of the mask matrix is ​​[0 0 0 0 0 0-1-1-1 0 0 0-1-1-1 0 0 0 0 0-1-1-1-1].

19. The computer-readable medium of claim 18, wherein: The second row of the mask matrix is ​​[1 1 1 1 11-1-1-1 1 1 1 1-1 1-1-1-1 0 0-1-1-1].

20. The computer readable medium of claim 19, wherein: The third row of the mask matrix is ​​[0 0 0 0 00 0-1 0 0-1-1-1 0 0-1-1 0-1-1 0 0-1-1].

21. The computer readable medium of claim 20, wherein: The fourth row of the mask matrix is ​​[1 1 1 1 11 1-1-1-1 1-1-1-1 1 1 0-1-1 0 0-1].

22. The computer readable medium of claim 21, wherein: The fifth row of the mask matrix is ​​[0 0 0 0 00-1 0 0-1 0-1 0-1 0-1 0-1-1-1-1-1 0 0].

23. The computer readable medium of claim 22, wherein: The sixth row of the mask matrix is ​​[1 1 1 1 11 1 1-1-1-1 1-1 1 1-1-1 0-1-1-1-1 0].

24. A method for low-density parity check (LDPC) Wi-Fi encoding and decoding, the method comprising: identifying, by processing circuitry of the device, a first base matrix associated with generating a 1944-bit LDPC codeword, the first base matrix having 4 rows and 24 columns; identifying, by the processing circuit, a mask matrix associated with generating a second base matrix based on the first base matrix, the mask matrix having 4 rows and 24 columns, entries of the mask matrix including values ​​of 0, 1, and -1, and the second base matrix being associated with generating a 3888-bit LDPC codeword; generating, by the processing circuit, a second base matrix by multiplying each entry of the first base matrix by each entry of the mask matrix, the second base matrix having 8 rows and 48 columns, the entries of the second base matrix indicating corresponding cyclic shifts to be applied to an identity matrix having 81 rows and 81 columns; generating, by the processing circuit, a parity check matrix by multiplying each entry of the second base matrix by each entry of the identity matrix, the parity check matrix having 648 rows and 3888 columns; generating, by the processing circuit, an LDPC codeword comprising 3888 bits based on the parity check matrix; and The processing circuit causes the device to transmit a frame including the LDPC codeword.

25. The method of claim 24, wherein: The frame includes 94080-bit symbols, and the symbols include 48 LDPC codewords including the LDPC codeword.

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