Monolithic integrated multifunctional composite sensor and method of manufacturing the same

Abstract

The application provides a monolithic integrated multifunctional composite sensor and a preparation method thereof, and adopts single-silicon single-surface silicon microfabrication technology to predefine and cover a first micro groove of a gas flow sensing unit, to form a pressure reference cavity and a pressure sensitive diaphragm first, to predefine a single-crystal silicon thermocouple arm and a heating resistor pattern through the first micro groove and a side wall protection, to protect the pressure sensing unit through a heat insulation medium layer, to form a heat insulation cavity and a temperature sensing unit, to finally realize integration of the gas flow sensing unit, the pressure sensing unit and the temperature sensing unit on the same monolithic wafer, and to realize the structure of the heat insulation cavity and the pressure reference cavity in the same single-crystal silicon substrate. The method replaces traditional double-sided processing technology, solves the problem that a traditional composite chip is difficult to realize small size, avoids a complex process caused by a traditional silicon-silicon or silicon-glass bonding structure, greatly reduces process difficulty and cost, improves the yield of the composite chip, and improves the reliability of the sensor.

Description

Technical Field

[0001] This invention belongs to the field of silicon micromechanical sensor technology, and relates to a monolithically integrated multifunctional composite sensor and its fabrication method. Background Technology

[0002] With the continuous development of MEMS micromachining technology, silicon-based MEMS flow sensors, fabricated using silicon-based micromachining processes, are widely used in aerospace, industrial process monitoring, and biomedical fields due to their advantages such as small chip size, low manufacturing cost, and high performance. Especially in recent years, with the increasing demands for miniaturization and high precision in flow sensors from analytical instruments and equipment in fine chemical industries and biomedicine, traditional flow measurement devices have struggled to simultaneously meet these requirements in terms of performance, manufacturing cost, and chip size. Miniaturization, high performance, and low cost of flow sensors have become the future development trend.

[0003] Furthermore, since gas flow rate is greatly affected by pressure and temperature, even slight temperature changes or pressure fluctuations during micro-flow measurement will cause changes in parameters such as gas density and heat capacity, leading to measurement errors. To improve measurement accuracy, traditional methods commonly employ external thermistors and pressure sensors to monitor the pressure and temperature of the environment in which the gas is being measured in real time, using temperature and pressure compensation to ensure the accuracy of micro-flow detection. However, because the temperature and pressure detection points are far from the flow-sensitive chip, problems such as response hysteresis and deviations between the temperature and pressure values ​​and the pressure and temperature at the flow location are common, making it unsuitable for airtightness detection scenarios with rapid temperature changes and large pressure fluctuations. Therefore, to eliminate the effects of temperature hysteresis and pressure deviation, developing a single-chip integrated multifunctional composite sensor chip for pressure, flow, and temperature detection is of great significance for improving micro-flow detection accuracy, reducing chip size, and lowering chip costs. In 1992, Euisik Yoon et al. at the University of Michigan developed a mass flow sensor chip integrating temperature, pressure, and flow detection based on double-sided micromachining technology. Among them, the combination of polycrystalline silicon heating resistor and Cr / Au temperature measuring resistor realizes the measurement of gas flow rate, and two pairs of orthogonally arranged polycrystalline silicon-gold thermopile realize the detection of gas flow direction; the pressure sensor uses polycrystalline silicon as a piezoresistor and uses concentrated boron doping corrosion self-stop to prepare the pressure sensitive diaphragm structure. Although this monolithic integrated structure realizes the single-chip integration of pressure, temperature and flow sensors, it has the following shortcomings: (1) The flow sensing sensitive detection unit and pressure sensitive diaphragm structure are released by back wet etching, which is limited by the 54.74-degree angle between the (111) crystal plane and the (100) crystal plane, and the chip size after processing is relatively large; (2) Polycrystalline silicon piezoresistor is used as the detection resistor of the pressure sensor. Since the piezoresistive coefficient of polycrystalline silicon is about half that of monocrystalline silicon, the sensitivity of the pressure sensor based on polycrystalline silicon piezoresistor is less than that of the pressure sensor based on monocrystalline silicon piezoresistor under the same pressure sensitive diaphragm size; (3) The process is complicated and the manufacturing cost is high due to the use of double-sided micromachining and concentrated boron corrosion self-stop.

[0004] Therefore, how to provide a monolithically integrated multifunctional composite sensor and its fabrication method, so that the composite sensor chip integrates a flow sensor, a pressure sensor and a temperature sensor into one unit, while ensuring that the composite sensor has sufficiently high sensitivity, and overcoming the problems of complex manufacturing process, large size and high manufacturing cost of the existing technology, has become an important technical problem that urgently needs to be solved by those skilled in the art.

[0005] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this application. Summary of the Invention

[0006] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a monolithic integrated multifunctional composite sensor and its fabrication method, so as to solve the problems of complex manufacturing process, large size and high cost of composite sensors in the prior art.

[0007] To achieve the above and other related objectives, the present invention provides a method for fabricating a monolithic integrated multifunctional composite sensor, characterized by comprising the following steps:

[0008] A monocrystalline silicon substrate having a first conductivity type is provided, the monocrystalline silicon substrate including a piezoresistive region of a pressure sensing unit and a monocrystalline silicon thermocouple arm and a heating resistor region of a gas flow sensing unit, and a hard mask layer is formed on the monocrystalline silicon substrate.

[0009] A second conductivity type doped region is formed in the varistor region and the single-crystal silicon thermocouple arm and heating resistor region;

[0010] A predefined microgroove for a single-crystal silicon thermocouple arm and a heating resistor is formed in the doped region of the second conductivity type;

[0011] A first passivation layer is formed on the hard mask layer and covers the predefined microgroove. Then, a plurality of micro-release holes are formed in the first passivation layer to define the shape and size of the pressure-sensitive diaphragm. The depth of the micro-release holes is the thickness of the pressure-sensitive diaphragm.

[0012] A second passivation layer is formed on the first passivation layer to protect the sidewall of the micro release hole. Then, the single crystal silicon is etched to a certain depth along the bottom of the micro release hole. The etching depth is the depth of the pressure reference cavity. The pressure reference cavity is released and a pressure-sensitive diaphragm is formed at the same time.

[0013] Remove the remaining first passivation layer and second passivation layer on the hard mask layer to expose the predefined microgroove;

[0014] A first microgroove is formed by etching a certain depth along the bottom of the predefined microgroove, and the depth of the first microgroove is the thickness of the single crystal silicon thermocouple arm and the heating resistor.

[0015] A third passivation layer is formed on the sidewall of the first micro-groove, and a sacrificial layer is formed to fill the micro-release hole and the first micro-groove. Then, the excess sacrificial layer on the front side of the single crystal silicon substrate is removed and planarization is achieved.

[0016] Remove the hard mask layer on the front side of the monocrystalline silicon substrate, and then form a thermal insulation dielectric layer on the surface of the monocrystalline silicon substrate;

[0017] Connecting holes, lead pads, metal thermocouple arms, metal interconnect layers, heating resistors, and ambient temperature resistors are formed on the thermal insulation medium layer.

[0018] A second microgroove of a certain depth is formed in the gas flow sensor area, and the etching depth is the height of the heat insulation cavity.

[0019] The second microgroove releases the heat insulation groove and heat insulation cavity, and the metal thermocouple arm and the monocrystalline silicon thermocouple arm form a monocrystalline silicon-metal thermocouple pair through a metal interconnect layer.

[0020] Optionally, the surface of the single-crystal silicon substrate is a (111) crystal plane, and the single-crystal silicon-metal thermocouple pair is along... <211> Crystal orientation, heating resistor along <110> Crystal orientation.

[0021] Optionally, the pressure reference cavity and the heat insulation cavity are partially removed from the single-crystal silicon substrate and the sacrificial layer by TMAH etching, and the six peripheral faces and the top and bottom faces of the pressure reference cavity and the heat insulation cavity are (111) crystal planes.

[0022] Optionally, the first conductivity type and the second conductivity type are opposite conductivity types, and the first conductivity type is P-type or N-type.

[0023] Optionally, the thermal insulation medium layer includes either a composite film layer composed of a silicon oxide layer and a silicon nitride layer or a single-layer low-stress silicon nitride layer.

[0024] Optionally, the temperature sensing unit includes one of a Pt resistor, a monocrystalline silicon resistor, and a polycrystalline silicon resistor.

[0025] Meanwhile, the present invention also provides a monolithically integrated multifunctional composite sensor, characterized in that the monolithically integrated multifunctional composite sensor comprises:

[0026] Single-crystal silicon substrate having a first conductivity type;

[0027] A gas flow sensing unit includes a monocrystalline silicon heating resistor, a monocrystalline silicon thermocouple arm-metal thermocouple pair, a heat insulation groove, a heat insulation medium layer, and a heat insulation cavity; the heat insulation cavity is located directly below the monocrystalline silicon-metal thermocouple pair and is embedded inside the monocrystalline silicon substrate; the heat insulation groove is located between each pair of monocrystalline silicon-metal thermocouple pairs and on both sides of the monocrystalline silicon heating resistor.

[0028] A pressure sensing unit includes a pressure-sensitive resistor, a pressure-sensitive diaphragm, and a pressure reference cavity; the pressure-sensitive resistor is located above the pressure-sensitive diaphragm and forms a Wheatstone pressure detection circuit; the pressure reference cavity is located directly below the pressure-sensitive diaphragm and is embedded inside the single-crystal silicon substrate.

[0029] Temperature sensing unit;

[0030] The gas flow sensing unit, pressure sensing unit, and temperature sensing unit are integrated on the same surface of the single-crystal silicon substrate.

[0031] Optionally, the monocrystalline silicon-metal thermocouple pair includes a monocrystalline silicon thermocouple arm and a metal thermocouple arm, with the monocrystalline silicon thermocouple arm suspended below the thermal insulation layer and the metal thermocouple arm located above the thermal insulation layer; the monocrystalline silicon thermocouple arm and the metal thermocouple arm are interconnected at the hot end through a metal via.

[0032] Optionally, the heat insulation cavity has a hexagonal prism structure, and the side and top surfaces of the heat insulation cavity are (111) crystal planes.

[0033] Optionally, the thermal insulation medium layer includes either a composite film layer consisting of a silicon oxide layer and a silicon nitride layer or a single-layer low-stress silicon nitride layer.

[0034] As described above, this invention provides a monolithically integrated multifunctional composite sensor and its fabrication method. Utilizing single-wafer, single-sided silicon microfabrication technology, after predefining and covering a first microgroove for the gas flow sensing unit, a pressure reference cavity and a pressure-sensitive diaphragm are first formed. Then, protected by the first microgroove and sidewalls, a predefined pattern of the thickness of the single-crystal silicon thermocouple arm and heating resistor is established. Next, a thermal insulation layer protects the pressure sensing unit, and then a thermal insulation cavity and a temperature sensing unit are formed. Ultimately, the gas flow sensing unit, pressure sensing unit, and temperature sensing unit are integrated on a single wafer, achieving a structure where the thermal insulation cavity and pressure reference cavity are located within the same single-crystal silicon substrate. This method replaces traditional double-sided processing technology, solving the problem of achieving small sizes in traditional composite chips and avoiding the complex processes associated with traditional silicon-silicon or silicon-glass bonding structures. This significantly reduces process difficulty and manufacturing costs, while simultaneously improving the yield of the composite sensor chip and enhancing the sensor's performance and reliability. Attached Figure Description

[0035] Figure 1 The diagram shown is a three-dimensional structural schematic of the monolithically integrated multifunctional composite sensor of the present invention.

[0036] Figure 2 The present invention is shown as a monolithically integrated multifunctional composite sensor. Figure 1 Schematic diagram of the structure along the ABC section.

[0037] Figure 3 Displayed as Figure 2 A partially enlarged schematic diagram of the structure.

[0038] Figure 4 The diagram shows a process flow diagram of the fabrication method of the monolithically integrated multifunctional composite sensor in this invention.

[0039] Figure 5 The diagram shows the structure of the present invention after a single-crystal silicon substrate is provided and a hard mask layer is formed on the surface of the single-crystal silicon substrate.

[0040] Figure 6 The diagram shows the structure after the formation of the second conductivity type doped region in this invention.

[0041] Figure 7 The diagram shown is a schematic representation of the structure after the predefined microgrooves are formed in this invention.

[0042] Figure 8 The diagram shows the structure of the present invention after forming micro-release holes from top to bottom in the first passivation layer.

[0043] Figure 9a The diagram shows the structure after the sidewall protective layer is formed in the micro-release hole according to the present invention.

[0044] Figure 9b The diagram shows the structure after etching a certain depth along the micro-release hole when defining the thickness of the pressure reference cavity in this invention.

[0045] Figure 9c The diagram shown is a structural schematic of the pressure reference cavity formed in this invention.

[0046] Figure 10 The diagram shows the structure of the pressure-sensitive diaphragm formed after removing the passivation layer and exposing the predefined microgrooves in this invention.

[0047] Figure 11 The diagram shows the structure after the first microgroove is formed in this invention.

[0048] Figure 12a The diagram shows the structure of the first microgroove and the micro-release hole sidewall after the formation of the third passivation layer in this invention.

[0049] Figure 12b The diagram shows the structure of the present invention after the sacrificial layer is filled into the micro-release hole and the first micro-groove.

[0050] Figure 12c The diagram shown is a schematic representation of the structure after the hard mask layer has been removed in this invention.

[0051] Figure 13The diagram shows the structure after a thermal insulation dielectric layer is formed on the surface of a single-crystal silicon substrate in this invention.

[0052] Figure 14 The diagram shows the structure of the present invention after forming a metal interconnect layer, a metal thermocouple arm, a heating resistor, and an ambient temperature resistor on the thermal insulation medium layer.

[0053] Figure 15 The diagram shows the structure after the second microgroove is formed in the gas flow sensor area according to the present invention.

[0054] Figure 16 The diagram shows the structure after the heat insulation groove and heat insulation cavity are formed in this invention.

[0055] Explanation of reference numerals in the attached figures

[0056] 100 Single-crystal silicon substrate

[0057] 110 Hard mask layer

[0058] 120 Second conductivity type doped region

[0059] 130a Predefined Microgrooves

[0060] 131a Predefined single-crystal silicon thermocouple arm microgroove

[0061] 132a Predefined heating resistance microgroove

[0062] 130b First Microgroove

[0063] 130c Second Microgroove

[0064] 140 First passivation layer

[0065] 141 Second passivation layer

[0066] 150 Third passivation layer

[0067] 160 Sacrificial Layer

[0068] 200 gas flow sensing units

[0069] 210 heating resistor

[0070] 230 Monocrystalline Silicon Thermocouple Arm

[0071] 240 heat insulation groove

[0072] 250 thermal insulation layer

[0073] 251 Connecting hole

[0074] 260 Metal Thermocouple Arm

[0075] 270 Insulated cavity

[0076] 300 pressure sensing units

[0077] 310 Varistor

[0078] 320 Miniature Release Hole

[0079] 330 Pressure Reference Chamber

[0080] 340 Pressure-sensitive diaphragm

[0081] 400 temperature sensing units

[0082] 401 Ambient Temperature Resistance

[0083] 500 lead pads Detailed Implementation

[0084] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0085] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0086] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0087] Example 1

[0088] This embodiment provides a method for fabricating a monolithically integrated multifunctional composite sensor. (See attached document.) Figures 1-3 The image shows a schematic diagram of the global and local three-dimensional structure of a monolithically integrated multifunctional composite sensor. The monolithically integrated multifunctional composite sensor includes a monocrystalline silicon substrate 100, a gas flow sensing unit 200, a pressure sensing unit 300, and a temperature sensing unit 400; the gas flow sensing unit 200, the pressure sensing unit 300, and the temperature sensing unit 400 are integrated on the same surface of the monocrystalline silicon substrate 100. Figure 4 The diagram shown is a fabrication process flow chart for a monolithically integrated multifunctional composite sensor. In this embodiment... Figures 5-16 For reference in each step of the preparation process Figure 1 The section along the middle ABC, i.e. Figure 2 A schematic diagram of the unfolded structure along the cross section ABC is shown. The specific fabrication steps of the monolithically integrated multifunctional composite sensor are as follows:

[0089] See Figure 4 and Figure 5 In step S1, a single-crystal silicon substrate 100 with a first conductivity type is provided. The single-crystal silicon substrate includes the pressure-sensitive resistor 310 region of the pressure sensing unit 300 and the single-crystal silicon thermocouple arm 230 and heating resistor 210 region of the gas flow sensing unit 200, and a hard mask layer 110 is formed on the single-crystal silicon substrate 100.

[0090] Specifically, the surface of the single-crystal silicon substrate 100 is a (111) crystal plane. The first conductivity type can be P-type or N-type. Preferably, this embodiment uses N-type conductivity. The thickness of the single-crystal silicon substrate 100 is approximately 450 μm, and the resistivity is 1–10 Ωcm. The single-crystal silicon substrate 100 can be single-sided polished single-crystal silicon or double-sided polished single-crystal silicon.

[0091] Specifically, the material of the hard mask layer 110 includes one or a combination of silicon nitride and silicon oxide; in this embodiment, silicon oxide is formed as the hard mask layer 110 through a thermal oxidation process, and the thickness of the silicon oxide in this embodiment is [missing information]. The thickness of the silicon oxide layer is not specifically limited and can be set according to actual needs.

[0092] See Figure 4 and Figure 6 Step S2 is executed to form a second conductivity type doped region 120 in the region of the varistor 310 and the regions of the single crystal silicon thermocouple arm 230 and the heating resistor 210.

[0093] Specifically, reactive ion etching is used to pattern the surface of the hard mask layer 110 to form a second conductivity type ion implantation window. Second conductivity type ion implantation is then performed, followed by an annealing process to form a second conductivity type doped region 120. The second conductivity type is the opposite of the first conductivity type of the single-crystal silicon substrate 100. In this embodiment, the second conductivity type doped region 120 is a boron ion doped region, which includes the area containing the piezoresistive 310 pattern of the pressure sensing unit 300 and the single-crystal silicon thermocouple arm 230 and heating resistor 210 in the gas flow sensing unit 200.

[0094] Furthermore, the heating resistor 210 along <110> Crystal orientation arrangement, the single crystal silicon thermocouple arm 230 along <211> The single-crystal silicon thermocouple arms 230 and subsequent metal thermocouple arms 260 are arranged in a crystal orientation to form a single-crystal silicon-metal thermocouple pair. The single-crystal silicon-metal thermocouple pair is located on both sides of the heating resistor 210 and is symmetrically distributed, i.e., upstream and downstream, forming two independent upstream and downstream thermopile detection circuits. The potential difference is obtained by detecting the temperature difference between the two independent upstream and downstream thermopile detection circuits. There may be one or more single-crystal silicon-metal thermocouple pairs, depending on actual needs. When there are two or more single-crystal silicon-metal thermocouple pairs, the pairs are connected end-to-end to form a complete detection circuit.

[0095] See Figure 4 and Figure 7 Step S3 is executed, in which a predefined microgroove 130a of the single-crystal silicon thermocouple arm 230 and the heating resistor 210 is formed in the second conductivity type doped region 120.

[0096] Specifically, by forming a predefined microgroove 130a, monocrystalline silicon is exposed to define the monocrystalline silicon thermocouple arm 230 and the heating resistor 210. The predefined microgroove 130a includes a predefined monocrystalline silicon thermocouple arm microgroove 131a and a predefined heating resistor microgroove 132a, with the predefined monocrystalline silicon thermocouple arm microgroove 131a symmetrically distributed on both sides of the monocrystalline silicon thermocouple arm. The monocrystalline silicon thermocouple arm 230 and the heating resistor 210 are referenced... Figure 3 and Figure 16 .

[0097] See Figure 4 and Figure 8 In step S4, a first passivation layer 140 is formed on the hard mask layer 110 and covers the predefined microgroove 130a. Then, a plurality of micro-release holes 320 are formed in the single crystal silicon substrate 100 to define the shape and size of the pressure-sensitive diaphragm 340. The depth of the micro-release holes 320 is the thickness of the pressure-sensitive diaphragm 340.

[0098] Specifically, a first passivation layer 140 is deposited using low-stress chemical vapor deposition (LPCVD). The material of the first passivation layer 140 includes a TEOS (tetraethyl orthosilicate) passivation layer. The first passivation layer 140 is patterned, and a plurality of micro-release holes 320 with a certain depth h1 are etched using a reactive ion etching (Deep-RIE) process. The thickness of the first passivation layer 140 is [missing information]. No restrictions are set here.

[0099] Furthermore, the thickness of the pressure-sensitive diaphragm 340 ranges from 3 to 30 μm, for example, 3 μm, 5 μm, 10 μm, 15 μm, 20 μm, 25 μm, and 30 μm.

[0100] See Figure 4 and Figures 9a-9c In step S5, a second passivation layer 141 is formed on the first passivation layer 140 to protect the sidewalls of the micro-release hole 320, and the second passivation layer 141 is patterned. Then, the single-crystal silicon substrate 100 is etched to a certain depth along the bottom of the micro-release hole 320. The etching depth is the depth of the pressure reference cavity 330. At the same time, a pressure-sensitive diaphragm 340 is formed. The morphology of the pressure-sensitive diaphragm 340 is referenced. Figure 2 .

[0101] Specifically, a second passivation layer 141 is deposited on the surface of the first passivation layer 140 to cover the sidewalls and bottom of the micro-release hole 320. Then, the second passivation layer 141 at the bottom of the micro-release hole 320 is etched away, leaving the second passivation layer 141 on the sidewalls. Next, a deep reactive ion etching (Deep-RIE) technique is used to continue etching the single-crystal silicon substrate 100 to a certain depth along the bottom of the micro-release hole 320. By using KOH solution or TMAH etching solution to etch inside the single-crystal silicon substrate 100, the unique crystal orientation of the (111) crystal planes of the single-crystal silicon substrate 100 can be fully utilized. Combined with the anisotropic etching characteristics of the TMAH etching solution, the etching of the underlying single-crystal silicon substrate 100 is fully completed and then stops, ultimately forming a vacuum chamber constructed from the eight (111) crystal planes, i.e., the pressure reference chamber 330. In some other embodiments, the etching solution can also be a KOH solution, which will not be elaborated here.

[0102] Furthermore, the materials of the first passivation layer 140 and the second passivation layer 141 include a TEOS (tetraethyl orthosilicate) passivation layer, and the depth of the pressure reference cavity 330 is ≥20μm, such as 20μm, 30μm, etc., preferably, in this embodiment the depth is 20μm. The structure of the pressure reference cavity 330 is a hexagonal prism structure, and the six sides and the top and bottom sides of the pressure reference cavity 330 are (111) crystal planes.

[0103] See Figure 4 and Figure 10 Step S6 is executed to remove the remaining first passivation layer 140 and second passivation layer 141 on the hard mask layer 110, thereby exposing the predefined microgroove 130a.

[0104] Specifically, the remaining TEOS passivation layer on the hard mask layer 110 is removed using dry etching or wet etching. The wet etching includes etching with BOE solution.

[0105] See Figure 4 and Figure 11 In step S7, the first microgroove 130b is formed by etching a certain depth along the bottom of the predefined microgroove 130a. The depth of the first microgroove 130b is the thickness of the single crystal silicon thermocouple arm 230 and the heating resistor 210.

[0106] Specifically, the first microgroove 130b is formed by etching using Deep-RIE technology, and the depth of the first microgroove 130b is at least greater than 3μm.

[0107] See Figure 4 and Figures 12a-12c In step S8, a third passivation layer 150 is formed on the sidewall of the first micro-groove 130b, and a sacrificial layer 160 is formed to fill the micro-release hole 320 and the first micro-groove 130b. Then, the excess sacrificial layer 160 on the front side of the single crystal silicon substrate 100 is removed and planarization is achieved.

[0108] Specifically, a third passivation layer 150 is deposited on the surface of the first microgroove 130b by LPCVD. The material of the third passivation layer 150 includes a TEOS (tetraethyl orthosilicate) passivation layer. The third passivation layer 150 covers the sidewalls and bottom of the first microgroove 130b. The passivation layer at the bottom of the first microgroove 130b is etched away to form the third passivation layer 150 covering the sidewalls of the first microgroove 130b.

[0109] Furthermore, the sacrificial layer 160 is deposited using LPCVD with low-stress polycrystalline silicon as the material. After the sacrificial layer 160 fills the micro-release hole 320 and the first micro-groove 130b, the excess sacrificial layer 160 that was scattered on the surface of the single-crystal silicon substrate 100 during the filling process is removed by dry etching.

[0110] See Figure 4 and Figure 13 In step S9, after removing the hard mask layer 110 on the front side of the monocrystalline silicon substrate 100, a thermal insulation dielectric layer 250 is formed on the surface of the monocrystalline silicon substrate 100.

[0111] Specifically, the hard mask layer 110 on the front side of the single-crystal silicon substrate 100 is removed using dry etching. In some other embodiments, BOE wet etching solution can also be used to remove the hard mask layer 110. The thermal insulation dielectric layer 250 includes one of a composite film layer composed of a silicon oxide layer and a silicon nitride layer, or a single-layer low-stress silicon nitride layer. The thickness of the thermal insulation dielectric layer 250 can be set as needed.

[0112] See Figure 4 and Figure 14 In step S10, the thermal insulation medium layer 250 is graphically formed, connecting holes 251 are formed, and lead pads 500, metal interconnect layers, metal thermocouple arms 260, heating resistors 210 and ambient temperature resistors 401 in the temperature sensing unit 400 are formed on the thermal insulation medium layer 250.

[0113] Specifically, in this embodiment, after etching the connection hole 251 on the thermal insulation medium layer 250, a Cr / Pt metal thin layer is sputtered, and then the connection hole 251, the lead pad 500, the metal interconnect layer, the metal thermocouple arm 260, the heating resistor 210, and the ambient temperature resistor 401 in the temperature sensing unit 400 are formed by plasma etching process. The metal thin layer may also include Ti / Pt, etc.

[0114] Furthermore, the ambient temperature resistor 401 is a reference. Figure 1 and Figure 2 The ambient temperature resistor 401 may also include one of platinum resistance, monocrystalline silicon resistance, or polycrystalline silicon resistance.

[0115] See Figure 4 and Figure 15 In step S11, the heat insulation medium layer 250 is graphically formed, and a second microgroove 130c of a certain depth is formed in the area of ​​the gas flow sensor 200. The etching depth is the height of the heat insulation cavity 270.

[0116] Specifically, the second microgroove 130c is formed by deep-RIE etching to a certain depth in the region between the first microgrooves 130b and the region of the non-monocrystalline silicon thermocouple arm 230 and the heating resistor 210. Simultaneously, the second microgroove 130c serves as a release groove for the monocrystalline silicon thermocouple arm 230 and the heating resistor 210 to be subsequently etched using TMAH wet etching.

[0117] Further reference Figure 3 The heat insulation cavity 270 has a hexagonal prism structure, and its sides and top and bottom surfaces are (111) crystal planes. The heat insulation cavity 270 is located directly below the single-crystal silicon-metal thermocouple pair and is embedded inside the single-crystal silicon substrate 100. Typically, the height of the heat insulation cavity 270 is greater than or equal to 50 μm, for example, 50 μm, 60 μm, 80 μm, or 150 μm. In this embodiment, the height of the heat insulation cavity 270 is 80 μm.

[0118] Furthermore, the use of a front-side etching process not only reduces the size but also allows for the simultaneous fabrication of the three-layer structure: the metal thermocouple arm, the monocrystalline silicon thermocouple arm, and the heat insulation film. Firstly, existing technologies require a three-layer stacking method, which is complex. The front-side etching of this application simplifies the process. Secondly, while back-side dry etching maintains the size, for devices with high manufacturing process and cost requirements, back-side wet etching results in a trapezoidal morphology due to the angle between the two crystal phases. This leads to a reduction in the support dimensions on both sides of the same-sized monocrystalline silicon substrate 100 when back-side etching is used. To maintain the same strength, a larger substrate is required, increasing the size of the monocrystalline silicon substrate 100 needed for back-side etching. This application, however, uses front-side etching, reducing the size of the monocrystalline silicon substrate 100.

[0119] See Figure 4 and Figure 16 In step S12, the heat insulation groove 240 and the heat insulation cavity 270 are released through the second microgroove 130c. The metal thermocouple arm 260 and the monocrystalline silicon thermocouple arm 230 form a monocrystalline silicon-metal thermocouple pair through a metal interconnect layer.

[0120] Specifically, the silicon-metal thermocouple pair, the heating resistor 210, and the heat insulation cavity 270 are corroded and released using a TMAH solution. In some other embodiments, the corrosion solution may also be a KOH solution.

[0121] Furthermore, the heat insulation groove 240 is formed between each pair of monocrystalline silicon-metal thermocouples, and similarly, the heat insulation groove 240 is also formed between the two sides of the heating resistor 210.

[0122] Example 2

[0123] This embodiment also provides a monolithically integrated multifunctional composite sensor, which is fabricated using the method described in Embodiment 1 or other suitable similar methods. For details regarding the fabrication method, materials, and structure of the monolithically integrated multifunctional composite sensor, please refer to Embodiment 1. Figures 1-3 and Figure 16 The diagram shows the structure of the monolithically integrated multifunctional composite sensor, which includes:

[0124] A single-crystal silicon substrate 100 having a first conductivity type;

[0125] A gas flow sensing unit 200 includes a monocrystalline silicon heating resistor 210, a monocrystalline silicon thermocouple arm-metal thermocouple pair, a heat insulation groove 240, a heat insulation medium layer 250, and a heat insulation cavity 270. The heat insulation cavity 270 is located directly below the monocrystalline silicon metal thermocouple pair and is embedded inside the monocrystalline silicon substrate 100. The heat insulation groove 240 is located between each pair of monocrystalline silicon-metal thermocouple pairs and on both sides of the monocrystalline silicon heating resistor 210.

[0126] The pressure sensing unit 300 includes a pressure-sensitive resistor 310, a pressure-sensitive diaphragm 340, and a pressure reference cavity 330. The pressure-sensitive resistor 310 is located above the pressure-sensitive diaphragm 340 and forms a Wheatstone pressure detection circuit. The pressure reference cavity 330 is located directly below the pressure-sensitive diaphragm 340 and is embedded inside the single-crystal silicon substrate 100.

[0127] Temperature sensing unit 400;

[0128] The gas flow sensing unit 200, the pressure sensing unit 300, and the temperature sensing unit 400 are integrated on the same surface of the single-crystal silicon substrate 100.

[0129] As an example, the surface of the single-crystal silicon substrate 100 is a (111) crystal plane. The first conductivity type can be P-type or N-type. Preferably, this embodiment uses N-type conductivity. The thickness of the single-crystal silicon substrate 100 is approximately 450 μm, and the resistivity is 1–10 Ω·cm. The single-crystal silicon can be single-sided polished single-crystal silicon or double-sided polished single-crystal silicon.

[0130] As an example, see Figure 3 The monocrystalline silicon-metal thermocouple pair includes a monocrystalline silicon thermocouple arm 230 and a metal thermocouple arm 260. The monocrystalline silicon thermocouple arm 230 is suspended below the thermal insulation layer 250, and the metal thermocouple arm 260 is located above the thermal insulation layer 250. The monocrystalline silicon thermocouple arm 230 and the metal thermocouple arm 260 are interconnected at their hot ends through a connection hole 251.

[0131] As an example, the heating resistor 210 along <110> Crystal orientation arrangement, the single crystal silicon thermocouple arm 230 along <211> Crystal orientation.

[0132] As an example, the heat insulation medium layer 250 includes either a composite film layer composed of a silicon oxide layer and a silicon nitride layer or a single low-stress silicon nitride layer, and the heat insulation cavity 270 has a hexagonal prism structure, with the side surface and the upper and lower surfaces of the heat insulation cavity 270 being (111) crystal planes.

[0133] As an example, the pressure reference cavity 330 is a hexagonal prism structure, and the side and top and bottom surfaces of the pressure reference cavity 330 are (111) crystal planes.

[0134] As an example, the temperature sensing unit 400 includes an ambient temperature resistor 401, which includes one of a platinum resistance resistor, a monocrystalline silicon resistance resistor, or a polycrystalline silicon resistance resistor.

[0135] In summary, this invention provides a monolithically integrated multifunctional composite sensor and its fabrication method. Utilizing single-wafer, single-sided silicon microfabrication technology, after predefining and covering the gas flow sensing unit with a first microgroove, a pressure reference cavity and a pressure-sensitive diaphragm are first formed. Then, protected by the first microgroove and sidewalls, the thickness of the monocrystalline silicon thermocouple arm and heating resistor are predefined. Next, a thermal insulation layer protects the pressure sensing unit, and then a thermal insulation cavity and a temperature sensing unit are formed. Ultimately, the gas flow sensing unit, pressure sensing unit, and temperature sensing unit are integrated on a single wafer, achieving a structure where the thermal insulation cavity and pressure reference cavity are located within the same monocrystalline silicon substrate. This method replaces traditional double-sided processing technology, solving the problem of achieving small sizes in traditional composite chips and avoiding the complex processes associated with traditional silicon-silicon or silicon-glass bonding structures. This significantly reduces process difficulty and manufacturing costs, while simultaneously improving the yield of the composite sensor chip and enhancing the sensor's performance and reliability. Therefore, this invention effectively overcomes the various shortcomings of existing technologies and has high industrial applicability.

[0136] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method for fabricating a monolithically integrated multifunctional composite sensor, characterized in that, Includes the following steps: A monocrystalline silicon substrate having a first conductivity type is provided, the monocrystalline silicon substrate including a piezoresistive region of a pressure sensing unit and a monocrystalline silicon thermocouple arm and a heating resistor region of a gas flow sensing unit, and a hard mask layer is formed on the monocrystalline silicon substrate. A second conductivity type doped region is formed in the varistor region, the single crystal silicon thermocouple arm, and the heating resistor region; A predefined microgroove for a single-crystal silicon thermocouple arm and a heating resistor is formed in the doped region of the second conductivity type; A first passivation layer is formed on the hard mask layer and covers the predefined microgroove. Then, a plurality of micro-release holes are formed in the first passivation layer to define the shape and size of the pressure-sensitive diaphragm. The depth of the micro-release holes is the thickness of the pressure-sensitive diaphragm. A second passivation layer is formed on the first passivation layer to protect the sidewall of the micro release hole as a sidewall protection layer. Then, the single crystal silicon is etched to a certain depth along the bottom of the micro release hole. The etching depth is the depth of the pressure reference cavity. The pressure reference cavity is released and a pressure-sensitive diaphragm is formed at the same time. Remove the remaining first passivation layer and second passivation layer on the hard mask layer to expose the predefined microgroove; A first microgroove is formed by etching a certain depth along the bottom of the predefined microgroove, and the depth of the first microgroove is the thickness of the single crystal silicon thermocouple arm and the heating resistor. A third passivation layer is formed on the sidewall of the first micro-groove, and a sacrificial layer is formed to simultaneously fill the micro-release hole and the first micro-groove. Then, the excess sacrificial layer on the front side of the single crystal silicon substrate is removed to achieve planarization. After removing the hard mask layer on the front side of the monocrystalline silicon substrate, a thermal insulation dielectric layer is formed on the surface of the monocrystalline silicon substrate, and the thermal insulation dielectric layer covers the varistor region and the gas flow sensing unit region. The thermal insulation layer is graphically represented, and connection holes, lead pads, metal thermocouple arms, metal interconnect layers, heating resistors, and ambient temperature resistors are formed on the thermal insulation layer. The thermal insulation medium layer is patterned, and the thermal insulation medium layer is etched to expose the monocrystalline silicon substrate of the gas flow sensing unit region. A second microgroove of a certain depth is formed in the exposed area of ​​the gas flow sensing unit region, and the etching depth is the height of the thermal insulation cavity. The second microgroove releases the heat insulation groove and heat insulation cavity. During the release process, the heat insulation medium layer covers and protects the pressure sensing unit area. The metal thermocouple arm and the single crystal silicon thermocouple arm form a single crystal silicon-metal thermocouple pair through the metal interconnect layer. The metal thermocouple arm, the monocrystalline silicon thermocouple arm, and the thermal insulation layer are all formed by a front etching process, and the thermal insulation layer is located between the monocrystalline silicon thermocouple arm and the metal thermocouple arm.

2. The method for fabricating a monolithically integrated multifunctional composite sensor according to claim 1, characterized in that: The surface of the single-crystal silicon substrate is a (111) crystal plane, and the single-crystal silicon-metal thermocouple pair is along... <211> Crystal orientation, heating resistor along <110> Crystal orientation.

3. The method for fabricating a monolithically integrated multifunctional composite sensor according to claim 1, characterized in that: The pressure reference cavity and the heat insulation cavity are partially removed from the single crystal silicon substrate and the sacrificial layer by TMAH etching, and the six peripheral surfaces and the top and bottom surfaces of the pressure reference cavity and the heat insulation cavity are all (111) crystal planes.

4. The method for fabricating a monolithically integrated multifunctional composite sensor according to claim 1, characterized in that: The first conductivity type and the second conductivity type are opposite conductivity types, and the first conductivity type is P-type or N-type.

5. The method for fabricating a monolithically integrated multifunctional composite sensor according to claim 1, characterized in that: The thermal insulation medium layer includes either a composite film layer consisting of a silicon oxide layer and a silicon nitride layer, or a single-layer low-stress silicon nitride layer.

6. The method for fabricating a monolithically integrated multifunctional composite sensor according to claim 1, characterized in that: The ambient temperature resistor includes one of the following: Pt resistor, monocrystalline silicon resistor, and polycrystalline silicon resistor.

7. A monolithically integrated multifunctional composite sensor, characterized in that, The monolithically integrated multifunctional composite sensor is a structure fabricated by the method according to any one of claims 1 to 6, and the monolithically integrated multifunctional composite sensor comprises: Single-crystal silicon substrate having a first conductivity type; A gas flow sensing unit includes a monocrystalline silicon heating resistor, a monocrystalline silicon thermocouple arm-metal thermocouple pair, a heat insulation groove, a heat insulation dielectric layer, and a heat insulation cavity. The heat insulation cavity is located directly below the monocrystalline silicon-metal thermocouple pair and embedded inside the monocrystalline silicon substrate. The heat insulation groove is located between each pair of monocrystalline silicon-metal thermocouple pairs and on both sides of the monocrystalline silicon heating resistor. The monocrystalline silicon-metal thermocouple pair includes a monocrystalline silicon thermocouple arm and a metal thermocouple arm. The monocrystalline silicon thermocouple arm is suspended below the heat insulation dielectric layer, and the metal thermocouple arm is located above the heat insulation dielectric layer. The monocrystalline silicon thermocouple arm and the metal thermocouple arm are interconnected at their hot ends through metal vias. A pressure sensing unit includes a pressure-sensitive resistor, a pressure-sensitive diaphragm, and a pressure reference cavity; the pressure-sensitive resistor is located above the pressure-sensitive diaphragm and forms a Wheatstone pressure detection circuit; the pressure reference cavity is located directly below the pressure-sensitive diaphragm and is embedded inside the single-crystal silicon substrate. Temperature sensing unit; The gas flow sensing unit, pressure sensing unit, and temperature sensing unit are integrated on the same surface of the single-crystal silicon substrate.

8. The monolithically integrated multifunctional composite sensor according to claim 7, characterized in that: The pressure reference cavity and the heat insulation cavity are hexagonal prism structures. The side and top surfaces of the heat insulation cavity are (111) crystal planes, and the side and top surfaces of the pressure reference cavity are (111) crystal planes.

9. The monolithically integrated multifunctional composite sensor according to claim 7, characterized in that: The thermal insulation medium layer includes either a composite film layer consisting of a silicon oxide layer and a silicon nitride layer, or a single-layer low-stress silicon nitride layer.

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