Electronic fuse unit test circuit and test method

Abstract

The invention provides an electronic fuse unit test circuit and a test method, which are applied to the technical field of memories. The test circuit comprises a controllable relay, the controllable relay is provided with a first end, a second end and a control end, the first end is connected with a current test pad of the electronic fuse unit array, the second end is connected with a preset power supply pin, the control end is used for receiving a packaging test control signal, and the controllable relay is switched on in response to the packaging test control signal. The preset power supply pin is connected with the current test pad, the preset power supply pin is used for carrying out current test on the electronic fuse unit array after the chip is packaged, the preset power supply pin is located outside the package after the chip is packaged, and the current test pad is located inside the package after the chip is packaged. According to the embodiment of the invention, current detection can be carried out on the electronic fuse unit after the chip is packaged.

Description

Technical Field

[0001] The present disclosure relates to the field of memory technology, and in particular to an electronic fuse unit test circuit and test method. Background Art

[0002] The electronic fuse unit (E-fuse) is a technology developed based on the characteristics of polycrystalline fuses. The initial resistance of polycrystalline silicon fuses is small. When a large current flows through the polycrystalline silicon fuse, the polycrystalline silicon fuse is melted and burned. The blown polycrystalline silicon fuse remains in a permanent fault state, and the unmelted polycrystalline silicon fuse remains in a conducting state. The electronic fuse unit stores digital information by whether the polycrystalline silicon fuse is blown. A polycrystalline silicon fuse (electronic fuse unit) can store a binary number "0" or "1". In general, the unblown polycrystalline silicon fuse stores a low level "0", and the blown polycrystalline silicon fuse is called programmed and stores a high level "1".

[0003] The main purpose of the electronic fuse unit is to implement redundant circuits in integrated circuits (usually semiconductor memories) to repair or replace defective circuits. When the chip is tested in the back-end, the electronic fuse unit needs to be tested for current. However, in some scenarios, when the chip is tested in the back-end, the contact pads (Pads) corresponding to the electronic fuse unit have been packaged, which brings troubles to the testing of the electronic fuse unit.

[0004] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention

[0005] The purpose of the present disclosure is to provide an electronic fuse unit testing circuit and an electronic fuse unit testing method, which are used to solve the problem that the electronic fuse unit testing after chip packaging is difficult to perform.

[0006] According to a first aspect of the present disclosure, there is provided an electronic fuse unit test circuit, comprising a controllable relay, the controllable relay having a first end, a second end and a control end, the first end being connected to a current test pad of an electronic fuse unit array, the second end being connected to a preset power pin, the control end being used to receive a package test control signal, the controllable relay being turned on in response to the package test control signal so that the preset power pin is connected to the current test pad, the preset power pin being used to perform a current test on the electronic fuse unit array after chip packaging, wherein the preset power pin is located outside the package after the chip is packaged, and the current test pad is located inside the package after the chip is packaged.

[0007] In an exemplary embodiment of the present disclosure, an electronic fuse unit array includes multiple electronic fuse units, each electronic fuse unit has a current input terminal, an electronic fuse, and a switch unit that controls the connection between the current input terminal and the electronic fuse, and a current test pad connects multiple current input terminals of multiple electronic fuse units. At most one switch unit is in an on state at the same time.

[0008] In an exemplary embodiment of the present disclosure, the controllable relay includes a power transistor and / or a bipolar transistor.

[0009] In an exemplary embodiment of the present disclosure, at least one reference electronic fuse unit is further included, the reference electronic fuse unit having a reference current input terminal, a reference electronic fuse, and a reference switch unit for controlling the connection between the reference current input terminal and the reference electronic fuse, the reference current input terminal is connected to a current test pad, and the reference electronic fuse is used to provide a reference state of the electronic fuse.

[0010] In an exemplary embodiment of the present disclosure, a first reference electronic fuse unit and a second reference electronic fuse unit are included, wherein the reference electronic fuse in the first reference electronic fuse unit is in a blown state, and the reference electronic fuse in the second reference electronic fuse unit is in an unblown state.

[0011] According to a second aspect of the present disclosure, there is provided an electronic fuse unit testing method, which is implemented by an electronic fuse unit testing circuit as described in any one of the above items, and is used to perform a current test on the electronic fuse unit inside a chip after the chip is packaged, including: controlling a controllable relay to be turned on by a packaging test control signal in an enabled state, so that a preset power pin is connected to a current test pad; controlling a switch unit of the electronic fuse unit to be tested to be in a conducting state; supplying power to the preset power pin, and measuring the current of the preset power pin to obtain a measured current; and comparing the measured current with at least one standard current measured in advance to obtain the current of the electronic fuse unit to be tested.

[0012] In an exemplary embodiment of the present disclosure, an electronic fuse unit test circuit includes at least one reference electronic fuse unit, and a standard current test process includes: controlling a controllable relay to conduct through an enable state package test control signal so that a preset power pin is connected to a current test pad; controlling a reference switch unit in the reference electronic fuse unit to be in a conducting state; supplying power to a preset power pin, and measuring the current of the preset power pin to obtain a standard current.

[0013] In an exemplary embodiment of the present disclosure, comparing the measured current with a pre-measured standard current to obtain the current of the electronic fuse unit to be tested includes: if the reference fuse in the reference electronic fuse unit is in an unblown state, determining the difference between the measured current and the standard current as the current of the electronic fuse unit to be tested; if the reference fuse in the reference electronic fuse unit is in a blown state, determining the difference between the standard current and the measured current as the current of the electronic fuse unit to be tested.

[0014] In an exemplary embodiment of the present disclosure, the standard current is divided into a first standard current and a second standard current, the reference electronic fuse unit includes a first reference electronic fuse unit and a second reference electronic fuse unit, the reference electronic fuse in the first reference electronic fuse unit is in a blown state, and the reference electronic fuse in the second reference electronic fuse unit is in an unblown state, and the test process of the standard current includes: controlling the controllable relay to be turned on by a package test control signal in an enable state so that a preset power pin is connected to a current test pad; controlling the reference switch unit in the first reference electronic fuse unit to be in a conducting state; supplying power to the preset power pin and measuring the current of the preset power pin to obtain a first standard current; stopping supplying power to the preset power pin, controlling the reference switch unit in the first reference electronic fuse unit to be in an off state, and controlling the reference switch unit in the second reference electronic fuse unit to be in a conducting state; supplying power to the preset power pin and measuring the current of the preset power pin to obtain a second standard current.

[0015] In an exemplary embodiment of the present disclosure, comparing the measured current with a pre-measured standard current to obtain the current of the electronic fuse unit to be tested includes: determining the difference between the measured current and the first standard current as a first difference; determining the difference between the measured current and the second standard current as a second difference; if the absolute value of the first difference is less than the absolute value of the second difference, determining that the electronic fuse unit to be tested stores the first value correspondingly, and determining the second difference as the current of the electronic fuse unit to be tested; if the absolute value of the second difference is less than the absolute value of the first difference, determining that the electronic fuse unit to be tested stores the second value correspondingly, and determining the second difference as the current of the electronic fuse unit to be tested.

[0016] The disclosed embodiment connects the current test pad of the electronic fuse unit array to a preset power pin outside the package through a controllable relay, and after subsequent packaging, the preset power pin is transformed into a current test pad of the electronic fuse unit array by controlling the controllable relay. This can solve the problem of difficult detection of electronic fuse units after chip packaging, and allows the subsequent test to analyze the current distribution of the electronic fuse unit at the current site, thereby increasing the means of discovering design problems in the research and development stage.

[0017] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification are used to explain the principles of the present disclosure. Obviously, the accompanying drawings described below are only some embodiments of the present disclosure, and for ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without creative work.

[0019] Figure 1 is a schematic structural diagram of an electronic fuse unit test circuit in an exemplary embodiment of the present disclosure.

[0020] Figure 2 It is a schematic diagram of the test circuit of the electronic fuse unit inside the chip.

[0021] Figure 3 Schematic diagram of the connection of the electronic fuse unit in the embodiment of the present disclosure.

[0022] Figure 4 The present invention discloses an electronic fuse unit testing method in one embodiment.

[0023] Figure 5 Schematic diagram of a test current in one embodiment of the present disclosure.

[0024] Figure 6 FIG. 4 is a schematic diagram of an electronic fuse unit test circuit in another embodiment of the present disclosure.

[0025] Figure 7 yes Figure 6 Schematic diagram of the test method corresponding to the test circuit shown.

[0026] Figure 8 is a schematic diagram of a reference electronic fuse unit in one embodiment of the present disclosure.

[0027] Fig. 9 yes Figure 8 Schematic diagram of the test method corresponding to the embodiment shown.

[0028] Fig.10 is a flow chart of a testing method in another embodiment of the present disclosure. DETAILED DESCRIPTION

[0029] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as being limited to the examples set forth herein; on the contrary, these embodiments are provided so that the present disclosure will be more comprehensive and complete, and the concepts of the example embodiments are fully conveyed to those skilled in the art. The described features, structures, or characteristics may be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present disclosure. However, those skilled in the art will appreciate that the technical solutions of the present disclosure may be practiced while omitting one or more of the specific details, or other methods, components, devices, steps, etc. may be adopted. In other cases, known technical solutions are not shown or described in detail to avoid obscuring various aspects of the present disclosure.

[0030] In addition, the accompanying drawings are only schematic diagrams of the present disclosure, and the same reference numerals in the drawings represent the same or similar parts, so their repeated description will be omitted. Some of the block diagrams shown in the accompanying drawings are functional entities, which do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software form, or implemented in one or more hardware modules or integrated circuits, or implemented in different networks and / or processor devices and / or microcontroller devices.

[0031] The exemplary embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.

[0032] Figure 1 is a schematic structural diagram of an electronic fuse unit test circuit in an exemplary embodiment of the present disclosure.

[0033] refer to Figure 1 , the electronic fuse unit test circuit 100 may include:

[0034] A controllable relay 1, the controllable relay 1 has a first end, a second end and a control end, the first end is connected to the current test pad 3 of the electronic fuse unit array 2, the second end is connected to the preset power pin 4, the control end is used to receive a package test control signal PT, the controllable relay 1 is turned on in response to the package test control signal PT, so that the preset power pin 4 is connected to the current test pad 3, the preset power pin 4 is used to perform a current test on the electronic fuse unit array 2 after the chip is packaged, wherein the preset power pin 4 is located outside the package after the chip is packaged, and the current test pad 3 is located inside the package after the chip is packaged.

[0035] Figure 1The electronic fuse unit array 2 in the illustrated embodiment may include multiple electronic fuse units, and the specific structure may be seen in the subsequent embodiments. The current test pad 3 is used to perform current testing on the electronic fuse unit array 2 before chip packaging. After chip packaging, the current test pad 3 is located inside the package.

[0036] The preset power pin 4 can be a power pin of multiple power supplies, as long as the power voltage corresponding to the power pin does not need to play a power supply role when the electronic fuse unit is tested. This is because different power pins with the same power voltage inside the chip are actually electrically connected in the layout. Therefore, when the preset power pin is selected, not only does the power pin not need to play a power supply role when the electronic fuse unit is tested, but the power voltage corresponding to the power pin also does not need to play a power supply role when the electronic fuse unit is tested.

[0037] In one embodiment, the preset power pin 4 is, for example, a pin of a power voltage VCC (1.2V) of the chip. For the same power voltage, multiple power pins are usually set inside the chip, and different power voltages also correspond to different power pins. In actual selection, the preset power pin 4 can be selected according to the layout position of the current test pad 3, the layout position of the controllable relay 1, and the layout position of the optional power pin (the optional conditions include being located outside the package after packaging and the power voltage corresponding to the power pin does not need to play a power supply role when the electronic fuse unit is tested), so that the total length of the connection between the current test pad 3, the controllable relay 1, and the preset power pin 4 is finally as short as possible.

[0038] In all cases, the preset power pin 4 connected to the controllable relay 4 can also be located outside the package after packaging, as long as the pin (PAD) corresponding to the preset power pin 4 is led out to the outside of the chip package during the RDL (Redistribution Layer) manufacturing stage. That is, whether it is directly located outside the chip package or indirectly led out of the chip package, the preset power pin 4 is a pin that can be directly tested by the test instrument after the chip is packaged. Among them, RDL is a technology used to connect chip pins and package external pins during the chip packaging process. RDL technology can rearrange chip pins to adapt to different packaging forms and pin layouts, thereby achieving higher integration and smaller package size.

[0039] Since different chips have different power supply schemes and layouts, the embodiment of the present disclosure does not limit the specific voltage and specific position of the preset power pin 4. Those skilled in the art can select a suitable preset power pin 4 according to the above standards.

[0040] The controllable relay 1 is located inside the chip package and is controlled by a memory controller (not in Figure 1) is controlled by the package test control signal PT. Inside the chip, a controllable relay 1 can be implemented by a variety of electronic components to control the on-off between the current test pad 3 and the preset power pin 4. These electronic components include units but are not limited to power transistors and / or bipolar transistors (BJT). In some embodiments, field effect transistors (FET), MOSFET, IGBT and other components can also be used to implement the function of the controllable relay.

[0041] By using a controllable relay 1 to connect the current test pad 3 located inside the chip package and the preset power pin 4 located outside the chip package after the chip is packaged, the problem that the electronic fuse unit cannot be measured after the chip is packaged can be solved. The E-Fuse current can be measured at the current site in the later test, so that the E-Fuse problem analysis can be solved at the current site, and there is no need to return the goods to the test site before packaging for current analysis, which saves manpower and testing costs and improves the efficiency of problem analysis.

[0042] Figure 2 It is a schematic diagram of the test circuit of the electronic fuse unit inside the chip.

[0043] refer to Figure 2 The electronic fuse unit array 2 includes n electronic fuse units 21-2n, wherein each electronic fuse unit has a current input terminal, an electronic fuse, and a switch unit for controlling the connection between the current input terminal and the electronic fuse. The current test pad 3 connects multiple current input terminals of multiple electronic fuse units, and at most one switch unit is in the on state at the same time.

[0044] exist Figure 2 In the illustrated embodiment, the switch unit includes a row addressing switch and a column addressing switch. For example, the electronic fuse unit 21 includes an electronic fuse E1, a row addressing switch M11, and a column addressing switch M12, and the electronic fuse unit 2n includes an electronic fuse En, a row addressing switch Mn1, and a column addressing switch Mn2. The row addressing switch is turned on or off by the row addressing signal Xi (1≤i≤N), and the column addressing switch is turned on or off by the column addressing signal Yi. When the row addressing signal Xi controls the row addressing switch Mi1 to turn on, and the column addressing signal Yi controls the column addressing switch Mi2 to turn on, the switch unit of the electronic fuse unit 2i is in the on state, and the electronic fuse Ei can be tested.

[0045] Different electronic fuse units may share a row addressing switch or a column addressing switch, for example, electronic fuse units in the same row share a row addressing switch, and electronic fuse units in the same column share a column addressing switch. The above row addressing switch number, column addressing switch number, row addressing signal number, and column addressing signal number are only examples for explanation, and do not limit the actual arrangement of the electronic fuse unit array.

[0046] The multiple electronic fuse units in the electronic fuse unit array 2 all have a current input terminal and a ground terminal. The current input terminal of the electronic fuse unit is connected to the current test pad 3, and the ground terminal of the electronic fuse unit is grounded. Figure 2 As shown. When the chip is not packaged, when the test machine 20 performs a current test, it can directly connect the current test pad 3, and then input current to the current test pad 3 to perform a current test on a certain electronic fuse unit. During the test, the row addressing switch and column addressing switch corresponding to the electronic fuse unit are both in the on state (the machine switch unit is in the on state), and the row addressing switches and column addressing switches of other electronic fuse units are not all in the on state. Among them, the current test pad 3 can be a pad or pin for CP test (Chip Probing Test).

[0047] Perform current tests on electronic fuse units, such as FVMI tests. FVMI (Force voltage measure current) tests evaluate the performance and functionality of a circuit by applying a specific voltage and then measuring the current through the circuit. This test can be used to verify that the design of the circuit meets the specifications, detect faults or defects in the circuit, and ensure that the circuit is within normal operating range. FVMI tests are usually performed at different stages in the manufacturing process to ensure the quality and reliability of the circuit.

[0048] At the wafer level, the current test of the electronic fuse unit can be achieved by directly connecting the current test pad 3 through the test machine 20, thereby determining whether the storage state of the electronic fuse unit is normal or not. However, once the wafer is cut and packaged to form chips, the subsequent chip particle test, i.e., the back-end test, is entered, and the current test pad 3 will be packaged.

[0049] Figure 3 Schematic diagram of the connection of the electronic fuse unit in the embodiment of the present disclosure.

[0050] refer to Figure 3 In the embodiment of the present disclosure, by providing a controllable relay 1 connecting the current contact pad 3 and the preset power pin 4 inside the chip package, after the chip is packaged, the test machine 20 can be connected to the current contact pad 3 through the preset power pin 4 located outside the chip package to test the electronic fuse array 2, that is, the current contact pad 3 is led out to the preset power pin 4 through the controllable relay 1 for testing.

[0051] When the test circuit of the embodiment of the present disclosure is applied to DRAM, the normal function of the preset power pin 4 is to supply power to the central area circuit 5 and the peripheral circuit 6 inside the chip. Therefore, in addition to connecting to the controllable relay 1, the preset power pin 4 must also connect to the central area circuit 5 (core) and the peripheral circuit 6 (Peripheral).

[0052] Figure 4 The present invention discloses an electronic fuse unit testing method in one embodiment.

[0053] refer to Figure 4 , electronic fuse unit test method 400 passed Figure 1 The electronic fuse test circuit shown is implemented to perform current testing on the electronic fuse unit inside the chip after the chip is packaged, and includes:

[0054] Step S1, controlling the controllable relay to conduct through the package test control signal in the enable state, so that the preset power pin is connected to the current test pad;

[0055] Step S2, controlling the switch unit of the electronic fuse unit to be tested to be in a conducting state;

[0056] Step S3, supplying power to the preset power pin and measuring the current of the preset power pin to obtain the measured current;

[0057] Step S4, comparing the measured current with at least one pre-measured standard current to obtain the current of the electronic fuse unit to be tested.

[0058] By using a turned-on controllable relay 1 to lead the signal of the current test pad 3 located inside the package to the preset power pin 4, and using the preset power pin 4 to perform a current test on the electronic fuse unit to be tested to obtain the actual measured current, the electronic fuse unit can also be tested after the chip is packaged. Figure 4 The electronic fuse unit to be tested in the illustrated embodiment refers to an electronic fuse unit whose switch unit is in a conducting state.

[0059] When testing, a current test is performed on the preset power pin 4, and the measured current must include the current of the central area circuit 5 and the peripheral circuit 6 connected to the preset power pin 4. In order to improve the test accuracy, in one embodiment, it is necessary to compare the measured current with the pre-measured standard current to obtain the current of the electronic fuse unit to be tested.

[0060] The standard current can be measured in a variety of ways. In one embodiment, current tests can be performed on multiple electronic fuse units to obtain two current values, one with a larger current value and one with a smaller current value. Assuming that ten tests are performed in advance, two of the current values ​​measured are significantly larger than the current values ​​measured in the other eight times, the difference between the current values ​​measured in the other eight times is within the preset range, and the current values ​​measured in these two times are also within the preset range, then the average value of the current values ​​measured in these two times can be used as the standard current corresponding to the blown state of the electronic fuse unit, and the average value, median value or current value calculated using other statistical methods of the current values ​​measured in the other eight times can be used as the standard current corresponding to the non-blown state.

[0061] In order to improve the test accuracy, the standard current can be pre-tested more times.

[0062] Figure 5 Schematic diagram of a test current in one embodiment of the present disclosure.

[0063] refer to Figure 5 When performing a current test, the actual current I measured by the preset power pin 4 includes the current I1 of the electronic fuse unit to be tested, the current I2 of the central area circuit 5, the current I3 of the peripheral circuit 6, and the leakage current I0 in the circuit.

[0064] The electronic fuse unit is essentially a large capacitor. When it is not disconnected (blown), the oxide layer between the two electrodes of the capacitor is insulated and has a large resistance. When DC current is input, the current is very small. When it blows, the voltage breaks through this oxide layer, causing it to short-circuit, which is equivalent to a smaller resistance and an increased current.

[0065] During the test, the controllable relay 1 is controlled to be turned on, and the reading path of the electronic fuse unit in the unblown state is opened (the switch unit is turned on). Assuming that 1.2V is added to the preset power pin 4 to read the current of the electronic fuse unit in the unblown state, the measured current value IZ1 is 2.05mA, then the current IZ1 corresponding to the electronic fuse unit in the unblown state is I2+I3+I0 (circuit branches are connected in parallel, and the currents are added).

[0066] If the reading path of the blown electronic fuse unit is opened (the switch unit is turned on), the current of the blown electronic fuse unit is read by adding 1.2V to the preset power pin 4, and the measured current value IZ2 is 2.16mA, that is, IZ2=I2+I3+I0+I1.

[0067] The current value of the electronic fuse unit is calculated to obtain I1=IZ2-IZ1=0.11mA=100uA.

[0068] Figure 5The calculation method shown can obtain the quantitative test result of the current after the electronic fuse unit is turned on, and based on the test result, it can be determined whether a certain electronic fuse unit is in a normal blown state, a normal unblown state, or an error state caused by manufacturing reasons.

[0069] However, in actual testing, since the electronic fuse unit is generally not in a blown state before leaving the factory, it is very likely that the current value of the blown state cannot be measured when testing the standard current, or multiple inconsistent current values ​​are measured, and it is impossible to determine which of the multiple inconsistent current values ​​belong to the blown state, unblown state, or error state of the electronic fuse unit due to manufacturing reasons. Therefore, in the embodiment of the present disclosure, at least one reference electronic fuse unit can be set to provide a standard current.

[0070] Figure 6 FIG. 4 is a schematic diagram of an electronic fuse unit test circuit in another embodiment of the present disclosure.

[0071] refer to Figure 6 The electronic fuse unit test circuit is provided with at least one reference electronic fuse unit 60, the reference electronic fuse unit 60 has a reference current input terminal, a reference electronic fuse Ec and a reference switch unit Kc for controlling the connection between the reference current input terminal and the reference electronic fuse, the reference current input terminal is connected to the current test pad 3, and the reference electronic fuse Ec is used to provide a reference state of the electronic fuse.

[0072] The reference switch unit Kc also includes a row addressing switch Mc1 and a column addressing switch Mc2. The row addressing switch Mc1 is controlled by a row addressing signal Xc, and the column addressing switch Mc2 is controlled by a column addressing signal Yc. The row addressing signal Xc and the column addressing signal Yc are from the same source as the row addressing signal and the column addressing signal of other electronic fuse units, for example, they are all from a storage controller.

[0073] Figure 7 yes Figure 6 Schematic diagram of the test method corresponding to the test circuit shown.

[0074] refer to Figure 7 When the electronic fuse unit test circuit includes at least one reference electronic fuse unit, the standard current test process includes:

[0075] Step S71, controlling the controllable relay to conduct through the package test control signal in the enable state, so that the preset power pin is connected to the current test pad;

[0076] Step S72, controlling the reference switch unit in the reference electronic fuse unit to be in a conducting state;

[0077] Step S73, supplying power to the preset power pin, and measuring the current of the preset power pin to obtain a standard current.

[0078] The connection method between the reference electronic fuse unit and the current test pad is the same as the connection method between other electronic fuse units and the current test pad, so the test process of the reference electronic fuse unit is the same as the test process of other electronic fuse units. By testing the reference electronic fuse unit in advance, a standard current can be obtained. It can be understood that the standard current measured at this time must include the current of the reference electronic fuse unit, the current I2 of the central area circuit 5, the current I3 of the peripheral circuit 6, and the leakage current I0 in the circuit.

[0079] right Figure 7 In the illustrated embodiment, when the measured current is compared with the pre-measured standard current in step S4 to obtain the current of the electronic fuse unit to be tested, if the reference fuse in the reference electronic fuse unit is in an unblown state, the difference between the measured current and the standard current is determined as the current of the electronic fuse unit to be tested; if the reference fuse in the reference electronic fuse unit is in a blown state, the difference between the standard current and the measured current is determined as the current of the electronic fuse unit to be tested.

[0080] Since the standard current includes the current of the reference electronic fuse unit, the current I2 of the central area circuit 5, the current I3 of the peripheral circuit 6, and the leakage current I0 in the circuit, and the measured current includes the current of the electronic fuse unit to be measured, the current I2 of the central area circuit 5, the current I3 of the peripheral circuit 6, and the leakage current I0 in the circuit, the difference between the standard current and the measured current can reflect the current state of the electronic fuse unit itself.

[0081] When a reference electronic fuse unit 60 is set in the circuit, the electronic fuse Ec can be in either a blown state or a non-blown state. When the electronic fuse Ec is in a blown state, the standard current provided is the standard current of the blown state; when the electronic fuse Ec is in an un-blown state, the standard current provided is the standard current of the un-blown state. By comparing the measured current with the standard current, it can be known whether the measured current belongs to a blown state current or a non-blown state current. For example, when the standard current is a blown state standard current, if the absolute value of the difference between the measured current and the blown state standard current is less than a preset threshold value (the preset threshold value is smaller), it can be determined that the measured current corresponds to a blown state current; if the absolute value of the difference between the measured current and the blown state standard current is greater than or equal to the preset threshold value, it can be determined that the measured current corresponds to a non-blown state current. When the standard current is the standard current in the non-fuse state, if the absolute value of the difference between the measured current and the standard current in the non-fuse state is less than a preset threshold (the preset threshold is smaller), it can be judged that the measured current corresponds to the current in the non-fuse state; if the absolute value of the difference between the measured current and the standard current in the non-fuse state is greater than or equal to the preset threshold, it can be judged that the measured current corresponds to the current in the non-fuse state.

[0082] Figure 6 and Figure 7 The embodiment can obtain the test result of qualitative (blown or unblown) test on the electronic fuse unit. When the number of tests is large, the test result of quantitative test on the blown current of the electronic fuse unit can also be obtained, such as Figure 5 The principle shown.

[0083] However, in some cases, the difference between the measured current and the standard current is not too large or too small, and it is difficult to determine whether the measured current is a normal error to the standard current, or whether the electronic fuse unit corresponding to the measured current is in an erroneous state due to manufacturing reasons, etc. Therefore, in another embodiment, a reference electronic fuse unit with two states is provided.

[0084] Figure 8 is a schematic diagram of a reference electronic fuse unit in one embodiment of the present disclosure.

[0085] refer to Figure 8 In one embodiment, the reference electronic fuse unit includes a first reference electronic fuse unit 81 and a second reference electronic fuse unit 82. The reference electronic fuse in the first reference electronic fuse unit 81 is in a blown state, and the reference electronic fuse in the second reference electronic fuse unit 82 is in an unblown state. Correspondingly, the current measured for the first reference electronic fuse unit 81 is called the first standard current, and the current measured for the second reference electronic fuse unit 82 is called the second standard current. The internal structures of the first reference electronic fuse unit 81 and the second reference electronic fuse unit 82 are similar to Figure 5 The reference electronic fuse unit 60 in the illustrated embodiment is the same and will not be described in detail herein.

[0086] Fig. 9 yes Figure 8 Schematic diagram of the test method corresponding to the embodiment shown.

[0087] refer to Fig. 9 When the reference electronic fuse unit includes a first reference electronic fuse unit and a second reference electronic fuse unit, the reference electronic fuse in the first reference electronic fuse unit is in a blown state, and the reference electronic fuse in the second reference electronic fuse unit is in an unblown state, the standard current is divided into a first standard current and a second standard current, the current measured for the first reference electronic fuse unit 81 is called the first standard current, and the current measured for the second reference electronic fuse unit 82 is called the second standard current, the test process of the standard current includes:

[0088] Step S91, controlling the controllable relay to conduct through the package test control signal in the enable state, so that the preset power pin is connected to the current test pad;

[0089] Step S92, controlling the reference switch unit in the first reference electronic fuse unit to be in a conducting state;

[0090] Step S93, supplying power to the preset power pin and measuring the current of the preset power pin to obtain a first standard current;

[0091] Step S94, stop supplying power to the preset power pin, control the reference switch unit in the first reference electronic fuse unit to be in an off state, and control the reference switch unit in the second reference electronic fuse unit to be in an on state;

[0092] Step S95, supplying power to the preset power pin, and measuring the current of the preset power pin to obtain a second standard current.

[0093] exist Figure 8 and Fig. 9 In the illustrated embodiment, the first standard current and the second standard current both include the current of the first reference electronic fuse unit / the second reference electronic fuse unit, the current I2 of the central area circuit 5 , the current I3 of the peripheral circuit 6 , and the leakage current I0 in the circuit.

[0094] Fig.10 is a flow chart of a testing method in another embodiment of the present disclosure.

[0095] refer to Fig.10 After measuring the first standard current and the second standard current, step S4 compares the measured current with the pre-measured standard current to obtain the current of the electronic fuse unit to be tested, including:

[0096] Step S41, determining the difference between the measured current and the first standard current as a first difference value;

[0097] Step S42, determining the difference between the measured current and the second standard current as a second difference value;

[0098] Step S43, if the absolute value of the first difference is less than the absolute value of the second difference, determining that the electronic fuse unit to be tested corresponds to the stored first value, and determining the second difference as the current of the electronic fuse unit to be tested;

[0099] Step S44: if the absolute value of the second difference is smaller than the absolute value of the first difference, it is determined that the electronic fuse unit to be tested stores a second value, and the second difference is determined as the current of the electronic fuse unit to be tested.

[0100] In one embodiment, the first value is 0 and the second value is 1.

[0101] Since the measured current also includes the current of the electronic fuse unit, the current I2 of the central area circuit 5, the current I3 of the peripheral circuit 6 and the leakage current I0 in the circuit, the difference between the measured current and the first standard current or the difference between the second standard current can reflect the current state of the electronic fuse unit to be tested.

[0102] exist Fig.10 In the illustrated embodiment, if the absolute value of the first difference is smaller than the absolute value of the second difference, it indicates that the measured current is closer to the first standard current, and the electronic fuse unit to be tested is in a blown state; if the absolute value of the second difference is smaller than the absolute value of the first difference, it indicates that the measured current is closer to the second standard current, and the electronic fuse unit to be tested is in an unblown state.

[0103] In other embodiments, the electronic fuse unit to be tested may also be in an error state. If the difference between the measured current and the first standard current and the second standard current is greater than a preset value (the preset value can be set by yourself), it can be determined that the electronic fuse unit to be tested is in an error state.

[0104] By simultaneously providing a first standard current corresponding to a blown state and a second standard current corresponding to an unblown state, the speed of qualitative judgment of the electronic fuse unit can be improved. At the same time, the first difference and the second difference can also be used to provide an overall current quantitative analysis of the entire electronic fuse unit array, which helps to optimize the manufacturing process in the research and development stage.

[0105] In summary, the disclosed embodiment provides a controllable relay 1 to lead the signal of the current test pad of the electronic fuse unit array out of the package, so that the electronic fuse unit can be tested for current after the chip is packaged. By providing a reference current unit, the efficiency of the current test on the electronic fuse unit can be improved.

[0106] It should be noted that, although several modules or units of the device for action execution are mentioned in the above detailed description, this division is not mandatory. In fact, according to the embodiments of the present disclosure, the features and functions of two or more modules or units described above can be embodied in one module or unit. On the contrary, the features and functions of one module or unit described above can be further divided into multiple modules or units to be embodied.

[0107] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The specification and examples are to be considered exemplary only, and the true scope and concept of the present disclosure are indicated by the claims.

Claims

1. An electronic fuse unit test circuit, characterized in that: The invention comprises a controllable relay, wherein the controllable relay has a first end, a second end and a control end, wherein the first end is connected to a current test pad of an electronic fuse unit array, the second end is connected to a preset power pin, and the control end is used to receive a package test control signal, and the controllable relay is turned on in response to the package test control signal so that the preset power pin is connected to the current test pad, and the preset power pin is used to perform a current test on the electronic fuse unit array after chip packaging, wherein the preset power pin is located outside the package after the chip is packaged, and the current test pad is located inside the package after the chip is packaged.

2. The electronic fuse unit test circuit as claimed in claim 1, characterized in that: The electronic fuse unit array includes multiple electronic fuse units, each of which has a current input terminal, an electronic fuse, and a switch unit that controls the connection between the current input terminal and the electronic fuse. The current test pad is connected to multiple current input terminals of the multiple electronic fuse units, and at most one of the switch units is in a conducting state at the same time.

3. The electronic fuse unit test circuit according to claim 1, characterized in that: The controllable relay includes a power transistor and / or a bipolar transistor.

4. The electronic fuse unit test circuit according to claim 1, characterized in that: It also includes at least one reference electronic fuse unit, which has a reference current input terminal, a reference electronic fuse, and a reference switch unit that controls the connection between the reference current input terminal and the reference electronic fuse. The reference current input terminal is connected to the current test pad, and the reference electronic fuse is used to provide a reference state of the electronic fuse.

5. The electronic fuse unit test circuit as claimed in claim 4, characterized in that: The invention comprises a first reference electronic fuse unit and a second reference electronic fuse unit, wherein the reference electronic fuse in the first reference electronic fuse unit is in a blown state, and the reference electronic fuse in the second reference electronic fuse unit is in an unblown state.

6. A method for testing an electronic fuse unit, characterized in that: The electronic fuse unit test circuit according to any one of claims 1 to 5 is used to perform a current test on the electronic fuse unit inside the chip after the chip is packaged, comprising: The controllable relay is controlled to conduct by a package test control signal in an enabled state, so that the preset power supply pin is connected to the current test pad; Controlling the switch unit of the electronic fuse unit to be tested to be in a conducting state; Supplying power to the preset power pin and measuring the current of the preset power pin to obtain a measured current; The measured current is compared with at least one pre-measured standard current to obtain the current of the electronic fuse unit to be tested.

7. The method according to claim 6, characterized in that The electronic fuse unit test circuit includes at least one reference electronic fuse unit, and the test process of the standard current includes: The controllable relay is controlled to conduct by a package test control signal in an enabled state, so that the preset power supply pin is connected to the current test pad; Controlling a reference switch unit in the reference electronic fuse unit to be in an on state; The preset power pin is powered, and the current of the preset power pin is measured to obtain the standard current.

8. The method according to claim 7, characterized in that Comparing the measured current with a pre-measured standard current to obtain the current of the electronic fuse unit to be tested includes: If the reference fuse in the reference electronic fuse unit is in an unblown state, determining the difference between the measured current and the standard current as the current of the electronic fuse unit to be tested; If the reference fuse in the reference electronic fuse unit is in a blown state, the difference between the standard current and the measured current is determined as the current of the electronic fuse unit to be tested.

9. The method according to claim 6, characterized in that The standard current is divided into a first standard current and a second standard current, the reference electronic fuse unit includes a first reference electronic fuse unit and a second reference electronic fuse unit, the reference electronic fuse in the first reference electronic fuse unit is in a blown state, and the reference electronic fuse in the second reference electronic fuse unit is in an unblown state, and the test process of the standard current includes: The controllable relay is controlled to conduct by a package test control signal in an enabled state, so that the preset power supply pin is connected to the current test pad; Controlling a reference switch unit in the first reference electronic fuse unit to be in an on state; supplying power to the preset power pin, and measuring the current of the preset power pin to obtain the first standard current; Stop supplying power to the preset power pin, control the reference switch unit in the first reference electronic fuse unit to be in an off state, and control the reference switch unit in the second reference electronic fuse unit to be in an on state; The preset power pin is powered, and the current of the preset power pin is measured to obtain the second standard current.

10. The method according to claim 8, characterized in that Comparing the measured current with a pre-measured standard current to obtain the current of the electronic fuse unit to be tested includes: Determine the difference between the measured current and the first standard current as a first difference value; Determine the difference between the measured current and the second standard current as a second difference value; If the absolute value of the first difference is smaller than the absolute value of the second difference, determining that the electronic fuse unit to be tested stores a first value, and determining the second difference as the current of the electronic fuse unit to be tested; If the absolute value of the second difference is smaller than the absolute value of the first difference, it is determined that the electronic fuse unit to be tested stores a second value, and the second difference is determined as the current of the electronic fuse unit to be tested.

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