A phase estimation method, a signal processing channel and a storage medium

Abstract

A phase estimation method, a signal processing channel and a storage medium are applied to the technical field of signal processing, and the phase estimation method comprises the following steps: obtaining an original input signal and an initial phase value interval; determining an initial left test phase value and an initial right test phase value based on a preset unimodal function search method, and performing amplitude estimation value calculation; performing test phase value iteration based on the preset unimodal function search method; if the target iteration number is not met and the target error value is not met, the test phase value iteration is continued; if the target iteration number is met, the test phase value iteration is ended, and the phase corresponding to the amplitude estimation minimum value is obtained based on the current iteration left test phase value and the iteration right test phase value. Since the amplitude estimation value of the to-be-tested signal is analyzed to perform phase estimation, and then the phase is searched based on the preset unimodal function search method, the phase corresponding to the amplitude estimation minimum value can be obtained, so that the phase estimation process is simplified.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of signal processing, and particularly relates to a phase estimation method, a signal processing channel and a storage medium. BACKGROUND

[0002] A digital-to-analog converter (DAC) is an important device for converting a digital signal into an analog signal, and is widely used in various industries. However, due to the influence of internal component mismatch and other nonlinear factors of the DAC, the output end of the DAC always contains other signals in addition to the main signal of the input signal, thereby affecting the spurious free dynamic range (SFDR) of the DAC. Among them, the harmonics corresponding to the main signal in the output signal of the DAC and the spurs have a greater impact on the SFDR.

[0003] In the current technical solution, other analysis instruments are mainly used to analyze the analog signal output by the DAC to directly analyze the harmonic phase of the harmonics or the spur phase of the spurs, but the precision of the analysis instrument is relatively high, the device cost of the high-precision analysis instrument is also relatively high, and the direct analysis process is complex and not suitable for large-scale application. Therefore, for obtaining the phase of the harmonics or the spurs generated by the DAC, a new technical solution needs to be proposed. SUMMARY

[0004] The technical problem solved by the present application is how to simplify the acquisition of the phase of the harmonics or the spurs generated by the DAC.

[0005] According to a first aspect, in an embodiment, a phase estimation method is provided, comprising:

[0006] An original input signal and an initial phase value interval [an^0, bn^0] are obtained; wherein an^0 is an initial left end phase value, and bn^0 is an initial right end phase value; an initial left test phase value xn^0 and an initial right test phase value yn^0 are determined based on a preset unimodal function search method and the initial phase value interval [an^0, bn^0], and amplitude estimation value calculation is performed on the initial left test phase value xn^0 and the initial right test phase value yn^0 respectively to obtain the amplitude estimation value of the corresponding test phase value;

[0007] Based on the preset unimodal function search method and the initial phase value interval [an0, bn0], and the initial left test phase value xn0and the initial right test phase value yn0and the amplitude estimation values corresponding thereto respectively, test phase value iteration is performed to obtain an iterative left test phase value xnKand an iterative right test phase value ynK; wherein K is the number of iterations and its initial value is 1, xnKand ynKare the iterative left test phase value and the iterative right test phase value corresponding to the Kth iteration respectively;

[0008] If the number of iterations of the test phase value iteration does not satisfy the target number of iterations, and the error value between the current iterative left test phase value xnKand the iterative right test phase value ynKdoes not satisfy the target error value, then based on the amplitude estimation value, the amplitude estimation value corresponding to the current iterative left test phase value xnKand the iterative right test phase value ynKis obtained respectively, the number of iterations K is increased by 1 and the test phase value iteration is continued.

[0009] If the number of iterations satisfies the target number of iterations or the error value satisfies the target error value, then the test phase value iteration is ended, and the phase corresponding to the amplitude estimation minimum value is obtained based on the current iterative left test phase value xnKand the iterative right test phase value ynK.

[0010] In some embodiments, the amplitude estimation value calculation includes: based on the harmonic frequency and the harmonic amplitude value of the harmonic of the original input signal or based on the spur frequency and the spur amplitude value of the spur of the original input signal, and the corresponding test phase value generates a cancellation signal; superimposing the cancellation signal and the original input signal to obtain a digital to-be-tested signal; inputting the digital to-be-tested signal into a DAC for digital-to-analog conversion to obtain an analog to-be-tested signal, and performing spectrum analysis on the analog to-be-tested signal to obtain the amplitude estimation value of the corresponding test phase value.

[0011] In some embodiments, the initial left test phase value xn0and the initial right test phase value yn0are determined based on the preset unimodal function search method and the initial phase value interval [an0, bn0], which includes:

[0012] The preset unimodal function search method calculates the initial left test phase value xn0by the following formula:

[0013] xn0= an0+ 0.382*(bn0-an0);

[0014] The preset unimodal function search method calculates the initial right test phase value yn0by the following formula:

[0015] yn0=an0+0.618*(bn0-an0).

[0016] In some embodiments, the test phase value iteration comprises:

[0017] If the first test phase value iteration is performed, it is determined whether the amplitude estimation value corresponding to the initial left test phase value xn0is greater than the amplitude estimation value corresponding to the initial right test phase value yn0.

[0018] If yes, the initial phase value interval [an0, bn0] is subjected to a first phase value interval iteration to obtain an iteration right end phase value bn1and an iteration left end phase value an1; wherein bn1=bn0, an1=xn0; the initial right test phase value yn0is assigned to the iteration left test phase value xn1, xn1=yn0is obtained, and the preset unimodal function search method calculates the iteration right test phase value yn1by the following formula:

[0019] yn1=an1+0.618*(bn1-an1).

[0020] If no, the initial phase value interval [an0, bn0] is subjected to a second phase value interval iteration to obtain an iteration right end phase value bn1and an iteration left end phase value an1; wherein an1=an0, bn1=yn0; the initial left test phase value xn0is assigned to the iteration right test phase value yn1, yn1=xn0is obtained, and the preset unimodal function search method calculates the iteration left test phase value xn1by the following formula:

[0021] xn1=an1+0.382*(bn1-an1).

[0022] If the K+1th test phase value iteration is performed, it is determined whether the amplitude estimation value corresponding to the iteration left test phase value xnKis greater than the amplitude estimation value corresponding to the iteration right test phase value ynK.

[0023] If yes, the initial phase value interval [anK, bnK] is subjected to a first phase value interval iteration to obtain an iteration right end phase value bn(K+1)and an iteration left end phase value an(K+1); wherein bn(K+1)=bnK, an(K+1)=xnK; the iteration right test phase value ynKis assigned to the iteration left test phase value xn(K+1), xn(K+1)=ynKis obtained, and the preset unimodal function search method calculates the iteration right test phase value yn(K+1)by the following formula:

[0024] yn^(K+1)=an^(K+1)+0.618*(bn^(K+1)-an^(K+1));

[0025] If less than, the phase value interval second iteration is performed on the iteration phase value interval [an^K, bn^K] to obtain an iteration right end phase value bn^(K+1) and an iteration left end phase value an^(K+1); wherein, an^(K+1)=an^K, bn^(K+1)=yn^K; the iteration left test phase value xn^K is assigned to the iteration right test phase value yn^(K+1) to obtain yn^(K+1)=xn^K, and the preset unimodal function search method calculates the iteration left test phase value xn^(K+1) through the following formula:

[0026] xn^(K+1)=an^(K+1)+0.382*(bn^(K+1)-an^(K+1))。

[0027] In some embodiments, the test phase value iteration includes:

[0028] If the first test phase value iteration is performed, it is judged whether the amplitude estimation value corresponding to the initial left test phase value xn^0 is greater than the amplitude estimation value corresponding to the initial right test phase value yn^0;

[0029] If greater than, the phase value interval second iteration is performed on the initial phase value interval [an^0, bn^0] to obtain an iteration right end phase value bn^1 and an iteration left end phase value an^1; wherein, an^1=an^0, bn^1=yn^0;

[0030] The initial left test phase value xn^0 is assigned to the iteration right test phase value yn^1 to obtain yn^1=xn^0, and the preset unimodal function search method calculates the iteration left test phase value xn^1 through the following formula:

[0031] xn^1=an^1+0.382*(bn^1-an^1);

[0032] If less than, the phase value interval first iteration is performed on the initial phase value interval [an^0, bn^0] to obtain an iteration right end phase value bn^1 and an iteration left end phase value an^1; wherein, bn^1=bn^0, an^1=xn^0;

[0033] The initial right test phase value yn^0 is assigned to the iteration left test phase value xn^1 to obtain xn^1=yn^0, and the preset unimodal function search method calculates the iteration right test phase value yn^1 through the following formula:

[0034] yn1=an1+0.618*(bn1-an1);

[0035] If the K+1th iteration of the test phase value is performed, it is judged whether the amplitude estimation value corresponding to the iteration left test phase value xnKis greater than the amplitude estimation value corresponding to the iteration right test phase value ynK;

[0036] If it is greater, the phase value interval [anK, bnK] is subjected to a second iteration of the phase value interval to obtain an iteration right end phase value bn^(K+1) and an iteration left end phase value an^(K+1); wherein an^(K+1)=anK, bn^(K+1)=ynK; the iteration left test phase value xn^(K+1) is obtained by assigning the iteration left test phase value xnKto the iteration right test phase value yn^(K+1), that is, yn^(K+1)=xnK, and the preset unimodal function search method calculates the iteration right test phase value yn^(K+1) through the following formula:

[0037] xn^(K+1)=an^(K+1)+0.382*(bn^(K+1)-an^(K+1));

[0038] If it is less, the initial phase value interval [anK, bnK] is subjected to a first iteration of the phase value interval to obtain an iteration right end phase value bn^(K+1) and an iteration left end phase value an^(K+1); wherein bn^(K+1)=bnK, an^(K+1)=xnK; the iteration left test phase value xn^(K+1) is obtained by assigning the iteration right test phase value ynKto the iteration left test phase value xn^(K+1), that is, xn^(K+1)=ynK, and the preset unimodal function search method calculates the iteration right test phase value yn^(K+1) through the following formula:

[0039] yn^(K+1)=an^(K+1)+0.618*(bn^(K+1)-an^(K+1)).

[0040] In some embodiments, the calculation of the amplitude estimation value corresponding to the current iteration left test phase value xnKand the iteration right test phase value ynKrespectively based on the amplitude estimation value comprises:

[0041] If the initial right test phase value yn^0is assigned to the iteration left test phase value xn^1, the amplitude estimation value corresponding to the initial right test phase value yn^0is assigned to the amplitude estimation value corresponding to the iteration left test phase value xn^1, and the amplitude estimation value calculation is performed on the iteration right test phase value yn^1 to obtain the amplitude estimation value corresponding to the iteration right test phase value yn^1;

[0042] If the initial left test phase value xn^0 is assigned to the iterative right test phase value yn^1, the amplitude estimation value corresponding to the initial left test phase value xn^0 is assigned to the amplitude estimation value corresponding to the iterative right test phase value yn^1, and the amplitude estimation value calculation is performed on the iterative left test phase value xn^1 to obtain the amplitude estimation value corresponding to the iterative left test phase value xn^1.

[0043] If the initial left test phase value xn^0 is assigned to the iterative right test phase value yn^1, the amplitude estimation value corresponding to the initial left test phase value xn^0 is assigned to the amplitude estimation value corresponding to the iterative right test phase value yn^1, and the amplitude estimation value calculation is performed on the iterative left test phase value xn^1 to obtain the amplitude estimation value corresponding to the iterative left test phase value xn^1.

[0044] If the initial left test phase value xn^0 is assigned to the iterative right test phase value yn^1, the amplitude estimation value corresponding to the initial left test phase value xn^0 is assigned to the amplitude estimation value corresponding to the iterative right test phase value yn^1, and the amplitude estimation value calculation is performed on the iterative left test phase value xn^1 to obtain the amplitude estimation value corresponding to the iterative left test phase value xn^1.

[0045] In some embodiments, the phase corresponding to the amplitude estimation minimum value is obtained based on the current iterative left test phase value xn^K and iterative right test phase value yn^K, including:

[0046] An average phase value of the current iterative left test phase value xn^K and iterative right test phase value yn^K is obtained as the phase corresponding to the amplitude estimation minimum value.

[0047] In some embodiments, the phase corresponding to the amplitude estimation minimum value is obtained based on the current iterative left test phase value xn^K and iterative right test phase value yn^K, including:

[0048] An average phase value of the current iterative left test phase value xn^K and iterative right test phase value yn^K is obtained, and the average phase value is shifted by a preset phase to obtain the phase corresponding to the amplitude estimation minimum value.

[0049] In some embodiments, if the average phase value is between [0, π), the preset phase to be shifted is π.

[0050] If the average phase value is between [π, 2π), the preset phase to be shifted is -π.

[0051] The phase after the translation is the sum of the average phase value and the preset phase after the translation.

[0052] In some embodiments, the initial phase value interval [an0, bn0] is generated by:

[0053] configuring the phase value 0 as the initial left end phase value an0and configuring the phase value 2π as the initial right end phase value bn0to obtain the initial phase value interval [an0, bn0];

[0054] Or,

[0055] obtaining an estimated phase empirical value, and generating the initial phase value interval [an0, bn0] according to the estimated phase empirical value.

[0056] In some embodiments, the obtaining of the estimated phase empirical value comprises:

[0057] obtaining a phase estimation value corresponding to a harmonic frequency or a spur frequency of a known input signal after the known input signal is input into the DAC;

[0058] obtaining the estimated phase empirical value corresponding to a harmonic of the original input signal from the phase estimation value based on a frequency relationship between the known input signal and the original input signal; or,

[0059] obtaining the estimated phase empirical value corresponding to a spur of the original input signal from the phase estimation value based on a frequency relationship between the known input signal and the original input signal and a frequency relationship between a spur frequency of a spur of the known input signal and a spur frequency of a spur of the original input signal.

[0060] In some embodiments, the spectrum analysis of the analog to-be-tested signal comprises:

[0061] inputting the analog to-be-tested signal into a spectrum analyzer for spectrum analysis;

[0062] Or,

[0063] performing Fourier transform processing after analog-to-digital conversion processing of the analog to-be-tested signal input into an analog-to-digital converter to perform spectrum analysis.

[0064] In some embodiments, for a harmonic, the frequency of the cancellation signal corresponding thereto is a harmonic frequency of a harmonic of the original input signal; and for a spur, the frequency of the cancellation signal corresponding thereto is a spur frequency of a spur of the original input signal.

[0065] According to a second aspect, in an embodiment, a signal processing channel is provided for implementing the phase estimation method according to the first aspect, the signal processing channel comprising at least two DDS phase accumulators, each of the DDS phase accumulators being connected in parallel between two signal processing lines, and the number of parallel connections being defined as an integer H greater than 1.

[0066] The signal processing line comprising the DDS phase accumulator is subjected to I / Q conversion and attenuation processing to generate the original input signal, and the remaining signal processing lines comprising the DDS phase accumulators are subjected to I / Q conversion processing based on the corresponding test phase values to generate the corresponding cancellation signals of the harmonics or the corresponding cancellation signals of the spurs.

[0067] In some embodiments, the signal processing channel is applied to process a plurality of harmonics, or a plurality of spurs, or at least one harmonic and at least one spur, and if the value of H is greater than or equal to 3, the remaining signal processing lines comprising the DDS phase accumulators are used to generate a plurality of corresponding cancellation signals of the harmonics, or a plurality of corresponding cancellation signals of the spurs, or corresponding cancellation signals of the at least one harmonic and the at least one spur, respectively.

[0068] In some embodiments, the maximum number of times of calling the remaining signal processing lines comprising the DDS phase accumulators is equal to the sum of the number of harmonics and the number of spurs.

[0069] In some embodiments, the signal processing channel further comprises a phase counter and a memory, the phase counter being used to accumulate the test phase values corresponding to the cancellation signals during iteration of the test phase values, and the memory being used to store the corresponding test phase values and the corresponding amplitude estimation values.

[0070] In some embodiments, the total number L of harmonics and spurs to be processed is obtained.

[0071] The total number L is divided by H-1 and rounded up to obtain the number of times of calling the signal processing channel.

[0072] According to the number of times of calling the signal processing channel, the phase counter and the memory are reset to clear the historical amplitude estimation values and the corresponding test phase values.

[0073] According to a third aspect, in an embodiment, a computer readable storage medium is provided, the medium storing a program executable by a processor to implement the method according to the first aspect.

[0074] According to the phase estimation method, the signal processing channel and the storage medium of the above embodiments, when the original input signal and the cancellation signal are superimposed, if the phase of the harmonic frequency or the spurious frequency corresponding to the original input signal is in phase with the phase of the harmonic frequency or the spurious frequency corresponding to the cancellation signal, the amplitude estimation value of the harmonic frequency or the spurious frequency corresponding to the phase reaches the maximum value, and vice versa, if the phases are opposite, the amplitude estimation value of the harmonic frequency or the spurious frequency corresponding to the phase reaches the minimum value, and the phase of the cancellation signal and the amplitude estimation value form a one-dimensional unimodal function. Therefore, the phase is searched based on the preset unimodal function search method and the initial phase value interval, and the test phase value iteration is performed based on the initial left test phase value and the initial right test phase value, and the corresponding cancellation signal is generated based on the searched test phase value, then the cancellation signal and the original input signal are superimposed, and the digital-to-analog conversion is performed by the DAC, and finally the analog signal output by the digital-to-analog converter is analyzed to obtain the amplitude estimation value corresponding to the harmonic frequency or the spurious frequency. Finally, when the test phase value iteration is ended, the phase corresponding to the minimum amplitude estimation value is obtained based on the current iteration left test phase value and the iteration right test phase value. Since the cancellation signal and the original input signal are mainly superimposed, and the amplitude estimation value corresponding to the harmonic frequency or the spurious frequency in the analog test signal is analyzed, and then the phase is searched based on the preset unimodal function search method, the phase corresponding to the minimum amplitude estimation value can be obtained, so that the phase estimation process is simplified. BRIEF DESCRIPTION OF DRAWINGS

[0075] Figure 1 The structural schematic diagram of the signal processing channel of an embodiment;

[0076] Figure 2 The structural schematic diagram of the signal processing channel of another embodiment;

[0077] Figure 3 The flowchart of the phase estimation of the signal processing channel of an embodiment;

[0078] Figure 4 The record diagram of the test phase value iteration of an embodiment;

[0079] Figure 5 The record diagram of the test phase value iteration of another embodiment;

[0080] Figure 6 The flowchart of the phase estimation method of an embodiment. DETAILED DESCRIPTION

[0081] The application will be described in further detail below with specific reference being made to the drawings. Like elements are referred to with like reference numerals throughout the specification. In the following description, numerous specific details are described to provide a thorough understanding of the application. However, it will be apparent to one skilled in the art that the application can be practiced without some or all of these specific details. In other instances, well known process steps have not been described in detail in order not to unnecessarily obscure the application. Also, well-known operations, components and materials have not been described in detail in order to avoid unnecessarily obscuring the application.

[0082] In addition, the features, operations or characteristics described in the specification can be combined in any appropriate manner in various embodiments. Also, the order of the steps or acts in the method description can be changed, or some of the steps or acts can be skipped, as is apparent to one skilled in the art, without departing from the spirit of the application. Therefore, the various sequences in the specification and the drawings are merely for the purpose of clear description of one embodiment, and do not mean that the sequence is necessary.

[0083] In this document, the terms "first", "second", etc. are used only to distinguish one object from another, and do not necessarily have any temporal or technical meaning. The terms "connect", "couple" and the like, unless otherwise specified, include both direct and indirect connections (couplings).

[0084] In some embodiments of the application, two signals of the same frequency are used. When the two signals are in phase, the superimposed amplitude increases, and when the two signals are out of phase, the superimposed amplitude is cancelled, and the superimposed amplitude is a one-dimensional unimodal function. Therefore, the phase search is performed based on the preset unimodal function search method and the initial phase value interval, and the test phase value iteration is performed based on the initial left test phase value and the initial right test phase value. When the test phase value iteration is completed, the phase estimation value is obtained based on the current iteration left test phase value and the iteration right test phase value. Since the phase estimation process is simplified by superimposing the cancellation signal and the original input signal, analyzing the amplitude estimation value corresponding to the harmonic frequency or the spurious frequency in the simulated test signal, and then performing the phase search based on the preset unimodal function search method, the phase corresponding to the minimum amplitude estimation value can be obtained.

[0085] Some embodiments provide a signal processing channel, please refer to Figure 1The signal processing channel comprises at least two DDS phase accumulators 10, each of which is connected in parallel in a signal processing line, and the number of parallel connections is defined as an integer H greater than 1.

[0086] The DDS phase accumulator 10 is used to complete the accumulation of the phase value according to the received frequency control word, to obtain a phase accumulation value. Please refer to Figure 2 In some embodiments, the components in the signal processing line in which each DDS phase accumulator 10 is located are connected in series, for example, the DDS phase accumulator 10 comprises a phase adder and a phase register connected in series, the phase register is used to output the current accumulated phase to the phase adder, the phase adder adds the frequency control word and the accumulated phase output by the phase register, and sends the added result to the phase register for the next phase accumulation. In some embodiments, the frequency control word can be generated based on a processor, and the processor can also be used to adjust the initial phase of the phase register. In some embodiments, the processor can be implemented based on a device with data processing capability such as CPU, FPGA, single-chip microcomputer, etc. The frequency control word is determined by the frequency of the input signal, the clock frequency and the total number of bits of the DDS phase accumulator 10.

[0087] In some embodiments, each signal processing line in which each DDS phase accumulator 10 is located can be configured with a phase amplitude mapping module 20, which is used to obtain the corresponding signal amplitude according to the phase accumulation value output by the corresponding DDS phase accumulator 10, and output the corresponding digital waveform signal. In some embodiments, the phase amplitude mapping module 20 can obtain the signal amplitude corresponding to the phase accumulation value based on a phase lookup table, for example, the phase lookup table can be a sine lookup table. In some embodiments, the phase amplitude mapping module 20 can also calculate the signal amplitude corresponding to the phase accumulation value in real time based on coordinate rotation algorithm.

[0088] In some embodiments, the signal processing lines in which each DDS phase accumulator 10 is located can also share a phase amplitude mapping module 20, for example, the phase amplitude mapping module 20 is multiplexed between each DDS phase accumulator 10.

[0089] In some embodiments, the digital waveform signal output by the phase amplitude mapping module 20 can be converted into an analog waveform signal after digital-to-analog conversion by a digital-to-analog conversion unit 30. In some embodiments, the digital-to-analog conversion unit 30 can implement the digital-to-analog conversion of the signal based on an analog-to-digital converter. In some embodiments, the digital-to-analog conversion unit 30 can also comprise a signal adder, which is used to superimpose multiple digital waveform signals and then output them to the analog-to-digital converter, so as to realize the digital-to-analog conversion of the superimposed signal.

[0090] In the above embodiments, each signal processing circuit including the DDS phase accumulator 10 is used to generate a digital waveform signal, so that each time the signal processing circuit is activated, a digital waveform signal corresponding to a harmonic or a spurious signal can be generated, and each time the signal processing channel is activated, a plurality of digital waveform signals corresponding to a plurality of harmonics or a plurality of spurious signals can be generated.

[0091] The above is a description of the signal processing channel. For details of the phase estimation process based on the signal processing channel, please refer to Figure 3 , which will be described in detail below.

[0092] An original input signal is obtained, wherein one of the signal processing circuits of the signal processing channel including the DDS phase accumulator 10 generates the original input signal after the I / Q conversion and the attenuation processing.

[0093] In some embodiments, the signal processing circuit can further include an attenuator, so that the attenuation processing of the signal is based on the attenuator.

[0094] In some embodiments, the harmonics of the original input signal can include one or more harmonics, such as the second harmonic or the third harmonic, or the second harmonic and the third harmonic, and thus the cancellation signal can be a signal corresponding to the second harmonic or the third harmonic, or a signal corresponding to the second harmonic and the third harmonic. In some embodiments, the spurious of the original input signal can include one or more spurious, so that the cancellation signal can be a signal corresponding to one spurious or a signal corresponding to a plurality of spurious. In this embodiment, the harmonics and the spurious of the original input signal refer to the harmonics and the spurious generated after the original input signal is input into the DAC.

[0095] An initial phase value interval [an^0, bn^0] is obtained. Wherein, an^0 is the initial left end phase value, bn^0 is the initial right end phase value. Wherein, n is a positive integer greater than or equal to 1, which corresponds to a spurious or a harmonic, for example, n = 1 corresponds to the second harmonic, n = 2 corresponds to the third harmonic, and n = 3 corresponds to the spurious.

[0096] In some embodiments, the phase value 0 is configured as the initial left end phase value an^0, and the phase value 2π is configured as the initial right end phase value bn^0, to obtain the initial phase value interval [an^0, bn^0]. In this embodiment, the required phase value is searched based on the full range of the phase. Wherein, after the cancellation signal and the original input signal are superimposed, there is a maximum value and a minimum value in the full range of the phase, so that the phase value corresponding to the maximum value can be searched, or the phase value corresponding to the minimum value can be searched.

[0097] In some embodiments, an estimated phase empirical value is obtained, and an initial phase value interval [an0, bn0] is generated based on the estimated phase empirical value. In some embodiments, the initial phase value interval [an0, bn0] can be generated based on a preset range before and after the estimated phase empirical value, for example, taking the estimated phase empirical value as the center position, and taking a phase value larger than the estimated phase empirical value by a preset phase value as the initial right end phase value bn0, and taking a phase value smaller than the estimated phase empirical value by a preset phase value as the initial left end phase value an0. In some embodiments, for each original input signal without an estimated phase empirical value, the full range of the phase can be shared as the initial phase value interval [an0, bn0], and for each original input signal with an estimated phase empirical value, the initial phase value interval [an0, bn0] is generated based on the respective estimated phase empirical value.

[0098] In some embodiments, after the known input signal is input into the DAC, a phase estimation value corresponding to the harmonic frequency or the spur frequency of the known input signal is obtained. Since there is a certain relationship between the frequency of a signal and the phase of the signal, the phase corresponding to the harmonic frequency or the spur frequency of the original input signal can be estimated based on the frequency of the known input signal and the phase estimation value corresponding to the harmonic frequency or the spur frequency of the known input signal. For example, if the frequency between the known input signal and the original input signal is different, the estimated phase empirical value corresponding to the harmonic of the original input signal is obtained from the phase estimation value corresponding to the harmonic based on the frequency relationship between the known input signal and the original input signal, or the estimated phase empirical value corresponding to the spur of the original input signal is obtained from the phase estimation value corresponding to the spur based on the frequency relationship between the known input signal and the original input signal and the frequency relationship between the spur frequency of the spur of the known input signal and the spur frequency of the spur of the original input signal. For example, if the frequency between the known input signal and the original input signal is the same, the phase estimation value corresponding to the harmonic is taken as the estimated phase empirical value corresponding to the harmonic of the original input signal. For example, if the spur frequency of the spur of the known input signal and the spur frequency of the spur of the original input signal are also the same, the phase estimation value corresponding to the spur frequency is taken as the estimated phase empirical value corresponding to the spur of the original input signal.

[0099] In the above embodiments, when signals of the same frequency are input to the same digital-to-analog converter, the phases of the generated harmonics are substantially consistent. Therefore, for a known input signal for which phase estimation has been completed, subsequent processing can be performed based on the obtained estimated phase, without the need for repeated acquisition. In addition, for an original input signal for which phase estimation has not been completed, the phases of the harmonics corresponding to the original input signal can be predicted based on the phases of the harmonics of the known input signal, and then phase estimation of the original input signal can be performed based on the predicted phases, thereby further simplifying the acquisition complexity and improving the accuracy of phase estimation.

[0100] In some embodiments, when generating the initial phase value interval [an0, bn0] based on the estimated phase empirical value, the initial phase value interval [an0, bn0] is determined with the estimated phase empirical value as the center, where an0= b-c and bn0= b+c, where b is the estimated phase empirical value and c is a preset phase value. In this embodiment, since the estimated phase empirical value has been obtained, the initial phase value interval [an0, bn0] can be determined within a smaller phase range, thereby reducing the amount of data calculation and improving the calculation accuracy.

[0101] The initial left test phase value xn0and the initial right test phase value yn0are determined based on the preset unimodal function search method and the initial phase value interval [an0, bn0].

[0102] In some embodiments, when the initial left test phase value xn0and the initial right test phase value yn0are determined based on the preset unimodal function search method and the initial phase value interval [an0, bn0], the preset unimodal function search method calculates the initial left test phase value xn0by the following formula:

[0103] xn0= an0+ 0.382 * (bn0-an0);

[0104] The preset unimodal function search method calculates the initial right test phase value yn0by the following formula:

[0105] yn0= an0+ 0.618 * (bn0-an0).

[0106] Amplitude estimation value calculations are performed on the initial left test phase value xn0and the initial right test phase value yn0, respectively.

[0107] In some embodiments, when performing the amplitude estimation value calculation, the cancellation signal is generated based on the harmonic frequency and the harmonic amplitude value of the harmonic of the original input signal or based on the spur frequency and the spur amplitude value of the spur of the original input signal and the corresponding test phase value. For example, when performing the amplitude estimation value calculation on the initial right test phase value yn^0, the corresponding test phase value is the initial right test phase value yn^0.

[0108] In some embodiments, when generating the cancellation signal, the signal processing circuit in the signal processing channel containing the DDS phase accumulator 10 generates the harmonic corresponding cancellation signal or the spur corresponding cancellation signal based on the phase value in the corresponding test phase table.

[0109] In some embodiments, before generating the cancellation signal, the original input signal can be input into a digital-to-analog converter for digital-to-analog conversion to obtain an analog input signal corresponding to the digital-to-analog converter output, and then the analog input signal is subjected to frequency spectrum analysis to obtain the amplitude estimation value of the harmonic of the original input signal. Alternatively, the spur frequency and the spur amplitude value of the spur of the original input signal are obtained, for example, based on the spur frequency and the spur amplitude value of the spur of the original input signal known by other measurement equipment.

[0110] In some embodiments, the analog input signal can be subjected to analog-to-digital conversion based on an analog-to-digital converter to obtain a corresponding digital signal, and then the digital signal is subjected to time domain to frequency domain conversion based on a processor or an external data processing device, for example, fast Fourier transform (FFT) processing, and then the transformed frequency domain signal is analyzed to obtain the amplitude estimation value of the harmonic of the original input signal. Since the frequency of the FFT may have a deviation, the obtained amplitude estimation value can be selected as the amplitude value corresponding to the harmonic frequency of the harmonic, or as the maximum amplitude value in the frequency range around the harmonic frequency.

[0111] In some embodiments, when generating the cancellation signal, for the harmonic, the frequency of the corresponding cancellation signal is the harmonic frequency of the harmonic of the original input signal, and for the spur, the frequency of the corresponding cancellation signal is the spur frequency of the spur of the original input signal.

[0112] In some embodiments, when attenuating the original input signal, the amplitude of the digital test signal after superimposing the original input signal and the cancellation signal can satisfy the maximum input range of the digital-to-analog converter or be less than the maximum input range. In some embodiments, when the amplitude of the digital test signal satisfies the maximum input range of the digital-to-analog converter, the digital-to-analog converter can be fully utilized to improve the accuracy of subsequent data processing. In some embodiments, the amplitude of the original input signal attenuation can be controlled by a processor or an external data processing device.

[0113] In some embodiments, the signal processing circuit of the DDS phase accumulator 10 in the remaining other paths can be used to generate a cancellation signal corresponding to one harmonic or a cancellation signal corresponding to one spur. In some embodiments, the signal processing circuit of the DDS phase accumulator 10 in the remaining other paths can be used to generate a plurality of cancellation signals corresponding to a plurality of harmonics, or a plurality of cancellation signals corresponding to a plurality of spurs, or a cancellation signal corresponding to at least one harmonic and a cancellation signal corresponding to at least one spur. In some embodiments, the plurality of cancellation signals can be generated based on a plurality of signal processing circuits of the DDS phase accumulator 10, or the plurality of cancellation signals can be generated based on a single signal processing circuit of the DDS phase accumulator 10.

[0114] For example, if the value of H is greater than or equal to 3, the signal processing circuit of the DDS phase accumulator 10 in the remaining other paths can be used to generate a plurality of cancellation signals corresponding to a plurality of harmonics, or a plurality of cancellation signals corresponding to a plurality of spurs, or a cancellation signal corresponding to at least one harmonic and a cancellation signal corresponding to at least one spur. In some embodiments, the maximum number of times the signal processing circuit of the DDS phase accumulator 10 in the remaining other paths is called is equal to the sum of the number of harmonics and the number of spurs, and each time the signal processing circuit of the DDS phase accumulator 10 is called, a cancellation signal corresponding to one harmonic or a cancellation signal corresponding to one spur is generated.

[0115] The cancellation signal and the original input signal are then superimposed to obtain a digital test signal, and the digital test signal is input to a DAC for digital-to-analog conversion to obtain an analog test signal. The analog test signal is subjected to spectral analysis to obtain an amplitude estimate value corresponding to a harmonic frequency or a spur frequency corresponding to a test phase value.

[0116] In some embodiments, the analog test signal can also be subjected to analog-to-digital conversion based on an analog-to-digital converter to obtain a corresponding digital signal, and then a processor or an external data processing device performs time-to-frequency domain conversion on the digital signal, such as fast Fourier transform (FFT) processing. Then, the frequency domain signal after conversion is analyzed to obtain an amplitude estimate value corresponding to a harmonic frequency or a spur frequency in the analog test signal. In some embodiments, the analog test signal can also be directly input to a spectrum analyzer for spectral analysis.

[0117] After the amplitude estimate value is calculated, the test phase value is iterated based on a preset unimodal function search method and an initial phase value interval [an0, bn0], as well as an initial left test phase value xn0and an initial right test phase value yn0and their corresponding amplitude estimate values.

[0118] In some embodiments, when searching the initial phase value interval [an0, bn0] and the initial left test phase value xn0and the initial right test phase value yn0and the corresponding amplitude estimation value based on the preset unimodal function search method, if it is the first test phase value iteration, the iteration process is as follows:

[0119] First, determine whether the amplitude estimation value corresponding to the initial left test phase value xn0is greater than the amplitude estimation value corresponding to the initial right test phase value yn0.

[0120] If the amplitude estimation value corresponding to the initial left test phase value xn0is greater than the amplitude estimation value corresponding to the initial right test phase value yn0, then the initial phase value interval [an0, bn0] is subjected to a first phase value interval iteration, i.e., the phase value interval is reduced to the right end, at this time the right end phase value is unchanged, and the left test phase value is assigned to the iteration left end phase value, to obtain the iteration right end phase value bn1and the iteration left end phase value an1. Wherein, bn1= bn0, an1= xn0. Wherein, when performing the first phase value interval iteration, a flag sign can be set to 0.

[0121] At the same time, the initial right test phase value yn0is assigned to the iteration left test phase value xn1, to obtain xn1= yn0, and the preset unimodal function search method calculates the iteration right test phase value yn1by the following formula:

[0122] yn1= an1+ 0.618*(bn1-an1).

[0123] If the amplitude estimation value corresponding to the initial left test phase value xn0is less than the amplitude estimation value corresponding to the initial right test phase value yn0, then the initial phase value interval [an0, bn0] is subjected to a second phase value interval iteration, i.e., the phase value interval is reduced to the left end, at this time the left end phase value is unchanged, and the right test phase value is assigned to the iteration right end phase value, to obtain the iteration right end phase value bn1and the iteration left end phase value an1; wherein, an1= an0, bn1= yn0; wherein, when performing the second phase value interval iteration, a flag sign can be set to 1.

[0124] At the same time, the initial left test phase value xn0is assigned to the iteration right test phase value yn1, to obtain yn1= xn0, and the preset unimodal function search method calculates the iteration left test phase value xn1by the following formula:

[0125] xn1= an1+ 0.382*(bn1-an1).

[0126] The test phase value iteration is to search for the phase corresponding to the minimum value of the amplitude estimation value. In some embodiments, the phase corresponding to the maximum value of the amplitude estimation value can also be searched based on the test phase value iteration, which is a process symmetrical to and opposite to the above process, and will be described below.

[0127] In some embodiments, it is first determined whether the amplitude estimation value corresponding to the initial left test phase value xn^0 is greater than the amplitude estimation value corresponding to the initial right test phase value yn^0.

[0128] If it is greater, the above phase value interval second iteration is performed on the initial phase value interval [an^0, bn^0] to obtain the iteration right end phase value bn^1 and the iteration left end phase value an^1. At the same time, the initial left test phase value xn^0 is assigned to the iteration right test phase value yn^1, and the iteration left test phase value xn^1 is calculated. The specific process will not be described again.

[0129] If it is less, the above phase value interval first iteration is performed on the phase value interval [an^0, bn^0] to obtain the iteration right end phase value bn^1 and the iteration left end phase value an^1. At the same time, the initial right test phase value yn^0 is assigned to the iteration left test phase value xn^1, and the iteration right test phase value yn^1 is calculated. The specific process will not be described again.

[0130] In the above embodiments, when the test phase value iteration is performed based on the preset unimodal function search method, the iteration coefficients are the golden ratio coefficients 0.618, where 0.382 = 1-0.618. Therefore, in each test phase value iteration, the initial right test phase value yn^0 therein can be assigned to the iteration left test phase value xn^1, or the initial left test phase value xn^0 therein can be assigned to the iteration right test phase value yn^1, which is equivalent to that only one new phase value interval end point and one new test phase value need to be calculated in each test phase value iteration, thereby reducing the data operation amount.

[0131] The above is a related description of the first test phase value iteration. If the K+1th test phase value iteration is performed, the iteration process is as follows:

[0132] It is first determined whether the amplitude estimation value corresponding to the iteration left test phase value xn^K is greater than the amplitude estimation value corresponding to the iteration right test phase value yn^K. Wherein, K is the iteration number and its initial value is 1, xn^K and yn^K are the iteration left test phase value and the iteration right test phase value corresponding to the Kth iteration, respectively.

[0133] If the amplitude estimation value corresponding to the iterative left test phase value xn^K is greater than the amplitude estimation value corresponding to the iterative right test phase value yn^K, the phase value interval [an^K, bn^K] is subjected to phase value interval first iteration, that is, the phase value interval is reduced to the right end, at this time the right end phase value is unchanged, and the left test phase value is assigned to the iterative left end phase value, to obtain the iterative right end phase value bn^(K+1) and the iterative left end phase value an^K. Wherein, bn^(K+1)=bn^K, an^(K+1)=xn^K. Wherein, when the phase value interval is subjected to first iteration, the sign flag can be set to 0.

[0134] At the same time, the iterative right test phase value yn^K is assigned to the iterative left test phase value xn^(K+1), to obtain xn^(K+1)=yn^K, and the preset unimodal function search method calculates the iterative right test phase value yn^(K+1) through the following formula:

[0135] yn^(K+1)=an^(K+1)+0.618*(bn^(K+1)-an^(K+1)).

[0136] If the amplitude estimation value corresponding to the iterative left test phase value xn^K is less than the amplitude estimation value corresponding to the iterative right test phase value yn^K, the phase value interval [an^K, bn^K] is subjected to phase value interval second iteration, that is, the phase value interval is reduced to the left end, at this time the left end phase value is unchanged, and the right test phase value is assigned to the iterative right end phase value, to obtain the iterative right end phase value bn^(K+1) and the iterative left end phase value an^(K+1); wherein, an^(K+1)=an^K, bn^(K+1)=yn^K; wherein, when the phase value interval is subjected to second iteration, the sign flag can be set to 1.

[0137] At the same time, the iterative left test phase value xn^K is assigned to the iterative right test phase value yn^(K+1), to obtain yn^(K+1)=xn^K, and the preset unimodal function search method calculates the iterative left test phase value xn^(K+1) through the following formula:

[0138] xn^(K+1)=an^(K+1)+0.382*(bn^(K+1)-an^(K+1)).

[0139] The test phase value iteration described above corresponds to the phase of the minimum value of the amplitude estimation value. In some embodiments, the phase of the maximum value of the amplitude estimation value can also be searched based on the test phase value iteration, which is a process symmetrical to and opposite to the process described above. The specific process can refer to the process of the first test phase value iteration, which will not be described here.

[0140] Then, the amplitude estimation value corresponding to the current iteration left test phase value xn^k and the iteration right test phase value yn^k is obtained based on the amplitude estimation value. For example, the amplitude estimation value corresponding to the iteration left test phase value xn^1 and the iteration right test phase value yn^1 described above is obtained, or the amplitude estimation value corresponding to the iteration left test phase value xn^(k+1) and the iteration right test phase value yn^(k+1) described above is obtained.

[0141] In some embodiments, if the initial right test phase value yn^0 is assigned to the iteration left test phase value xn^1, and the sign is 0, the amplitude estimation value corresponding to the initial right test phase value yn^0 is assigned to the amplitude estimation value corresponding to the iteration left test phase value xn^1, and the amplitude estimation value calculation is performed on the iteration right test phase value yn^1 to obtain the amplitude estimation value corresponding to the iteration right test phase value yn^1.

[0142] In some embodiments, if the iteration right test phase value yn^k is assigned to the iteration left test phase value xn^(k+1), and the sign is 0, the amplitude estimation value corresponding to the iteration right test phase value yn^k is assigned to the amplitude estimation value corresponding to the iteration left test phase value xn^(k+1), and the amplitude estimation value calculation is performed on the iteration right test phase value yn^(k+1) to obtain the amplitude estimation value corresponding to the iteration right test phase value yn^(k+1).

[0143] In some embodiments, if the initial left test phase value xn^0 is assigned to the iteration right test phase value yn^1, and the sign is 1, the amplitude estimation value corresponding to the initial left test phase value xn^0 is assigned to the amplitude estimation value corresponding to the iteration right test phase value yn^1, and the amplitude estimation value calculation is performed on the iteration left test phase value xn^1 to obtain the amplitude estimation value corresponding to the iteration left test phase value xn^1.

[0144] In some embodiments, if the iterative left test phase value xn^K is assigned to the iterative right test phase value yn^(K+1), and the sign=1, then the amplitude estimation value corresponding to the iterative left test phase value xn^K is assigned to the amplitude estimation value corresponding to the iterative right test phase value yn^(K+1), and the amplitude estimation value calculation is performed on the iterative left test phase value xn^(K+1) to obtain the amplitude estimation value corresponding to the iterative left test phase value xn^(K+1).

[0145] After completing the current iteration, if the number of iterations satisfies the target number of iterations or the error value between the current iterative left test phase value xn^K and the iterative right test phase value yn^K satisfies the target error value, the test phase value iteration is ended, and the current iterative left test phase value xn^K and the iterative right test phase value yn^K are output.

[0146] In the above embodiments, when the test phase value iteration is performed based on the preset unimodal function search method, if the number of iterations satisfies the target number of iterations, it means that the error value between the iterative left test phase value xn^K and the iterative right test phase value yn^K is quite small, and the corresponding amplitude estimation value is basically equal to the extreme value, so the test phase value iteration can be ended. Alternatively, the target error value is directly set, and when the error value between the iterative left test phase value xn^K and the iterative right test phase value yn^K satisfies the target error value, the test phase value iteration is directly ended. In some embodiments, the target number of iterations and the target error value can be set according to actual needs, for example, the higher the precision, the greater the target number of iterations, and the smaller the target error value.

[0147] When the test phase value iteration is ended, the phase corresponding to the amplitude estimation minimum value is obtained based on the current iterative left test phase value xn^K and the iterative right test phase value yn^K.

[0148] In some embodiments, the average phase value of the current iterative left test phase value xn^K and the iterative right test phase value yn^K is obtained as the phase corresponding to the amplitude estimation minimum value. For example, based on the test phase value iteration to directly search for the phase corresponding to the minimum value of the amplitude estimation value, the average phase value of the current iterative left test phase value xn^K and the iterative right test phase value yn^K is directly taken as the phase corresponding to the amplitude estimation minimum value.

[0149] In some embodiments, the average phase value of the current iterative left test phase value xn^K and the iterative right test phase value yn^K is obtained, and the average phase value is shifted by a preset phase to obtain the phase corresponding to the amplitude estimation minimum value. For example, based on the test phase value iteration to directly search for the phase corresponding to the maximum value of the amplitude estimation value, at this time, the average phase value needs to be inverted to obtain the phase corresponding to the amplitude estimation minimum value.

[0150] In some embodiments, if the average phase value is between [0, π), the preset phase of the shift is π; if the average phase value is between [π, 2π), the preset phase of the shift is -π, and the phase after the shift is the sum of the average phase value and the preset phase of the shift. In this embodiment, different addition and subtraction operations are performed on the average phase value based on the phase range in which the average phase value is located, so that the phase after the shift is always positive, facilitating subsequent use and calculation.

[0151] In the above embodiments, it can be determined whether the target error value is satisfied based on the error value between the left test phase value and the right test phase value. In some embodiments, since the left test phase value and the right test phase value have a fixed relationship with the right end phase value and the left end phase value, and they can be converted based on the fixed relationship, it can also be determined whether the target error value is satisfied based on the error value between the right end phase value and the left end phase value. Similarly, in the above embodiments, the phase corresponding to the amplitude estimation minimum value can be obtained based on the left test phase value and the right test phase value, or based on the right end phase value and the left end phase value.

[0152] In some embodiments, when the above test phase value iteration is performed, the signal processing channel can further include a phase counter and a memory. The phase counter is used to accumulate and count the test phase value corresponding to the cancellation signal during the test phase value iteration, and the memory is used to save each test phase value and each amplitude estimation value corresponding thereto.

[0153] In the above embodiments, although the phase output by the final estimation is referred to as the estimated phase of the harmonic or the estimated phase of the spur, it should be noted that it is the inverse phase of the phase of the real harmonic, and there is a phase difference of π between the two. Therefore, the output phase can be directly used when generating the cancellation signal corresponding to the harmonic or the spur.

[0154] In the above embodiments, the signal processing channel can process at least one harmonic or spur, or can process both harmonics and spurs. In some embodiments, the total number L of harmonics and spurs to be processed is obtained, the total number L is divided by H-1 and rounded up to obtain the number of times of calling the signal processing channel, and the phase counter and the memory are reset according to the number of times of calling the signal processing channel, so as to clear the historically saved amplitude estimation values and their corresponding phase values. Wherein, H-1 harmonics or spurs can be processed each time the signal processing channel is called.

[0155] In some embodiments, a reset operation is required when calling the signal processing channel to avoid mutual interference, for example, if it is detected that the clear has been cleared before calling the signal processing channel, no reset is required; if it is detected that the clear has not been cleared before calling the signal processing channel, a reset clear is required, so when resetting the phase counter and the memory according to the number of times of calling the signal processing channel, the number of times of calling the signal processing channel can be the same as the number of times of resetting, for example, a reset clear is performed before calling the signal processing channel each time, and when it is detected that the clear has been cleared, the number of times of calling the signal processing channel can be less than the number of times of resetting.

[0156] The following is illustrated by specific embodiments.

[0157] Suppose that the input frequency of the original input signal is f_in=30MHz, then the frequency control word is calculated based on the input frequency f_in, the phase sequence output by the DDS phase accumulator 10 is calculated, the sine lookup table is addressed according to the output phase sequence, the full-scale signal is obtained, and the full-scale signal is multiplied by the attenuation coefficient a=0.95 and then input to the DAC. Assuming that the harmonics to be estimated are the second harmonic and the third harmonic, their frequencies are f_2=2*f_in=60MHz and f_3=3*f_in=90MHz, respectively.

[0158] Suppose that the initial phase value interval is [an^0, bn^0]=[0, 1], and the corresponding phase value is [0, 2π], that is, the initial left end phase value an^0 is 0 and the initial right end phase value bn^0 is 2π. The initial left test phase value xn^0=an^0+0.382*(bn^0-an^0)=0.382, that is, the phase value is 0.382*2π, and the initial right test phase value yn^0=an^0+0.618*(bn^0-an^0)=0.618, that is, the phase value is 0.618*2π. The maximum number of iterations is set to K=20, and the target error value between the test phase values is set to ε=0.01, that is, 0.01*2π.

[0159] In some embodiments, the estimated phase empirical value can also be obtained, and the phase value interval [an^0, bn^0]=[0.2, 0.4] is determined based on the estimated phase empirical value. The initial left test phase value xn^0=an^0+0.382*(bn^0-an^0)=0.2764, that is, the phase value is 0.2764*2π, and the initial right test phase value yn^0=an^0+0.618*(bn^0-an^0)=0.3236, that is, the phase value is 0.3236*2π. The maximum number of iterations is set to K=10, and the target error value between the test phase values is set to ε=0.01.

[0160] According to the frequency f_n of the second and third harmonics, the amplitude estimation value of the second and third harmonics of the original input signal, and the phase value corresponding to xn^0=0.382 and yn^0=0.618, the cancellation signal corresponding to the second and third harmonics is generated, and the cancellation signal is superimposed with the original input signal and input to the DAC. The output signal of the DAC is analyzed by using the spectrum analyzer, and the amplitude estimation value corresponding to xn^0 and the amplitude estimation value corresponding to yn^0 are recorded.

[0161] The test phase value is iterated, and the minimum value of the amplitude estimation value is searched, and the iteration result is please refer to Figure 4 and Figure 5 That is, whether the amplitude estimation value corresponding to xn^0 of the second and third harmonics is greater than the amplitude estimation value corresponding to yn^0 is judged in turn.

[0162] If yes, the phase value interval is reduced to the right end, at this time the right end phase value is unchanged, and the left test phase value is assigned to the iteration left end phase value, that is, bn^1=bn^0, an^1=xn^0. At the same time, the initial right test phase value yn^0 is assigned to the iteration left test phase value xn^1, that is, xn^1=yn^0, and the right test phase value is recalculated:

[0163] yn^1=an^1+0.618*(bn^1-an^1);

[0164] And determine the flag sign_n=0, at this time the iteration number K is 1.

[0165] If no, the phase value interval is reduced to the left end, at this time the left end phase value is unchanged, and the right test phase value is assigned to the iteration right end phase value, that is, an^1=an^0, bn^1=yn^0. At the same time, the initial left test phase value xn^0 is assigned to the iteration right test phase value yn^1, that is, yn^1=xn^0, and the left test phase value is recalculated:

[0166] xn^1=an^1+0.382*(bn^1-an^1);

[0167] And determine the flag sign_n=1, at this time the iteration number K is 1.

[0168] Judge whether the error value |xn^1-yn^1| between the test phase values is less than the target error value ε=0.01, or whether the current iteration number K is greater than the maximum iteration number 20.

[0169] If neither is satisfied, and the flag sign_n = 0, the amplitude estimation value corresponding to the initial right test phase value yn^0 is assigned to the amplitude estimation value corresponding to the iterative left test phase value xn^1, and the amplitude estimation value calculation is performed on the iterative right test phase value yn^1 to obtain the amplitude estimation value corresponding to the iterative right test phase value yn^1, and the iteration number K is increased by 1 to continue the above test phase value iteration.

[0170] If neither is satisfied, and the flag sign_n = 1, the amplitude estimation value corresponding to the initial left test phase value xn^0 is assigned to the amplitude estimation value corresponding to the iterative right test phase value yn^1, and the amplitude estimation value calculation is performed on the iterative left test phase value xn^1 to obtain the amplitude estimation value corresponding to the iterative left test phase value xn^1, and the iteration number K is increased by 1 to continue the above test phase value iteration.

[0171] If any one of the conditions is satisfied, the phase φn corresponding to the amplitude estimation minimum value is output based on the current iteration number K:

[0172] φn=(xn^K+yn^K) / 2.

[0173] The above is a related description of the signal processing channel.

[0174] Some embodiments provide a phase estimation method, which can be applied to the above signal processing channel. Please refer to Figure 6 The harmonic phase acquisition method includes the following steps:

[0175] Step 100: Obtain the original input signal and the initial phase value interval, determine the initial left test phase value and the initial right test phase value, and perform amplitude estimation value calculation respectively. Wherein an^0 is the initial left end phase value, bn^0 is the initial right end phase value. Based on the preset unimodal function search method and the initial phase value interval [an^0, bn^0], the initial left test phase value xn^0 and the initial right test phase value yn^0 are determined, and the amplitude estimation value calculation is performed on the initial left test phase value xn^0 and the initial right test phase value yn^0 respectively: based on the harmonic frequency and the harmonic amplitude value of the harmonic of the original input signal or based on the spur frequency and the spur amplitude value of the spur of the original input signal, and the corresponding test phase value generates a cancellation signal; superimpose the cancellation signal and the original input signal to obtain a digital test signal; input the digital test signal into the DAC for digital-to-analog conversion to obtain an analog test signal, and perform spectrum analysis on the analog test signal to obtain the amplitude estimation value of the corresponding test phase value corresponding to the harmonic frequency or the spur frequency.

[0176] Step 110: Test phase value iteration based on preset monomodal function search method. Based on the preset monomodal function search method and the initial phase value interval [an0, bn0], and the initial left test phase value xn0and the initial right test phase value yn0and the corresponding amplitude estimation value, test phase value iteration is performed to obtain the iterative left test phase value xnKand the iterative right test phase value ynK; wherein K is the iteration number and its initial value is 1, xnKand ynKare the iterative left test phase value and the iterative right test phase value corresponding to the Kth iteration respectively.

[0177] Step 120: Determine whether the end condition of test phase value iteration is met.

[0178] Step 130: If yes, end the test phase value iteration and output the phase corresponding to the minimum amplitude estimation value. When the iteration number meets the target iteration number or the error value between the current iterative left test phase value xnKand the iterative right test phase value ynKmeets the target error value, the test phase value iteration is ended, and the current iterative left test phase value xnKand the iterative right test phase value ynKare output. Based on the current iterative left test phase value and the iterative right test phase value, the phase corresponding to the minimum amplitude estimation value is obtained. When the test phase value iteration is ended, the phase corresponding to the minimum amplitude estimation value is obtained based on the current iterative left test phase value xnKand the iterative right test phase value ynK.

[0179] Step 140: If no, continue the test phase value iteration. When the iteration number does not meet the target iteration number and the error value does not meet the target error value, the amplitude estimation value corresponding to the current iterative left test phase value xnKand the iterative right test phase value ynKis calculated respectively based on the amplitude estimation value, the iteration number K is increased by 1, and the test phase value iteration is continued.

[0180] Some embodiments provide a computer readable storage medium, which stores a program capable of being executed by a processor to implement the above-mentioned phase estimation method.

[0181] Those skilled in the art can understand that all or part of the functions of various methods in the above embodiments can be realized by hardware or by a computer program. When all or part of the functions in the above embodiments are realized by a computer program, the program can be stored in a computer readable storage medium, which can include a read-only memory, a random access memory, a magnetic disk, an optical disk, a hard disk, etc. The above functions are realized by executing the program by a computer. For example, the program is stored in a memory of a device, and the above functions are realized by executing the program in the memory by a processor 30. In addition, when all or part of the functions in the above embodiments are realized by a computer program, the program can also be stored in a storage medium such as a server, another computer, a disk, an optical disk, a flash disk, or a mobile hard disk, and is saved in a memory of a local device by downloading or copying, or the system of the local device is updated, and the above functions are realized by executing the program in the memory by a processor 30.

[0182] The above application is described by using specific examples, which is only used to help understand the application and does not limit the application. According to the idea of the application, those skilled in the art can make several simple deductions, modifications, or substitutions.

Claims

1. A phase estimation method, characterized in that, This method is used to estimate the phase of harmonics or spurious signals generated after the original input signal is input to the DAC. The phase estimation method includes: The original input signal is obtained by a signal processing circuit containing a first DDS phase accumulator, which is based on a frequency control word input calculated from the input frequency, and then undergoes phase-amplitude conversion and attenuation processing. The original input signal is input to the DAC for digital-to-analog conversion to obtain the analog input signal corresponding to the DAC output. The analog input signal includes harmonics and / or spurious signals generated after the original input signal is input to the DAC, which correspond to the main signal. Spectral analysis is performed on the analog input signal to obtain an estimated value of the amplitude of the harmonics generated after the original input signal is input to the DAC, and / or to obtain the spurious frequency and spurious amplitude value of the spurious signals generated after the original input signal is input to the DAC. The original input signal and the initial phase value interval [an^0, bn^0] are obtained; where an^0 is the initial left-end phase value and bn^0 is the initial right-end phase value; based on the preset single-peak function search method and the initial phase value interval [an^0, bn^0], the initial left test phase value xn^0 and the initial right test phase value yn^0 are determined, and the amplitude estimation values ​​of the initial left test phase value xn^0 and the initial right test phase value yn^0 are calculated respectively to obtain the amplitude estimation values ​​of the corresponding test phase values; The amplitude estimation calculation includes: generating a cancellation signal based on the harmonic frequencies and amplitudes of the harmonics generated after the original input signal is input to the DAC, and the corresponding test phase value; wherein, the frequency control word input based on the harmonic frequency includes a signal processing circuit containing a second DDS phase accumulator, which undergoes phase-amplitude conversion to obtain the cancellation signal, such that the frequency of the cancellation signal corresponding to the harmonic is the frequency of the harmonics generated after the original input signal is input to the DAC; and / or, generating a cancellation signal based on the spurious frequencies and amplitudes of the spurious signals generated after the original input signal is input to the DAC, and the corresponding test phase value; wherein, the frequency control word input based on the spurious frequency includes a signal processing circuit containing a third DDS phase accumulator, which undergoes phase-amplitude conversion to obtain the cancellation signal, such that the frequency of the cancellation signal corresponding to the spurious is the frequency of the original input signal. The spurious frequencies generated after the input signal is input to the DAC are obtained; the canceled signal and the original input signal are superimposed to obtain a digital signal under test; the digital signal under test is input to the DAC for digital-to-analog conversion to obtain an analog signal under test; the analog signal under test is subjected to spectrum analysis to obtain the amplitude estimate of the corresponding test phase value; based on the preset single-peak function search method and the initial phase value interval [an^0, bn^0], as well as the initial left test phase value xn^0 and the initial right test phase value yn^0 and their corresponding amplitude estimates, the test phase value is iterated to obtain the iterated left test phase value xn^K and the iterated right test phase value yn^K; where K is the iteration number and its initial value is 1, and xn^K and yn^K are the iterated left test phase value and the iterated right test phase value corresponding to the Kth iteration, respectively; If the number of iterations of the test phase value iteration does not meet the target number of iterations, and the error value between the current left test phase value xn^K and the right test phase value yn^K does not meet the target error value, then the amplitude estimates corresponding to the current left test phase value xn^K and the right test phase value yn^K are calculated based on the amplitude estimates, the iteration number K is incremented by 1, and the test phase value iteration continues. If the number of iterations meets the target number of iterations or the error value meets the target error value, then the test phase value iteration ends, and the phase corresponding to the minimum amplitude estimate is obtained based on the current left test phase value xn^K and right test phase value yn^K.

2. The phase estimation method as described in claim 1, characterized in that, The determination of the initial left test phase value xn^0 and the initial right test phase value yn^0 based on the preset single-peak function search method and the initial phase value interval [an^0, bn^0] includes: The preset single-peak function search method calculates the initial left test phase value xn^0 using the following formula: xn^0=an^0+0.382*(bn^0-an^0); The preset single-peak function search method calculates the initial right test phase value yn^0 using the following formula: yn^0=an^0+0.618*(bn^0-an^0).

3. The phase estimation method as described in claim 1, characterized in that, The test phase value iteration includes: If the test phase value iteration is performed for the first time, it is determined whether the amplitude estimate corresponding to the initial left test phase value xn^0 is greater than the amplitude estimate corresponding to the initial right test phase value yn^0. If it is greater than, then the initial phase value interval [an^0, bn^0] is subjected to the first iteration of the phase value interval to obtain the right-hand phase value bn^1 and the left-hand phase value an^1; where bn^1 = bn^0, an^1 = xn^0; the initial right test phase value yn^0 is assigned to the left test phase value xn^1 to obtain xn^1 = yn^0, and the preset single-peak function search method calculates the right test phase value yn^1 using the following formula: yn^1=an^1+0.618*(bn^1-an^1); If the value is less than the given value, a second iteration of the phase value interval [an^0, bn^0] is performed to obtain the phase value bn^1 on the right side of the iteration and the phase value an^1 on the left side of the iteration; where an^1 = an^0 and bn^1 = yn^0; the initial left test phase value xn^0 is assigned to the iterative right test phase value yn^1 to obtain yn^1 = xn^0, and the preset single-peak function search method calculates the iterative left test phase value xn^1 using the following formula: xn^1=an^1+0.382*(bn^1-an^1); If the test phase value is iterated for the (K+1)th time, it is determined whether the amplitude estimate corresponding to the left test phase value xn^K is greater than the amplitude estimate corresponding to the right test phase value yn^K. If the value is greater than the given value, the first iteration of the initial phase value interval [an^K, bn^K] is performed to obtain the phase value bn^(K+1) on the right end of the iteration and the phase value an^(K+1) on the left end of the iteration; where bn^(K+1) = bn^K and an^(K+1) = xn^K; the iteration right test phase value yn^K is assigned to the iteration left test phase value xn^(K+1) to obtain xn^(K+1) = yn^K, and the preset single-peak function search method calculates the iteration right test phase value yn^(K+1) using the following formula: yn^(K+1)=an^(K+1)+0.618*(bn^(K+1)-an^(K+1)); If it is less than, then a second iteration of the phase value interval [an^K, bn^K] is performed to obtain the phase value bn^(K+1) on the right end of the iteration and the phase value an^(K+1) on the left end of the iteration; where an^(K+1) = an^K, bn^(K+1) = yn^K; the iteration left test phase value xn^K is assigned to the iteration right test phase value yn^(K+1) to obtain yn^(K+1) = xn^K, and the preset single-peak function search method calculates the iteration left test phase value xn^(K+1) using the following formula: xn^(K+1)=an^(K+1)+0.382*(bn^(K+1)-an^(K+1)).

4. The phase estimation method as described in claim 1, characterized in that, The test phase value iteration includes: If the test phase value iteration is performed for the first time, it is determined whether the amplitude estimate corresponding to the initial left test phase value xn^0 is greater than the amplitude estimate corresponding to the initial right test phase value yn^0. If it is greater than, then the initial phase value interval [an^0, bn^0] is subjected to a second iteration of the phase value interval to obtain the phase value bn^1 on the right end of the iteration and the phase value an^1 on the left end of the iteration; where an^1 = an^0, bn^1 = yn^0; The initial left test phase value xn^0 is assigned to the iterative right test phase value yn^1, resulting in yn^1 = xn^0. The preset single-peak function search method calculates the iterative left test phase value xn^1 using the following formula: xn^1=an^1+0.382*(bn^1-an^1); If it is less than, then the first iteration of the initial phase value interval [an^0, bn^0] is performed to obtain the phase value bn^1 on the right end of the iteration and the phase value an^1 on the left end of the iteration; where bn^1 = bn^0, an^1 = xn^0; The initial right test phase value yn^0 is assigned to the iterative left test phase value xn^1, resulting in xn^1 = yn^0. The preset single-peak function search method calculates the iterative right test phase value yn^1 using the following formula: yn^1=an^1+0.618*(bn^1-an^1); If the test phase value is iterated for the (K+1)th time, it is determined whether the amplitude estimate corresponding to the left test phase value xn^K is greater than the amplitude estimate corresponding to the right test phase value yn^K. If the value is greater than the given value, a second iteration of the phase value interval [an^K, bn^K] is performed to obtain the phase value bn^(K+1) on the right side of the iteration and the phase value an^(K+1) on the left side of the iteration; where an^(K+1) = an^K and bn^(K+1) = yn^K; the left test phase value xn^K is assigned to the right test phase value yn^(K+1) of the iteration to obtain yn^(K+1) = xn^K, and the preset single-peak function search method calculates the left test phase value xn^(K+1) of the iteration using the following formula: xn^(K+1)=an^(K+1)+0.382*(bn^(K+1)-an^(K+1)); If it is less than, then the initial phase value interval [an^K, bn^K] is subjected to the first iteration of the phase value interval to obtain the phase value bn^(K+1) on the right end of the iteration and the phase value an^(K+1) on the left end of the iteration; where bn^(K+1)=bn^K, an^(K+1)=xn^K; the iteration right test phase value yn^K is assigned to the iteration left test phase value xn^(K+1) to obtain xn^(K+1)=yn^K, and the preset single-peak function search method calculates the iteration right test phase value yn^(K+1) by the following formula: yn^(K+1)=an^(K+1)+0.618*(bn^(K+1)-an^(K+1)).

5. The phase estimation method as described in claim 3 or 4, characterized in that, The step of calculating the amplitude estimates corresponding to the current iterative left test phase value xn^K and iterative right test phase value yn^K based on the amplitude estimates includes: If the initial right test phase value yn^0 is assigned to the iterative left test phase value xn^1, then the amplitude estimate corresponding to the initial right test phase value yn^0 is assigned to the amplitude estimate corresponding to the iterative left test phase value xn^1, and the amplitude estimate is calculated for the iterative right test phase value yn^1 to obtain the amplitude estimate corresponding to the iterative right test phase value yn^1. If the iterative right test phase value yn^K is assigned to the iterative left test phase value xn^(K+1), then the amplitude estimate corresponding to the iterative right test phase value yn^K is assigned to the amplitude estimate corresponding to the iterative left test phase value xn^(K+1), and the amplitude estimate is calculated for the iterative right test phase value yn^(K+1) to obtain the amplitude estimate corresponding to the iterative right test phase value yn^(K+1). If the initial left test phase value xn^0 is assigned to the iterative right test phase value yn^1, then the amplitude estimate corresponding to the initial left test phase value xn^0 is assigned to the amplitude estimate corresponding to the iterative right test phase value yn^1, and the amplitude estimate is calculated for the iterative left test phase value xn^1 to obtain the amplitude estimate corresponding to the iterative left test phase value xn^1. If the iterative left test phase value xn^K is assigned to the iterative right test phase value yn^(K+1), then the amplitude estimate corresponding to the iterative left test phase value xn^K is assigned to the amplitude estimate corresponding to the iterative right test phase value yn^(K+1), and the amplitude estimate is calculated for the iterative left test phase value xn^(K+1) to obtain the amplitude estimate corresponding to the iterative left test phase value xn^(K+1).

6. The phase estimation method as described in claim 3, characterized in that, The step of obtaining the phase corresponding to the minimum amplitude estimate based on the current iterative left test phase value xn^K and iterative right test phase value yn^K includes: Obtain the average phase value of the current iterative left test phase value xn^K and iterative right test phase value yn^K, and use it as the phase corresponding to the minimum amplitude estimate.

7. The phase estimation method as described in claim 4, characterized in that, The step of obtaining the phase corresponding to the minimum amplitude estimate based on the current iterative left test phase value xn^K and iterative right test phase value yn^K includes: Obtain the average phase value of the current iterative left test phase value xn^K and iterative right test phase value yn^K, and shift the average phase value by a preset phase to obtain the phase corresponding to the minimum amplitude estimate.

8. The phase estimation method as described in claim 7, characterized in that, If the average phase value is between [0, π), then the preset phase of the translation is π; If the average phase value is between [π, 2π), then the preset phase of the translation is -π. The phase after translation is the sum of the average phase value and the preset phase after translation.

9. The phase estimation method as described in claim 1, characterized in that, The initial phase value interval [an^0, bn^0] is generated in the following way: The phase value 0 is configured as the initial left-end phase value an^0, and the phase value 2π is configured as the initial right-end phase value bn^0, so as to obtain the initial phase value interval [an^0, bn^0]. or, Obtain the estimated phase empirical value, and generate the initial phase value interval [an^0, bn^0] based on the estimated phase empirical value.

10. The phase estimation method as described in claim 9, characterized in that, The process of obtaining the estimated phase empirical value includes: After a known input signal is input into the DAC, the phase estimate value corresponding to the harmonic frequency or spurious frequency of the known input signal is obtained; Based on the frequency relationship between the known input signal and the original input signal, the estimated phase empirical value corresponding to the harmonics of the original input signal is obtained from the phase estimation value; or... Based on the frequency relationship between the known input signal and the original input signal, and the frequency relationship between the spurious frequency of the known input signal and the spurious frequency of the original input signal, the estimated phase empirical value corresponding to the spurious signal of the original input signal is obtained from the phase estimation value.

11. The phase estimation method as described in claim 1, characterized in that, The spectral analysis of the simulated test signal includes: The simulated test signal is input into a spectrum analyzer for spectrum analysis. or, The simulated test signal is input to an analog-to-digital converter for analog-to-digital conversion and then subjected to Fourier transform for spectrum analysis.

12. A signal processing channel, characterized in that, For implementing the phase estimation method as described in any one of claims 1 to 11, the signal processing channel includes at least two DDS phase accumulators, and the signal processing lines where each DDS phase accumulator is located are connected in parallel, the number of which is defined as an integer H greater than 1; One of the signal processing lines, which includes a DDS phase accumulator, generates the original input signal after phase-amplitude conversion and attenuation processing. The remaining signal processing lines, which also include DDS phase accumulators, generate harmonic cancellation signals or spurious cancellation signals based on the corresponding test phase values ​​after phase-amplitude conversion.

13. The signal processing channel as described in claim 12, characterized in that, The signal processing channel is used to process multiple harmonics, or multiple spurious signals, or at least one harmonic and at least one spurious signal. If the value of H is ≥3, the remaining other signal processing lines containing DDS phase accumulators are used to generate cancellation signals corresponding to multiple harmonics, or cancellation signals corresponding to multiple spurious signals, or cancellation signals corresponding to at least one harmonic and at least one spurious signal respectively. Among them, the maximum number of times the remaining other signal processing lines containing DDS phase accumulators are called is equal to the sum of the number of harmonics and the number of spurious signals.

14. The signal processing channel as described in claim 13, characterized in that, The signal processing channel also includes a phase counter and a memory. The phase counter is used to accumulate the test phase value corresponding to the cancellation signal during the iteration of the test phase value. The memory is used to store each corresponding test phase value and its corresponding amplitude estimate.

15. The signal processing channel as described in claim 14, characterized in that, Obtain the total number L of harmonics and spurious emissions to be processed; Divide the total number L by H-1 and round up to get the number of times the signal processing channel is called; Based on the number of times the signal processing channel is invoked, the phase counter and memory are reset to clear the historically saved amplitude estimates and their corresponding test phase values.

16. A computer-readable storage medium, characterized in that, The medium stores a program that can be executed by a processor to implement the method as described in any one of claims 1-11.

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