Etching bias acquisition method for multiple exposure technique

Abstract

The application provides an etching deviation acquisition method of a multiple exposure technology, and the method comprises the following steps: providing a first mask and a second mask, wherein the first mask comprises a first pattern and a second pattern, the second mask comprises a third pattern, and the second pattern and the third pattern are superimposed to form a fourth pattern; acquiring a simulated post-development line end spacing of the first pattern and the fourth pattern; performing a first photolithography process to acquire a post-development line end spacing of the first pattern; performing a second photolithography process, wherein the third pattern and the second pattern are superimposed to form a fourth pattern on the wafer, and an etched line end spacing of the fourth pattern is acquired; and acquiring an etching deviation based on the simulated post-development line end spacing of the first pattern and the fourth pattern, the post-development line end spacing of the first pattern and the etched line end spacing of the fourth pattern. The technical scheme of the application can make the etching deviation of the line end spacing more accurate in the length direction.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a method for obtaining etching deviations in a multi-exposure technique. Background Technology

[0002] As semiconductor technology nodes advance to below 10 nanometers, etching bias needs to be extremely precise to ensure process windows and device functionality. Generally, in a multiple-etch (LELE) process, the two masks can share the same etching bias table, which is derived from the measurement biases between thousands of data points from After Development Inspection (ADI) and After Etch Inspection (AEI) based on key dimensions, spacing, and length of the mask patterns.

[0003] For line-pitch layers, the accuracy of line-end etching deviations is typically worse in the length direction than in the width direction. One unavoidable reason is the metrological instability of ADI and AEI critical dimension measurements for longer patterns. However, errors of a few nanometers in the etching deviation table can lead to unhealthy process and wafer patterning defects.

[0004] Therefore, it is necessary to provide a more effective and reliable technical solution to make the etching deviation of the line end spacing more accurate in the length direction. Summary of the Invention

[0005] This application provides a method for obtaining etching deviation in multiple exposure technology, which can make the etching deviation of line end spacing more accurate in the length direction.

[0006] This application provides a method for obtaining etching deviation in a multiple exposure technique, comprising: providing a first photomask and a second photomask, the first photomask including a first pattern and a second pattern, the second photomask including a third pattern, the second pattern and the third pattern being superimposed to form a fourth pattern; obtaining the simulated line-end spacing of the first pattern and the fourth pattern after development; performing a first photolithography process to copy the first pattern and the second pattern onto a wafer, obtaining the developed line-end spacing of the first pattern; performing a second photolithography process to copy the third pattern onto the wafer, the third pattern and the second pattern being superimposed on the wafer to form a fourth pattern, obtaining the etched line-end spacing of the fourth pattern; and obtaining an etching deviation based on the simulated developed line-end spacing of the first pattern and the fourth pattern, the developed line-end spacing of the first pattern, and the etched line-end spacing of the fourth pattern.

[0007] In some embodiments of this application, the method for obtaining the simulated line-end spacing of the first pattern and the fourth pattern after development includes: importing the first photomask and the second photomask into an optical proximity correction model; performing multiple exposure technology to simulate photolithography on the first photomask and the second photomask through the optical proximity correction model; and obtaining the simulated line-end spacing of the first pattern and the fourth pattern after development.

[0008] In some embodiments of this application, a method for obtaining etching deviation based on the simulated developed line-end spacing of the first pattern and the fourth pattern, the developed line-end spacing of the first pattern, and the etched line-end spacing of the fourth pattern includes: obtaining a model error based on the developed line-end spacing of the first pattern and the simulated developed line-end spacing of the first pattern; obtaining the actual developed line-end spacing of the fourth pattern based on the model error and the simulated developed line-end spacing of the fourth pattern; and obtaining the etching deviation based on the actual developed line-end spacing of the fourth pattern and the etched line-end spacing of the fourth pattern.

[0009] In some embodiments of this application, a method for obtaining etching deviation based on the simulated developed line end spacing of the first pattern and the fourth pattern, the developed line end spacing of the first pattern, and the etched line end spacing of the fourth pattern includes: performing multiple tests to obtain multiple sets of simulated developed line end spacing of the first pattern and the fourth pattern, the developed line end spacing of the first pattern, and the etched line end spacing of the fourth pattern.

[0010] In some embodiments of this application, the method for obtaining model error based on the line end spacing of the first graphic after development and the simulated line end spacing of the first graphic includes:

[0011]

[0012] Where Model_error is the model error, and A_ADI m(i) A_ADI represents the line spacing after development of the first pattern. s(i) Let be the line spacing after the simulated development of the first graphic, i be the test number, and n be the number of tests.

[0013] In some embodiments of this application, the method for obtaining the actual developed line-end spacing of the fourth graphic based on the model error and the simulated developed line-end spacing of the fourth graphic includes:

[0014] B_ADI m(i) =B_ADI s(i) +Model_error;

[0015] Where Model_error is the model error, and B_ADI m(i) B_ADI represents the line-end spacing of the developed fourth pattern. s(i) The line spacing after the simulated development of the fourth graphic is denoted as i, where i is the test number.

[0016] In some embodiments of this application, the method for obtaining etching deviation based on the actual line-end spacing after development of the fourth pattern and the line-end spacing after etching of the fourth pattern includes:

[0017]

[0018] Where Etch_Bias is the etching bias, and B_AEI is the etch bias. m(i) B_ADI represents the line spacing after etching of the fourth pattern. m(i) The distance between the line ends of the fourth graphic after development is denoted as i, where i is the test number and n is the number of tests.

[0019] In some embodiments of this application, the first graphic includes a plurality of rectangles arranged in an array, each rectangle having a long side along the horizontal direction and a short side along the vertical direction, the length of the long side being greater than the length of the short side, and the line end spacing being the spacing between the rectangles along the long side direction.

[0020] In some embodiments of this application, the second graphic includes a plurality of rectangles arranged in an array, each rectangle having a long side along the horizontal direction and a short side along the vertical direction, the length of the long side being greater than the length of the short side, and the line-end spacing of the second graphic being greater than the line-end spacing of the first graphic.

[0021] In some embodiments of this application, the third graphic includes a plurality of rectangles arranged in an array. Each rectangle includes a long side in the horizontal direction and a short side in the vertical direction. The length of the long side is greater than the length of the short side. After the second graphic and the third graphic are superimposed, the third graphic is located at the long side interval of the adjacent rectangles of the second graphic.

[0022] This application provides a method for obtaining etching deviation in multiple exposure technology, which can make the etching deviation of line end spacing more accurate in the length direction. Attached Figure Description

[0023] The following accompanying drawings describe in detail the exemplary embodiments disclosed in this application. The same reference numerals denote similar structures in several views of the drawings. Those skilled in the art will understand that these embodiments are non-limiting and exemplary, and the drawings are for illustrative purposes only and are not intended to limit the scope of this application. Other embodiments may similarly fulfill the inventive intent of this application. It should be understood that the drawings are not drawn to scale.

[0024] in:

[0025] Figure 1 This is a flowchart of the etching deviation acquisition method for the multiple exposure technology described in the embodiments of this application;

[0026] Figure 2 This is a schematic diagram of the structure of the first photomask in the etching deviation acquisition method of the multiple exposure technology described in the embodiments of this application;

[0027] Figure 3 This is a schematic diagram of the structure of the second photomask in the etching deviation acquisition method of the multiple exposure technology described in the embodiments of this application;

[0028] Figure 4 This is a schematic diagram of the structure after the first and second photomasks are overlapped in the etching deviation acquisition method of the multiple exposure technology described in this application embodiment. Detailed Implementation

[0029] The following description provides specific application scenarios and requirements for this application, intended to enable those skilled in the art to make and use the content of this application. Various partial modifications to the disclosed embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments and applications without departing from the spirit and scope of this application. Therefore, this application is not limited to the embodiments shown, but rather to the widest scope consistent with the claims.

[0030] The technical solution of the present invention will be described in detail below with reference to the embodiments and accompanying drawings.

[0031] In some methods for obtaining etching deviations in multiple exposure techniques, the etching deviation is calculated by measuring the difference between the length of the developed pattern and the length of the etched pattern after multiple exposure etching. However, the field of view (FOV) of a critical-size scanning electron microscope (CDSEM) is a limitation, and longer patterns outside the FOV cannot be applied using this method.

[0032] In other methods for obtaining etching deviations using multiple exposure techniques, the etching deviation is calculated by measuring the line-to-line spacing of the developed pattern and the etched pattern after multiple exposure etching. Although not limited by the field of view (FOV), the line-to-line spacing is typically as high as hundreds of nanometers due to the capabilities of photolithography, which is still too large for the required etching deviation accuracy.

[0033] Based on this, the technical solution of this application provides a method for obtaining etching deviation in multiple exposure technology, which can effectively improve the line-end etching deviation accuracy of multiple exposure technology.

[0034] Figure 1 This is a flowchart of the etching deviation acquisition method for the multiple exposure technology described in the embodiments of this application.

[0035] This application provides a method for obtaining etching deviation in a multi-exposure technique, referencing... Figure 1 As shown, it includes:

[0036] Step S1: Provide a first photomask and a second photomask, wherein the first photomask includes a first pattern and a second pattern, the second photomask includes a third pattern, and the second pattern and the third pattern are superimposed to form a fourth pattern;

[0037] Step S2: Obtain the line end spacing of the first and fourth graphics after simulated development;

[0038] Step S3: Perform the first photolithography process to copy the first pattern and the second pattern onto the wafer and obtain the line-end spacing of the first pattern after development;

[0039] Step S4: Perform a second photolithography process to copy the third pattern onto the wafer. The third pattern and the second pattern are superimposed on the wafer to form a fourth pattern. Obtain the line-end spacing of the etched fourth pattern.

[0040] Step S5: Obtain the etching deviation based on the simulated line end spacing of the first and fourth patterns after development, the line end spacing of the first pattern after development, and the line end spacing of the fourth pattern after etching.

[0041] Figure 2 This is a schematic diagram of the structure of the first photomask in the etching deviation acquisition method of the multiple exposure technology described in this application embodiment. Figure 3 This is a schematic diagram of the structure of the second photomask in the etching deviation acquisition method of the multiple exposure technology described in this application embodiment. Figure 4 This is a schematic diagram of the structure after the first and second photomasks are overlapped in the etching deviation acquisition method of the multiple exposure technology described in this application embodiment. The etching deviation acquisition method of the multiple exposure technology described in this application embodiment will be described in detail below with reference to the accompanying drawings.

[0042] refer to Figure 1 , Figure 2 , Figure 3 and Figure 4 As shown, in step S1, a first photomask 100 and a second photomask 200 are provided. The first photomask 100 includes a first pattern 101 and a second pattern 102. The second photomask 200 includes a third pattern 103. The second pattern 102 and the third pattern 103 are superimposed to form a fourth pattern 104.

[0043] refer to Figure 2 As shown, in some embodiments of this application, the first graphic 101 includes a plurality of rectangles arranged in an array. Each rectangle includes a long side along the horizontal direction and a short side along the vertical direction. The length of the long side is greater than the length of the short side. The line end gap is the spacing between the rectangles along the long side. It should be noted that the horizontal and vertical directions mentioned in this application are all referenced to the directions shown in the accompanying drawings.

[0044] In some embodiments of this application, the line-to-line spacing in the first pattern 101 is 50 to 500 nanometers, for example, 100 to 200 nanometers.

[0045] Continue to refer to Figure 2 As shown, in some embodiments of this application, the second graphic 102 includes a plurality of rectangles arranged in an array. Each rectangle has a long side in the horizontal direction and a short side in the vertical direction. The length of the long side is greater than the length of the short side. The line spacing of the second graphic 102 is greater than the line spacing of the first graphic 102. Except for the line spacing, all other parameters of the first graphic 101 and the second graphic 102 are the same, such as the length and width of the long side of the rectangles, and the spacing of the rectangles along the short side direction.

[0046] refer to Figure 3 As shown, in some embodiments of this application, the third graphic 103 includes a plurality of rectangles arranged in an array. Each rectangle includes a long side in the horizontal direction and a short side in the vertical direction, wherein the length of the long side is greater than the length of the short side. The rectangles in the third graphic 103 are the same as the rectangles in the first graphic 101 and the second graphic 102. Furthermore, the third graphic 103 and the second graphic 102 are configured such that when the second graphic 102 and the third graphic 103 are superimposed, the third graphic 103 is located at a distance along the long side of adjacent rectangles of the second graphic 102.

[0047] refer to Figure 4As shown, the first photomask 100 and the second photomask 200 are overlapped, such that the third pattern 103 is located at the long side interval of the adjacent rectangles of the second pattern 102. The second pattern 102 and the third pattern 103 overlap to form the fourth pattern 104.

[0048] In some embodiments of this application, the line spacing in the fourth pattern 104 is 10 to 200 nanometers, for example, 30 to 60 nanometers. Apart from the line spacing, other parameters in the fourth pattern 104 are the same as those in the first pattern 101, such as the length and width of the rectangle.

[0049] It should be noted that, Figure 2 , Figure 3 and Figure 4 Only the patterned structures on the first photomask 100 and the second photomask 200 are shown. However, in subsequent simulated and actual photolithography processes, the patterns transferred to the photoresist after development and the patterns transferred to the wafer after etching are identical to the patterns on the corresponding photomasks. Therefore, although this application does not provide the lithographically rendered patterns of the first photomask 100 and the second photomask 200 for the sake of brevity, those skilled in the art can infer the patterns from these patterns. Figure 2 , Figure 3 and Figure 4 The displayed photomask pattern can be used to obtain the corresponding pattern after photolithography and etching. In other words, when dealing with the patterns after development and etching of the first photomask 100 and the second photomask 200, this pattern can be directly referenced. Figure 2 , Figure 3 and Figure 4 .

[0050] Continue to refer to Figure 1 As shown, in step S2, the line end spacing of the first pattern 101 and the fourth pattern 104 after simulation development is obtained.

[0051] In some embodiments of this application, the method for obtaining the simulated line-end spacing of the first pattern 101 and the fourth pattern 104 after development includes: importing the first photomask 100 and the second photomask 200 into an Optical Proximity Correction (OPC) model; performing multiple exposure lithography on the first photomask 100 and the second photomask 200 using the OPC model; and obtaining the simulated line-end spacing of the first pattern 101 and the fourth pattern 104 after development.

[0052] The simulated lithography includes: performing a first simulated lithography to simulate the pattern after lithography of the first and second patterns; and directly performing a second simulated lithography on the pattern after lithography of the first simulated pattern to simulate the lithographic pattern after the third and second patterns overlap.

[0053] Simulated lithography includes a complete process of simulated exposure, simulated development, and simulated etching. During simulated lithography, the simulated line-end spacing of the first pattern 101 and the fourth pattern 104 after simulated development can be directly obtained using the optical proximity correction model. The simulated line-end spacing of the first pattern 101 after simulated development is denoted as A_ADI. s(i) The line-end spacing of the simulated developed fourth pattern 104 is marked as B_ADI. s(i) To improve data accuracy, the simulated lithography can be performed multiple times, thereby obtaining multiple sets of corresponding data, where i is the test number. For example, in the data obtained from the first simulated lithography, i is 1; in the data obtained from the second simulated lithography, i is 2; and in the data obtained from the third simulated lithography, i is 3. Subsequent data can also be obtained in multiple sets and marked with i, which will not be elaborated further.

[0054] Continue to refer to Figure 1 As shown, in step S3, the first photolithography process is performed using the first photomask 100 to copy the first pattern 101 and the second pattern 102 onto the wafer, and the line spacing of the first pattern 101 after development is obtained.

[0055] Photolithography includes exposure, development, and etching processes. After exposure and development, the first pattern 101 and the second pattern 102 on the first photomask 100 are copied onto the photoresist. At this point, the line-to-line spacing of the first pattern 101 copied onto the photoresist after development can be directly measured. The line-to-line spacing of the first pattern 101 after development is marked as A_ADI. m(i) .

[0056] Continue to refer to Figure 1 As shown, in step S4, the second photomask 200 is used to perform the second photolithography process on the wafer that has undergone the first photolithography process, and the third pattern 103 is copied onto the wafer. The third pattern 103 and the second pattern 102 are superimposed on the wafer to form the fourth pattern 104, and the line spacing after etching of the fourth pattern 104 is obtained.

[0057] Photolithography includes exposure, development, and etching processes. After etching, the patterns on the first photomask 100 and the second photomask 200 are copied onto the wafer. At this point, the line-end spacing of the fourth pattern 104, which is the superposition of the second pattern 102 and the third pattern 103 copied onto the wafer after etching, can be directly measured. The etched line-end spacing of the fourth pattern 104 is marked as B_AEI. m(i) .

[0058] Continue to refer to Figure 1 As shown, in step S5, based on the simulated line end spacing (A_ADI) after development of the first pattern 101 and the fourth pattern 104...s(i) and B_ADI a(i) The line spacing A_ADI after development of the first pattern 101 m(i) And the etched line spacing B_AEI of the fourth pattern 104 m(i) Obtain etching deviation.

[0059] In some embodiments of this application, a method for obtaining etching deviation based on the simulated developed line-end spacing of the first pattern 101 and the fourth pattern 104, the developed line-end spacing of the first pattern 101, and the etched line-end spacing of the fourth pattern 104 includes: obtaining a model error based on the developed line-end spacing of the first pattern 101 and the simulated developed line-end spacing of the first pattern 101; obtaining the actual developed line-end spacing of the fourth pattern 104 based on the model error and the simulated developed line-end spacing of the fourth pattern 104; and obtaining the etching deviation based on the actual developed line-end spacing of the fourth pattern 104 and the etched line-end spacing of the fourth pattern 104.

[0060] In some embodiments of this application, a method for obtaining etching deviation based on the simulated developed line spacing of the first pattern 101 and the fourth pattern 104, the developed line spacing of the first pattern 101, and the etched line spacing of the fourth pattern 104 includes: performing multiple tests to obtain multiple sets of simulated developed line spacing of the first pattern 101 and the fourth pattern 104, the developed line spacing of the first pattern 101, and the etched line spacing of the fourth pattern 104.

[0061] In some embodiments of this application, the method for obtaining model error based on the line end spacing of the first pattern 101 after development and the simulated line end spacing of the first pattern 101 after development includes:

[0062]

[0063] Where Model_error is the model error, and A_ADI m(i) A_ADI represents the line spacing after development of the first pattern. s(i) Let be the line spacing after the simulated development of the first graphic, i be the test number, and n be the number of tests.

[0064] In some embodiments of this application, the method for obtaining the actual developed line spacing of the fourth pattern 104 based on the model error and the simulated developed line spacing of the fourth pattern 104 includes:

[0065] B_ADI m(i) =B_ADI s(i)+Model_error;

[0066] Where Model_error is the model error, and B_ADI m(i) B_ADI represents the line-end spacing of the developed fourth pattern. s(i) The line spacing after the simulated development of the fourth graphic is denoted as i, where i is the test number.

[0067] In some embodiments of this application, the method for obtaining etching deviation based on the actual line-end spacing after development of the fourth pattern 104 and the line-end spacing after etching of the fourth pattern 104 includes:

[0068]

[0069] Where Etch_Bias is the etching bias, and B_AEI is the etch bias. m(i) B_ADI represents the line spacing after etching of the fourth pattern. m(i) The distance between the line ends of the fourth graphic after development is denoted as i, where i is the test number and n is the number of tests.

[0070] The technical solution of this application provides a method for obtaining etching deviation in multiple exposure technology, which can effectively improve the accuracy of line-end etching deviation in multiple exposure technology.

[0071] The technical solution of this application provides a first photomask and a second photomask with specific design patterns. The model error, i.e., the line-end spacing error between simulated and actual photolithography, is obtained using the developed line-end spacing of the first pattern in the first photomask and the simulated developed line-end spacing. The simulated developed line-end spacing and the etched line-end spacing of the fourth pattern are obtained using a fourth pattern formed by superimposing the second and third patterns in the first and second photomasks. The developed line-end spacing of the fourth pattern is then obtained using the model error and the simulated developed line-end spacing. Finally, the etching error, i.e., the error value between the initial and subsequent line-end spacing of the fourth pattern and the etched line-end spacing, is obtained using the developed and etched line-end spacing of the fourth pattern.

[0072] This application provides a method for obtaining etching deviation in multiple exposure technology, which can make the etching deviation of line end spacing more accurate in the length direction.

[0073] In summary, after reading this application, those skilled in the art will understand that the foregoing application content is presented by way of example only and is not restrictive. Although not explicitly stated herein, those skilled in the art will understand that this application is intended to encompass various reasonable changes, improvements, and modifications to the embodiments. These changes, improvements, and modifications are all within the spirit and scope of the exemplary embodiments of this application.

[0074] It should be understood that the term "and / or" as used in this embodiment includes any or all combinations of one or more of the associated listed items. It should also be understood that the terms "comprising," "containing," "including," or "comprises," as used in this application, indicate the presence of the described features, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof.

[0075] It should also be understood that although the terms first, second, third, etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. Therefore, without departing from the teachings of this application, a first element in some embodiments may be referred to as a second element in other embodiments. The same reference numerals or the same reference signs denote the same elements throughout the specification.

[0076] Furthermore, this application specification describes exemplary embodiments by referring to idealized exemplary cross-sectional views and / or plan views and / or perspective views. Therefore, differences from the illustrated shapes are foreseeable due to factors such as manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but should include deviations in shape caused, for example, by manufacturing processes. For instance, etched areas shown as rectangular typically have circular or curved features. Therefore, the regions shown in the figures are substantially schematic, and their shapes are not intended to illustrate the actual shape of the regions of the device, nor are they intended to limit the scope of the exemplary embodiments.

Claims

1. A method for obtaining etching deviation in a multiple exposure technique, characterized in that, include: A first photomask and a second photomask are provided. The first photomask includes a first pattern and a second pattern, and the second photomask includes a third pattern. The second pattern and the third pattern are superimposed to form a fourth pattern. Obtain the line end spacing of the first and fourth graphics after simulated development; Perform a first photolithography process to copy the first and second patterns onto a wafer and obtain the line-end spacing of the first pattern after development. A second photolithography process is performed to copy the third pattern onto the wafer. The third pattern and the second pattern are superimposed on the wafer to form a fourth pattern, and the line-end spacing of the etched fourth pattern is obtained. The etching deviation is obtained based on the simulated developed line-end spacing of the first and fourth patterns, the developed line-end spacing of the first pattern, and the etched line-end spacing of the fourth pattern. The method for obtaining the etching deviation based on the simulated developed line-end spacing of the first and fourth patterns includes: obtaining a model error based on the developed line-end spacing of the first pattern and the simulated developed line-end spacing of the first pattern; obtaining the actual developed line-end spacing of the fourth pattern based on the model error and the simulated developed line-end spacing of the fourth pattern; and obtaining the etching deviation based on the actual developed line-end spacing of the fourth pattern and the etched line-end spacing of the fourth pattern.

2. The etching deviation acquisition method as described in claim 1, characterized in that, The method for obtaining the simulated line-end spacing of the first and fourth patterns after development includes: importing the first and second photomasks into an optical proximity correction model; performing multiple exposure lithography on the first and second photomasks using the optical proximity correction model; and obtaining the simulated line-end spacing of the first and fourth patterns after development.

3. The etching deviation acquisition method as described in claim 1, characterized in that, The method for obtaining etching deviation based on the simulated development line spacing of the first pattern and the fourth pattern, the developed line spacing of the first pattern, and the etched line spacing of the fourth pattern includes: performing multiple tests to obtain multiple sets of simulated development line spacing of the first pattern and the fourth pattern, the developed line spacing of the first pattern, and the etched line spacing of the fourth pattern.

4. The etching deviation acquisition method as described in claim 3, characterized in that, The method for obtaining model error based on the line end spacing of the first graphic after development and the simulated line end spacing of the first graphic after development includes: ; in, For model error, The line spacing after the first pattern has been developed is denoted as . Let be the line spacing after the simulated development of the first graphic, i be the test number, and n be the number of tests.

5. The etching deviation acquisition method as described in claim 3, characterized in that, The method for obtaining the actual developed line-end spacing of the fourth graphic based on the model error and the simulated developed line-end spacing of the fourth graphic includes: ; in, For model error, The distance between the line ends of the fourth pattern after development. The line spacing after the simulated development of the fourth graphic is denoted as i, where i is the test number.

6. The etching deviation acquisition method as described in claim 3, characterized in that, The method for obtaining etching deviation based on the actual line-end spacing after development of the fourth pattern and the line-end spacing after etching of the fourth pattern includes: ; in, Due to etching deviation, The line spacing after etching of the fourth pattern. The distance between the line ends of the fourth graphic after development is denoted as i, where i is the test number and n is the number of tests.

7. The etching deviation acquisition method as described in claim 1, characterized in that, The first graphic includes a plurality of rectangles arranged in an array. Each rectangle includes a long side along the horizontal direction and a short side along the vertical direction. The length of the long side is greater than the length of the short side. The line spacing is the spacing between the rectangles along the long side direction.

8. The etching deviation acquisition method as described in claim 7, characterized in that, The second graphic includes a plurality of rectangles arranged in an array. Each rectangle has a long side along the horizontal direction and a short side along the vertical direction. The length of the long side is greater than the length of the short side. The line spacing of the second graphic is greater than the line spacing of the first graphic.

9. The etching deviation acquisition method as described in claim 8, characterized in that, The third graphic comprises several rectangles arranged in an array. Each rectangle has a long side in the horizontal direction and a short side in the vertical direction. The length of the long side is greater than the length of the short side. When the second graphic and the third graphic are superimposed, the third graphic is located at the long side interval of the adjacent rectangles of the second graphic.

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