Test method of storage device error correction service, storage medium and electronic device

Abstract

This application provides a testing method, storage medium, and electronic device for a storage device error correction service. The method includes: storing all data read from a target storage unit into a target cache, and deleting all data stored in the target storage unit; reading N bits of first data from the target cache based on a preset error correction test type, and performing a transformation operation on the N bits of first data to obtain N bits of second data; storing both the N bits of second data and M bits of first data back into the target storage unit; performing an error correction operation on the target storage unit through a target error correction service when the target storage unit responds to a received data operation instruction, and obtaining an error correction result; and testing the error correction capability of the target error correction service based on the error correction result. This application solves the problem in related technologies where the error correction capability of a storage device's error correction service cannot be effectively verified.

Description

Technical Field

[0001] This application relates to the field of computers, and more specifically, to a testing method for error correction services of storage devices, as well as storage media and electronic devices. Background Technology

[0002] With the widespread adoption of storage devices (such as Solid State Drives, SSDs) in computer storage, their performance and reliability have become increasingly important. An effective error correction function for a storage device can ensure data integrity and reliability. Various errors can occur during the use of storage devices, such as program errors when writing data to flash memory, erase errors when erasing data from flash memory, and read errors when reading data from flash memory. Storage device manufacturers must possess the ability to circumvent these errors through software algorithms to ensure the proper functioning of the storage device.

[0003] Because these errors are infrequent and occur with a very low probability, the relevant technologies cannot reliably trigger various types of errors, thus making it impossible to effectively verify the error correction capabilities of the storage device's error correction service. Summary of the Invention

[0004] This application provides a testing method and apparatus for error correction services of storage devices, so as to at least solve the problem that the error correction capabilities of error correction services of storage devices cannot be effectively verified in related technologies.

[0005] According to one embodiment of this application, a testing method for a storage device error correction service is provided, applied to an error correction testing device. The error correction testing device is connected to multiple error correction services, and the multiple error correction services are respectively connected to multiple storage devices. The error correction services are used to detect and repair abnormal data in the storage devices, including: storing all data read from a target storage unit into a target cache, and deleting all data stored in the target storage unit, wherein the target storage unit is any storage unit included in the multiple storage devices; reading N bits of first data from the target cache based on a preset error correction test type, and performing a transformation operation on the N bits of first data to obtain N bits of second data, wherein the N bits of first data are selected from all data in the target storage unit. Data, where N is a natural number greater than or equal to 1; The aforementioned N bits of second data and M bits of first data are both re-stored into the aforementioned target storage unit, wherein the aforementioned M bits of first data and the aforementioned N bits of first data constitute all the data cached in the aforementioned target storage unit, and M is a natural number greater than or equal to 1; When the aforementioned target storage unit responds to the received data operation instruction, an error correction operation is performed on the aforementioned target storage unit through a target error correction service to obtain an error correction result, wherein the aforementioned target error correction service is an error correction service corresponding to the aforementioned target storage unit among multiple error correction services, and the aforementioned error correction operation includes the detection and repair of the aforementioned N bits of second data in the aforementioned target storage unit; The error correction capability of the aforementioned target error correction service is tested based on the aforementioned error correction result.

[0006] In one exemplary embodiment, before storing all data read from the target storage unit into a target cache and deleting all data stored in the target storage unit, the method further includes: obtaining the logical address of the target storage unit, wherein the logical address represents a virtual address for accessing the target storage unit; searching a target mapping table for a physical address that matches the logical address of the target storage unit, wherein the target mapping table includes a mapping relationship between the logical address and the physical address; and, in response to a received data read instruction, obtaining all the data stored in the target storage unit according to the physical address and through communication established with a target storage device, wherein the target storage device is a storage device that includes the target storage unit among a plurality of storage devices.

[0007] In one exemplary embodiment, the plurality of storage devices are all solid-state drives (SSDs), the target storage unit is any one of the plurality of storage units in the target SSD, and the target SSD is any one of the plurality of SSDs. The step of storing all data read from the target storage unit into a target cache and deleting all data stored in the target storage unit includes: determining the amount of all data read from the target storage unit; searching for a cache space matching the amount of data from the cache space allocated in the target SSD to obtain the target cache, or sending a cache allocation instruction to the target SSD to instruct the target SSD to allocate cache space in real time according to the amount of data to obtain the target cache; caching all data read from the target storage unit into the target cache; and deleting all data stored in the target storage unit by one of the following methods when it is determined that all data read from the target storage unit has been cached in the target cache: formatting the target storage unit; setting the data storage attributes of the target storage unit to clear all data stored in the target storage unit.

[0008] In an exemplary embodiment, reading N bits of first data from the target cache based on a preset error correction test type and performing a transformation operation on the N bits of first data to obtain N bits of second data includes: determining the device type of the target storage device where the target storage unit is located; obtaining an error correction test request from the error correction test apparatus according to the device type, wherein the error correction test request is used to request an error correction test on the storage unit in the target storage device; determining the preset error correction test type from the error correction test request; determining an error correction threshold corresponding to the preset error correction test type, and reading the N bits of first data from the target cache according to the error correction threshold, wherein when the preset error correction test type belongs to an uncorrectable error type, N is greater than the error correction threshold, and when the preset error correction test type belongs to a correctable error type, N is less than or equal to the error correction threshold; and adjusting the N bits of first data in at least one of the following ways. The process involves: performing a transformation operation on the first bit data to obtain N bits of second data; determining an error correction threshold corresponding to the preset error correction test type; determining the bits to be reversed in the N bits of the first data according to the error correction threshold; reversing the bits to be reversed to obtain the N bits of the second data; converting the N bits of the first data into data with a preset base to obtain N bits of the second data, wherein the preset base includes multiple data formats; performing a shift operation on the N bits of the first data to perform the transformation operation on the N bits of the first data to obtain the N bits of the second data; performing a preset logical operation on the bits in the N bits of the first data to obtain the N bits of the second data, wherein the preset logical operation includes operations between the bits in the N bits of the first data; performing a modulo operation on the N bits of the first data to obtain the N bits of the second data; and performing a data normalization operation on the N bits of the first data to obtain the N bits of the second data.

[0009] In an exemplary embodiment, before storing both the N-bit second data and the M-bit first data back into the target storage unit, the method further includes: recombining the N-bit second data and the M-bit first data to obtain target data; inputting the target data into a checksum generation program to generate a cyclic redundancy check (CRC) code for the target data, wherein the CRC code is used to allow data operations to be performed on the target data when the target storage unit responds to the data operation request.

[0010] In an exemplary embodiment, performing an error correction operation on the target storage unit through the target error correction service to obtain the error correction result includes: recording the number of data operation anomalies that occurred when performing the error correction operation on the target storage unit through the target error correction service, the number of abnormal data, and the amount of error correction performed by the target error correction service on the abnormal data, to obtain the error correction result; after performing the error correction operation on the target storage unit through the target error correction service to obtain the error correction result, the method further includes: reading the N-bit first data from the target cache; comparing the error correction result with the N-bit first data to obtain a comparison result; and detecting and repairing the N-bit second data in the target storage unit through other error correction services based on the comparison result.

[0011] In an exemplary embodiment, testing the error correction capability of the target error correction service based on the error correction results includes: obtaining from the error correction results the number of times data operation anomalies occurred, the amount of abnormal data, and the amount of error correction performed by the target error correction service on the abnormal data during the error correction operation performed on the target storage unit by the target error correction service; calculating the occurrence rate of abnormal data and the success rate of the target error correction service in correcting abnormal data when the target error correction service performs the error correction operation on the target storage unit based on the number of errors and the amount of error correction performed by the target error correction service; obtaining other occurrence rates and other success rates obtained by the target error correction service in performing the error correction operation on other storage units, wherein the other storage units are storage units other than the target storage unit among the plurality of storage devices; calculating the target occurrence rate and target success rate of the target error correction service using the occurrence rate and success rate corresponding to the target storage unit and the other occurrence rates and other success rates corresponding to the other storage units; and analyzing the error correction capability of the target error correction service based on the target occurrence rate and the target success rate.

[0012] According to yet another embodiment of this application, a computer program product is also provided, including a computer program that, when executed by a processor, implements the steps in any of the above method embodiments.

[0013] According to yet another embodiment of this application, a computer-readable storage medium is also provided, wherein a computer program is stored in the computer-readable storage medium, and the computer program is configured to perform the steps in any of the above method embodiments when it is run.

[0014] According to yet another embodiment of this application, an electronic device is also provided, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0015] This application describes a method that transforms backed-up N-bit first data within a target storage unit by combining a preset error correction test type and the storage device's error correction threshold. This results in new N-bit second data and M-bit first data, with their corresponding checksums recalculated. Subsequently, the target error correction service is used to perform error correction on the target storage unit, and the error correction capability of the target error correction service is tested based on the correction results. Therefore, it can simulate various errors present in different types of data, thereby achieving a stable triggering effect for various error types and further solving the problem in related technologies where the error correction capability of storage device error correction services cannot be effectively verified. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the hardware environment for a test method of a storage device error correction service according to an embodiment of this application;

[0017] Figure 2 This is a flowchart of a testing method for a storage device error correction service according to an embodiment of this application;

[0018] Figure 3 This is a structural block diagram of the error correction service according to an embodiment of this application;

[0019] Figure 4 This is a schematic flowchart illustrating operations performed on data stored in a data block according to an embodiment of this application;

[0020] Figure 5 This is a structural block diagram of a test apparatus for a storage device error correction service according to an embodiment of this application. Detailed Implementation

[0021] The embodiments of this application will be described in detail below with reference to the accompanying drawings and examples.

[0022] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0023] The methods and embodiments provided in this application can be executed on a server device or a similar computing device. Taking running on a server device as an example, Figure 1 This is a schematic diagram of the hardware environment for a testing method of a storage device error correction service according to an embodiment of this application. Figure 1 As shown, the server device may include one or more ( Figure 1Only one is shown in the diagram. A processor 102 (which may include, but is not limited to, a microprocessor MCU or a programmable logic device FPGA, etc.) and a memory 104 for storing data are also shown. The server device may further include a transmission device 106 for communication functions and an input / output device 108. Those skilled in the art will understand that... Figure 1 The structure shown is for illustrative purposes only and does not limit the structure of the server equipment described above. For example, the server equipment may also include components that are more... Figure 1 The more or fewer components shown, or having the same Figure 1 The different configurations shown.

[0024] The memory 104 can be used to store computer programs, such as application software programs and modules, like the computer program corresponding to the testing method for the storage device error correction service in this embodiment. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, thus implementing the above-described method. The memory 104 may include high-speed random access memory and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include memory remotely located relative to the processor 102, and these remote memories can be connected to server devices via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0025] The transmission device 106 is used to receive or send data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider for the server device. In one example, the transmission device 106 includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the transmission device 106 may be a Radio Frequency (RF) module used for wireless communication with the Internet.

[0026] This embodiment provides a testing method for storage device error correction services. The method is applied to an error correction testing device, which is connected to multiple error correction services. Each error correction service is connected to multiple storage devices. The error correction services are used to detect and repair abnormal data in the storage devices. Figure 2 This is a flowchart of a testing method for a storage device error correction service according to an embodiment of this application, such as... Figure 2 As shown, the process includes the following steps:

[0027] Step S202: All data read from the target storage unit is stored in the target cache, and all data stored in the target storage unit is deleted. The target storage unit is any storage unit included in multiple storage devices.

[0028] Optionally, the target storage unit in this embodiment is used to store data, and it may be, but is not limited to, a hard disk drive, a solid-state drive, a memory module, an optical disk, a USB flash drive, a cloud storage service, etc.

[0029] Step S204: Read N bits of first data from the target cache based on the preset error correction test type, and perform a transformation operation on the N bits of first data to obtain N bits of second data. Here, the N bits of first data are the data in all the data in the target storage unit, and N is a natural number greater than or equal to 1.

[0030] Optionally, the preset error correction test type in this embodiment is used to verify the integrity and reliability of the data. It can be an uncorrectable error type, such as damage to the storage unit storing the data; or it can be a correctable error type, such as data format error or data redundancy.

[0031] Optionally, in this embodiment, N in the N-bit second data is a value related to the error correction threshold of the storage device, set according to the aforementioned preset error correction test type. For example, if the storage device is an SSD and the error correction threshold of the SSD is 80 bits, and the first data is 160 bits, when the preset error correction test type is an uncorrectable error type, the number of bits of the second data obtained by performing a transformation operation on the 160-bit first data is 90 bits (greater than the error correction threshold). When the preset error correction test type is a correctable error type, the number of bits of the second data obtained by performing a transformation operation on the 160-bit first data is 40 bits (less than or equal to the error correction threshold).

[0032] Step S206: Store both N bits of second data and M bits of first data back into the target storage unit. The M bits of first data and the N bits of first data constitute all the data cached in the target storage unit, where M is a natural number greater than or equal to 1.

[0033] Optionally, the M-bit first data in this embodiment is the data that has not undergone transformation in the above operations. For example, when a transformation operation is performed on the 160-bit first data, the number of bits of the resulting second data is 90 bits, and the M bits in the M-bit first data are 70 bits.

[0034] Step S208: When the target storage unit responds to the received data operation instruction, the target storage unit is subjected to an error correction operation through the target error correction service to obtain the error correction result. The target error correction service is the error correction service corresponding to the target storage unit among multiple error correction services. The error correction operation includes the detection and repair of N bits of second data in the target storage unit.

[0035] Optionally, the error correction testing service in this embodiment can be applied, but is not limited to, to the hardware manufacturing process, to detect and repair defects in hardware components, and to test the factory quality of the hardware; or to the software development process, to ensure that the software product is free of errors or defects before release.

[0036] Step S210: Test the error correction capability of the target error correction service based on the error correction results.

[0037] Optionally, error correction services are used to detect and correct errors that occur during data transmission, storage, or processing.

[0038] For example, such as Figure 3 As shown, the error correction service includes the following modules: SmartRead Retry (SRR) module, Low Density Parity Check Code (LDPC) software decoding module, disk array reconstruction module, bad block management module, data cleanup module, and first read module. The SRR module automatically attempts to reread data when an error is detected during data reading. If the first read fails, the SRR module... RR attempts to use different read strategies or adjust read parameters to improve the probability of correct data reading; the LDPC software decoding module is used to detect and correct errors during data transmission or storage, while using probabilistic information to improve the accuracy of error correction; when one or more hard drives in the disk array fail, the disk array reconstruction module is responsible for rebuilding the data to maintain the integrity of the array and the accessibility of the data. A common operation is to recover data from the remaining hard drives and reallocate it to new hard drives; the bad block management module is responsible for identifying and isolating bad blocks (i.e., data blocks that cannot be read or written normally) on the storage medium to prevent data corruption or loss. At the same time, it also records the location of bad blocks and avoids using these areas when writing data; the data cleanup module is responsible for maintaining the integrity of data on the storage device by deleting useless or corrupted data, freeing up space and improving storage efficiency; the first read module is used to handle the situation when data on the storage device is read for the first time, involving initializing the read process, checking the integrity of the data, or performing necessary preprocessing operations when the data is first loaded into memory.

[0039] Optionally, such as Figure 3As shown, when the target storage unit responds to the received data operation command, the target error correction service performs error correction operations on the target storage unit to obtain the error correction result. The steps taken in this process include, but are not limited to: the error correction service will first try to use the SRR module, that is, when an anomaly is detected, it will use the corresponding parameters to perform data error correction processing according to the current state of the target storage unit; if SRR cannot correct the data error, it will enter the LDPC soft decoding module, which needs to read the unprocessed or unprocessed raw data in the current target storage unit and complete the soft decoding process in conjunction with the LDPC soft decoding iteration number; if LDPC soft decoding fails, it will enter the reconstruction process, which will exclude the target storage units with problems according to the bad target storage unit table to obtain the current valid disk stripe size; if an unverified error message appears again during the disk stripe reading process, it will directly reply "Work Manager Reconstruction Failed". Specifically, if errors that cannot be repaired by conventional error detection and correction techniques occur during the error correction process when the target error correction service performs error correction operations on the aforementioned target storage unit, the target error correction service will write the data in the target storage unit related to this error into the backup storage unit and associate the target logical address corresponding to the target storage unit with the physical address of the backup storage unit to complete the data migration; if errors that can be repaired by conventional error detection and correction techniques occur during the error correction process when the target error correction service performs error correction operations on the aforementioned target storage unit, the target error correction service will directly perform the error correction operation, and the corrected data will overwrite the data that currently has the error.

[0040] Optionally, the error correction results in this embodiment include, but are not limited to: the number of data operation anomalies that occur when the target error correction service performs error correction operations on the target storage unit, the amount of abnormal data, the amount of error correction performed by the target error correction service on the abnormal data, and the time consumed by the error correction service to perform error correction operations on the target storage unit.

[0041] Through the above steps, a transformation operation is performed on the backed-up N-bit first data in the target storage unit, combining the preset error correction test type and the error correction threshold of the storage device, to obtain new N-bit second data and M-bit first data. The corresponding checksum is then recalculated. Subsequently, the target error correction service is used to perform error correction operations on the target storage unit, and the error correction capability of the target error correction service is tested based on the correction results. Therefore, various types of errors can be stably triggered, further solving the problem in related technologies where the error correction capability of the storage device's error correction service cannot be effectively verified.

[0042] In one exemplary embodiment, before storing all data read from the target storage unit into a target cache and deleting all data stored in the target storage unit, the method further includes: obtaining the logical address of the target storage unit, wherein the logical address represents a virtual address for accessing the target storage unit; searching a target mapping table for a physical address that matches the logical address of the target storage unit, wherein the target mapping table includes a mapping relationship between the logical address and the physical address; and, in response to a received data read instruction, obtaining all the data stored in the target storage unit according to the physical address and through communication established with a target storage device, wherein the target storage device is a storage device that includes the target storage unit among a plurality of storage devices.

[0043] Optionally, when the storage device is an SSD and the target storage unit is a data block, the steps for reading all data from the target storage unit, i.e., reading all data from the data block, in this embodiment are as follows: obtain the logical address of the data block according to the logical address recorded in the program block; then search for the physical address that matches the logical address of the data block in the logical-to-physical address mapping table (here, the L2P mapping table) in the SSD; find the location of the actual data block in the SSD according to the physical address of the data block; and read all the data in the data block.

[0044] Optionally, when the storage device is an SSD and the target storage unit is a data block, the steps to delete all data stored in the data block include, but are not limited to: marking the data block as deletable so that the system can detect that the data on the data block can be overwritten; overwriting the data on the data block with invalid or empty data to ensure that the original data cannot be recovered; updating the file system metadata to mark that the data on the data block has been deleted; and simultaneously performing an erase operation on the storage medium to ensure that the data cannot be recovered.

[0045] Optionally, the data reading instructions used in this embodiment may include, but are not limited to, the address of the target data block corresponding to the data reading operation, the number of bytes to be read in this reading operation, and the data format.

[0046] By taking the above steps, the logical address of the target storage unit is converted into a physical address, which facilitates the response to received data read commands, allows for faster location of data storage, thereby speeding up data reading and further ensuring the accuracy of data reading.

[0047] In one exemplary embodiment, the multiple storage devices are all solid-state drives (SSDs), the target storage unit is any one of the multiple storage units in the target SSD, and the target SSD is any one of the multiple SSDs. The process of storing all data read from the target storage unit into a target cache and deleting all data stored in the target storage unit includes: determining the amount of data read from the target storage unit; searching for a cache space matching the data amount from the cache space allocated in the target SSD to obtain the target cache; or sending a cache allocation instruction to the target SSD to instruct it to allocate cache space in real time according to the data amount to obtain the target cache; caching all data read from the target storage unit into the target cache; and deleting all data stored in the target storage unit by one of the following methods when it is determined that all data read from the target storage unit has been cached in the target cache: formatting the target storage unit; or setting the data storage attributes of the target storage unit to clear all data stored in the target storage unit.

[0048] Optionally, the cache allocation instruction sent to the target solid-state drive in this embodiment includes, but is not limited to: specifying the size of the storage space to be allocated to the cache, specifying the location where the solid-state drive needs to allocate the cache, and the strategy used by the solid-state drive for cache allocation, such as the least recently used strategy or the first-in-first-out strategy.

[0049] Optionally, the steps performed in this embodiment when searching for a cache space matching the data volume from the cache space allocated in the target solid-state drive include, but are not limited to: checking the cache space size of the target solid-state drive, comparing the total data volume obtained in the previous step with the cache space size to determine if there is enough space to store the current data; if the current data volume is less than or equal to the cache space size of the solid-state drive, the data can be directly stored on the hard drive; if the current data volume is greater than the cache space size, it is necessary to consider cleaning up other data on the hard drive or splitting the data into multiple parts for storage; finally, confirming that the data has been successfully stored in the cache space of the target solid-state drive, and performing necessary backup operations to ensure data security. For example, when the storage device is an SSD, the target storage unit is a data block, and the data volume in the read data block is 160 bits, a cache allocation instruction is sent to the target solid-state drive. The cache allocation instruction carries the specified storage space to be allocated to the cache as 160 bits, and the strategy used by the solid-state drive for cache allocation is the least recently used strategy.

[0050] The above steps transfer all data read from the target storage unit to the target solid-state drive (SSD), and then delete all data stored in the target storage unit. Storing data on an SSD improves data access speed, reduces device read / write latency, and enhances overall performance and responsiveness.

[0051] In one exemplary embodiment, N bits of first data are read from a target cache based on a preset error correction test type, and a transformation operation is performed on the N bits of first data to obtain N bits of second data. This includes: determining the device type of the target storage device where the target storage unit is located; obtaining an error correction test request from the error correction test apparatus according to the device type, wherein the error correction test request is used to request error correction testing on the storage unit in the target storage device; determining the preset error correction test type from the error correction test request; determining an error correction threshold corresponding to the preset error correction test type, and reading the N bits of first data from the target cache according to the error correction threshold, wherein, if the preset error correction test type is an uncorrectable error type, N is greater than the error correction threshold; if the preset error correction test type is a correctable error type, N is less than or equal to the error correction threshold; and performing a transformation operation on the N bits of second data using at least one of the following methods. The process involves: performing a transformation operation on the first N-bit data to obtain N-bit second data; determining an error correction threshold corresponding to the preset error correction test type; determining the bits to be reversed in the first N-bit data according to the error correction threshold; reversing the bits to be reversed to obtain the N-bit second data; converting the first N-bit data to a preset base to obtain N-bit second data, wherein the preset base includes multiple data formats; performing a shift operation on the first N-bit data to perform the transformation operation on the first N-bit data to obtain the second N-bit data; performing a preset logical operation on the bits in the first N-bit data to obtain the second N-bit data, wherein the preset logical operation includes operations between the bits in the first N-bit data; performing a modulo operation on the first N-bit data to obtain the second N-bit data; and performing a data normalization operation on the first N-bit data to obtain the second N-bit data.

[0052] Optionally, the target storage device in this embodiment includes, but is not limited to, hard disk drives (HDDs), solid-state drives (SSDs), optical disc drives, flash drives, and tape drives.

[0053] Optionally, the error correction test request in this embodiment includes, but is not limited to, specifying the address of the storage unit in the target storage device to be tested for error correction, the type of error correction test, and the error correction threshold of the target storage device.

[0054] By using the above steps, the device type of the target storage device where the target storage unit is located and the error correction test request, the data to be read is determined according to the error correction test type. The size of the data to be transformed can be controlled, thereby generating different types of error correction test types to simulate various errors that may occur when users use the service in real scenarios, and effectively verifying the error correction service.

[0055] In one exemplary embodiment, before storing both N-bit second data and M-bit first data back into the target storage unit, the method further includes: recombining the N-bit second data and the M-bit first data to obtain target data; inputting the target data into a checksum generation program to generate a cyclic redundancy check (CRC) code for the target data, wherein the CRC code is used to allow data operations to be performed on the target data when the target storage unit responds to the data operation request.

[0056] Optionally, in this embodiment, when recombining the N-bit second data and M-bit first data to obtain the target data, the combination operation is performed based on the relative positions of the N-bit second data and M-bit first data before the row transformation operation. This combination operation can be, but is not limited to, a concatenation operation. For example, when the storage device is an SSD and the target storage unit is a data block, the first data is 160 bits. When the preset error correction test type is an uncorrectable error type, when performing a transformation operation on the 160-bit first data, the resulting second data has 90 bits (greater than the error correction threshold), and simultaneously, 70 bits of first data are obtained. The 90-bit second data and the 70-bit first data are then concatenated. This concatenation operation is performed based on the relative positions of the 90-bit transformed second data and the 70-bit unchanged first data before the first data transformation operation. That is, if the 90-bit transformed second data before the first data transformation operation is stored in data block partition 1, then the concatenated 90-bit second data still corresponds to data block partition 1.

[0057] Optionally, in this embodiment, when generating the cyclic redundancy check code of the target data through the check code generation program, the check code generation program can select CRC polynomials such as CRC-8, CRC-16, and CRC-32 to generate a fixed CRC value; the check code generation program also uses a CRC register, which is initialized to a fixed initial value (all 0s or all 1s); then the check code generation program processes the data, inputting the data into the CRC register bit by bit in order, and performing an XOR operation on the value of the CRC register with each bit; after the data processing is completed, the value of the CRC register is used as the generated CRC check code.

[0058] Through the above steps, a cyclic redundancy check code is generated for the target data using a check code generation program. This enables verification of data transmission when the target storage unit responds to the data operation request, ensuring the accuracy of the data during transmission and allowing data operations to be performed on the target data.

[0059] In an exemplary embodiment, performing an error correction operation on a target storage unit through a target error correction service to obtain an error correction result includes: recording the number of data operation anomalies that occurred when performing an error correction operation on the target storage unit through the target error correction service, the number of abnormal data, and the amount of error correction performed by the target error correction service on the abnormal data, to obtain the error correction result; after performing an error correction operation on the target storage unit through the target error correction service to obtain the error correction result, the method further includes: reading the N-bit first data from the target cache; comparing the error correction result with the N-bit first data to obtain a comparison result; and based on the comparison result, detecting and repairing the N-bit second data in the target storage unit through other error correction services.

[0060] Optionally, in this embodiment, N bits of first data are read from the target cache; the error correction result is compared with the N bits of first data to obtain the comparison result, including: if the error correction result is an error that can be repaired by conventional error detection and correction techniques, it is directly compared with the N bits of first data. If the data is the same, the comparison result is recorded as consistent; otherwise, it is recorded as inconsistent. If the error correction result is an error that cannot be repaired by conventional error detection and correction techniques, the physical address of the associated storage unit is read through the target logical address corresponding to the target storage unit, the data in the above storage unit is read, and it is compared with the N bits of first data. If the data is the same, the comparison result is recorded as consistent; otherwise, it is recorded as inconsistent.

[0061] Optionally, in this embodiment, the steps of detecting and repairing the N bits of second data in the target storage unit based on the comparison results through other error correction services are similar to the error correction steps of the target error correction service, as described above, and will not be repeated here.

[0062] Optionally, the error correction results in this embodiment may include the contents that have been described above and will not be repeated here.

[0063] By performing the error correction operation on the target storage unit by the target error correction service and comparing the error correction result with the N-bit first data, the effectiveness of the target error correction service can be determined based on the comparison result, and the error correction effect of the target error correction service can be intuitively demonstrated.

[0064] In one exemplary embodiment, testing the error correction capability of a target error correction service based on error correction results includes: obtaining from the error correction results the number of times data operation anomalies occurred, the amount of abnormal data, and the amount of error correction performed by the target error correction service on the target storage unit during the error correction operation performed by the target error correction service on the target storage unit; calculating the occurrence rate of abnormal data and the success rate of the target error correction service in correcting abnormal data when the target error correction service performs the error correction operation on the target storage unit based on the number of errors and the amount of error correction performed by the target error correction service; obtaining other occurrence rates and other success rates obtained by the target error correction service performing the error correction operation on other storage units, wherein the other storage units are storage units other than the target storage unit among a plurality of storage devices; calculating the target occurrence rate and target success rate of the target error correction service using the occurrence rate and success rate corresponding to the target storage unit and the other occurrence rates and other success rates corresponding to the other storage units; and analyzing the error correction capability of the target error correction service based on the target occurrence rate and the target success rate.

[0065] Optionally, in this embodiment, data operation anomalies include, but are not limited to, data corruption, data duplication, and data overflow.

[0066] Optionally, in addition to analyzing the target error correction service based on the target occurrence rate and target success rate, this embodiment can also combine the bit error rate and error correction time to analyze and obtain the target error correction service's error correction capability.

[0067] Through the above steps, the occurrence rate of abnormal data obtained by the target error correction service in performing error correction operations on the target storage unit and other storage units, as well as the success rate of the target error correction service in correcting abnormal data, other occurrence rates, and other success rates are calculated. The error correction results of the target error correction service under different read error scenarios are recorded, and the error correction capability of the target error correction service is objectively demonstrated in the form of data, further verifying the effectiveness of the error correction service.

[0068] The following explanation, with reference to optional examples, illustrates the operations performed on the N bits of first data in the target storage unit in the embodiments of this application. For example... Figure 4 The diagram shows a flowchart of operations on data stored in a data block. In this optional example, the storage device is an SSD, the target storage unit is a data block, and the data block stores bit-type data.

[0069] S401, read the bit data information from the data block and store the 160 bits of data information read from the data block into other data blocks in the SSD that are not involved in this error correction test;

[0070] S402, erase the bit information in this data block;

[0071] S403, based on the preset error type that can be corrected and the 90-bit error correction threshold of the SSD, performs a transformation operation on 160 bits of data, randomly selects 40 bits of data in the data block to perform a flip operation, and leaves the remaining 120 bits of data unchanged;

[0072] S404, combine the 40-bit data after flipping and the 120-bit data before flipping according to their relative positions before the flipping operation to obtain the target data. Input the target data into the check code generation program to generate a cyclic redundancy check code for the target data. The check code generation program uses the CRC-16 polynomial to generate the check code.

[0073] S405 rewrites the flipped 40-bit data and the unflipped 120-bit data into their corresponding data blocks.

[0074] This optional example demonstrates how to manipulate data within a data block to generate new data, thereby simulating the execution process of error correction services in different scenarios. This facilitates subsequent error correction services in performing error correction operations and verifies the error correction capabilities of the storage device's error correction service.

[0075] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0076] This embodiment also provides a testing apparatus for a storage device error correction service. This apparatus is used to implement the above embodiments and preferred embodiments, and details already described will not be repeated. As used below, the term "module" can refer to a combination of software and / or hardware that implements a predetermined function. Although the apparatus described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.

[0077] Figure 5 This is a structural block diagram of a testing apparatus for a storage device error correction service according to an embodiment of this application, such as... Figure 5 As shown, the device includes:

[0078] The first deletion module 502 is used to store all data read from the target storage unit into the target cache and delete all data stored in the target storage unit, wherein the target storage unit is any storage unit included in the plurality of the above storage devices;

[0079] The first transformation module 504 is used to read N bits of first data from the target cache based on a preset error correction test type, and perform a transformation operation on the N bits of first data to obtain N bits of second data, wherein the N bits of first data are the data in all the data in the target storage unit, and N is a natural number greater than or equal to 1.

[0080] The first storage module 506 is used to restore the N-bit second data and the M-bit first data to the target storage unit, wherein the M-bit first data and the N-bit first data constitute all the data cached in the target storage unit, and M is a natural number greater than or equal to 1.

[0081] The first error correction module 508 is used to perform an error correction operation on the target storage unit through a target error correction service when the target storage unit responds to the received data operation instruction, and obtain an error correction result. The target error correction service is an error correction service corresponding to the target storage unit among a plurality of error correction services. The error correction operation includes the detection and repair of the N bits of second data in the target storage unit.

[0082] The first test module 510 is used to test the error correction capability of the target error correction service based on the above error correction results.

[0083] In an exemplary embodiment, the first deletion module 502 includes: a first acquisition unit, configured to acquire the logical address of the target storage unit; a first search unit, configured to search in a target mapping table for a physical address that matches the logical address of the target storage unit; and a second acquisition unit, configured to, in response to a received data read instruction, acquire all the data stored in the target storage unit according to the physical address and through communication established with the target storage device.

[0084] In one exemplary embodiment, the multiple storage devices are all solid-state drives (SSDs), the target storage unit is any one of the multiple storage units in the target SSD, and the target SSD is any one of the multiple SSDs. The first deletion module 502 includes: a first determining unit, configured to determine the amount of all data read from the target storage unit; a second searching unit, configured to search for a cache space matching the amount of data in the cache space allocated in the target SSD to obtain the target cache, or to send a cache allocation instruction to the target SSD to instruct the target SSD to allocate cache space in real time according to the amount of data to obtain the target cache; a first caching unit, configured to cache all data read from the target storage unit to the target cache; and a first deletion unit, configured to delete all data stored in the target storage unit by one of the following methods when it is determined that all data read from the target storage unit has been cached to the target cache: formatting the target storage unit; setting the data storage attributes of the target storage unit to clear all data stored in the target storage unit.

[0085] In an exemplary embodiment, the first transformation module 504 includes: a second determining unit, configured to determine the device type of the target storage device where the target storage unit is located; a third obtaining unit, configured to obtain an error correction test request from the error correction test device according to the device type, wherein the error correction test request is used to request an error correction test on the storage unit in the target storage device; a third determining unit, configured to determine the preset error correction test type from the error correction test request; a first reading unit, configured to determine an error correction threshold corresponding to the preset error correction test type, and read the N-bit first data from the target cache according to the error correction threshold; and a first transformation unit, configured to perform a transformation operation on the N-bit first data in at least one of the following ways to obtain N-bit second data: determining an error correction threshold corresponding to the preset error correction test type. The process involves: determining the bits to be reversed in the N-bit first data according to the aforementioned error correction threshold; reversing the bits to be reversed to obtain the N-bit second data; converting the N-bit first data into data with a preset base to obtain the N-bit second data, wherein the preset base includes various data formats; performing a shift operation on the N-bit first data to perform the aforementioned transformation operation on the N-bit first data to obtain the N-bit second data; performing a preset logical operation on the bits in the N-bit first data to obtain the N-bit second data, wherein the preset logical operation includes operations between the bits in the N-bit first data; performing a modulo operation on the N-bit first data to obtain the N-bit second data; and performing a data normalization operation on the N-bit first data to obtain the N-bit second data.

[0086] In an exemplary embodiment, the first storage module 506 includes: a first combination unit, configured to recombine the N-bit second data and the M-bit first data to obtain target data; and a first generation unit, configured to input the target data into a check code generation program to generate a cyclic redundancy check code for the target data through the check code generation program.

[0087] In an exemplary embodiment, the first error correction module 508 includes: a first recording unit, configured to record the number of data operation anomalies, the amount of abnormal data, and the amount of error correction performed by the target error correction service on the target storage unit when performing error correction operations on the target storage unit, to obtain the error correction result; and a first comparison unit, configured to read the N-bit first data from the target cache; compare the error correction result with the N-bit first data to obtain a comparison result; and detect and repair the N-bit second data in the target storage unit using other error correction services based on the comparison result.

[0088] In an exemplary embodiment, the first test module 510 includes: a fourth acquisition unit, configured to acquire from the error correction results the number of times data operation anomalies occurred, the number of anomaly data, and the amount of error correction performed by the target error correction service on the anomaly data during the error correction operation performed on the target storage unit by the target error correction service; a first calculation unit, configured to calculate the occurrence rate of the anomaly data and the success rate of the target error correction service in correcting the anomaly data when the target error correction service performs the error correction operation on the target storage unit, based on the number of errors and the amount of error correction performed by the target error correction service; a fifth acquisition unit, configured to acquire other occurrence rates and other success rates obtained by the target error correction service performing the error correction operation on other storage units; a second calculation unit, configured to calculate the target occurrence rate and target success rate of the target error correction service using the occurrence rate and success rate corresponding to the target storage unit and the other occurrence rates and other success rates corresponding to the other storage units; and a first analysis unit, configured to analyze and obtain the error correction capability of the target error correction service based on the target occurrence rate and the target success rate.

[0089] It should be noted that the above modules can be implemented by software or hardware. For the latter, they can be implemented in the following ways, but are not limited to: all the above modules are located in the same processor; or, the above modules are located in different processors in any combination.

[0090] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above method embodiments when run.

[0091] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard drive, magnetic disk, or optical disk.

[0092] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0093] In one exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor and the input / output device is connected to the processor.

[0094] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above method embodiments.

[0095] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps in any of the above method embodiments.

[0096] The embodiments described herein also provide a computer program that includes computer instructions stored in a computer-readable storage medium; a processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the steps in any of the above method embodiments.

[0097] Specific examples in this embodiment can be found in the examples described in the above embodiments and exemplary implementations, and will not be repeated here.

[0098] Obviously, those skilled in the art should understand that the modules or steps of this application described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those presented here, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, this application is not limited to any particular combination of hardware and software.

[0099] The above are merely preferred embodiments of this application and are not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the principles of this application should be included within the protection scope of this application.

Claims

1. A testing method for error correction service of a storage device, characterized in that, An error correction testing device is applied to an error correction testing apparatus, which is connected to multiple error correction services, each of which is connected to multiple storage devices. The error correction services are used to detect and repair abnormal data in the storage devices. The method includes: All data read from the target storage unit is stored in the target cache, and all data stored in the target storage unit is deleted, wherein the target storage unit is any storage unit included in the plurality of storage devices; Based on a preset error correction test type, N bits of first data are read from the target cache, and a transformation operation is performed on the N bits of first data to obtain N bits of second data. The N bits of first data are data from all the data in the target storage unit, and N is a natural number greater than or equal to 1. The N-bit second data and the M-bit first data are both re-stored into the target storage unit, wherein the M-bit first data and the N-bit first data constitute all the data cached in the target storage unit, and M is a natural number greater than or equal to 1; When the target storage unit responds to the received data operation instruction, an error correction operation is performed on the target storage unit through the target error correction service to obtain an error correction result. The target error correction service is the error correction service corresponding to the target storage unit among a plurality of error correction services. The error correction operation includes the detection and repair of the N bits of second data in the target storage unit. Test the error correction capability of the target error correction service based on the error correction results; Before storing both the N-bit second data and the M-bit first data back into the target storage unit, the method further includes: recombining the N-bit second data and the M-bit first data to obtain target data; inputting the target data into a checksum generation program to generate a cyclic redundancy check (CRC) code for the target data, wherein the CRC code is used to allow data operations to be performed on the target data when the target storage unit responds to a data operation request; Testing the error correction capability of the target error correction service based on the error correction results includes: obtaining from the error correction results the number of times data operation anomalies occurred, the number of anomaly data, and the amount of error correction performed by the target error correction service on the anomaly data during the error correction operation performed on the target storage unit by the target error correction service; calculating the occurrence rate of the anomaly data and the success rate of the target error correction service in correcting the anomaly data when the target error correction service performs the error correction operation on the target storage unit based on the number of errors and the amount of error correction; obtaining other occurrence rates and other success rates obtained by the target error correction service performing the error correction operation on other storage units, wherein the other storage units are storage units other than the target storage unit among multiple storage devices; calculating the target occurrence rate and target success rate of the target error correction service using the occurrence rate and success rate corresponding to the target storage unit, and the other occurrence rates and other success rates corresponding to the other storage units; and analyzing the error correction capability of the target error correction service based on the target occurrence rate and target success rate.

2. The method according to claim 1, characterized in that, Before storing all data read from the target storage unit into the target cache and deleting all data stored in the target storage unit, the method further includes: Obtain the logical address of the target storage unit, wherein the logical address is used to represent the virtual address for accessing the target storage unit; The target mapping table is used to find the physical address that matches the logical address of the target storage unit, wherein the target mapping table includes the mapping relationship between the logical address and the physical address; In response to a received data read instruction, the system retrieves all the data stored in the target storage unit according to the physical address and through communication established with the target storage device, wherein the target storage device is a storage device that includes the target storage unit among a plurality of storage devices.

3. The method according to claim 1, characterized in that, The plurality of storage devices are all solid-state drives (SSDs), the target storage unit is any one of the plurality of storage units in the target SSD, and the target SSD is any one of the plurality of SSDs. The step of storing all data read from the target storage unit into a target cache and deleting all data stored in the target storage unit includes: Determine the total amount of data to be read from the target storage unit; Alternatively, a cache space matching the data volume can be found in the cache space allocated in the target solid-state drive to obtain the target cache, or a cache allocation instruction can be sent to the target solid-state drive to instruct the target solid-state drive to allocate cache space in real time according to the data volume to obtain the target cache. All data read from the target storage unit will be cached in the target cache; If it is determined that all data read from the target storage unit has been cached in the target cache, all data stored in the target storage unit shall be deleted by one of the following methods: formatting the target storage unit; setting the data storage attributes of the target storage unit to clear all data stored in the target storage unit.

4. The method according to claim 1, characterized in that, Based on a preset error correction test type, N bits of first data are read from the target cache, and a transformation operation is performed on the N bits of first data to obtain N bits of second data, including: Determine the device type of the target storage device where the target storage unit is located; According to the device type, an error correction test request is obtained from the error correction test device, wherein the error correction test request is used to request an error correction test on the storage unit in the target storage device; The preset error correction test type is determined from the error correction test request; Determine the error correction threshold corresponding to the preset error correction test type, and read the N bits of first data from the target cache according to the error correction threshold, wherein, when the preset error correction test type belongs to the type of uncorrectable error, the N is greater than the error correction threshold, and when the preset error correction test type belongs to the type of correctable error, the N is less than or equal to the error correction threshold. The N-bit first data is transformed by at least one of the following methods to obtain the N-bit second data: Determine the error correction threshold corresponding to the preset error correction test type; The bits to be reversed in the N-bit first data are determined according to the error correction threshold. The bits to be reversed are reversed to obtain the N bits of the second data; The N-bit first data is converted into data with a preset radix to obtain N-bit second data, wherein the preset radix includes various data formats; A shift operation is performed on the N-bit first data to perform the transformation operation on the N-bit first data, thereby obtaining the N-bit second data; The N-bit second data is obtained by performing a preset logical operation on the bits in the N-bit first data, wherein the preset logical operation includes the operation between the bits in the N-bit first data; Perform a modulo operation on the N-bit first data to obtain the N-bit second data; Perform a data normalization operation on the N-bit first data to obtain the N-bit second data.

5. The method according to claim 1, characterized in that, The error correction operation is performed on the target storage unit through the target error correction service, and the error correction results include: The error correction result is obtained by recording the number of data operation anomalies, the amount of abnormal data, and the amount of error correction performed by the target error correction service on the abnormal data when the target error correction service performs error correction operation on the target storage unit. After performing error correction operations on the target storage unit through the target error correction service and obtaining the error correction result, the method further includes: reading the N-bit first data from the target cache; comparing the error correction result with the N-bit first data to obtain a comparison result; and detecting and repairing the N-bit second data in the target storage unit through other error correction services based on the comparison result.

6. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the method described in any one of claims 1 to 5.

7. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method described in any one of claims 1 to 5.

8. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method described in any one of claims 1 to 5.

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