Switching resistance circuit and electrical appliance

Abstract

This application relates to a switched resistor circuit and an electrical device. The switched resistor circuit includes a bias current supply circuit and at least one switched resistor unit. The switched resistor unit includes a first resistor assembly, a second resistor assembly, a MOSFET, a bias voltage generation circuit, and a transmission switch circuit. The first terminal of the MOSFET is connected to the first terminal of the first resistor assembly and is also used to connect to a current inflow port. The second terminal of the first MOSFET is connected to the second terminal of the first resistor assembly and a current outflow port via the second resistor assembly. The bias voltage generation circuit is disposed between the gate and the first terminal of the MOSFET and is connected to the bias current supply circuit through the transmission switch circuit. When the transmission switch circuit is in the ON state, the bias voltage generation circuit receives the bias current and generates a bias voltage between the gate and the first terminal of the MOSFET, causing the MOSFET to conduct. Therefore, the switching on and off of the MOSFET can be controlled by the bias current to adjust the resistance value of the switched resistor unit.

Description

Technical Field

[0001] This application relates to the field of electronic circuit technology, and in particular to a switching resistor circuit and an electrical device. Background Technology

[0002] With the rapid development of electronic circuit technology, the demand for high-speed data transmission is increasing, and the performance of high-speed circuits is receiving more and more attention, especially the performance impact caused by impedance mismatch.

[0003] Taking the Directly Modulated Laser (DML) as an example, as a key component in optical communication systems, a mismatch between the DML's output impedance and the impedance of subsequent circuits can lead to problems such as signal reflection, energy loss, and signal distortion. These problems not only degrade communication quality but may also damage the DML laser driver and the entire communication system.

[0004] Therefore, impedance matching in high-speed circuits has become an urgent problem to be solved. Summary of the Invention

[0005] Therefore, it is necessary to provide a switching resistor circuit and electrical equipment suitable for impedance matching in high-speed circuits.

[0006] A switched resistor circuit includes: a bias current supply circuit and at least one switched resistor unit;

[0007] The switching resistor unit includes: a first resistor assembly, a second resistor assembly, a MOSFET, a bias voltage generation circuit, and a transmission switch circuit; the first terminal of the MOSFET is connected to the first terminal of the first resistor assembly, and the common terminal connecting the first terminal and the first resistor assembly is also used to connect to a current inflow port; the second terminal of the MOSFET is connected to the second terminal of the first resistor assembly via the second resistor assembly, and the common terminal connecting the second resistor assembly and the first resistor assembly is also used to connect to a current outflow port; the bias voltage generation circuit is disposed between the gate and the first terminal of the MOSFET, and the bias voltage generation circuit is also connected to the bias current supply circuit through the transmission switch circuit;

[0008] When the transmission switch circuit is in the ON state, the bias voltage generation circuit receives the bias current output by the bias current supply circuit and generates a bias voltage between the gate and the first terminal of the MOS transistor to turn on the MOS transistor.

[0009] In one embodiment, the bias current providing circuit includes:

[0010] Bias current generating unit, used to generate and output bias current;

[0011] The current transmission unit is connected to the bias current generating unit and the transmission switch circuit respectively, and is used to transmit the bias current to the transmission switch circuit.

[0012] In one embodiment, the bias current generating unit includes an operational amplifier, a third resistor assembly, a fourth resistor assembly, a first reference transistor, and a second reference transistor.

[0013] The inverting input of the operational amplifier is used to connect to a reference voltage. The non-inverting input of the operational amplifier is connected to the first terminal of the third resistor assembly, the first terminal of the fourth resistor assembly, and the gate of the first reference transistor. The second terminal of the third resistor assembly is grounded. The first terminal of the first reference transistor is connected to the second terminal of the second reference transistor, and the second terminal of the first reference transistor is connected to the second terminal of the fourth resistor assembly. The first terminal of the second reference transistor is used to connect to a current inflow port, and the gate of the second reference transistor is connected to the output of the operational amplifier.

[0014] In one embodiment, the current transmission unit includes: a first output transistor, a second output transistor, and a transmission circuit; the first output transistor, the second output transistor, the fourth resistor assembly, the first reference transistor, and the second reference transistor form a first current mirror circuit;

[0015] The gate of the first output transistor is connected to the gate of the first reference transistor, the first terminal of the first output transistor is connected to the second terminal of the second output transistor, and the second terminal of the first output transistor is connected to the transmission switch circuit through the transmission circuit; the first terminal of the second output transistor is connected to the first terminal of the second reference transistor, and the gate of the second output transistor is connected to the gate of the second reference transistor.

[0016] In one embodiment, the transmission circuit is a reference side circuit of the second current mirror circuit; the transmission switching circuit includes an output side circuit of the second current mirror circuit and a switching unit, wherein the output side circuit of the second current mirror circuit is connected to the bias voltage generation circuit.

[0017] The switching unit is connected between the reference side circuit of the second current mirror circuit and the output side circuit of the second current mirror circuit.

[0018] When the switching unit connects the output side circuit of the second current mirror circuit to the reference side circuit of the second current mirror circuit, the output side circuit of the second current mirror circuit and the reference side circuit of the second current mirror circuit constitute the second current mirror circuit.

[0019] In one embodiment, the reference-side circuit of the second current mirror circuit includes a fifth resistor assembly, a third reference transistor, and a fourth reference transistor. The first terminal of the fifth resistor assembly is connected to the second terminal of the first output transistor and the gate of the third reference transistor, respectively. The second terminal of the fifth resistor assembly is connected to the first terminal of the third reference transistor and the gate of the fourth reference transistor, respectively. The second terminal of the third reference transistor is connected to the first terminal of the fourth reference transistor, and the second terminal of the fourth reference transistor is grounded.

[0020] The output side circuit of the second current mirror circuit includes a third output transistor and a fourth output transistor. The first terminal of the third output transistor is connected to the bias voltage generation circuit, the second terminal of the third output transistor is connected to the first terminal of the fourth output transistor, and the second terminal of the fourth output transistor is grounded. The gate of the third output transistor is connected to the gate of the third reference transistor, and the gate of the fourth output transistor is connected to the gate of the fourth reference transistor through the switching unit.

[0021] In one embodiment, the switching unit includes: a first switch and a second switch, wherein the first switch is connected between the output side circuit of the second current mirror circuit and the reference side circuit of the second current mirror circuit; a first terminal of the second switch is connected to the output side circuit of the second current mirror circuit, and a second terminal of the second switch is grounded.

[0022] In one embodiment, the switched resistor unit further includes a capacitor connected between the first terminal and the gate of the MOS transistor.

[0023] In one embodiment, the bias voltage generation circuit includes a bias resistor connected between the first terminal and the gate of the MOS transistor.

[0024] An electrical device includes a switching resistor circuit as described above.

[0025] The aforementioned switched resistor circuit and electrical equipment include a bias current supply circuit and at least one switched resistor unit. The switched resistor unit comprises a first resistor assembly, a second resistor assembly, a MOSFET, a bias voltage generation circuit, and a transmission switch circuit. The first terminal of the MOSFET is connected to the first terminal of the first resistor assembly, and the common terminal connecting the first terminal and the first resistor assembly is also used to connect to a current inflow port. The second terminal of the first MOSFET is connected to the second terminal of the first resistor assembly via the second resistor assembly, and the common terminal connecting the second resistor assembly and the first resistor assembly is also used to connect to a current outflow port. The bias voltage generation circuit is disposed between the gate and the first terminal of the MOSFET, and is also connected to the bias current supply circuit via the transmission switch circuit. When the transmission switch circuit is in the ON state, the bias voltage generation circuit receives the bias current output by the bias current supply circuit and generates a bias voltage between the gate and the first terminal of the MOSFET, causing the MOSFET to conduct. The switching resistor unit in this switching resistor circuit can control the on / off state of the MOSFET (Metal-Oxide-Semiconductor Transistor) via bias current. By precisely controlling the switching state of the MOSFET, the resistance value of the switching resistor unit can be adjusted, thus enabling precise regulation of the switching resistor circuit's resistance. When this switching resistor circuit is used in DML (Digital Melting Engine), precise control of the switching resistor circuit's resistance value allows for output impedance matching of the DML, improving signal transmission quality and ultimately enhancing DML performance. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is a schematic diagram of a switched resistor circuit module according to one embodiment;

[0028] Figure 2 This is a schematic diagram of a switched resistor circuit according to one embodiment;

[0029] Figure 3 This is a schematic diagram of a switched resistor circuit according to another embodiment;

[0030] Figure 4 This is a schematic diagram of the circuit structure of a switched resistor circuit according to a specific embodiment. Detailed Implementation

[0031] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0032] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0033] It is understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0034] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.

[0035] It is understandable that "at least one" refers to one or more, and "multiple" refers to two or more. "At least a part of an element" refers to part or all of an element.

[0036] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.

[0037] In one embodiment, a switched resistor circuit is provided. For example... Figure 1 As shown, one embodiment of the switched resistor circuit includes a bias current supply circuit 100 and at least one switched resistor unit 200.

[0038] The number of switched resistor units 200 can be set according to specific circumstances, with a minimum of one. When there are two or more switched resistor units 200, they can be connected in parallel between the PIN+ and PIN- terminals. The PIN+ terminal serves as the current inflow port, and the PIN- terminal serves as the current outflow port. In practical implementation, the PIN+ and PIN- terminals can be used to connect to specific application circuits, such as the interface circuit for DML. The PIN+ terminal can also be directly or indirectly connected to the power supply voltage VDD, while the PIN- terminal can be indirectly grounded through other circuits.

[0039] The more switching resistor units 200 there are, the finer the resistance adjustment range that the switching resistor circuit can provide. For example, if one switching resistor unit 200 can provide a resistance value of 200 ohms and 100 ohms, then two switching resistor units 200 connected in parallel can provide a resistance value of 50 ohms, which is a more precise adjustable resistance value compared to a single switching resistor unit 200. However, the more switching resistor units 200 there are, the higher the cost of the switching resistor circuit. Therefore, more switching resistor units 200 are not necessarily better; the number needs to be determined based on other specific requirements.

[0040] Specifically, such as Figure 2 As shown, the switching resistor unit 200 includes a first resistor assembly 210, a second resistor assembly 220, a MOSFET M0, a bias voltage generation circuit 230, and a transmission switch circuit 240. The first terminal of the MOSFET M0 is connected to the first terminal of the first resistor assembly 210, and the common terminal connecting the first terminal and the first resistor assembly 210 is also used to connect to the current inflow port PIN+. The second terminal of the MOSFET M0 is connected to the second terminal of the first resistor assembly 210 via the second resistor assembly 220, and the common terminal connecting the second resistor assembly 220 and the first resistor assembly 210 is also used to connect to the current outflow port PIN-.

[0041] The type of MOSFET M0 can be selected based on specific circumstances. Optionally, MOSFET M0 can be a PMOS transistor, with its source as the first terminal and its drain as the second terminal. It can be understood that, in a practical implementation, MOSFET M0 can also be an NMOS transistor.

[0042] The bias voltage generation circuit 230 is disposed between the gate and the first terminal of the MOSFET M0. The bias voltage generation circuit 230 is also connected to the bias current supply circuit 100 through the transmission switch circuit 240. When the transmission switch circuit 240 is in the on state, the bias voltage generation circuit 230 receives the bias current output by the bias current supply circuit 100 and generates a bias voltage between the gate and the first terminal of the MOSFET M0, thereby turning on the MOSFET M0.

[0043] The bias current providing circuit 100 is used to provide a stable bias current, which is used to control the operating state of the MOSFET M0 in the switching resistor unit 200. The bias current providing circuit 100 can be a circuit that can generate and output bias current based on a given voltage, or it can be a current source that can directly output current.

[0044] The transmission switch circuit 240 has an on state and an off state. In a specific implementation, the on state and off state of the transmission switch circuit 240 can be controlled by a device such as a controller that can provide control signals. For example, the controller outputs a corresponding control signal to the transmission switch circuit 240 according to the resistance adjustment requirement, so that the transmission switch circuit 240 is in the on state or the off state.

[0045] When the transmission switch circuit 240 is in the ON state, current is allowed to flow. Based on the bias current, the bias voltage generation circuit 230 generates a bias voltage between the gate and the first terminal of the MOSFET M0. This bias voltage causes the MOSFET M0 to enter the ON state, thereby allowing current to flow through the path composed of the first resistor component 210, the MOSFET M0, and the second resistor component 220. At this time, the equivalent resistance value of the switching resistor unit 200 is mainly determined by the on-resistance of the MOSFET M0 and the parallel resistance value of the first resistor component 210 and the second resistor component 220.

[0046] During this stage, the on-resistance of MOSFET M0 is very small, the voltage drop generated by the load current flowing through MOSFET M0 is very small, and the VDS (voltage between the drain and source) of MOSFET M0 is usually not overvoltage, so this circuit can also be used in high current circuits.

[0047] When the transmission switch circuit 240 is in the off state, the bias current transmission path is broken. No bias current flows through the bias voltage generation circuit 230, and at this time, there is no bias voltage between the gate and the first terminal of the MOSFET M0, so the MOSFET M0 enters the off state. Because the load current can only flow from the current inflow port to the current outflow port through the first resistor component 210, the resistance value of the switching resistor unit 200 is mainly determined by the first resistor component 210.

[0048] During this stage, since no current flows through the bias voltage generation circuit 230, the gate-source voltage VGS of MOSFET M0 is equal to 0, thus preventing VGS of MOSFET M0 from being overvoltaged.

[0049] This circuit is applicable to any PIN+ terminal voltage (VPIN+). For different VPIN+, this circuit can generate a suitable gate control voltage for MOSFET M0, so that the on-resistance of MOSFET M0 is small enough and the gate-source voltage is not overvoltage.

[0050] The aforementioned switched resistor circuit can control the on / off state of the MOSFET M0, which acts as a switch, through bias current control. By precisely controlling the switching state of MOSFET M0, the resistance value of the switched resistor unit 200 can be adjusted in real time, thus achieving precise adjustment of the resistance value of the switched resistor circuit. When this switched resistor circuit is used in DML, precise control of the resistance value of the switched resistor circuit can achieve output impedance matching of the DML, thereby improving signal transmission quality and ultimately enhancing DML performance.

[0051] It should be noted that when this switching resistor circuit is used in a low-speed circuit, a high-voltage MOSFET M0 can be used. However, the MOSFET switching circuit controls the on / off state of the MOSFET by controlling the gate-source voltage VGS. As the current flows, the size of the MOSFET and its parasitic capacitance also increase. Parasitic capacitance can cause signal delay, attenuation, and reflection, thus affecting the stability and transmission performance of the circuit.

[0052] Therefore, when applied in high-speed circuits, the MOSFET M0 used as the switch in the switching resistor circuit can be a low-voltage MOSFET. Since low-voltage MOSFETs have relatively small parasitic capacitance, the impact of parasitic capacitance on high-speed signal transmission can be significantly reduced, thereby improving the performance of high-speed circuits. Furthermore, for different PIN+ terminal voltages, this circuit can generate a suitable gate control voltage for the low-voltage MOSFET M0, ensuring that the on-resistance of the low-voltage MOSFET M0 is sufficiently small and the gate-source voltage is not excessive. Therefore, this circuit is minimally limited by the power supply voltage VDD and is suitable for high power supply voltage scenarios.

[0053] In one embodiment, the first resistor assembly 210 includes a resistor R1, the first end of which is connected to the first terminal of the MOSFET M0, and the second end of which is connected to the second resistor assembly 220.

[0054] The second resistor assembly 220 includes a resistor R2, the first end of which is connected to the second terminal of the MOSFET M0, and the second end of which is connected to the second end of the resistor R1.

[0055] In other embodiments, the first resistor component 210 and the second resistor component 220 may also be obtained by multiple resistors connected in series or in parallel, or implemented by other equivalent circuits.

[0056] In one embodiment, the bias voltage generation circuit 230 may include a bias resistor R0. The first end of the bias resistor R0 is connected to both the gate of the MOSFET M0 and the transfer switch circuit 240, and the second end of the bias resistor R0 is connected to the first terminal of the MOSFET M0. When the transfer switch circuit 240 is on, the bias resistor R0 generates a suitable voltage drop between the gate and source of the MOSFET M0 according to the bias current, thus turning on the MOSFET M0. When the transfer switch circuit 240 is off, the current flowing through the bias resistor R0 is zero, the voltage difference across the bias resistor R0 is zero, and the MOSFET M0 is off.

[0057] In one embodiment, such as Figure 3 As shown, the bias current supply circuit 100 includes a bias current generation unit 110 and a current transmission unit 120.

[0058] The bias current generating unit 110 is used to generate and output bias current.

[0059] The magnitude and direction of the bias current generated by the bias current generation unit 110 need to be designed based on the parameters of the MOSFET M0 and the bias voltage generation circuit 230. Figure 3 In the illustrated embodiment, the bias current needs to flow from the PIN+ terminal through the bias resistor R0 to generate a voltage drop across the bias resistor R0. The magnitude of the bias current needs to ensure that the voltage drop generated by the bias resistor R0 is less than or equal to the withstand voltage of the MOSFET M0.

[0060] The current transmission unit 120 is connected to the bias current generation unit 110 and the transmission switch circuit 240 respectively. The current transmission unit 120 is used to transmit the bias current to the transmission switch circuit 240.

[0061] The current transmission unit 120 is used to stably transmit the bias current output by the bias current generation unit 110 to the transmission switch circuit 240 so that the voltage drop generated by the bias resistor R0 is reliably stable.

[0062] In this embodiment, through the coordinated operation of the bias current generating unit 110 and the current transmission unit 120, a stable bias current is provided to the transmission switching circuit 240, making the bias voltage generated by the bias voltage generating circuit 230 more stable and reliable, thereby improving the reliability of the state of the MOS transistor M0, and further improving the reliability of the switching resistor unit 200 in adjusting the resistance value.

[0063] In one embodiment, such as Figure 4 As shown, the bias current generating unit 110 includes an operational amplifier A0, a third resistor assembly 111, a fourth resistor assembly 112, a first reference transistor M1, and a second reference transistor M2.

[0064] The inverting input of operational amplifier A0 is used to connect to the reference voltage Vref. The non-inverting input of operational amplifier A0 is connected to the first terminal of the third resistor assembly 111, the first terminal of the fourth resistor assembly 112, and the gate of the first reference transistor M1. The first terminal of the first reference transistor M1 is connected to the second terminal of the second reference transistor M2, and the second terminal of the first reference transistor M1 is connected to the second terminal of the fourth resistor assembly 112. The first terminal of the second reference transistor M2 is used to connect to the power supply voltage VDD, and the gate of the second reference transistor M2 is connected to the output terminal of operational amplifier A0. The second terminal of the third resistor assembly 111 is grounded.

[0065] The types of the first reference transistor M1 and the second reference transistor M2 can be selected according to specific circumstances. For example, the first reference transistor M1 and the second reference transistor M2 can be PMOS transistors, with the source of the PMOS transistor serving as the first terminal and the drain serving as the second terminal.

[0066] For example, the third resistor assembly 111 may include resistor R3, with its first end connected to the non-inverting input of operational amplifier A0 and its second end grounded. The fourth resistor assembly 112 may include resistor R4, with its first end connected to the non-inverting input of operational amplifier A0 and its second end connected to the drain of the first reference transistor M1. In other embodiments, the third resistor assembly 111 and the fourth resistor assembly 112 may also be obtained by connecting multiple resistors in series or in parallel, or implemented by other equivalent circuits.

[0067] The reference voltage Vref can be provided by an external voltage source, or a separate reference voltage generation circuit can be set up to generate the reference voltage Vref. This embodiment does not limit this.

[0068] In this embodiment, the first reference transistor M1, the second reference transistor M2, and the resistor R4 form a negative feedback loop 1. The function of the negative feedback loop 1 is to ensure that the voltage difference across the resistor R3 is stably equal to the reference voltage Vref. Since the PMOS transistor has relatively good temperature characteristics, this helps improve the temperature stability of the entire current source. By appropriately setting the resistance value of R3 or adjusting the value of the reference voltage Vref, the magnitude of the generated bias current can be flexibly adjusted. The structural design of this bias current generation unit 110 not only improves the accuracy and stability of the current source but also provides flexible current adjustment functionality. The circuit structure is simple and the cost is low.

[0069] In one embodiment, the current transmission unit 120 includes a transmission circuit 121, a first output transistor M3, and a second output transistor M4.

[0070] The gate of the first output transistor M3 is connected to the gate of the first reference transistor M1. The first terminal of the first output transistor M3 is connected to the second terminal of the second output transistor M4. The second terminal of the first output transistor M3 is used to connect to the transmission switch circuit 240 through the transmission circuit 121. The first terminal of the second output transistor M4 is connected to the first terminal of the second reference transistor M2. The gate of the second output transistor M4 is connected to the gate of the second reference transistor M2.

[0071] The first output transistor M3 and the second output transistor M4 can be PMOS transistors. The first output transistor M3, the second output transistor M4, the fourth resistor assembly 112, the first reference transistor M1, and the second reference transistor M2 form the first current mirror circuit.

[0072] A current mirror circuit is a current control circuit that includes a reference-side circuit and an output-side circuit. The output-side circuit generates the required output current by replicating the reference current of the reference-side circuit. By properly configuring the transistors in the reference-side and output-side circuits, such as having the same size and manufacturing process, the current matching degree between them can be improved, making the current ratio at both ends close to 1:1.

[0073] Specifically, in the first current mirror circuit, the first reference transistor M1, the second reference transistor M2, and the resistor R4 constitute the reference side circuit of the first current mirror circuit, which serves to provide the reference current (i.e., the bias current). The first output transistor M3 and the second output transistor M4 constitute the output side circuit, which is used to generate an output current of equal magnitude based on the reference current.

[0074] In this embodiment, by setting the first output transistor M3 and the second output transistor M4, together with the resistor R4, the first reference transistor M1 and the second reference transistor M2 in the bias current generating unit 110, a first current mirror circuit is formed. This circuit can accurately transmit the bias current generated by the bias current generating unit 110 to the transmission switch circuit 240 through the transmission circuit 121, thereby improving the accuracy and stability of current transmission and increasing the efficiency of current transmission.

[0075] In one embodiment, the transmission circuit 121 is the reference side circuit of the second current mirror circuit; the transmission switch circuit 240 includes the output side circuit 241 of the second current mirror circuit and the switch unit 242, and the output side circuit 241 of the second current mirror circuit is connected to the bias voltage generation circuit 230.

[0076] The switching unit 242 is connected between the reference side circuit 121 of the second current mirror circuit and the output side circuit 241 of the second current mirror circuit.

[0077] When the switching unit 242 connects the output side circuit 241 of the second current mirror circuit to the reference side circuit 121 of the second current mirror circuit, the output side circuit 241 of the second current mirror circuit and the reference side circuit 121 of the second current mirror circuit constitute the second current mirror circuit.

[0078] The transmission switch circuit 240 being in the ON state means that the switching unit 242 connects the output side circuit 241 of the second current mirror circuit to the reference side circuit 121 of the second current mirror circuit. The transmission switch circuit 240 being in the OFF state means that the switching unit 242 disconnects the connection between the output side circuit 241 of the second current mirror circuit and the reference side circuit 121 of the second current mirror circuit.

[0079] When the switching unit 242 connects the reference-side circuit 121 and the output-side circuit 241 of the second current mirror circuit, the reference-side circuit 121 and the output-side circuit 241 of the second current mirror circuit form a complete second current mirror circuit. In this state, the bias current received by the reference-side circuit 121 of the second current mirror circuit from the output-side circuit of the first current mirror circuit can be replicated to the output-side circuit. That is, the output-side circuit 241 of the second current mirror circuit outputs an output current proportional to the bias current (e.g., 1:1). This output current is then received by the bias voltage generation circuit 230, which generates the required bias voltage between the gate and source of the MOSFET M0, turning on the MOSFET M0.

[0080] When the switching unit 242 disconnects the connection between the reference side circuit 121 and the output side circuit 241 of the second current mirror circuit, the second current mirror circuit is disconnected, its output side circuit no longer generates output current, the bias voltage generation circuit 230 can no longer receive current to generate bias voltage, and the MOS transistor M0 is turned off.

[0081] In this embodiment, the transmission circuit 121 is not only responsible for current transmission, but also serves as the reference side circuit of the second current mirror circuit. When the switching unit 242 turns on the reference side circuit 121 and the output side circuit of the second current mirror circuit, the second current mirror circuit is formed to accurately transmit the bias current. At the same time, the switching unit 242 can control the on / off state of the MOSFET M0, thereby realizing the adjustment of the resistance value of the switching resistor unit 200.

[0082] In one embodiment, the reference-side circuit 121 of the second current mirror circuit includes a fifth resistor assembly 1211, a third reference transistor M5, and a fourth reference transistor M6. The first terminal of the fifth resistor assembly 1211 is connected to the first terminal of the first output transistor M3 and the gate of the third reference transistor M5, respectively. The second terminal of the fifth resistor assembly 1211 is connected to the first terminal of the third reference transistor M5 and the gate of the fourth reference transistor M6, respectively. The second terminal of the third reference transistor M5 is connected to the first terminal of the fourth reference transistor M6, and the second terminal of the fourth reference transistor M6 is grounded.

[0083] The output side circuit 241 of the second current mirror circuit includes a third output transistor M7 and a fourth output transistor M8. The first terminal of the third output transistor M7 is connected to the bias voltage generation circuit 230, and the second terminal of the third output transistor M7 is connected to the first terminal of the fourth output transistor M8. The second terminal of the fourth output transistor M8 is grounded. The gate of the third output transistor M7 is connected to the gate of the third reference transistor M5, and the gate of the fourth output transistor M8 is connected to the gate of the fourth reference transistor M6 through the switching unit 242.

[0084] Among them, the third reference transistor M5, the fourth reference transistor M6, the third output transistor M7, and the fourth output transistor M8 can be NMOS transistors, with the drain of the NMOS transistor serving as the first terminal and the source serving as the second terminal.

[0085] The fifth resistor assembly 1211 may include a resistor R5, with its first end serving as the first end of the fifth resistor assembly 1211 and its second end serving as the second end of the fifth resistor assembly 1211. In other embodiments, the fifth resistor assembly 1211 may also be obtained by connecting multiple resistors in series or in parallel, or implemented by other equivalent circuits.

[0086] In this embodiment, the second current mirror circuit is a common-source cascode current mirror. The common-source cascode current mirror can ensure high current copying accuracy, making the bias current transmitted to the bias voltage generation circuit 230 more accurate, thereby improving the accuracy of MOSFET state control.

[0087] It is understood that the second current mirror circuit described above can also take other forms, and is not limited to the forms already mentioned in the above embodiments, as long as it can achieve the function of mirroring the bias current.

[0088] In one embodiment, the switching unit 242 includes a first switch SW1 and a second switch SW2. The first switch SW1 is connected between the output side circuit 241 of the second current mirror and the reference side circuit 121 of the second current mirror. The first end of the second switch SW2 is connected to the output side circuit 241 of the second current mirror, and the second end of the second switch SW2 is grounded.

[0089] The output terminals of the first switch SW1 and the second switch SW2 can be connected to a control device capable of outputting control signals. There is no specific limitation, and those skilled in the art can set it according to the actual situation.

[0090] Specifically, the first switch SW1 can be connected between the gate of the fourth output transistor M8 and the gate of the fourth reference transistor M6. When the first switch SW1 is closed, it allows signal transmission between the output side circuit and the reference side circuit of the second current mirror circuit, thereby maintaining the proportional relationship of the current mirror.

[0091] The first terminal of the second switch SW2 is connected to the gate of the fourth output transistor M8, and the second terminal is grounded. When the second switch SW2 is closed, it pulls the gate of the fourth output transistor M8 to ground potential, turning it off, so that the current flowing through the bias voltage generation circuit 230 is 0.

[0092] In this embodiment, when the first switch SW1 is closed and the second switch SW2 is open, the output side circuit 241 of the second current mirror circuit and the reference side circuit 121 of the second current mirror circuit form a current mirror, so that a bias current flows through the bias resistor R0, and a voltage difference is generated across the bias resistor R0 to turn on the MOS transistor MO.

[0093] When the first switch SW1 is open and the second switch SW2 is closed, the current flowing through the bias resistor R0 is 0, the voltage difference across the bias resistor R0 is 0, and the MOSFET MO is turned off.

[0094] In this embodiment, by setting the first switch SW1 and the second switch SW2, precise control of the operating state of the second current mirror circuit can be achieved. When the MOSFET M0 is not required to be turned on, the current mirror function can also be disconnected, reducing power consumption.

[0095] In one embodiment, the switching resistor unit 200 further includes a capacitor C0 connected between the first terminal and the gate of the MOSFET M0.

[0096] In this embodiment, capacitor C0 can prevent the gate-source voltage VGS of MOSFET M0 from fluctuating too much when there are large signal fluctuations at the PIN+ and PIN- terminals, thereby improving the stability of MOSFET M0 and thus enhancing the stability and anti-interference capability of the circuit.

[0097] To better understand the above embodiments, a detailed explanation is provided below with reference to a specific embodiment. In one embodiment, the switched resistor circuit refers to... Figure 4 set up.

[0098] Among them, MOSFET M0 is a low-voltage MOSFET, which acts as a switch. Transistors M1-M8 are high-voltage MOSFETs. In order to prevent the low-voltage MOSFET M0 from having an overvoltage gate-source voltage VGS, transistors M1-M8, bias resistors R0, R3, R4, and R5, operational amplifier A0, first switch SW1, and second switch SW2 are introduced to generate VGS for the low-voltage MOSFET M0.

[0099] Transistors M5-M8 and resistor R5 form a second current mirror circuit. When the first switch SW1 is open and the second switch SW2 is closed, the mirror current flows through the bias resistor R0 to generate a voltage difference, and the low-voltage MOSFET M0 is turned on. When the first switch SW1 is closed and the second switch SW2 is open, the current flowing through the bias resistor R0 is 0, the voltage difference across the bias resistor R0 is 0, and the low-voltage MOSFET M0 is turned off.

[0100] Transistors M1-M4 and resistor R4 form the first current mirror circuit. The reference voltage Vref can be lower than the withstand voltage of the low-voltage MOSFET M0. In the bias current generation unit 110, loop 1 can make the voltage difference across resistor R3 equal to the reference voltage Vref. Assuming the current flowing through resistor R3 is I1, then Vref = R3 * I1 (where R3 represents the resistance value of resistor R3). The replication ratio of the first current mirror circuit and the second current mirror circuit is 1:1, so the current flowing through bias resistor R0 is also I1. Since the resistance value of resistor R3 is set equal to that of bias resistor R0, when the low-voltage MOSFET M0 is turned on, the voltage difference across bias resistor R0 (i.e., VGS) is equal to Vref; when the low-voltage MOSFET M0 is turned off, the voltage difference across bias resistor R0 (i.e., VGS) is equal to 0, thus preventing VGS of the low-voltage MOSFET M0 from exceeding the voltage limit.

[0101] This circuit is applicable to any PIN+ terminal voltage (VPIN+). For different VPIN+ values, this circuit can generate a suitable gate control voltage for the low-voltage MOSFET M0, ensuring that the on-resistance of the low-voltage MOSFET M0 is sufficiently small and the gate-source voltage is not overvoltage. Meanwhile, the branch formed by the bias resistor R0, the third output transistor M7, and the fourth output transistor M8 is a high-impedance path, and its influence on the resistance value of the switching resistor unit 200 is negligible.

[0102] When the low-voltage MOSFET M0 is turned on, its on-resistance is very small, and the voltage drop caused by the load current flowing through it is also very small. The drain-source voltage VDS of M0 is typically not overvoltage. When M0 is turned off, the voltage drop across resistor R1 is VR1. The value of resistor R1 needs to be chosen such that VR1 is less than the source-drain overvoltage breakdown voltage of M0. Simultaneously, resistor R1 limits the maximum resistance along this path. Resistor R2 limits the minimum adjustable resistance between pin+ and pin-.

[0103] This switching resistor circuit uses a low-voltage MOSFET, which occupies a small area. This structure can be applied to resistor switching scenarios with high power supply voltage (such as 2.5V or 3.3V) and high current, making it widely applicable.

[0104] In one embodiment, an electrical device is also provided, comprising any of the switching resistor circuits provided in the above embodiments.

[0105] The electrical equipment can be a direct-modulation laser or other equipment including high-speed signal interface circuits, high-speed data transmission circuits, etc.

[0106] Since the electrical device includes the switching resistor circuit provided in the embodiments of the present invention, the electrical device also has the beneficial effects of the switching resistor circuit in the above embodiments. The similarities can be understood by referring to the explanation of the switching resistor circuit above, and will not be repeated below.

[0107] In the description of this specification, references to terms such as "some embodiments," "other embodiments," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0108] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0109] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and improvements all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A switched resistance circuit, characterized by, The application relates to a bias current providing circuit and at least one switch resistance unit; wherein the switch resistance unit comprises a first resistance component, a second resistance component, a MOS tube, a bias voltage generating circuit and a transmission switch circuit; a first pole of the MOS tube is connected to a first end of the first resistance component, a common end connected with the first resistance component is used for connecting a current inflow port; a second pole of the MOS tube is connected to a second end of the first resistance component through the second resistance component, a common end connected with the first resistance component is used for connecting a current outflow port; the bias voltage generating circuit is arranged between a gate and the first pole of the MOS tube, and the bias voltage generating circuit is connected with the bias current providing circuit through the transmission switch circuit; In the case that the transmission switch circuit is in an on state, the bias voltage generating circuit receives the bias current output by the bias current providing circuit, and generates a bias voltage between the gate and the first pole of the MOS tube, so that the MOS tube is turned on; The bias current providing circuit comprises a bias current generating unit and a current transmission unit; the bias current generating unit is used for generating and outputting a bias current; the current transmission unit is connected with the bias current generating unit and the transmission switch circuit respectively, and is used for transmitting the bias current to the transmission switch circuit; the bias current generating unit comprises an operational amplifier, a third resistance component, a fourth resistance component, a first reference end transistor and a second reference end transistor; an inverting input end of the operational amplifier is used for connecting a reference voltage, a non-inverting input end of the operational amplifier is connected with a first end of the third resistance component, a first end of the fourth resistance component and a gate of the first reference end transistor respectively, a second end of the third resistance component is grounded, a first pole of the first reference end transistor is connected with a second pole of the second reference end transistor, and a second pole of the first reference end transistor is connected with a second end of the fourth resistance component; a first pole of the second reference end transistor is used for connecting a power supply voltage, and a gate of the second reference end transistor is connected with an output end of the operational amplifier; the current transmission unit comprises a first output end transistor, a second output end transistor and a transmission circuit; the first output end transistor, the second output end transistor, the fourth resistance component, the first reference end transistor and the second reference end transistor constitute a first current mirror circuit; a gate of the first output end transistor is connected with a gate of the first reference end transistor, a first pole of the first output end transistor is connected with a second pole of the second output end transistor, and a second pole of the first output end transistor is connected with the transmission switch circuit through the transmission circuit; a first pole of the second output end transistor is connected with a first pole of the second reference end transistor, and a gate of the second output end transistor is connected with a gate of the second reference end transistor. ​ The transmission circuit is a reference side circuit of a second current mirror circuit; the transmission switch circuit comprises an output side circuit of the second current mirror circuit and a switch unit, the output side circuit of the second current mirror circuit is connected to the bias voltage generation circuit; the switch unit is connected between the reference side circuit of the second current mirror circuit and the output side circuit of the second current mirror circuit; when the switch unit connects the output side circuit of the second current mirror circuit to the reference side circuit of the second current mirror circuit, the output side circuit of the second current mirror circuit and the reference side circuit of the second current mirror circuit constitute a second current mirror circuit.

2. The switch resistance circuit according to claim 1, wherein The reference side circuit of the second current mirror circuit comprises a fifth resistance component, a third reference terminal transistor and a fourth reference terminal transistor, the first end of the fifth resistance component is connected to the second electrode of the first output terminal transistor and the gate of the third reference terminal transistor respectively, the second end of the fifth resistance component is connected to the first electrode of the third reference terminal transistor and the gate of the fourth reference terminal transistor respectively, the second electrode of the third reference terminal transistor is connected to the first electrode of the fourth reference terminal transistor, and the second electrode of the fourth reference terminal transistor is grounded; The output side circuit of the second current mirror circuit comprises a third output terminal transistor and a fourth output terminal transistor, the first electrode of the third output terminal transistor is connected to the bias voltage generation circuit, the second electrode of the third output terminal transistor is connected to the first electrode of the fourth output terminal transistor, the second electrode of the fourth output terminal transistor is grounded, the gate of the third output terminal transistor is connected to the gate of the third reference terminal transistor, and the gate of the fourth output terminal transistor is connected to the gate of the fourth reference terminal transistor through the switch unit.

3. The switched resistor circuit of claim 1, wherein, The switch unit comprises a first switch and a second switch, the first switch is connected between the output side circuit of the second current mirror circuit and the reference side circuit of the second current mirror circuit, and the first end of the second switch is connected to the output side circuit of the second current mirror circuit, and the second end of the second switch is grounded.

4. The switched resistor circuit of claim 1, wherein, The MOS transistor is a PMOS transistor or an NMOS transistor.

5. Switched resistor circuit according to any of claims 1-4, characterized in that, The switch resistance unit further comprises a capacitor, and the capacitor is connected between the first electrode and the gate of the MOS transistor.

6. The switched resistor circuit of claim 5, wherein, The bias voltage generation circuit comprises a bias resistance, and the bias resistance is connected between the first electrode and the gate of the MOS transistor.

7. An electric device, characterized by The switch resistance circuit comprises the switch resistance circuit according to any one of claims 1-6.

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