Microcontroller and method for executing over-the-air firmware update

By using management circuits in the microcontroller to map the first or second programming codes to the system memory space according to the recorded value, the problem of firmware addressing in bare metal systems is solved, and the function of updating firmware over the air is realized, saving costs and simplifying operations .

CN119311613APending Publication Date: 2025-01-14NUVOTON
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Patent Information

Application Number
CN202311741754.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-07-12
Filing Date
2023-12-15
Publication Date
2025-01-14

AI Technical Summary

Technical Problem

In bare metal systems or operating systems that do not support target code re-addressing, firmware must be addressed within compile time, resulting in increased programming code size and extended execution time, and existing execution address-independent code technologies may increase costs.

Method used

By including management circuits in the microcontroller, receiving access instructions using the bus, reading recorded values, and mapping the first or second programming code to the system memory space according to the preset values, avoiding the use of execution address-independent code technology, and realizing The function of the firmware update over the air.

Benefits of technology

It realizes the function of saving compilation and management costs without increasing the programming code size and execution time, and supports the function of updating firmware over the air, simplifying the operation of the control circuit.

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Abstract

The invention provides a microcontroller and a method for executing firmware update over the air. The microcontroller accesses an external memory. The external memory stores a first programming code and a second programming code. The microcontroller comprises a bus, a control circuit and a management circuit. The control circuit sends an access instruction to the bus. The management circuit receives the access instruction through the bus and reads a record value. When the record value accords with a preset value, the management circuit maps the first programming code to a specified mapping storage space of a system memory space. When the recorded value does not accord with the preset value, the management circuit maps the second programming code to a specified mapping storage space.
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Description

Technical Field

[0001] The present invention relates to a microcontroller, and more particularly to a microcontroller for executing an over-the-air (OTA) firmware update. Background Art

[0002] In a bare-metal system or an operating system (OS) that does not support object code relocation, the firmware (hereinafter referred to as F / W) must be addressed to the pre-planned execution address during compiling time. Although the compiler's position independent code / data technology can avoid the above addressing problem, it may increase the size of the programming code and increase the execution time. Summary of the invention

[0003] An embodiment of the present invention provides a microcontroller for performing over-the-air firmware update, accessing an external memory. The external memory stores a first programming code and a second programming code. The microcontroller includes a bus, a control circuit, and a management circuit. The control circuit issues an access instruction to the bus. The management circuit receives the access instruction through the bus and reads a record value. When the record value meets a preset value, the management circuit maps the first programming code to a designated mapping storage space in a system memory space. When the record value does not meet the preset value, the management circuit maps the second programming code to the designated mapping storage space.

[0004] The present invention further provides a management method for executing an over-the-air firmware update, which is used to access an external memory. The external memory stores a first programming code and a second programming code. The management method includes: interpreting an access instruction; reading a record value according to the access instruction; when the record value meets a preset value, mapping the first programming code to a designated mapping storage space in a system memory space; and when the record value does not meet the preset value, mapping the second programming code to the designated mapping storage space.

[0005] The management method of the present invention can be implemented via the microcontroller of the present invention, which is hardware or firmware that can execute the specified function, or can be recorded in a recording medium in the form of programming code and implemented in combination with the specified hardware. When the programming code is loaded and executed by the electronic device, processor, computer or machine, the electronic device, processor, computer or machine becomes a microcontroller for implementing the present invention.

[0006] The microcontroller and management method of the present invention do not need to use the position independent code / data execution technology, and can save compilation and management costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 It is a schematic diagram of the operating system of the present invention.

[0008] Figure 2A and Figure 2B FIG. 4 is a schematic diagram of a system memory space of the present invention.

[0009] Figure 3 The present invention is a flow chart of the management method.

[0010] Reference numerals:

[0011] 100: Operating System

[0012] 110: Microcontroller

[0013] 120: External memory

[0014] 111: Control circuit

[0015] 112: Bus

[0016] 113: Management Circuit

[0017] 114: Memory

[0018] 115: Cache memory

[0019] 116: Transmission interface

[0020] 121~123: Storage blocks

[0021] IMA, IMB, IMC, IMD: Programming code

[0022] RCD: Record value

[0023] 200: System memory space

[0024] 210~230: Mapped storage space

[0025] AD_0, AD_N, 0x10000: execution address

[0026] S311~315: Steps DETAILED DESCRIPTION

[0027] In order to make the purpose, features and advantages of the present invention more obvious and easy to understand, the following embodiments are specifically cited and described in detail with the accompanying drawings. The present invention specification provides different embodiments to illustrate the technical features of different implementations of the present invention. Among them, the configuration of each element in the embodiment is for illustrative purposes and is not intended to limit the present invention. In addition, the figure numbers in the embodiments are partially repeated for the purpose of simplifying the description, and do not mean the correlation between different embodiments.

[0028] Figure 1 Schematic diagram of the operating system of the present invention. The operating system 100 includes a microcontroller (MCU) 110 and an external memory 120. As shown in the figure, the external memory 120 is independent of the microcontroller 110. The present invention does not limit the type of the external memory 120. In this embodiment, the external memory 120 is a non-volatile memory. For example, the external memory 120 is a flash memory.

[0029] The external memory 120 stores programming codes IMA and IMB. The programming codes IMA and IMB may be referred to as images. In one possible embodiment, the external memory 120 has storage blocks 121 and 122. Storage block 121 stores programming code IMA. Storage block 122 stores programming code IMB. In another possible embodiment, programming codes IMA and IMB are stored in the same storage block, such as storage block 121. In this example, programming code IMB is stored successively after programming code IMA. In some embodiments, one of programming codes IMA and IMB is a new version programming code, and the other is an old version programming code.

[0030] The microcontroller 110 accesses the external memory 120 and performs an over-the-air firmware update operation. In one embodiment, the microcontroller 110 includes a control circuit 111, a bus 112, and a management circuit 113. The bus 112 is coupled between the control circuit 111 and the management circuit 113 and is responsible for data transmission between the control circuit 111 and the management circuit 113.

[0031] The control circuit 111 issues an access instruction to the bus 112. The present invention does not limit the type of the control circuit 111. In a possible embodiment, the control circuit 111 is a central processing unit (CPU), a direct memory access (DMA) controller or an encryption circuit.

[0032] The management circuit 113 receives the access instruction through the bus 112. In one embodiment, the management circuit 113 interprets the access instruction to obtain an access execution address. When the access execution address points to the external memory 120, the management circuit 113 enters a direct memory mapping mode. In the direct memory mapping mode, the management circuit 113 reads a record value RCD and accesses the external memory 120 according to the record value RCD.

[0033] In one possible embodiment, the management circuit 113 compares the recorded value RCD with a preset value. When the recorded value RCD meets the preset value, the management circuit 113 maps the programming code IMA to a designated mapped memory space of a system memory space. When the recorded value RCD does not meet the preset value, the management circuit 113 maps the programming code IMB to the designated mapped memory space.

[0034] The control circuit 111 executes the programming code in the designated mapping memory space. Since different programming codes IMA and IMB of the external memory 120 are mapped in the same designated mapping memory space, the control circuit 111 can execute different programming codes at the same execution address. For example, when the programming code IMA is mapped to the designated mapping memory space, the control circuit 111 executes the programming code IMA. When the programming code IMB is mapped to the designated mapping memory space, the control circuit 111 executes the programming code IMB.

[0035] The present invention does not limit the storage location of the recorded value RCD. In one possible embodiment, the microcontroller 110 further includes a memory 114. The memory 114 stores the recorded value RCD. In this example, the memory 114 is a non-volatile memory. In another embodiment, the recorded value RCD is stored outside the microcontroller 110. For example, the recorded value RCD may be stored in the external memory 120. In this example, the external memory 120 has a storage block 123 for storing the recorded value RCD.

[0036] In some embodiments, the microcontroller 110 further includes a cache 115. The cache 115 is used to temporarily store the programming code IMA or IMB from the external memory 120. Since part of the programming code is stored in the microcontroller 110, the efficiency of the microcontroller 110 can be increased.

[0037] In other embodiments, the microcontroller 110 further includes a transmission interface 116. The transmission interface 116 is coupled between the management circuit 113 and the external memory 120. In this example, the management circuit 113 accesses the external memory 120 through the transmission interface 116. In one possible embodiment, the management circuit 113 uses a direct memory access (DMA) technology to access the external memory 120. The present invention does not limit the type of the transmission interface 116. In one possible embodiment, the transmission interface 116 is a serial peripheral interface (SPI).

[0038] The present invention does not limit the number of programming codes of the external memory 120. The external memory 120 may store more programming codes. In this example, different programming codes represent different versions of update files. Assume that the external memory 120 stores a first programming code, a second programming code, and a third programming code. The first, second, and third programming codes may be stored in different storage blocks, respectively, or in the same storage block. In this example, when the record value RCD meets a first preset value, the management circuit 113 maps the first programming code to a designated mapping storage space of a system memory space. When the record value RCD meets a second preset value, the management circuit 113 maps the second programming code to the same designated mapping storage space. When the record value RCD meets a third preset value, the management circuit 113 maps the third programming code to the same designated mapping storage space.

[0039] Figure 2A and Figure 2B Schematic diagram of the system memory space of the present invention. As shown in the figure, the system memory space 200 includes mapping storage spaces 210-230. The present invention does not limit the number of mapping storage spaces. In other embodiments, the system memory space 200 includes more mapping storage spaces. For the convenience of explanation, it is assumed that the external memory 120 stores the record value RCD.

[0040] When the control circuit 111 wants to execute the programming code of the mapped storage space 220, the control circuit 111 issues an access instruction. The management circuit 113 interprets the access instruction to obtain an execution address information. When the execution address information points to the external memory 120, the management circuit 113 maps the programming code IMA or IMB to the mapped storage space 220 according to the record value RCD. In a possible embodiment, the record value RCD points to the new version of the programming code.

[0041] In a possible embodiment, when the record value RCD meets a preset value (such as a value of 0), it indicates that the programming code IMA is a new version of F / W. Therefore, the management circuit 113 starts from the execution address AD_0 of the external memory 120 to retrieve the programming code IMA. The management circuit 113 maps the programming code IMA to the mapping storage space 220. Therefore, the control circuit 111 can start from the starting execution address 0x10000 of the mapping storage space 220 to execute the programming code IMA.

[0042] In some embodiments, the control circuit 111 modifies the programming code IMA of the mapped storage space 220 to generate a new programming code IMC. The management circuit 113 writes the programming code IMC back to the external memory 120 according to the record value RCD to replace the old version of F / W. Figure 2A In the example, since the record value RCD meets the preset value (such as 0), the management circuit 113 writes the programming code IMC back to the storage block 122 to replace the programming code IMB. Since the starting execution address of the storage block 122 is AD_N, the management circuit 113 writes the programming code IMC to the storage block 122 starting from the execution address AD_N.

[0043] In other embodiments, the management circuit 113 downloads the new programming code IMC using an over the air (OTA) method. In this example, after the management circuit 113 downloads and verifies the new programming code IMC, it writes the new programming code into the external memory 120 according to the record value RCD. Figure 2A In the example, since the recorded value RCD meets the preset value (such as 0), the management circuit 113 replaces the programming code IMB with the new programming code IMC. The management circuit 113 starts from the execution address AD_N and writes the new programming code to the storage block 122. In some embodiments, the management circuit 113 uses OTA to download the programming code IMB and stores the programming code IMB in the storage block 122.

[0044] exist Figure 2B In the example, since the record value RCD is a value of 1, which does not match a preset value (such as a value of 0), the management circuit 113 starts from the execution address AD_N of the external memory 120 and retrieves the programming code IMB. In this example, the programming code IMB is the new version F / W, and the programming code IMA is the old version F / W. The management circuit 113 maps the programming code IMB to the mapping storage space 220. The control circuit 111 starts from the starting execution address 0x10000 of the mapping storage space 220 and executes the programming code IMB.

[0045] In some embodiments, the control circuit 111 modifies the programming code IMB of the mapped storage space 220 to generate a new programming code IMD. The management circuit 113 writes the programming code IMD back to the external memory 120 according to the record value RCD. Figure 2B In the example, the recorded value RCD is 1, which does not match the preset value (such as 0). Therefore, the management circuit 113 writes the programming code IMD back to the storage block 121 of the external memory 120 to replace the programming code IMA. In a possible implementation, the starting execution address of the storage block 121 is AD_0. In this example, the management circuit 113 starts from the execution address AD_0 and writes the programming code IMD to the storage block 121.

[0046] In other embodiments, the management circuit 113 uses OTA to download the new programming code IMD. In this example, the management circuit 113 writes the new programming code IMD into the external memory 120 according to the record value RCD. Figure 2B In the example, since the recorded value RCD does not meet the preset value, the management circuit 113 updates the programming code IMA with the new programming code IMD. In this example, the management circuit 113 starts from the execution address AD_0 and writes the new programming code to the storage block 121. In some embodiments, the management circuit 113 downloads the programming code IMA using the OTA method and stores the programming code IMA in the storage block 121.

[0047] Depend on Figure 2A and Figure 2B It can be seen that the programming code IMA of the execution address AD_0 of the external memory 120 and the programming code IMB of the execution address AD_N are mapped in the same designated mapping storage space (such as 220), so the control circuit 111 can start from the same execution address (such as execution address 0x10000) and execute different programming codes, thereby simplifying the operation of the control circuit 111.

[0048] In one possible embodiment, after the management circuit 113 replaces the programming code IMA with the new programming code IMD, the management circuit 113 modifies the record value RCD so that the record value RCD meets the preset value. Therefore, when the control circuit 111 issues a new access instruction, since the record value RCD meets the preset value, the management circuit 113 maps the programming code (such as IMD) of the storage block 121 to the mapping storage space 220.

[0049] Likewise, please refer to Figure 2AAfter the management circuit 113 replaces the programming code IMB with the new programming code IMC, the management circuit 113 modifies the record value RCD so that the record value RCD does not conform to the preset value. Therefore, when the control circuit 111 issues a new access instruction, since the record value RCD does not conform to the preset value, the management circuit 113 maps the programming code (such as IMC) of the storage block 121 to the mapping storage space 220.

[0050] Figure 3 Flow chart of the management method of the present invention. The management method of the present invention is applicable to a microcontroller for performing an over-the-air firmware update operation. The microcontroller accesses an external memory. The external memory stores a first programming code and a second programming code. In a possible embodiment, the external memory is a non-volatile memory. The management method of the present invention can exist through the programming code. When the programming code is loaded and executed by the machine, the machine becomes a microcontroller for implementing the present invention.

[0051] First, an access instruction is interpreted (step S311), and a record value is read according to the access instruction (step S312). In one possible embodiment, the record value is stored in a non-volatile memory. The present invention does not limit the location of the non-volatile memory. The non-volatile memory may be located in the microcontroller. In another possible example, the record value is stored in an external memory.

[0052] Next, it is determined whether the recorded value meets a preset value (step S313). When the recorded value meets a preset value, the external memory is accessed to map the first programming code to a designated mapping storage space of a system memory space (step S314). When the recorded value does not meet the preset value, the external memory is accessed to map the second programming code to the designated mapping storage space (step S315).

[0053] After the first or second programming code is mapped to the designated mapping storage space, a control circuit can start the execution of the designated mapping storage space from the starting address (such as Figure 2A The control circuit executes different programming codes from the same starting execution address, thereby greatly improving the efficiency of the control circuit.

[0054] In some embodiments, the control circuit modifies the programming code of the designated mapping storage space. In this example, the programming code stored in the designated mapping storage space may replace the first or second programming code of the external memory. For example, in step S313, when the recorded value meets the preset value, the first programming code is mapped to the designated mapping storage space. In this example, when the programming code of the designated mapping storage space is modified, the modified first programming code replaces the second programming code of the external memory. In addition, the recorded value will be modified, and the modified recorded value does not meet the preset value, such as being modified from a value of 0 to a value of 1. Similarly, in step S313, if the recorded value does not meet the preset value, the second programming code is mapped to the designated mapping storage space. In this example, when the programming code of the designated mapping storage space is modified, the modified second programming code replaces the first programming code of the external memory. In addition, the recorded value will also be modified, and the modified recorded value meets the preset value, such as being modified from a value of 1 to a value of 0.

[0055] In other embodiments, the microcontroller may download a third programming code using an over-the-air download (OTA) method, and replace the first or second programming code with the third programming code according to the recorded value. For example, when the recorded value meets the preset value, the microcontroller replaces the second programming code with the third programming code, and modifies the recorded value so that the recorded value does not meet the preset value. In another possible embodiment, when the recorded value does not meet the preset value, the microcontroller replaces the first programming code with the third programming code, and modifies the recorded value so that the recorded value meets the preset value.

[0056] In one possible embodiment, the second programming code is continuous with the first programming code. In this case, the first and second programming codes are stored in the same storage block. In another possible embodiment, the first and second programming codes are respectively stored in a first storage block and a second storage block of an external memory. In this case, the first and second storage blocks are continuous or discontinuous blocks. For example, there is at least one storage block between the first and second storage blocks.

[0057] Assume that the first and second programming codes are stored in the first storage block and the second storage block, respectively. The microcontroller may write the programming code of the designated mapped storage space back to the first or second storage block. When the microcontroller writes the programming code of the designated mapped storage space back to the first storage block, the programming code of the designated mapped storage space replaces the first programming code of the first storage block. When the microcontroller writes the programming code of the designated mapped storage space back to the second storage block, the programming code of the designated mapped storage space replaces the second programming code of the second storage block. In this example, the microcontroller writes the programming code of the designated mapped storage space back to the first storage block according to the recorded value. After completing the write operation, the microcontroller changes the recorded value.

[0058] The present invention does not limit how the microcontroller accesses the external memory. In one possible embodiment, the microcontroller uses a direct memory access technique to access the external memory. In other embodiments, the microcontroller has a cache memory for temporarily storing the first or second programming code. In this example, the cache memory may temporarily store part of the first or second programming code.

[0059] For example, the capacity of the cache memory is 1KB. The content of the cache memory is loaded from the external memory. The cache memory is fixed at a specified execution address (such as 0x10000) in the system memory space. In this example, the loader (such as the control circuit 111) sets the mapping of the cache memory according to the record value to execute the programming code 1 or programming code 2 of the external memory. In a possible embodiment, a central processing unit (such as the control circuit 111) executes the programming code at the execution address 0x10000, which is equivalent to executing the programming of the cache memory, which is equivalent to executing the first 1KB of the programming code 1 in the external memory. Then, the central processing unit executes the programming code at the execution address 0x10400, which is equivalent to executing the programming of the cache memory, which is equivalent to executing the second 1KB of the programming code 1 in the external memory. Then, the central processing unit executes the programming code at the execution address 0x10800, which is equivalent to executing the programming of the cache memory, which is equivalent to executing the third 1KB of the programming code 1 in the external memory, until the programming code 1 is executed.

[0060] In another possible embodiment, the loader sets the mapping of the cache memory according to the record value to execute the programming code 2 of the external memory. In this example, the CPU executes the programming code at the execution address 0x10000, which is equivalent to executing the programming of the cache memory, which is equivalent to executing the first 1KB of the programming code 2 in the external memory. Next, the CPU executes the programming code at the execution address 0x10400, which is equivalent to executing the programming of the cache memory, which is equivalent to executing the second 1KB of the programming code 2 in the external memory. Then, the CPU executes the programming code at the execution address 0x10800, which is equivalent to executing the programming of the cache memory, which is equivalent to executing the third 1KB of the programming code 2 in the external memory, until the programming code 2 is executed.

[0061] In other embodiments, since the cache size is limited, such as 1KB, when the starting execution address of the program to be executed by the CPU exceeds the execution address range of the cache, such as falling outside the 1KB range, the cache will automatically load a new 1KB range of programming code from the external memory, and then allow the CPU to continue to execute the newly loaded programming code in the cache. Therefore, the CPU can read the first to third 1KB programming codes of the external memory.

[0062] In some embodiments, the size of the programming code automatically loaded from the external memory by the cache memory is not necessarily equal to the capacity of the cache memory (e.g., 1KB). The size of the programming code loaded from the external memory by the cache memory may be smaller than the capacity of the cache memory to reduce the time the CPU waits for the cache memory to be updated.

[0063] Furthermore, the microcontroller and management method of the present invention do not need to use the position-independent code / data technology, and map the programming codes corresponding to different starting execution addresses (such as AD_0 and AD_N) of the cache memory 120 to the same execution address (such as 0x10000) of the same mapping storage space (such as 220) of the system memory space 200. Regardless of which execution address of the cache memory 120 the programming code is stored in, the central processing unit (such as the control circuit 111) executes the F / W of the same execution address (such as 0x10000) of the system memory space 200, thereby saving compilation and management costs.

[0064] Even in a bare metal system without an operating system or an operating system (OS) that does not support target code re-addressing, the microcontroller and management method of the present invention can execute F / W of a fixed execution address (such as 0x10000) of the system memory space 200 according to the above description.

[0065] The management method of the present invention, or the specified form or part thereof, may exist in the form of programming code. The programming code may be stored on a physical medium, such as a floppy disk, a CD, a hard disk, or any other machine-readable (such as computer-readable) storage medium, or a computer programming product that is not limited to an external form, wherein when the programming code is loaded and executed by a machine, such as a computer, the machine becomes a microcontroller for participating in the present invention. The programming code may also be transmitted through some transmission medium, such as wires or cables, optical fibers, or any transmission form, wherein when the programming code is received, loaded and executed by a machine, such as a computer, the machine becomes a microcontroller for participating in the present invention. When implemented on a general-purpose processing unit, the programming code combines with the processing unit to provide a unique device that operates similarly to the application-specific logic circuit.

[0066] Unless otherwise defined, all words (including technical and scientific words) herein are generally understood by those skilled in the art. In addition, unless expressly indicated, the definitions of words in general dictionaries should be interpreted as consistent with the meanings in articles in the relevant technical field, and should not be interpreted as ideal or overly formal. Although the terms "first", "second", etc. can be used to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element.

[0067] Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention. For example, the system, device or method described in the embodiments of the present invention may be implemented in a physical embodiment of hardware, software or a combination of hardware and software. Therefore, the scope of protection of the present invention shall be determined by the scope of the attached patent application.

Claims

1. A microcontroller for performing over-the-air firmware updates, characterized in that: Accessing an external memory, the external memory storing a first programming code and a second programming code, the microcontroller comprising: One bus; a control circuit that issues an access instruction to the bus; and a management circuit, receiving the access instruction through the bus, and reading a record value; in: When the recorded value matches a preset value, the management circuit maps the first programming code to a designated mapping storage space in a system memory space; When the recorded value does not conform to the preset value, the management circuit maps the second programming code to the designated mapping storage space.

2. The microcontroller for performing over-the-air firmware update according to claim 1, wherein: The recorded value is stored in the external memory.

3. The microcontroller for performing over-the-air firmware update according to claim 1, wherein: Also includes: A non-volatile memory is used to store the record value.

4. The microcontroller for performing over-the-air firmware update according to claim 1, wherein: The control circuit modifies the programming code of the designated mapping storage space, and the management circuit writes the programming code of the designated mapping storage space back to the external memory according to the record value.

5. The microcontroller for performing over-the-air firmware update according to claim 4, wherein: When the recorded value matches the preset value, the management circuit replaces the second programming code with the programming code of the designated mapping storage space; When the recorded value does not conform to the preset value, the management circuit replaces the first programming code with the programming code of the designated mapping storage space.

6. The microcontroller for performing over-the-air firmware update according to claim 1, wherein: When the recorded value matches the preset value, the management circuit replaces the second programming code with a third programming code; When the recorded value does not conform to the preset value, the management circuit replaces the first programming code with the third programming code.

7. The microcontroller for performing over-the-air firmware update according to claim 6, wherein: When the recorded value does not match the preset value, the management circuit writes the third programming code into a first storage block of the external memory to replace the first programming code in the first storage block; When the recorded value matches the preset value, the management circuit writes the third programming code into a second storage block of the external memory to replace the second programming code in the second storage block.

8. A method for performing an over-the-air firmware update, characterized in that: For accessing an external memory, the external memory stores a first programming code and a second programming code, and the method for performing an over-the-air firmware update includes: interpreting an access instruction; Read a record value according to the access instruction; When the record value matches a preset value, mapping the first programming code to a designated mapping storage space of a system memory space; and When the recorded value does not conform to the preset value, the second programming code is mapped to the designated mapping storage space.

9. The method for performing an over-the-air firmware update according to claim 8, wherein: Also includes: Modify the programming code of the specified mapped storage space; as well as According to the record value, the first or second programming code is replaced by the programming code of the designated mapping storage space.

10. The method for performing an over-the-air firmware update according to claim 9, wherein: When the record value meets the preset value: replacing the second programming code with the programming code of the designated mapped storage space, and Modify the record value so that the record value does not conform to the preset value; When the record value does not meet the preset value: replacing the first programming code with the programming code of the designated mapped storage space, and Modify the record value to make it conform to the preset value.