Wafer data processing method and device, chip and computer readable storage medium

Abstract

The invention relates to a wafer data processing method and device, a chip and a computer readable storage medium. The method comprises the following steps: acquiring a test data set of a plurality of wafers to be detected, and constructing a space vector to be detected of each wafer to be detected according to the test data set; and according to the to-be-detected space vectors of the plurality of to-be-detected wafers, classifying the plurality of to-be-detected wafers to obtain a plurality of wafer groups. By adopting the method, the wafer detection accuracy can be improved, the requirement that image recognition needs to consume a large number of computing power resources is avoided, and the computing power resources are saved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a wafer data processing method, device, chip and computer-readable storage medium. Background Art

[0002] Modern chips can only be obtained through a long semiconductor industry manufacturing process. For example, it is necessary to go through the process of silicon ingot-purification-cutting-grinding-polishing-lithography and etching-ion implantation and lamination-cutting separation to obtain wafer-testing-packaging-chip. Among them, after obtaining the wafer, the basic unit Die (particle) on it must be subjected to various types of tests (for example: current and voltage test, resistance test, etc.) to determine whether it is qualified. The analysis of test results is a very important part in the semiconductor industry. This importance is reflected in two aspects. On the one hand, Die is the basic unit of the chip. If a Die fails the test, it cannot be used to manufacture chips and can only be discarded; on the other hand, based on the analysis of the test results, the possible causes of the problems in the semiconductor process can be inferred. If the inferred cause is correct, it will help improve the process, thereby improving the yield of the semiconductor process and reducing the probability of defects in the wafer as much as possible.

[0003] Based on the above, it can be understood that data analysis of wafer test results is extremely important to the semiconductor industry, but data analysis of wafer test results is very difficult. On the one hand, there are many types of tests, and the types of data obtained are different; on the other hand, the amount of data obtained from the test is large, and it is more computationally intensive and time-consuming to perform data analysis.

[0004] One known prior art is to use deep learning methods to detect wafer test patterns, but deep learning methods are not suitable for this semiconductor business scenario. Since the semiconductor manufacturing process is very long and there are many types of tests, the "patterns / modes" generated are inexhaustible, and the model obtained by the deep learning method can only "recognize" the "patterns / modes" that have appeared in the training data, and cannot recognize the "patterns / modes" that are not in the training data, so the generalization of the deep learning solution is poor; finally, the image recognition algorithm using deep learning is generally executed using a convolutional neural network, and the operation of the convolutional neural network requires a lot of computing power, so the overall energy consumption and speed are not good enough. Summary of the invention

[0005] Based on this, it is necessary to provide a wafer data processing method, device, computer equipment, computer-readable storage medium and computer program product that can solve the above-mentioned technical problems.

[0006] In a first aspect, the present application provides a wafer data processing method, comprising:

[0007] Acquire a plurality of test data sets of wafers to be inspected, and construct a test space vector for each wafer to be inspected according to the test data sets;

[0008] According to the space vectors to be tested of the multiple wafers to be tested, the multiple wafers to be tested are classified to obtain multiple wafer groups.

[0009] In one embodiment, the multiple wafers to be inspected are classified according to the space vectors to be inspected of the multiple wafers to be inspected to obtain multiple wafer groups, including:

[0010] Acquire the vector space distance of the plurality of wafers to be inspected according to the space vector to be inspected of each wafer to be inspected;

[0011] According to the vector space distance, the plurality of wafers to be inspected are classified to obtain a plurality of wafer groups.

[0012] In one embodiment, obtaining the vector space distances of the plurality of wafers to be inspected includes:

[0013] The vector calculation is performed on any two wafers to be inspected among the plurality of wafers to be inspected to obtain the vector space distance between the two wafers to be inspected.

[0014] In one embodiment, the plurality of wafers to be inspected are classified according to the vector space distance to obtain a plurality of wafer groups, including:

[0015] The plurality of wafers to be inspected are classified according to the vector space distances between two of the wafers to be inspected by using a clustering algorithm to obtain a plurality of wafer groups.

[0016] In one embodiment, the method further comprises:

[0017] Obtaining the number of wafers in each of the plurality of wafer groups;

[0018] Sorting the plurality of wafer groups according to the number of wafers, and determining a preset number of target wafer groups arranged in sequence from the sorted plurality of wafer groups;

[0019] Target wafers having similar test characteristics are determined from the preset number of target wafer groups.

[0020] In one embodiment, the step of acquiring a plurality of test data sets of wafers to be inspected, and constructing a test space vector for each wafer to be inspected according to the test data sets, further comprises:

[0021] Acquire a plurality of test data sets of wafers to be inspected, and perform normalization processing on the test data sets to obtain a normalized parameter set of each wafer to be inspected;

[0022] According to the normalized parameter set, a space vector to be tested of each wafer to be tested is constructed.

[0023] In one embodiment, the step of acquiring a plurality of test data sets of wafers to be inspected and constructing a test space vector for each wafer to be inspected according to the test data sets includes:

[0024] Acquire a test data set of at least one electrical parameter of a plurality of wafers to be tested, and perform normalization processing on the test data set of at least one electrical parameter to obtain a normalized parameter set;

[0025] According to the normalized parameter set, a space vector to be tested of each wafer to be tested under each electrical parameter is constructed.

[0026] In one embodiment, the step of normalizing the test data set of the at least one electrical parameter to obtain a normalized parameter set includes:

[0027] Determining data characteristics of each electrical parameter based on the test type of the electrical parameter;

[0028] Based on the data features, the test data set is normalized to obtain a normalized parameter set.

[0029] In one embodiment, the method of normalizing the test data set based on the data features to obtain a normalized parameter set further includes:

[0030] Based on the data features, all test values ​​of the test data sets with different electrical parameters are normalized to the same data range.

[0031] In one embodiment, the normalizing the test data set based on the data features to obtain a normalized parameter set includes:

[0032] In a case where the data feature is that the value range of the test data set is greater than a preset value range, sorting the test values ​​in the test data set, and determining a percentile value according to the sorting value of each test value in the test data set;

[0033] Determine a corresponding normalization parameter according to the percentile value of each test value to obtain a normalization parameter set; or

[0034] When the data feature is that the number of identical test values ​​in the test data set is greater than a preset number, sorting the test values ​​in the test data set to obtain a sorting value of each test value in the test data set;

[0035] A normalized parameter for each test value is determined based on the maximum value among the ranked values ​​to obtain a normalized parameter set.

[0036] In one embodiment, constructing a space vector to be tested for each wafer to be tested according to the normalized parameter set includes:

[0037] Partitioning each of the wafers to be inspected to obtain a plurality of wafer partitions;

[0038] Determine the normalization parameter of each wafer partition according to the position intervals corresponding to the multiple wafer partitions and the target position corresponding to each test value in the normalization parameter set; the target position is the position of each test value on the wafer to be tested;

[0039] According to the normalized parameters of each wafer partition, a corresponding space vector to be tested of each wafer to be tested is constructed.

[0040] In one embodiment, the method further comprises:

[0041] According to the target wafer, obtaining corresponding production information;

[0042] A fault analysis is performed on the target wafer according to the production information to determine wafer production problems.

[0043] In one embodiment, the plurality of wafers to be inspected are classified according to the vector similarity of each pair of the wafers to be inspected to obtain a plurality of wafer groups, including:

[0044] The plurality of wafers to be inspected are classified according to the vector similarities of each pair of the wafers to be inspected by utilizing a clustering algorithm to obtain a plurality of wafer groups.

[0045] In one embodiment, determining a target wafer from a plurality of wafer pattern groups comprises:

[0046] Obtaining the number of wafers in each of the plurality of wafer groups;

[0047] Sorting the plurality of wafer groups according to the number of wafers, and determining a preset number of target wafer groups arranged in sequence from the sorted plurality of wafer groups;

[0048] A target wafer is determined from the preset number of target wafer groups.

[0049] In one embodiment, for each of the plurality of wafers to be inspected, determining a test space vector of each wafer to be inspected by normalizing a test data set of each wafer to be inspected includes:

[0050] For each of the plurality of wafers to be inspected, normalizing the test data set of each wafer to be inspected to obtain a normalized parameter set;

[0051] According to the normalized parameter set, a corresponding space vector to be tested of each wafer to be tested is constructed.

[0052] In one embodiment, for each of the plurality of wafers to be inspected, normalizing the test data set of each wafer to be inspected to obtain a normalized parameter set includes:

[0053] For each of the plurality of wafers to be inspected, determining data features of a test data set of each wafer to be inspected;

[0054] Based on the data features, the test data set is normalized to obtain a normalized parameter set.

[0055] In one embodiment, the normalizing the test data set based on the data features to obtain a normalized parameter set includes:

[0056] In the case where the data feature is that the value range of the test data set is greater than the preset value range, sorting the electrical performance parameters in the test data set of each wafer to be inspected, and determining a percentile value according to the sorted value of each electrical performance parameter in the test data set;

[0057] Determine a corresponding normalized parameter according to the percentile value of each electrical performance parameter to obtain a normalized parameter set; or

[0058] When the data feature is that the number of identical values ​​in the test data set is greater than a preset number, sorting the electrical performance parameters in the test data set of each wafer to be inspected to obtain a sorting value of each electrical performance parameter in the test data set;

[0059] The normalized parameter of each electrical performance parameter is obtained by dividing the ranking value by the number of electrical performance parameters in the test data set, thereby obtaining a normalized parameter set.

[0060] In one embodiment, constructing a corresponding space vector of each wafer to be inspected according to the normalized parameter set includes:

[0061] Partition processing is performed on each of the wafers to be inspected to obtain a plurality of wafer partitions; each of the wafers to be inspected includes the plurality of wafer partitions, each of the wafer partitions includes a plurality of wafer basic units, and the electrical performance parameters of each of the wafer basic units have corresponding normalized parameters;

[0062] Determine the normalized parameter of each wafer partition according to the position intervals corresponding to the multiple wafer partitions and the target position corresponding to each normalized parameter in the normalized parameter set; the target position is the position of the wafer basic unit on the wafer to be inspected;

[0063] According to the normalized parameters of each wafer partition, a corresponding space vector of each wafer to be inspected is constructed.

[0064] In one embodiment, the method further comprises:

[0065] According to the target wafer, obtaining corresponding production information;

[0066] A fault analysis is performed on the target wafer according to the production information to obtain a fault resolution strategy.

[0067] In one embodiment, the method further comprises:

[0068] In response to the wafer pattern display instruction, the target wafer is displayed.

[0069] In a second aspect, the present application also provides a wafer data processing device, comprising:

[0070] A data processing module, used for acquiring a test data set of a plurality of wafers to be inspected, and constructing a test space vector for each wafer to be inspected according to the test data set;

[0071] The classification module is used to classify the multiple wafers to be inspected according to the space vectors to be inspected of the multiple wafers to be inspected, so as to obtain multiple wafer groups.

[0072] In a third aspect, the present application further provides a chip, including a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the following steps are implemented:

[0073] Acquire a plurality of test data sets of wafers to be inspected, and construct a test space vector for each wafer to be inspected according to the test data sets;

[0074] According to the space vectors to be tested of the multiple wafers to be tested, the multiple wafers to be tested are classified to obtain multiple wafer groups.

[0075] In a fourth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the following steps are implemented:

[0076] Acquire a plurality of test data sets of wafers to be inspected, and construct a test space vector for each wafer to be inspected according to the test data sets;

[0077] According to the space vectors to be tested of the multiple wafers to be tested, the multiple wafers to be tested are classified to obtain multiple wafer groups.

[0078] In a fifth aspect, the present application further provides a computer program product, including a computer program, which implements the following steps when executed by a processor:

[0079] Acquire a plurality of test data sets of wafers to be inspected, and construct a test space vector for each wafer to be inspected according to the test data sets;

[0080] According to the space vectors to be tested of the multiple wafers to be tested, the multiple wafers to be tested are classified to obtain multiple wafer groups.

[0081] The above-mentioned wafer data processing method, device, chip, computer-readable storage medium and computer program product process the test data sets of each of the multiple wafers to be inspected to obtain the test space vector corresponding to each of the multiple wafers to be inspected; according to the test space vector of each wafer to be inspected, vector calculation is performed on any two of the multiple wafers to be inspected to obtain the vector space distance between the two wafers to be inspected; according to the vector space distance between the two wafers to be inspected, the multiple wafers to be inspected are classified to obtain multiple wafer groups, thereby avoiding the problem of wafer samples not being able to be identified in the training data, and the wafers can be accurately and reliably detected and classified. In addition, the test data set is normalized to avoid the need for image recognition to consume a large amount of computing power resources, thereby saving computing power resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0082] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0083] Figure 1 1 is a schematic flow chart of a wafer data processing method in one embodiment;

[0084] Figure 2A schematic flow chart of a method for determining a target wafer in one embodiment;

[0085] Figure 3 Schematic diagram of a flow chart of a method for determining a space vector to be measured in one embodiment;

[0086] Figure 4 is a schematic flow chart of a method for determining a space vector to be measured in another embodiment;

[0087] Figure 5 is a schematic diagram of radial partitioning in one embodiment;

[0088] Figure 6 is a schematic diagram of axial partitioning in one embodiment;

[0089] Figure 7 is a schematic diagram of a photomask partition in one embodiment;

[0090] Figure 8 is a schematic flow chart of a wafer data processing method in another embodiment;

[0091] Fig. 9 is a structural block diagram of a wafer data processing device in one embodiment;

[0092] Fig.10 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0093] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0094] In the description of the embodiments of the present application, “plurality” means more than two, unless otherwise clearly and specifically defined.

[0095] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0096] As the core component of modern electronic devices, chips are widely used in a wide range of scenarios. Chips are not only used in computers and servers, mobile devices, embedded systems and electronic products, but also in navigation systems, radars, communication equipment, etc.

[0097] Chips need to go through a long semiconductor industry manufacturing process to be obtained. For example, it is necessary to go through the process of silicon ingot-purification-cutting-grinding-polishing-lithography and etching-ion implantation and lamination-cutting separation to obtain wafers-testing-packaging-chips. Among them, after obtaining the wafer, the basic unit Die (particle) on it must be subjected to various types of tests, such as current and voltage tests, resistance tests, etc., to determine whether it is qualified. The analysis of test results is a very important part in the semiconductor industry. This importance is reflected in two aspects. On the one hand, Die is the basic unit of the chip. If a Die fails the test, it cannot be used to manufacture chips and can only be discarded; on the other hand, based on the analysis of the test results, the possible causes of the problems in the semiconductor process can be inferred. If the inferred cause is correct, it will help improve the process, thereby improving the yield of the semiconductor process and reducing the probability of defects in the wafer as much as possible. At present, with the improvement of semiconductor lithography accuracy, it is becoming more and more difficult to improve product yield.

[0098] It can be seen that data analysis of wafer test results is extremely important for the semiconductor industry. However, data analysis of wafer test results is very difficult. On the one hand, there are many types of tests, and the types of data obtained are different; on the other hand, the amount of data obtained from the test is large, and it is more computationally intensive and time-consuming to perform data analysis.

[0099] In the semiconductor manufacturing process, for a large factory, the number of wafers produced even in one batch is huge; and a factory often has more than one production line; therefore, the number of wafers produced by the factory in one day is very large; the test results of these wafers need to be analyzed in a timely and reliable manner to obtain the root cause of the defects, thereby improving the manufacturing yield.

[0100] The existing method is to use deep learning methods to detect wafer test patterns. Since the semiconductor manufacturing process is very long and there are many types of tests, the "patterns / modes" generated are inexhaustible. The model obtained by the deep learning method can only "recognize" the "patterns / modes" that have appeared in the training data, but cannot recognize the "patterns / modes" that are not in the training data, so the deep learning solution has poor generalization. In addition, image recognition algorithms using deep learning are generally executed using convolutional neural networks. The operation of convolutional neural networks requires a lot of computing power, so the overall energy consumption and speed are not good enough.

[0101] Therefore, a wafer data processing method is proposed. The electrical performance parameters of the wafer to be inspected are converted into spatial vectors, and the distance between the spatial vectors is calculated. The vector similarity of different wafers under test conditions is determined based on the distance between the spatial vectors to be tested, thereby avoiding the need for image recognition to consume a large amount of computing resources and saving computing resources. At the same time, based on the vector similarity, multiple groups of similar wafers are found from multiple wafers to be inspected, thereby avoiding the problem of not being able to identify wafer samples that are not in the training data, and the wafers can be accurately and reliably detected and classified.

[0102] In an exemplary embodiment, Figure 1 As shown, a wafer data processing method is provided. This embodiment uses the method applied to a terminal as an example. It can be understood that the method can also be applied to a server, and can also be applied to a system including a terminal and a server, and is implemented through the interaction between the terminal and the server. In this embodiment, the method includes steps 102 to 110, wherein:

[0103] Step 102 , obtaining a test data set of a plurality of wafers to be inspected, and constructing a test space vector electrical parameter of each wafer to be inspected according to the test data set.

[0104] Among them, the test data set can be understood as the test value electrical parameters obtained during the wafer test process, and the wafer test can be but not limited to at least one of resistance test, voltage test and current test. The electrical parameter can be but not limited to at least one of voltage, current and resistance. For example, in the case where the wafer test is a current test, the electrical parameter obtained can be the leakage current of the wafer. In the case where the wafer test is a voltage test, the electrical parameter obtained can be the voltage of the wafer, and the voltage can be the operating voltage. The test method of the wafer can be implemented by existing methods, which will not be repeated here.

[0105] The electrical parameter test data set of the wafer to be tested can be obtained by taking the production line as the dimension, and obtaining the test data set of the wafer to be tested of each production line respectively, or by taking the production batch as the dimension, and obtaining the test data set of each batch of wafers to be tested respectively.

[0106] The space vector to be tested of the wafer to be tested can be constructed by normalizing the test data set. Since corresponding test data, i.e., electrical parameters, are obtained in the test of the wafer, and the types and value ranges of electrical parameters of different production processes are different, in order to ensure the reliability of the data processing results, the obtained test data needs to be normalized.

[0107] Normalization processing is to normalize the data to the same preset numerical range. The preset numerical range can be determined according to actual needs. For example, the preset numerical range can be the interval [0, 1]. The specific method of normalization can be any one of minimum-maximum normalization, maximum value normalization, and Z-score normalization. Among them, minimum-maximum normalization can be to determine the maximum and minimum values ​​in the test data set, map the maximum value to 1, and map the minimum value to 0, and linearly map other data in the test data set to [0, 1]. The specific mapping method can be to subtract the minimum value -min from the other data value in the test data set to obtain the difference, and divide the difference by the difference between the maximum value max and the minimum value min, which can be specifically expressed as: value_normalized = (value-min) / (max-min).

[0108] Furthermore, when normalizing different types of electrical parameters, the influences and functions of different types of electrical parameters are different, and the electrical parameters need to be sorted, and the sorting methods include ascending and descending. For electrical parameters sorted in ascending order, the larger value will be mapped to 1 and the smaller value will be mapped to 0 after normalization; for parameters sorted in descending order, the larger value will be mapped to 0 and the smaller value will be mapped to 1 after normalization. For example, electrical parameter 1 is sorted in ascending order, and electrical parameter 2 is sorted in descending order.

[0109] Exemplarily, a test data set of each of multiple wafers to be tested from different production lines or different batches of the same production line is obtained from a server. For each wafer to be tested among the multiple wafers to be tested, the maximum value and the minimum value are determined from the test data set of each wafer to be tested, and the maximum value is mapped to 1 and the minimum value is mapped to 0 respectively. The difference is obtained by subtracting the minimum value -min from the other data value in the test data set in turn, and the difference is divided by the difference between the maximum value max and the minimum value min to obtain the normalized parameter set of each wafer to be tested, and the normalized parameter set of each wafer to be tested is converted into an array to obtain the corresponding space vector to be tested.

[0110] Step 104 , classifying the plurality of wafers to be inspected according to the space vectors to be inspected of the plurality of wafers to be inspected, to obtain a plurality of wafer groups.

[0111] Among them, wafer grouping can be based on spatial clustering of the space vector to be tested, that is, similarity calculation. The similarity calculation can be calculated based on the vector space distance between any two wafers to be tested among multiple wafers to be tested to obtain the vector space distance. The method for determining the vector space distance includes any one of the Euler distance, Pearson correlation coefficient, and cosine similarity. Exemplarily, based on the space vector to be tested of each wafer to be tested, that is, the array of each wafer to be tested, the vector space distance between any two wafers is calculated to obtain the vector similarity between the two wafers to be tested. For example, if there are N wafers, it is necessary to calculate Using a clustering algorithm, multiple wafers to be inspected are classified according to the vector similarity between each pair of wafers to be inspected, and multiple wafer groups are obtained.

[0112] In the above-mentioned wafer data processing method, the electrical parameter test data sets of each of the multiple wafers to be tested are processed to obtain the space vector to be tested corresponding to each of the multiple wafers to be tested; according to the space vector to be tested of each wafer to be tested, the similarity of any two wafers to be tested in the multiple wafers to be tested is calculated to obtain the vector similarity of each pair of wafers to be tested; according to the vector similarity of each pair of wafers to be tested, the multiple wafers to be tested are classified to obtain multiple wafer groups, thereby avoiding the problem of being unable to identify wafer samples that are not in the training data, and the wafers can be accurately and reliably detected and classified. In addition, the processing of the electrical parameter test data set does not require image recognition, thereby avoiding the need for image recognition to consume a large amount of computing power resources, thereby saving computing power resources.

[0113] Further, in an exemplary embodiment, the plurality of wafers to be inspected are classified according to the space vectors to be inspected of the plurality of wafers to be inspected to obtain a plurality of wafer groups, including:

[0114] According to the space vector to be detected of each wafer to be detected, the vector space distance of multiple wafers to be detected is determined; according to the vector space distance, the multiple wafers to be detected are classified to obtain multiple wafer groups.

[0115] The classification method may be any one of cluster analysis, threshold division and distance measurement. Threshold division may be to set a similarity threshold and classify wafers with similarity exceeding the threshold into the same group. Cluster analysis may be to group wafers according to vector similarity using a clustering algorithm. Determining the vector space distance of multiple wafers to be inspected may be to perform vector calculation on any two wafers to be inspected among the multiple wafers to be inspected to obtain the vector space distance between the two wafers to be inspected.

[0116] Exemplarily, vector calculation is performed on any two wafers to be inspected among the multiple wafers to be inspected to obtain the vector space distance between the two wafers to be inspected. According to the vector space distance, the multiple wafers to be inspected are classified according to any one of the classification methods to obtain multiple wafer groups.

[0117] Optionally, in an exemplary embodiment, a clustering algorithm is used to classify multiple wafers to be inspected according to vector similarities between two wafers to be inspected, so as to obtain multiple wafer groups. The clustering algorithm is not limited here and can be implemented in an existing manner.

[0118] The clustering algorithm may include but is not limited to K-means, hierarchical clustering, DBSCAN, etc.

[0119] Exemplarily, a clustering algorithm is used to classify multiple wafers to be detected according to the vector similarity of each pair of wafers to be detected, and the vector similarity in the same similarity threshold interval is determined as one class, so that the distribution of similar wafers can be obtained, that is, multiple wafer groups can be obtained. For example, there are 4 wafers to be detected, and 4 space vectors to be tested can be obtained. By calculating the vector space distance in pairs, 6 vector space distances, that is, vector similarity, can be obtained. Then, these 6 vector space distances are clustered and grouped, and those with high similarity are grouped into one group. The distribution of similar wafers can be obtained, and similar wafers can be further divided. Subsequently, data analysis is performed based on the clustered wafers to improve the efficiency of wafer data analysis.

[0120] Furthermore, target wafers having similar test characteristics may be determined from the obtained wafer group.

[0121] Among them, the determination method of determining the target wafer from multiple wafer groups includes: determining based on the rules determined by actual production needs, analyzing the characteristics of each wafer group using statistical methods (such as mean, median, standard deviation, etc.), determining the target wafer that meets specific conditions, analyzing the physical properties of the wafer to determine the target wafer, wherein the physical property can be stress distribution, random selection, responding to the selection instruction triggered by the interactive interface, determining the target wafer according to the wafer identification carried by the selection instruction, etc. Similar test characteristics can be understood as the similarity of the test characteristics within a preset range, and then determined to be similar.

[0122] For example, according to the vector similarity of each pair of wafers to be tested, multiple wafers to be tested are classified to obtain multiple wafer groups, and target wafers with similar test characteristics are randomly selected from each group of wafers. Based on the selected target wafers, problems in the wafer production process can be analyzed, thereby improving the yield of the wafer.

[0123] In an exemplary embodiment, Figure 2 As shown, a method for determining a target wafer is provided, comprising the following steps:

[0124] Step 202 , obtaining the number of wafers in each wafer group among a plurality of wafer groups.

[0125] Step 204 , sorting the plurality of wafer groups according to the number of wafers, and determining a preset number of target wafer groups arranged in sequence from the sorted plurality of wafer groups.

[0126] Exemplarily, the plurality of wafer groups are sorted according to the number of wafers, and a preset number of target wafer groups arranged in sequence are determined from the sorted plurality of wafer groups in order from most to least. For example, a wafer group with a number of wafers greater than N is determined as the target wafer group.

[0127] Step 206 , determining target wafers with similar test characteristics from a preset number of target wafer groups.

[0128] Among them, the test characteristics can be preset.

[0129] In this embodiment, based on the number of wafers, the target wafer group with the largest number arranged in order is determined from multiple wafer groups, and target wafers with similar test characteristics are determined from similar target wafer groups. The target wafers are selected in a targeted manner, and the cause of the wafer failure can be accurately located.

[0130] It can be understood that the test data set of the wafer to be inspected may include the test value of at least one electrical parameter. When the test data set of the wafer to be inspected includes the test value of at least one electrical parameter, the space vector to be tested can be constructed in the following manner: obtain the test data set of at least one electrical parameter of multiple wafers to be inspected, normalize the test data set of at least one electrical parameter to obtain a normalized parameter set; and construct the space vector to be tested for each wafer to be inspected under each electrical parameter based on the normalized parameter set.

[0131] The normalization of the test data set of at least one electrical parameter may be normalized to the same range. By constructing the space vector to be tested in a normalized manner for the test data set, image recognition is not required, thereby avoiding the need for image recognition to consume a large amount of computing resources.

[0132] In the semiconductor manufacturing process, there are many wafers. When processing a large amount of wafer data, more resources are required. In order to save computing resources, a method of measuring space vectors is proposed. In an exemplary embodiment, Figure 3 As shown, a method for determining a space vector to be measured is provided, comprising steps 302 to 304. Wherein:

[0133] Step 302 , obtaining a plurality of test data sets of wafers to be inspected, and performing normalization processing on the test data sets to obtain a normalized parameter set of each wafer to be inspected.

[0134] When normalizing the electrical parameter test data set, a corresponding normalization method may be determined according to the data characteristics of the electrical parameter test data set. The normalization process may be to normalize all test values ​​of the test data sets of different electrical parameters to the same data range.

[0135] Exemplarily, a test data set of multiple wafers to be tested is obtained, and the test data sets are normalized to the same data range to obtain a normalized parameter set for each wafer to be tested, and the same data range can be an interval of (0, 1). In an exemplary embodiment, a test data set of at least one electrical parameter is normalized to obtain a normalized parameter set, including: determining data features of each electrical parameter based on the test type of the electrical parameter; and normalizing the test data set based on the data features to obtain a normalized parameter set.

[0136] Optionally, based on the data features, the test data set is normalized to obtain a normalized parameter set, and further includes: based on the data features, normalizing all test values ​​of the test data sets of different electrical parameters to the same data range. It is understandable that different data features correspond to different normalization methods. Based on the data features, the electrical parameter test data set is normalized to obtain a normalized parameter set, including the following two methods:

[0137] Method 1: When the data feature is that the value range of the test data set is greater than the preset value range, the test values ​​in the test data set are sorted, and the percentile value is determined according to the sort value of each test value in the test data set;

[0138] The corresponding normalization parameter is determined according to each test value percentile value to obtain a normalization parameter set.

[0139] It is understandable that the numerical range of the electrical parameter test data set is greater than the preset numerical range, indicating that the acquired electrical parameters may be unevenly distributed. In order to ensure the accuracy of the data, percentile values ​​are used to determine the range of data scaling instead of simply using the minimum and maximum values ​​of all data.

[0140] The percentile value can be determined by the percentrank function, that is, given a value, the function returns the percentile rank of this value in the data set. percentrank(value) is a function that calculates the percentile rank.

[0141] Exemplarily, when the data characteristic is that the numerical range of the electrical parameter test data set is greater than the preset numerical range, the test values ​​in the test data set are sorted, and the percentile value is determined according to the ranking value of each test value in the test data set. Normalization is performed according to its percentile ranking in the data set to obtain a standardized numerical value, which can be expressed as: value_normalized = percentrank(value), and then the normalized parameter set of each wafer to be tested can be obtained.

[0142] Method 2: When the data feature is that the number of identical test values ​​in the test data set is greater than a preset number, the test values ​​in the test data set are sorted to obtain a sort value of each test value in the test data set;

[0143] A normalized parameter for each test value is determined based on the maximum value among the sorted values ​​to obtain a normalized parameter set.

[0144] The ranking value divided by the number of electrical parameters in the electrical parameter test data set can be expressed as: value_normalized=rank(value) / max(rank(value)).

[0145] It is understandable that when there are a large number of identical values ​​in the electrical parameter test data set, if percentile values ​​are used for normalization, the maximum value may not be guaranteed to be 1. Therefore, the ranking of each data value can be divided by the maximum value of all rankings to achieve normalization, ensuring that the maximum value is 1, while dealing with the problem of duplicate values ​​that may exist in the data set.

[0146] Step 304 : constructing a space vector to be tested for each wafer to be tested according to the normalized parameter set.

[0147] The method of constructing the space vector to be tested can be determined by converting each normalized parameter in the normalized parameter set of each wafer to be tested into an array element to obtain a corresponding array. The method of constructing the space vector to be tested can also be determined by partitioning the wafer to be tested, obtaining the normalized parameters of each partition, and constructing the corresponding space vector to be tested according to the normalized parameters of each partition.

[0148] In the above embodiment, for each wafer to be inspected among multiple wafers to be inspected, the electrical parameter test data set of each wafer to be inspected is normalized to obtain a normalized parameter set; based on the normalized parameter set, a corresponding space vector to be tested for each wafer to be inspected is constructed, and the electrical parameter test data set is normalized and converted into a space vector to be tested, thereby reducing the amount of data processing.

[0149] Exemplarily, in one example, a method for determining a space vector to be measured is provided, such as Figure 4 As shown, it includes steps 402 to 406, wherein:

[0150] Step 402 , partitioning each wafer to be inspected to obtain a plurality of wafer partitions.

[0151] Among them, the partitioning method can be any one of axial partitioning, radial partitioning and mask partitioning, and can be any combination of two or a combination of the three. Axial partitioning can be understood as partitioning along the axial direction of the wafer. Radial partitioning can be understood as partitioning along the radial direction based on the center of the wafer. Mask partitioning can be understood as partitioning control of the distribution of exposure light sources during the photolithography process. Figure 5 As shown in FIG. 1 , it is a schematic diagram of radial partitioning in one embodiment. Figure 6 As shown in FIG. 1 , it is a schematic diagram of axial partitioning in one embodiment. Figure 7 FIG. 1 is a schematic diagram of mask partitioning in one embodiment.

[0152] Step 404, determining the normalization parameters of each wafer partition according to the position intervals corresponding to the multiple wafer partitions and the target positions corresponding to the test values ​​in the normalization parameter set; the target position is the position of each test value on the wafer to be tested.

[0153] Among them, the characteristic parameter can be determined based on all normalized parameters on each wafer, and the specific method can be determined by statistical processing based on all normalized parameters on each wafer. The statistical processing can be various statistical algorithms such as finding the average value, median, maximum value, minimum value, and any combination thereof. It can be understood that the determination method of the average value, median, maximum value, and minimum value can be implemented by existing methods, which will not be elaborated here.

[0154] Step 406 , constructing a corresponding space vector to be tested for each wafer to be tested according to the normalized parameters of each wafer partition.

[0155] The space vector to be tested is constructed according to the normalized parameters of each wafer partition, which can be statistically processed for all normalized test values ​​of each wafer partition, i.e., normalized parameters, to obtain characteristic parameters of each wafer partition; and the space vector to be tested for each wafer to be tested is constructed according to each characteristic parameter. The statistical processing can be various statistical algorithms such as averaging, median, maximum value, minimum value, and any combination thereof.

[0156] It can be understood that the characteristic parameters of each wafer partition on each wafer are converted into an array, that is, the space vector to be measured is obtained, wherein the number of wafer partitions is equal to the length of the array, and each value in the array represents the statistical value of the corresponding partition, that is, the characteristic parameter.

[0157] In the above partitioning method, each wafer is partitioned to obtain normalized parameters of each partition. For each wafer to be tested, the normalized parameters of each partition of each wafer to be tested are counted to obtain characteristic parameters. The characteristic parameters of each partition of each wafer to be tested are converted into an array. The similarity between two wafers to be tested is detected based on the array to reduce the amount of data processing.

[0158] Optionally, in an exemplary embodiment, a test data set of multiple wafers to be detected is obtained, and a space vector to be tested of each wafer to be detected is constructed according to the test data set, including: obtaining a test data set of at least one electrical parameter of multiple wafers to be detected, normalizing the test data set of at least one electrical parameter to obtain a normalized parameter set; and constructing a space vector to be tested of each wafer to be detected under each electrical parameter according to the normalized parameter set. This method normalizes the test data set of the electrical parameters and constructs the space vector to be tested, which is helpful for improving the accuracy of wafer detection.

[0159] After determining the target wafer, the problem in the wafer process can be analyzed based on the target wafer. In an exemplary embodiment, the corresponding production information is obtained according to the target wafer; the target wafer is analyzed for failure according to the production information to determine the wafer production problem. The production information includes production information of each link of wafer production, such as process parameters and equipment parameters of production equipment.

[0160] By performing fault analysis on the wafer pattern of the target wafer according to the production information, a fault resolution strategy is obtained, and problems that may arise in the process are resolved based on the fault resolution strategy, thereby effectively improving the yield of semiconductor manufacturing.

[0161] After the target wafers are determined, in order to intuitively obtain the defect differences between the target wafers, in an exemplary embodiment, the target wafers are displayed in response to a wafer pattern display instruction.

[0162] Exemplarily, after determining the target wafer, the electrical parameters of each wafer basic unit of the target wafer are obtained; based on a preset conversion relationship between the electrical parameters and the pixel values, the electrical parameters of each wafer basic unit are converted to obtain their respective corresponding pixel values; based on the relative positions of each wafer basic unit on the target wafer and the pixel values ​​corresponding to each wafer basic unit, the target wafer is rendered to a display interface according to a preset ratio, so that the wafer pattern of the target wafer is displayed, and the differences and consistency issues between different wafers can be intuitively obtained.

[0163] In an exemplary embodiment, Figure 8 As shown, a wafer data processing method is provided, including steps 802 to 818, wherein:

[0164] Step 802 , obtaining a plurality of test data sets of wafers to be inspected, and constructing a test space vector for each wafer to be inspected according to the test data sets.

[0165] Step 804 , performing similarity calculation on any two wafers to be inspected among the plurality of wafers to be inspected according to the space vector to be inspected of each wafer to be inspected, so as to obtain the vector similarity between the two wafers to be inspected.

[0166] Step 806 , using a clustering algorithm, classify the multiple wafers to be inspected according to the vector similarity between each pair of wafers to be inspected, to obtain multiple wafer groups.

[0167] Step 808 , obtaining the number of wafers in each wafer group among the multiple wafer groups.

[0168] Step 810 , sorting a plurality of wafer groups according to the number of wafers, and determining a preset number of target wafer groups arranged in sequence from the sorted plurality of wafer groups.

[0169] Step 812 , determining target wafers with similar test characteristics from a preset number of target wafer groups.

[0170] Step 814, obtaining corresponding production information according to the target wafer.

[0171] Step 816, performing a fault analysis on the target wafer according to the production information to determine the wafer production problem.

[0172] It is understandable that the normalized parameter set, the space vector to be measured and the vector similarity can be implemented in the manner described in the above embodiments, which will not be described in detail here.

[0173] In the above wafer data processing method, the electrical parameter test data sets of the plurality of wafers to be tested are processed in a normalized manner to obtain the space vector to be tested corresponding to each of the plurality of wafers to be tested; according to the space vector to be tested of each wafer to be tested, the similarity of any two wafers to be tested in the plurality of wafers to be tested is calculated to obtain the vector similarity of the two wafers to be tested; according to the vector similarity of the two wafers to be tested, the plurality of wafers to be tested are classified to obtain a plurality of wafer groups, and the target wafer is determined from the plurality of wafer groups, that is, similar wafers can be determined according to the similarity calculated according to the space vector to be tested, thus avoiding the problem of wafer samples not being identified in the training data, and wafers can be accurately and reliably detected and classified. And based on the target wafers with similar test characteristics, the problems in the process are analyzed to obtain the corresponding fault resolution strategy, and the yield of semiconductor manufacturing is effectively improved.

[0174] It should be understood that, although the various steps in the flowcharts involved in the above-mentioned embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-mentioned embodiments can include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0175] Based on the same inventive concept, the embodiment of the present application also provides a wafer data processing device for implementing the wafer data processing method involved above. The implementation scheme for solving the problem provided by the device is similar to the implementation scheme recorded in the above method, so the specific limitations in one or more wafer data processing device embodiments provided below can refer to the limitations of the wafer data processing method above, and will not be repeated here.

[0176] In an exemplary embodiment, Fig. 9 As shown, a wafer data processing device is provided, including: a data processing module 902 and a classification module 904, wherein:

[0177] The data processing module 902 is used to obtain a test data set of multiple wafers to be inspected, and construct a test space vector for each wafer to be inspected according to the test data set.

[0178] The classification module 904 is used to classify the multiple wafers to be inspected according to the space vectors to be inspected of the multiple wafers to be inspected, so as to obtain multiple wafer groups.

[0179] The above-mentioned wafer data processing device processes the electrical parameter test data sets of each of the multiple wafers to be tested in a normalized manner to obtain a space vector to be tested corresponding to each of the multiple wafers to be tested; based on the space vector to be tested of each wafer to be tested, similarity is calculated for any two of the multiple wafers to be tested to obtain vector similarity between two of the wafers to be tested; based on the vector similarity between two of the wafers to be tested, the multiple wafers to be tested are classified to obtain multiple wafer groups, that is, similar wafers can be determined based on the similarity calculated based on the space vector to be tested, thereby avoiding the problem of being unable to identify wafer samples that are not in the training data, and the wafers can be accurately and reliably detected and classified. In addition, the electrical parameter test data set is normalized to avoid the need for image recognition to consume a large amount of computing power resources, thereby saving computing power resources.

[0180] Optionally, in an exemplary embodiment, the above-mentioned device further includes a similarity calculation module, which is used to determine the vector space distance of multiple wafers to be inspected according to the space vector to be inspected of each wafer to be inspected;

[0181] Optionally, in an exemplary embodiment, the classification module 904 is further configured to classify a plurality of wafers to be inspected according to the vector space distance to obtain a plurality of wafer groups.

[0182] The similarity calculation module is also used to perform vector calculation on any two wafers to be detected among the multiple wafers to be detected, so as to obtain the vector space distance between the two wafers to be detected.

[0183] Optionally, in an exemplary embodiment, the classification module 904 is further configured to utilize a clustering algorithm to classify a plurality of wafers to be inspected according to vector similarities between two wafers to be inspected, so as to obtain a plurality of wafer groups.

[0184] Optionally, in an exemplary instance, the wafer data processing device also includes a sorting module, which is used to obtain the number of wafers in each wafer group in a plurality of wafer groups; sort the plurality of wafer groups according to the number of wafers, and determine a preset number of target wafer groups arranged in order from the sorted plurality of wafer groups.

[0185] Optionally, in an exemplary embodiment, the wafer determination module is further configured to determine target wafers having similar test characteristics from a preset number of target wafer groups.

[0186] Optionally, in an exemplary embodiment, the data processing module 902 is further used to obtain a test data set of multiple wafers to be inspected, and normalize the test data set to obtain a normalized parameter set of each wafer to be inspected;

[0187] According to the normalized parameter set, a corresponding space vector to be tested for each wafer to be tested is constructed.

[0188] Optionally, in an exemplary embodiment, the data processing module 902 is further used to obtain a test data set of at least one electrical parameter of a plurality of wafers to be inspected, and normalize the test data set of at least one electrical parameter to obtain a normalized parameter set;

[0189] According to the normalized parameter set, a space vector to be tested for each wafer to be tested under each electrical parameter is constructed.

[0190] Optionally, in an exemplary embodiment, the data processing module 902 is further used to determine the data characteristics of each electrical parameter based on the test type of the electrical parameter;

[0191] Based on the data characteristics, the test data set is normalized to obtain a normalized parameter set.

[0192] Optionally, in an exemplary embodiment, the data processing module 902 is further configured to normalize all test values ​​of the test data sets of different electrical parameters into the same data range based on data features.

[0193] Optionally, in an exemplary embodiment, the data processing module 902 is also used to

[0194] When the data feature is that the value range of the test data set is greater than the preset value range, the test values ​​in the test data set are sorted, and the percentile value is determined according to the sort value of each test value in the test data set;

[0195] The corresponding normalization parameter is determined according to each test value percentile value to obtain a normalization parameter set.

[0196] Optionally, in an exemplary instance, the data processing module 902 is further configured to sort the test values ​​in the test data set to obtain a sort value of each test value in the test data set when the data feature is that the number of identical test values ​​in the test data set is greater than a preset number;

[0197] A normalized parameter for each test value is determined based on the maximum value among the sorted values ​​to obtain a normalized parameter set.

[0198] Optionally, in an exemplary embodiment, the data processing module 902 is further used to perform partition processing on each wafer to be inspected to obtain multiple wafer partitions;

[0199] Determine the normalization parameters of each wafer partition according to the position intervals corresponding to the multiple wafer partitions and the target positions corresponding to the test values ​​in the normalization parameter set; the target position is the position of each test value on the wafer to be tested;

[0200] According to the normalized parameters of each wafer partition, a corresponding space vector to be tested for each wafer to be tested is constructed.

[0201] Optionally, in an exemplary embodiment, it further includes:

[0202] A fault analysis module is used to obtain corresponding production information according to the target wafer;

[0203] Perform fault analysis on the target wafer based on production information to identify wafer production problems.

[0204] Each module in the above-mentioned wafer data processing device can be implemented in whole or in part by software, hardware and a combination thereof. Each of the above-mentioned modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory of the computer device in the form of software, so that the processor can call and execute the operations corresponding to each of the above modules.

[0205] In an exemplary embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as shown in FIG. Fig.10 As shown. The computer device includes a processor, a memory, an input / output interface, a communication interface, a display unit and an input device. Among them, the processor, the memory and the input / output interface are connected through a system bus, and the communication interface, the display unit and the input device are connected to the system bus through the input / output interface. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and the external device. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be implemented through WIFI, a mobile cellular network, near field communication (Near Field Communication, NFC) or other technologies. When the computer program is executed by the processor, a wafer data processing method is implemented. The display unit of the computer device is used to form a visually visible picture, which can be a display screen, a projection device or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device can be a touch layer covering the display screen, or a button, trackball or touchpad set on the computer device shell, or an external keyboard, touchpad or mouse.

[0206] Those skilled in the art will understand that Fig.10The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0207] In one embodiment, a chip is further provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor implements the steps in the above method embodiments when executing the computer program.

[0208] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments are implemented.

[0209] In one embodiment, a computer program product is provided, including a computer program, which implements the steps in the above method embodiments when executed by a processor.

[0210] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant regulations.

[0211] Those of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, an artificial intelligence (AI) processor, etc., but are not limited to this.

[0212] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0213] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A wafer data processing method, characterized in that: The method comprises: Acquire a plurality of test data sets of wafers to be inspected, and construct a test space vector for each wafer to be inspected according to the test data sets; According to the space vectors to be tested of the multiple wafers to be tested, the multiple wafers to be tested are classified to obtain multiple wafer groups.

2. The method according to claim 1, characterized in that The method of classifying the plurality of wafers to be inspected according to the space vectors to be inspected of the plurality of wafers to be inspected to obtain a plurality of wafer groups includes: Determining the vector space distance of the plurality of wafers to be inspected according to the space vector to be inspected of each wafer to be inspected; According to the vector space distance, the plurality of wafers to be inspected are classified to obtain a plurality of wafer groups.

3. The method according to claim 2, characterized in that Determining the vector space distances of the plurality of wafers to be inspected includes: Vector calculation is performed on any two wafers to be inspected among the plurality of wafers to be inspected to obtain vector space distances between any two of the wafers to be inspected.

4. The method according to claim 2, characterized in that: The method of classifying the plurality of wafers to be inspected according to the vector space distance to obtain a plurality of wafer groups includes: The plurality of wafers to be inspected are classified according to the vector space distances between two of the wafers to be inspected by using a clustering algorithm to obtain a plurality of wafer groups.

5. The method according to claim 1, characterized in that The method further comprises: Obtaining the number of wafers in each of the plurality of wafer groups; Sorting the plurality of wafer groups according to the number of wafers, and determining a preset number of target wafer groups arranged in sequence from the sorted plurality of wafer groups; Target wafers having similar test characteristics are determined from the preset number of target wafer groups.

6. The method according to claim 1, characterized in that The step of acquiring a plurality of test data sets of wafers to be inspected, and constructing a test space vector for each wafer to be inspected according to the test data sets, comprises: Acquire a plurality of test data sets of wafers to be inspected, and perform normalization processing on the test data sets to obtain a normalized parameter set of each wafer to be inspected; According to the normalized parameter set, a space vector to be tested of each wafer to be tested is constructed.

7. The method according to claim 1, characterized in that The step of acquiring a plurality of test data sets of wafers to be inspected and constructing a test space vector for each wafer to be inspected according to the test data sets includes: Acquire a test data set of at least one electrical parameter of a plurality of wafers to be tested, and perform normalization processing on the test data set of at least one electrical parameter to obtain a normalized parameter set; According to the normalized parameter set, a space vector to be tested of each wafer to be tested under each electrical parameter is constructed.

8. The method according to claim 7, characterized in that The step of normalizing the test data set of the at least one electrical parameter to obtain a normalized parameter set includes: Determining data characteristics of each electrical parameter based on the test type of the electrical parameter; Based on the data features, the test data set is normalized to obtain a normalized parameter set.

9. The method according to claim 8, characterized in that The method of normalizing the test data set based on the data features to obtain a normalized parameter set further includes: Based on the data features, all test values ​​of the test data sets with different electrical parameters are normalized to the same data range.

10. The method according to claim 8, characterized in that The step of normalizing the test data set based on the data features to obtain a normalized parameter set includes: In a case where the data feature is that the value range of the test data set is greater than a preset value range, sorting the test values ​​in the test data set, and determining a percentile value according to the sorting value of each test value in the test data set; Determine a corresponding normalization parameter according to the percentile value of each test value to obtain a normalization parameter set; or When the data feature is that the number of identical test values ​​in the test data set is greater than a preset number, sorting the test values ​​in the test data set to obtain a sorting value of each test value in the test data set; A normalized parameter for each test value is determined based on the maximum value among the ranked values ​​to obtain a normalized parameter set.

11. The method according to claim 6, characterized in that The step of constructing a space vector to be tested for each wafer to be tested according to the normalized parameter set comprises: Partitioning each of the wafers to be inspected to obtain a plurality of wafer partitions; Determine the normalization parameter of each wafer partition according to the position intervals corresponding to the multiple wafer partitions and the target position corresponding to each test value in the normalization parameter set; the target position is the position of each test value on the wafer to be tested; According to the normalized parameters of each wafer partition, a corresponding space vector to be tested of each wafer to be tested is constructed.

12. The method according to claim 5, characterized in that The method further comprises: According to the target wafer, obtaining corresponding production information; A fault analysis is performed on the target wafer according to the production information to determine wafer production problems.

13. A wafer data processing device, characterized in that: The device comprises: A data processing module is used to obtain a test data set of multiple wafers to be detected, and construct a test space vector for each wafer to be detected according to the test data set; The classification module is used to classify the multiple wafers to be inspected according to the space vectors to be inspected of the multiple wafers to be inspected, so as to obtain multiple wafer groups.

14. A chip comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 12 are implemented.

15. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 12 are implemented.

16. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 12 are implemented.

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