Component carrier, manufacturing method and use of decontamination treatment

Abstract

A component carrier (100) is described, comprising a stack (101) having at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (102), where the at least one electrically insulating layer structure (102) comprises: i) an insulating material (110), and ii) a filler (120) embedded in the insulating material (110), where the filler (120) comprises at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (102). At least one of the fillers (120) is exposed at one of the major surfaces of the electrically insulating layer structure (102), and wherein the exposed at least one of the fillers (120) comprises a higher roughness surface portion (125) and a lower roughness surface portion (126).

Description

Technical Field

[0001] The invention relates to a component carrier having an insulating material with an embedded filler, wherein at least one filler is exposed and comprises a surface portion with a higher roughness and a surface portion with a lower roughness. The invention also relates to a method for producing a component carrier, in particular to a method for producing a component carrier using a decontamination process. The invention also relates to the specific use of an excimer laser for decontaminating a surface and having a more uniform roughness on the surface.

[0002] Thus, the present invention may relate to the technical field of manufacturing component carriers such as printed circuit boards or IC substrates. Background Art

[0003] In the context of the increasing product functionality of component carriers equipped with one or more electronic components, the increasing miniaturization of such electronic components and the increasing number of electronic components mounted on component carriers such as printed circuit boards, increasingly powerful array components or packages with a plurality of electronic components are being used, which have a plurality of contacts or connections with increasingly smaller spacings between them. During operation, the removal of the heat generated by these electronic components and the component carrier itself is becoming an increasing problem. In addition, effective protection against electromagnetic interference is also becoming an increasing problem. At the same time, the component carrier should be mechanically robust and electrically and magnetically reliable in order to be able to operate even under adverse conditions.

[0004] For example, during component carrier manufacturing, a so-called decontamination process may be employed. This process may be used to clean the component carrier preform (so-called panel) surface and holes, in particular by removing resin stains. This process may provide the surface roughness that may be required for improving the adhesion of further layers, such as copper layers, to the surface to be decontaminated.

[0005] Conventionally, the decontamination process is carried out as a wet process, in particular by etching the surface of the component carrier preform (e.g. using permanganate (ions)). However, some disadvantages may occur if the component carrier layer at the surface to be etched includes embedded particles. For example, etching can (significantly) affect resin materials that are stronger than the filler material. In the case of silicon dioxide (SiO2) filler particles, these filler particles are usually not affected by etching, while the resin in which these filler particles are embedded is removed by etching.

[0006] When the resin closely adjacent to the corresponding filler particles is etched too much, the filler particles may not be tightly bonded to the resin, and the filler particles may fall off the resin and fall into, for example, a chemical processing tank, which may contaminate the chemicals / products and cause material waste and possible product quality problems. In addition, the decontamination process may not form a uniform roughness on the surface of the insulating layer, so it may be difficult to form a fine line structure and may also cause some product quality problems.

[0007] Figure 4A and Figure 4B A conventional circuit board 200 having a resin material 210 is respectively shown. The resin material 210 includes a plurality of filler particles 220 embedded therein.

[0008] Figure 4A : In this top view, some holes 230 can be seen on the exposed major surface of the resin material 210. Since the desmear etching process removes the resin material 210 around the silica filler particles 220, but does not affect the filler particles 220 themselves, these filler particles can actually fall out of the resin material 210 matrix. The result of this situation will be an uneven surface roughness on the product and poor quality.

[0009] Figure 4B : In this cross section of the resin material 210, it can be seen that Figure 4A In the process steps after the state of , the copper layer has been deposited on the main surface in a non-electrical manner. Due to the uneven surface roughness and the hole 230, the copper layer is also uneven and penetrates into the hole 230, resulting in not only a lower quality electrical connection, but also a lower quality product with defects such as copper residue. In the subsequent process, it is difficult to remove such an undesirable copper structure, and the reliability of the product is greatly risked. Summary of the invention

[0010] It may be desirable to manufacture component carriers using a decontamination process in an efficient and robust manner.

[0011] A component carrier, a production method and a use are provided.

[0012] According to one aspect of the invention, a component carrier, such as a printed circuit board or an IC substrate, is described, which comprises a (layer) stack having at least one electrically conductive layer structure and at least one electrically insulating layer structure.

[0013] At least one electrically insulating layer structure comprises:

[0014] i) insulating materials (such as resins), and

[0015] ii) Fillers (especially spherical fillers rather than fibrous fillers) embedded in the insulating material (filler particles).

[0016] At least one of the fillers is exposed at one of the main surfaces of the electrical insulating layer structure, and the exposed at least one of the fillers includes a surface portion with higher roughness and a surface portion with lower roughness (wherein the surface roughness of the surface portion with higher roughness is greater than the surface roughness of the surface portion with lower roughness).

[0017] According to another aspect of the invention, a method of manufacturing a component carrier, for example as described above, is described, the method comprising:

[0018] i) providing a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure, wherein the at least one electrically insulating layer structure has an outer main surface defined at least in part by an insulating material and a filler embedded in the insulating material, and

[0019] ii) laser treatment of the outer main surface (of the stack) by laser ablation from a laser source (in particular an excimer laser) to roughen the exposed surface portion of at least one filler (the exposed surface portion can be the result of laser ablation, or the exposed surface portion can be provided before laser ablation (the filler is already exposed before laser ablation)).

[0020] According to a further aspect of the invention, a use (method of use) of an excimer laser for desmearing an outer surface (part) of an electrically insulating layer structure of a component carrier stack having a filler embedded in an insulating material is described.

[0021] In the context of this document, the term "filler" may particularly refer to a material suitable for embedding into an electrically insulating material (e.g., a resin). Here, the filler may be configured to provide a specific function in the insulating material, such as the mechanical stability of the product, and the filler may also affect the dielectric properties of the insulating material, such as Dk, Df with respect to electrical properties. In an example, the filler may be configured as particles, such as beads. Although in the example, the filler may be equivalent to a spherical shape, in another example, the filler may be formed into a fibrous shape. In a preferred embodiment, a spherical filler is applied to an insulating (resin) material. A specific example of an electrically insulating layer structure may be an Ajinomoto Build-up Film (ABF), in which spherical particles are embedded in a resin layer. In another example, the filler material may be (substantially) unaffected by a wet decontamination process, particularly unaffected by etching. In a specific example, the filler material includes silicon dioxide. Additionally or alternatively, the filler material may include a ceramic material, such as aluminum oxide and / or titanium oxide and / or boron nitride and / or silicon carbide. The filler may be solid or hollow.

[0022] In the context of the present invention, the term "laser treatment" may particularly refer to the process of applying a laser beam to a component carrier, in particular to the process of applying a laser beam to a component carrier under manufacture. Laser treatment may be laser ablation to remove material from an exposed surface portion. In the present context, such laser treatment may be used to perform a decontamination process, i.e. to remove residues and / or to roughen the surface. "Excimer (stimulated dimer) laser" may be a specific type of ultraviolet laser and may be an established technical term. Ultraviolet wavelengths are typically 100nm to 400nm, and extreme ultraviolet wavelengths are 10nm to 100nm.

[0023] In the context of this document, the term "component carrier" may particularly denote any supporting structure capable of accommodating one or more components on and / or in the component carrier to provide mechanical support and / or electrical connection. In other words, the component carrier may be configured as a mechanical and / or electronic carrier for the components. In particular, the component carrier may be one of a printed circuit board, an organic interposer, a metal core substrate, an inorganic substrate and an IC (integrated circuit) substrate. The component carrier may also be a hybrid board combining different types of component carriers of the types mentioned above. The component carrier may include at least one electrically insulating structure and an electrically conductive structure.

[0024] The term "component carrier preform" (in manufacturing) may refer to a semi-finished product which, after several process steps, will form the final component carrier. For example, a preform may be, for example, a panel comprising a plurality of (semi-finished) component carriers which are to be separated in a further manufacturing step.

[0025] In the context of this document, the term "decontamination treatment" may particularly denote a process in which a decontamination operation is applied in component carrier manufacturing, i.e. a surface cleaning and / or roughening of a component carrier preform in component carrier manufacturing. In particular, resin surfaces and pores may be cleaned, and the surface may be roughened to improve adhesion properties. Decontamination processes may include wet decontamination and dry decontamination. Wet decontamination may use liquid chemicals to treat the surface, and dry decontamination may use gases or lasers to attack or treat the surface.

[0026] In the context of this document, the term "surface roughness" may particularly refer to a property of a surface. Surface roughness may be considered as a relative term, for example, a first portion may have a higher surface roughness, whereas a second portion may have a lower surface roughness.

[0027] The "roughness" of a surface quantifies the degree to which the surface deviates from its ideal shape. Any deviation is usually analyzed in the direction of the surface's normal vector and characterized by amplitude, which is the height or length of the deviation from the surface normal, and frequency, which represents the amount or number of deviations per unit area. Surface roughness is related to the friction between interacting rough surfaces where they move relative to each other.

[0028] One of the most common roughness parameters is Ra, which can be the arithmetic mean of the absolute values ​​of the surface deviations from the mean surface profile. The unit of the roughness parameter Ra is length and is usually measured in micrometers or nanometers. For example, the mean surface profile is filtered out from the original surface profile, i.e. the surface profile being measured, by eliminating the waviness component of the surface deviations.

[0029] Therefore, the roughness Ra can be calculated as:

[0030] Ra=∑ m＝1,...,M ∑ n＝1,...,N |Z(X m ,y n )- <z>| / MN

[0031] as well as

[0032] <z>=∑ m＝1，...，M ∑ n＝1，...，N z(X m ,y n ) / MN

[0033] Here, the sampling point (x m ,y n ) are equidistant in the x and y directions, which span the plane of the measured surface, while z is the normal direction of the measured surface. Therefore, z(x m ,y n ) indicates that at the sampling point (x m ,y n ) is the surface deviation from the mean surface profile in the direction of the surface normal. M and N determine the evaluation length in the X and Y directions, respectively.

[0034] According to an exemplary embodiment, the present invention can be based on the idea that a component carrier can be manufactured in an efficient and robust manner using a decontamination process, wherein an exposed surface portion of an electrically insulating layer structure (comprising an insulating material with embedded fillers) is treated in such a way that the fillers located near the exposed surface portion are also treated and comprise surface portions of higher roughness and portions of lower roughness, respectively, after the treatment step. In other words, the decontamination process is performed in such a way that not only the insulating material is removed and roughened, but also the embedded fillers are removed and roughened. As a result, some of the fillers in the filler are exposed at the exposed surface portions of the insulating material and are also roughened.

[0035] Thus, the roughness of the exposed surface portion can be particularly uniform. Figure 4B ) in a further step, the layer can be arranged in a uniform manner without non-electrical permeation problems. By these measures, the overall product quality and reliability of the component carrier can be improved.

[0036] Although the conventional decontamination process (see above) uses wet etching that affects the insulating material (significantly) more than the filler particles, resulting in the disadvantages discussed above, the inventors have found that a more efficient and reliable process can be provided by treating the insulating material and the filler in a similar manner. During the wet decontamination process, when the resin is etched too much, the filler particles may not be tightly bonded to the resin as expected, but instead the filler particles may fall off the component carrier and fall into, for example, the chemical processing tank, which will contaminate the chemical / product and will cause waste of material and reduce the quality of the product. In addition, the decontamination process cannot form a uniform roughness on the surface of the insulating layer, so it may be difficult to form fine line structures and it may also cause some product quality problems.

[0037] In a preferred embodiment, the treatment process can be accomplished by laser treatment / ablation, for example using an excimer laser. It has been surprisingly found that this method can be particularly effective in roughening insulating materials and embedded fillers in a similar manner. The process can be implemented in an existing production line in a straightforward manner. In addition, the cost of chemicals for wet etching can be avoided in this way.

[0038] Exemplary Embodiments

[0039] According to an embodiment, a surface portion with a higher roughness is associated with an exposed portion of at least one of the fillers that is exposed. This structural feature can directly reflect a manufacturing step of simultaneously roughening the exposed surface portion of the insulating material and a portion of the embedded filler. In other words, a surface treatment step (e.g., using a laser) is performed on the main surface of the electrically insulating layer structure, thereby removing the insulating material / roughening the insulating material and also removing the filler material / roughening the filler material. During this process, the fully embedded filler can be partially exposed at the exposed surface portion. This can have the following advantages: the exposed surface portion is provided with a higher degree of consistency. In the context of this article, the term "main surface" of the body can particularly refer to one of the two largest opposite surfaces of the body or the outermost or exposed opposite surface of the body. The main surface can be connected by a circumferential side wall. The thickness of the body, such as the thickness of the carrier body, can be defined by the distance between the two opposite main surfaces.

[0040] According to a further embodiment, the surface (exposed surface portion) on a main surface (in particular the same main surface) of the electrically insulating layer structure where the at least one exposed filler is exposed has a roughness value corresponding to a surface portion of higher roughness of the at least one exposed filler; and alternatively, the surface portion on a main surface (in particular the same main surface) of the electrically insulating layer structure where the at least one exposed filler is exposed has a roughness value different from the roughness value of another surface portion. This may provide the advantage that a specific consistency and / or surface roughness may be achieved. Depending on the filler material, the roughening (e.g. defined by Ra) of the exposed filler surface portion may be comparable / similar or different to the roughening of the exposed surface of the insulating material. Thus, the consistency of the roughness of the entire exposed surface may be higher.

[0041] According to a further embodiment, the surface parts of the filler with a higher roughness protrude beyond the insulating material. In this case, the filler can be particularly stable for handling (decontamination) processes, that is, the filler is a highly stable material. The protrusion can be used as an anchor to achieve a good connection with another layer structure, such as a copper layer. By some surface treatments, the wettability of the surface of the filler can become better, so that the filler can preferably be immersed or penetrated into one or more other insulating layers.

[0042] According to a further embodiment, the surface portion of higher roughness of the filler is flush with the roughened surface of the insulating material. This may provide the advantage that the exposed surface portion comprises a higher consistency.

[0043] According to another embodiment, the exposed surface portion of the filler with a lower roughness faces away from the surface of the insulating material that makes the exposed filler exposed. This structural feature also reflects the manufacturing step of roughening the surface portion of the insulating material and the exposed surface portion of the filler during the same processing. Although the filler usually includes a surface with a lower roughness, the surface will be roughened during the processing. Therefore, only the surface portion associated with the exposed surface portion of the insulating material is roughened.

[0044] According to a further embodiment, the component carrier further comprises: at least one further electrically insulating layer structure, which further electrically insulating layer structure comprises further insulating material and further fillers, wherein at least some of the further fillers respectively comprise further surface portions of higher roughness and further surface portions of lower roughness. This can provide the following advantage: the stack comprises two or more layers which have been subjected to an advantageous decontamination process. Thus, the overall quality of the product can be improved, since the surface of the insulating material can have a higher quality consistency and non-electrical permeates and non-electrical residues can be avoided. According to a further embodiment, the further lower roughness surface portion of the exposed further filler faces away from the surface of the further insulating material that exposes the further filler.

[0045] According to further embodiments, the exposed surface portion of the higher roughness of the filler of the electrically insulating layer structure faces the surface portion of the lower roughness of the further filler of the further electrically insulating layer structure, or the exposed surface portion of the higher roughness of the filler of the electrically insulating layer structure faces the surface portion of the lower roughness of the further filler of the further electrically insulating layer structure. Advantageously, the insulating layer and the further insulating layer can be stacked one above the other in the stack. According to this positioning, the surface portion of the lower roughness of one layer can face the surface portion of the higher roughness of the other layer in the vertical z-direction.

[0046] According to another embodiment, the exposed surface portion of the higher roughness of the filler and / or the other surface portion of the higher roughness of the other filler has a roughness Ra greater than 100nm, particularly greater than 200nm, more particularly greater than 500nm. Therefore, the roughness can be suitable for effectively and firmly connecting the metal layer, thereby avoiding delamination (and copper remaining due to non-electrical penetration). In an embodiment, the roughness is in the range of 50nm to 300nm. In another embodiment, the roughness is 200nm or higher. If the roughness is too high, it may have an impact on the signal transmission efficiency. If the roughness is too low, it may cause higher yield losses.

[0047] According to a further embodiment, the exposed lower roughness surface portion of the filler has a roughness Ra below 100 nm. It follows that without additional roughening, the surface portion of the filler would not be suitable for efficient and strong connection to the metal layer.

[0048] According to a further embodiment, the filler has a diameter in the range of 50 nm to 30 μm, in particular 50 nm to 15 μm. This range is particularly effective for stabilizing the insulating material while allowing a certain flexibility / bendability. In an example, the maximum filler size may be about 10 μm or more, depending on the molding (matrix) material. Considering the nanofiller ABF, the filler size range may be in the range of 10 nm to 15 μm.

[0049] According to another embodiment, filler includes silicon dioxide or other inorganic materials (combination compound) (inorganic filler can be used alone, or two or more inorganic fillers can be used in combination in any ratio, thus the thermal expansion coefficient of the cured material obtained by curing the resin combination can be reduced and warping can be controlled). Filler particles can make the depth of the concave part of the polished surface of the resin smaller, and the dielectric loss tangent of the cured material obtained by curing the resin combination is reduced. In addition, filler can contribute to reducing the tensile elastic modulus of the cured material. In addition, filler particles can preferably be surface treated with appropriate surface treatment, because surface treatment can suppress the particle aggregation of filler or suppress the particles of filler from falling off the polished surface, and can obtain good uniformity on the resin sheet surface, and improve the moisture resistance and dispersibility of particle filler. Described material can make insulating material effectively stable, but in the decontamination etching process, it can cause shortcomings (see above), and fillers with different materials or different shapes or even different sizes inside can affect the dielectric properties of insulating material in terms of electrical properties. However, by treating the silica filler and the exposed surface portions of the insulating material together, in particular by laser ablation, the advantages of higher stability and surface roughness consistency can be combined.

[0050] In other embodiments, the filler may include conductive particles, such as an electrically insulating material (ie, a polymer material) coated with an electrically conductive metal such as gold, nickel, or the like.

[0051] According to a further embodiment, the laser source comprises an excimer laser.This may provide the advantage that highly precise and mature technology from a manufacturing point of view may be directly applied to the decontamination process with high efficiency.

[0052] According to further embodiments, the method further comprises:

[0053] A mask, in particular, a glass mask is arranged between the stack and the laser source. The laser pattern on the surface can directly depend on the design of the glass mask. Therefore, specific tasks can be selectively completed, such as focusing on vias or graphic areas (see FIG. 3A to FIG. 3D ). Therefore, the manufacturing method can provide more design flexibility for different products and meet different functions of the products.

[0054] According to a further embodiment, the mask is partially transmissive and partially opaque to the laser light from the laser source (so that the surface of the insulating layer structure which is only overlapped by the transmissive part of the mask is processed by laser ablation). In this way, a laser pattern with flexible design can be realized in a simple and direct way.

[0055] According to further embodiments, the method further comprises:

[0056] Before and / or after laser treatment, the stack is cleaned. Such a cleaning step can further improve product quality. In particular, a consistent surface roughness can make the cleaning process more effective.

[0057] According to further embodiments, the method further comprises:

[0058] The roughened main surface of at least one electrically insulating layer structure is metalized, in particular, the roughened main surface of the insulating material is metalized. Due to the surface roughness, the electrically conductive layer (metal layer) can be arranged on the electrically insulating layer structure in an effective and strong manner. First, the seed layer can be provided in a non-electrical manner (e.g., sputtering). In a further step, the electrically conductive layer can be provided, for example, by plating.

[0059] According to further embodiments, the method further comprises:

[0060] Prior to the laser treatment, the stack is laminated and / or laser drilled. This may provide the advantage of a particularly efficient process: vias may be formed by laser drilling and thereafter a decontamination process may be performed using the laser.

[0061] According to further embodiments, the method further comprises:

[0062] The laser treatment is repeated for a further electrically insulating layer structure of the stack, wherein the further electrically insulating layer structure comprises a further insulating material and a further filler embedded in the further insulating material. In this way, the method can be implemented directly into existing component carrier production, in particular directly into a stacking process.

[0063] According to another embodiment, at least one of the following advantages can be achieved: excimer laser ablates the resin and (SiO2) filler simultaneously, the ablation depth can be controlled by the excimer method, uniform (ABF) surface roughness, no uneven non-electrolytic copper penetration problem, dry process, and reduced chemical (etching) costs.

[0064] According to another embodiment, at least two different portions on the same surface of the insulating material are selectively roughened (e.g. using a mask, see Figure 3D ). This means that there is at least one smooth section and at least one rough section on the same surface. With this design, fine structures and higher densities of component carrier products can be achieved. In addition, the design flexibility with regard to specific functions can be highly improved.

[0065] According to a further embodiment, at least 30% (particularly at least 40%, more particularly at least 50%, more particularly at least 60%) of the volume of the insulating material of at least one electrically insulating layer is occupied by fillers (filler particles). Thus, a stable, strong yet flexible insulating layer can be provided.

[0066] According to another embodiment, at least 3% (particularly at least 5%, more particularly at least 10%) of the total amount of filler comprises a surface portion of higher roughness. Thus, a large amount of filler is exposed (due to the large amount of filler) but does not (substantially) cause adhesion problems.

[0067] According to further embodiments, at least some of the fillers are in direct (physical) contact with each other. This may be due to a greater number (and / or larger size) of fillers, thereby stabilizing the insulation layer.

[0068] According to a further embodiment, the surface portion of the higher roughness of at least some fillers (particularly (substantially) all fillers) is not in contact (not in contact) with another filler (another filler in the filler). In other words, the roughened surface is present only at the main surface that is not in contact with other fillers. Therefore, the treatment method can be particularly effective.

[0069] In an embodiment, the component carrier is formed as a plate. This helps to achieve a compact design, wherein the component carrier nevertheless provides a large base for the components mounted on the component carrier. In addition, bare wafers, in particular as an example of embedded electronic components, can be easily embedded in thin plates such as printed circuit boards due to their small thickness.

[0070] In an embodiment, the component carrier is configured as one of a printed circuit board, a substrate (particularly an IC substrate), and an interposer.

[0071] In the context of the present application, the term "printed circuit board" (PCB) may particularly denote a plate-like component carrier formed by laminating a plurality of electrically conductive layer structures with a plurality of electrically insulating layer structures, for example by applying pressure and / or supplying heat energy. As a preferred material for PCB technology, the electrically conductive layer structures are made of copper, while the electrically insulating layer structures may include, for example, resin and / or glass fibers, so-called prepregs or FR4 materials, PID, ABF. The individual electrically conductive layer structures may be connected to each other in a desired manner by forming holes through the laminate, for example by laser drilling or mechanical drilling, and by partially or completely filling these holes with electrically conductive material, in particular copper, to form vias or any other through-hole connections. The filled holes connect the entire stack (through-hole connections extending through a plurality of layers or the entire stack), or the filled holes connect at least two electrically conductive layers, the filled holes being so-called vias. Similarly, optical interconnects may be formed through the layers of the stack to receive an electro-optical circuit board (EOCB). In addition to one or more components that may be embedded in the printed circuit board, the printed circuit board is generally constructed to accommodate one or more components on one surface or two opposite surfaces of the plate-shaped printed circuit board. The one or more components can be connected to the corresponding main surface by welding. The dielectric portion of the PCB may include a resin with reinforcing fibers (e.g., glass fibers).

[0072] In the context of the present application, the term "substrate" can particularly represent a smaller component carrier. Relative to a PCB, a substrate can be a relatively small component carrier on which one or more components can be mounted, and can be used as a connection medium between one or more chips and another PCB. For example, the substrate can have a size roughly the same as the components (especially electronic components) to be mounted on the substrate (for example, in the case of a chip-scale package (CSP)). In another embodiment, the substrate can be substantially larger than the allocated components (for example, in a flip chip ball grid array, FCBGA configuration). More specifically, the substrate can be understood as a component carrier for a carrier for an electrical connector or an electrical network and a component carrier for a connector that is equivalent to a printed circuit board (PCB) but has a relatively high density of lateral and / or vertical arrangements. The lateral connector is, for example, a conductive path, and the vertical connector can be, for example, a drill hole. These lateral and / or vertical connectors are arranged in the substrate and can be used to provide an electrical connection, a thermal connection and / or a mechanical connection between a contained component or an uncontained component (such as a bare wafer) - especially an IC chip - and a printed circuit board or an intermediate printed circuit board. Therefore, the term “substrate” also includes “IC substrate.” The dielectric part of the substrate may include a resin with reinforcement particles, such as reinforcement spheres, in particular glass spheres.

[0073] The substrate or interposer may include or be composed of at least one layer of glass, silicon (Si), and / or a photoimageable or dry-etchable organic material such as an epoxy-based laminate material (e.g., an epoxy-based laminate film), or a polymer composite (which may or may not include photosensitive and / or heat-sensitive molecules) such as polyimide or polybenzoxazole.

[0074] In an embodiment, at least one electrically insulating layer structure comprises at least one of the following: a resin or polymer, such as an epoxy resin, a cyanate resin, a benzocyclobutene resin, a bismaleimide triazine resin, a polyphenyl derivative (e.g. based on polyphenylene ether, PPE), a polyimide (PI), a polyamide (PA), a liquid crystal polymer (LCP), polytetrafluoroethylene (PTFE) and / or a combination thereof. A reinforcing structure, such as a mesh, a fiber, a sphere or other types of filler particles, made of glass (multilayer glass), may also be used to form a composite material. A semi-cured resin combined with a reinforcing agent, such as a fiber impregnated with the above resin, is called a prepreg. These prepregs are usually named after their characteristics, such as FR4 or FR5 to describe their flame retardant properties. Although prepregs, especially FR4, are generally preferred for rigid PCBs, other materials may also be used, in particular epoxy-based laminates (such as laminate films) and photoimageable dielectric materials. For high-frequency applications, high-frequency materials such as polytetrafluoroethylene, liquid crystal polymers and / or cyanate resins may be preferred. In addition to these polymers, low temperature co-fired ceramics (LTCC) or other low DK materials, lower DK materials or ultra-low DK materials can be applied as electrically insulating structures in the component carrier.

[0075] In an embodiment, at least one electrically conductive layer structure comprises at least one of copper, aluminum, nickel, silver, gold, palladium, tungsten, magnesium, carbon, (particularly doped) silicon, titanium and platinum. Although copper is generally preferred, other materials or other types of coatings thereof are also possible, in particular coated with superconducting materials or conducting polymers such as graphene or poly (3,4-ethylenedioxythiophene) (PEDOT), respectively.

[0076] At least one further component may be embedded in the stack and / or surface mounted on the stack. The component and / or at least one further component may be selected from: a non-conductive inlay, a conductive inlay (such as a metal inlay, preferably comprising copper or aluminum), a heat transfer unit (such as a heat pipe), a light-conducting component (such as an optical waveguide or optical conductor connector), an electronic component or a combination thereof. The inlay may be, for example, a metal block with or without an insulating material coating (IMS-inlay), which may be embedded or surface mounted to promote heat dissipation. Suitable materials are defined according to their thermal conductivity, which should be at least 2 W / mK. Such materials are typically based on, but not limited to, metals, metal oxides and / or ceramics, such as copper, aluminum oxide (Al2O3) or aluminum nitride (AlN). In order to increase the heat exchange capacity, other geometries with increased surface area are also often used. Furthermore, the component may be an active electronic component (implementing at least one pn junction), a passive electronic component such as a resistor, an inductor or a capacitor, an electronic chip, a memory device (e.g., a DRAM or other data memory), a filter, an integrated circuit (e.g., a field programmable gate array (FPGA), a programmable array logic (PAL), a general purpose array logic (GAL), and a complex programmable logic device (CPLD)), a signal processing component, a power management component (e.g., a field effect transistor (FET), a metal oxide semiconductor field effect transistor (MOSFET), a complementary metal oxide semiconductor (CMOS), a junction field effect transistor (JFET), or an insulated-gate field effect transistor (IGFET). Transistors (IGFETs), the above power management components are all based on semiconductor materials such as silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), gallium oxide (Ga2O3), indium gallium arsenide (InGaAs), indium phosphide (InP) and / or any other suitable inorganic compound), optoelectronic interface components, light emitting diodes, optocouplers, voltage converters (such as DC / DC converters or AC / DC converters), cryptographic components, transmitters and / or receivers, electromechanical transducers, sensors, actuators, microelectromechanical systems (MEMS), microprocessors, capacitors, resistors, inductors, batteries, switches, cameras, antennas, logic chips and energy harvesting units. However, other components can be embedded in the component carrier. For example, a magnetic component can be used as a component. Such a magnetic component can be a permanent magnetic component (such as a ferromagnetic component, an antiferromagnetic component, a multiferroic component or a ferrimagnetic component, such as a ferrite core), or such a magnetic component can be a paramagnetic component. However, the component can also be, for example, an IC substrate, an interposer or another component carrier in a board-in-board configuration. The component can be surface mounted on the component carrier and / or can be embedded in the interior of the component carrier.In addition, other components can also be used as components, in particular those components that generate and emit electromagnetic radiation and / or are sensitive to electromagnetic radiation propagating from the environment.

[0077] In an embodiment, the component carrier is a laminated component carrier. In such an embodiment, the component carrier is a composite of multiple layers that are stacked and connected together by applying pressure and / or heat.

[0078] After processing the internal layer structure of the component carrier, one or more other electrically insulating layer structures and / or electrically conductive layer structures can be used (especially by lamination) to cover one main surface or two opposite main surfaces of the processed layer structure symmetrically or asymmetrically. In other words, the layering can be continued until the desired number of layers is obtained.

[0079] After the formation of the stack of electrically insulating layer structures and electrically conductive layer structures has been completed, the obtained layer structure or component carrier may be subjected to a surface treatment.

[0080] In particular, with regard to surface treatment, an electrically insulating solder resist may be applied to one or both of the opposite main surfaces of a layer stack or component carrier. For example, such a solder resist may be formed over the entire main surface and the layer of solder resist may be subsequently patterned to expose one or more electrically conductive surface portions that are used to electrically connect the component carrier to an electronic peripheral. Surface portions of the component carrier that remain covered by the solder resist, in particular surface portions containing copper, may be effectively protected from oxidation or corrosion.

[0081] As far as the surface treatment is concerned, a surface treatment can also be selectively applied to the exposed electrically conductive surface portions of the component carrier. Such a surface treatment can be an electrically conductive covering material on the exposed electrically conductive layer structures (such as, in particular, pads, conductive traces, etc., containing or consisting of copper) on the surface of the component carrier. If such exposed electrically conductive layer structures are not protected, the exposed electrically conductive component carrier material (in particular, copper) may oxidize, making the component carrier less reliable. The surface treatment can then be formed as a joint between, for example, a surface mounted component and a component carrier. The surface treatment has the function of protecting the exposed electrically conductive layer structures (in particular, copper circuits) and realizing a joining process with one or more components, for example, by soldering. Examples of suitable materials for the surface treatment are organic solderability preservatives (OSP), electroless nickel immersion gold (ENIG), electroless nickel immersion palladium immersion gold (ENIPIG), electroless nickel electroless palladium immersion gold (ENEPIG), gold (in particular, hard gold), chemical tin (chemical and electroplated), nickel-gold, nickel-palladium, etc. Nickel-free materials can also be used for the surface treatment, especially for high-speed applications. Examples are ISIG (Immersion Silver Gold) and EPAG (Electroless Palladium Autocatalytic Gold). BRIEF DESCRIPTION OF THE DRAWINGS

[0082] The aspects defined above and further aspects of the invention are apparent from the examples of embodiment described hereinafter and are explained with reference to these examples of embodiment.

[0083] Figure 1 A component carrier according to an exemplary embodiment of the invention is shown.

[0084] Figure 2 A laser processing apparatus according to an exemplary embodiment of the present invention is shown.

[0085] FIG. 3A to FIG. 3D Masks for a laser processing apparatus according to exemplary embodiments of the present invention are respectively shown.

[0086] Figure 4A and Figure 4B A conventional circuit board is shown separately. DETAILED DESCRIPTION

[0087] The illustrations in the drawings are schematically. In different drawings, similar or identical elements are provided with the same reference signs.

[0088] Figure 1 A component carrier 100 according to an exemplary embodiment of the present invention is shown. The component carrier comprises a stack 101 having at least one electrically conductive layer structure 104 and (in this example) two electrically insulating layer structures stacked one above the other. The lower electrically insulating layer structure 102 comprises an insulating material 110, such as a resin, for example ABF, and the lower electrically insulating layer structure 102 comprises a filler 120 embedded in the insulating material 110. The filler 120 is in this example a filler bead (spherical, not a fiber) embedded in the resin. In a specific example, the filler 120 has a diameter in the range of 50 nm to 15 μm, and / or the filler 120 comprises silicon dioxide. A plurality of fillers 120 are exposed at the upper main surface 105 of the lower electrically insulating layer structure 102.

[0089] It can be seen that the exposed fillers 120 include a surface portion 125 of higher roughness and a surface portion 126 of lower roughness. Here, the surface portion 125 of higher roughness is associated with the exposed portion of the corresponding filler 120, while the surface portion 126 of lower roughness is associated with the unexposed embedded portion of the corresponding filler 120.

[0090] The exposed upper main surface 105 of the electrically insulating layer structure 102, to which the exposed filler 120 is exposed, has a roughness value (e.g., Ra>100 nm) corresponding to the surface portion 125 of the higher roughness of the exposed filler 120. In other embodiments, the roughness values ​​may also be different. In addition, the surface portion 125 of the higher roughness of the filler 120 is flush with the roughened surface 105 of the insulating material. In other embodiments, the surface portion 125 of the higher roughness of the filler 120 may also protrude from the roughened upper main surface 105. The surface portion 126 of the lower roughness of the exposed filler 120 is then facing away from the main surface 105 of the insulating material to which the exposed filler 120 is exposed.

[0091] The stack 101 further comprises an additional electrically insulating layer structure 112, which is here located on top of the lower electrically insulating layer structure 102 and comprises an additional insulating material 111 and additional fillers 121 (the additional fillers 121 are also filler beads in this example), wherein a plurality of additional fillers 121 respectively comprise additional higher roughness surface portions and additional lower roughness surface portions. The exposed additional lower roughness surface portions of the additional fillers 121 face away from the exposed surface of the additional insulating material 111 where the exposed additional fillers 121 are exposed. In this example, the exposed additional lower roughness surface portions of the additional electrically insulating layer structure 112 face the higher roughness surface portions 125 of the exposed fillers 120 of the electrically insulating layer structure 102. A metal (copper) layer 104 is arranged on the surface of the additional insulating material 111. Due to the surface roughness, the connection between the insulating material and the metal is stable and strong with good uniformity.

[0092] Figure 2 A laser processing apparatus 160 is shown according to an exemplary embodiment of the present invention. In this exemplary embodiment, the laser processing apparatus 160 includes a laser source 140 (here an excimer laser) to provide a laser beam. The beam is attenuated by an attenuator 141 and sent to a mask 150 via a telescope 142, a homogenizer 143, and a field lens 144 (mirrors M1 to M3 are used to direct the beam path). After the beam passes through the mask 150, a projection lens 145 is used to project the beam onto a substrate, which here is a component carrier stack 101 (a component carrier under manufacture). Thus, the laser beam can be applied to a localized surface area (such as a component carrier stack 101) of the component carrier stack 101. Figure 2 ), or may be applied to the entire surface area of ​​component carrier layer stack 101 (not shown).

[0093] FIG. 3A to FIG. 3D An example of a mask 150 (e.g., a glass mask) for a laser processing device (e.g., a laser processing device as described above) according to an exemplary embodiment of the present invention is shown respectively. The laser beam can pass through the white area, but not through the black area. The laser beam will then produce a pattern corresponding to the design of the mask on the surface of the component carrier.

[0094] Figure 3A : The mask 150 is suitable for roughening the entire surface. The material roughness may depend, for example, on the size and density of the black areas and the excimer parameters.

[0095] Figure 3B : This mask 150 is suitable for via bottom residue removal and / or via design. The white circle is used to apply the excimer laser to the via location.

[0096] Figure 3C : The mask 150 is suitable for both surface roughening and removal of residue at the bottom of the via and / or via design. The white circle is used to apply the laser to the via location; the laser can roughen the surface and remove the residue at the bottom of the via at the same time.

[0097] Figure 3D :This mask 150 is suitable for selective roughening and / or graphic design. The white area can be used to apply the laser to the graphic area. Selective roughening for different parts can be provided on the same surface of the insulating material. This means that there will be smooth parts and rough parts on the same surface. With this design, fine structures and higher densities of component carrier products can be achieved.

[0098] List of reference numerals:

[0099] 100 Component carriers

[0100] 101 stacked pieces

[0101] 102 Electrical insulation layer structure

[0102] 104 Electrically conductive layer structure

[0103] 105 External / exposed roughened major surface (of insulating material)

[0104] 110 Insulation material

[0105] 111 Other insulating materials

[0106] 112 Additional electrical insulation layer structures

[0107] 120 Filling

[0108] 121 Additional fillers

[0109] 125 Surface part with higher roughness

[0110] 126 Surface part with lower roughness

[0111] 140 Laser source

[0112] 141 Attenuator

[0113] 142 Telescope

[0114] 143 Homogenizer

[0115] 144 Field lens

[0116] 145 Projection lens

[0117] 150 Mask

[0118] 160 Laser treatment

[0119] M Mirror

[0120] 200 Conventional circuit boards

[0121] 210 Conventional insulation materials

[0122] 220 Conventional filler particles

[0123] 230 holes

[0124] 240 Non-electrolytic copper layer.< / z> < / z>

Claims

1. A component carrier (100), comprising a stack (101) having at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (102), wherein: At least one of the electrically insulating layer structures (102) comprises: an insulating material (110), and Fillers (120), the fillers (120) being embedded in the insulating material (110), wherein at least one of the fillers (120) is exposed at one of the main surfaces (105) of at least one of the main surfaces of the electrically insulating layer structure (102); The at least one exposed filler (120) includes a surface portion (125) with a higher roughness and a surface portion (126) with a lower roughness.

2. The component carrier (100) according to claim 1, in, The higher roughness surface portion (125) is associated with an exposed portion of at least one of the fillers (120) that is exposed, and / or The lower roughness surface portion (126) is associated with an unexposed portion of at least one of the fillers (120) that is exposed.

3. The component carrier (100) according to claim 1 or 2, in, A surface portion on the main surface of at least one of the electrically insulating layer structures (102) where the at least one exposed filler (120) is exposed has a roughness value corresponding to the surface portion (125) of the higher roughness of the at least one exposed filler (120); and alternatively, a surface portion on the main surface of at least one of the electrically insulating layer structures (102) where the at least one exposed filler (120) is exposed has a roughness value different from the roughness of another surface portion, In particular, the surface portion on the same main surface of at least one of the electrically insulating layer structures (102) where the at least one exposed filler (120) is exposed has a roughness value corresponding to the higher roughness surface portion (125) of the at least one exposed filler (120); And alternatively, a surface portion on the same main surface of at least one of the electrically insulating layer structures (102) where the at least one filler (120) is exposed has a roughness value different from a roughness of another surface portion.

4. The component carrier (100) according to any one of the preceding claims, in, The higher roughness surface portion (125) of the filler (120) protrudes beyond the insulating material (110).

5. The component carrier (100) according to any one of the preceding claims, in, The lower roughness surface portion (126) of the exposed filler (120) faces away from the main surface (105) of the insulating material (110) where the exposed filler (120) is exposed.

6. The component carrier (100) according to any one of the preceding claims, further comprising: At least one further electrically insulating layer structure (112), the further electrically insulating layer structure comprising further insulating material (111) and further fillers (121), wherein at least some of the further fillers (121) respectively comprise further surface portions with higher roughness and further surface portions with lower roughness.

7. The component carrier (100) according to claim 6, in, The further lower roughness surface portion of the exposed further filler (121) faces away from the surface of the further insulating material (111) where the exposed further filler (121) is exposed, In particular, the exposed surface portion (125) of the filler (120) of the electrically insulating layer structure (102) with a higher roughness faces the further surface portion (125) of the further filler (121) of the further electrically insulating layer structure (112).

8. The component carrier (100) according to any one of the preceding claims, in, The exposed higher roughness surface portion (125) of the filler (120) has a roughness Ra greater than 100 nm.

9. The component carrier (100) according to any one of the preceding claims, in, The exposed lower roughness surface portion (126) of the filler (120) has a roughness Ra of less than 100 nm.

10. The component carrier (100) according to any of the preceding claims, in, The filler (120) has a diameter in the range of 50 nm to 30 μm.

11. The component carrier (100) according to any one of the preceding claims, in, The filler (120) includes silicon dioxide.

12. The component carrier (100) according to any one of the preceding claims, in, At least 40% of the volume of the insulating material (110) of at least one of the electrically insulating layer structures (102) is occupied by the filler (120), In particular, At least 5% of the total amount of the filler (120) comprises the higher roughness surface portion (125).

13. The component carrier (100) according to any one of the preceding claims, in, At least some of the fillers (120) are in direct contact with each other, In particular, at least some of the surface portions (125) of the fillers with higher roughness are not in contact with another filler, and in particular, substantially all of the surface portions (125) of the fillers with higher roughness are not in contact with another filler.

14. A method of manufacturing a component carrier (100), the method comprising: A stack (101) is provided comprising at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (102), wherein at least one of the electrically insulating layer structures (102) has an outer main surface (105) at least partially defined by an insulating material (110) and a filler (120) embedded in the insulating material (110); and The main surface (105) located on the outside is laser treated by laser ablation from a laser source (140) to roughen an exposed surface portion (125) of at least one filler (120).

15. The method according to claim 14, in, The laser source (140) includes an excimer laser.

16. The method according to claim 14 or 15, wherein: The method further comprises: A mask (150) is arranged between the stack (101) and the laser source (140), and in particular, a glass mask is arranged between the stack (101) and the laser source (140).

17. The method according to claim 16, in, The mask (150) is partially transmissive and partially opaque to the laser light from the laser source (140), so that only the surface of the insulating layer structure (102) overlapped by the transmissive portion of the mask (150) is processed by the laser ablation.

18. The method according to any one of claims 14 to 17, further comprising: Before and / or after the laser treatment, the stack (101) is cleaned.

19. The method according to any one of claims 14 to 18, further comprising: A roughened main surface (105) of at least one of the electrically insulating layer structures (102) is metallized (104), in particular a roughened main surface (105) of the insulating material (110) is metallized (104).

20. The method according to any one of claims 14 to 19, further comprising: Prior to the laser processing, the stack (101) is laminated and / or laser drilled.

21. The method according to any one of claims 14 to 20, further comprising: The laser treatment is repeated on a further electrically insulating layer structure (112) of the stack (101), wherein the further electrically insulating layer structure (112) comprises a further insulating material (111) and a further filler (121) embedded in the further insulating material (111).

22. Use of an excimer laser (140) for decontaminating an outer main surface (105) of an electrically insulating layer structure (102) of a component carrier stack (101), the electrically insulating layer structure having a filler (120) embedded in an insulating material (110).

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