Storage battery on-line impedance spectrum monitoring system

Abstract

The invention provides an online impedance spectroscopy monitoring system for a storage battery. The online impedance spectroscopy monitoring system comprises a single chip microcomputer, a current detection unit and a voltage detection unit, the current detection unit comprises a current excitation and signal detection unit, a first band-pass filtering unit and a first phase-locked amplification unit. The current excitation and signal detection unit is electrically connected with the single-chip microcomputer through the first band-pass filtering unit and the first phase-locked amplification unit in sequence. The method has the advantages that impedance measurement is carried out through the circuit integrated in the battery management system, an additional signal injection circuit and expensive frequency response analysis equipment are not needed, the low-cost and practical online monitoring function is achieved, measurement can be carried out under the condition that normal operation of the battery and connection equipment of the battery is not interrupted, and the reliability of the battery management system is improved. Therefore, the operation of the battery system in practical application is not influenced.

Description

Technical Field

[0001] The invention relates to the technical field of battery detection, and in particular to an online impedance spectrum monitoring system for a battery. Background Art

[0002] The main parameters for backup battery monitoring in the industry are battery voltage, temperature and internal resistance. Monitoring internal resistance can be done by handheld internal resistance tester or online internal resistance monitoring. The measurement method of handheld internal resistance tester is AC excitation method, which calculates the AC internal resistance value of the battery through 1kHZ sinusoidal wave excitation signal and battery response feedback voltage signal. The method of online internal resistance measurement is usually DC discharge method, which calculates the DC internal resistance value of the battery through the voltage drop and discharge current of the battery during discharge.

[0003] The main defect of the existing scheme is that no matter it is the AC method or the DC method, the existing scheme only detects the internal resistance data of the battery, which belongs to the ohmic resistance part. The electrochemical model of the battery and the Nyquist equivalent circuit show that the internal characteristics of the battery have not only ohmic resistance properties, but also electrochemical polarization resistance and polarization capacitance, which manifests as complex impedance vector characteristics, expressed as Z=R+jX.

[0004] The battery ohmic internal resistance is only a partial characteristic of the battery impedance. The impedance characteristics of the battery vary in different frequency domains. The existing AC method only detects the battery ohmic internal resistance at a frequency of 1 kHz, and the DC method only detects the battery ohmic internal resistance under a single disturbance. The impedance data of the battery under different frequency excitations is expressed as the characteristics of the impedance spectrum, which contains more effective information about the battery, such as working status and kinetic process, and can help study the electrochemical reaction mechanism and be better used to monitor the health of the battery. At present, the measurement of electrochemical impedance spectroscopy (EIS) in the laboratory is mainly carried out through an electrochemical workstation. The electrochemical workstation is large in size and is an offline measurement. It is not only expensive, but also takes a long time to collect and measure, and has high requirements for the test environment. These shortcomings limit the application scenarios of this method. Summary of the invention

[0005] The purpose of the present invention is to overcome the problem that the current battery impedance spectrum measurement cannot be performed online and can only be performed offline. Therefore, a battery online impedance spectrum monitoring system is proposed, which can realize system operation and the connection between the object under test and the system without cutting off. The generation and output of the disturbance excitation signal, as well as the detection and analysis of the response signal are all completed by the application scheme, without adding additional signal injection circuits and expensive frequency response analysis equipment, and the online measurement of the AC impedance spectrum can be continuously or periodically performed without interrupting the normal operation of the object under test and the power converter.

[0006] The present application proposes a battery online impedance spectrum monitoring system, comprising a single-chip microcomputer, a current excitation and detection unit and a voltage detection unit; the current detection unit comprises a current excitation and signal detection unit, a first band-pass filter unit, and a first phase-locked amplifier unit, and the current excitation and signal detection unit is electrically connected to the single-chip microcomputer through the first band-pass filter unit and the first phase-locked amplifier unit in sequence;

[0007] The voltage detection unit includes a voltage response signal detection unit, a second band-pass filter unit, and a second phase-locked amplifier unit, and the voltage response signal detection unit is electrically connected to the single-chip computer through the second band-pass filter unit and the second phase-locked amplifier unit in sequence;

[0008] The batteries are electrically connected to the current excitation and signal detection unit and the voltage response signal detection unit respectively after being connected in series.

[0009] The beneficial effects of the above scheme in the present application are: the present invention can detect the polarization internal resistance and polarization capacitance of the battery at multiple frequencies, which can more comprehensively reflect the performance characteristics of the battery, including its working state, aging degree, etc.;

[0010] By providing richer impedance data, the health status of the battery can be analyzed more accurately, its remaining life can be predicted, and important data support can be provided for battery monitoring in practical applications;

[0011] Impedance measurement is performed through the circuit integrated in the battery management system, without the need for additional signal injection circuits and expensive frequency response analysis equipment, thus achieving a low-cost and practical online monitoring function;

[0012] The measurements can be performed without interrupting the normal operation of the battery and its connected equipment, thus not affecting the operation of the battery system in the actual application.

[0013] Preferably, the current excitation and signal detection unit includes a low-pass filtering unit, an integral operation unit, an excitation and detection unit, and a signal extraction unit;

[0014] The low-pass filtering unit is electrically connected to the first band-pass filtering unit through the excitation and detection unit and the signal extraction unit in sequence, and the beneficial effect produced is: through low-pass filtering, integral operation and precise signal extraction, the system can stably detect the current excitation and voltage response signals of the battery, thereby ensuring the measurement accuracy and long-term stability of the system, especially in a complex battery operating environment.

[0015] Preferably, the low-pass filter unit includes a first resistor, a second resistor, a third resistor, a first capacitor, a second capacitor, a third capacitor, and a first operational amplifier;

[0016] The PWM signal output of the single-chip computer is grounded through a first resistor, and the end of the first resistor away from the ground is grounded through a second resistor, a third resistor, and a second capacitor in sequence, the node where the third resistor and the second capacitor are connected is electrically connected to the in-phase input terminal of the first operational amplifier, the node where the second resistor and the third resistor are connected is electrically connected to the output terminal of the first operational amplifier through the first capacitor, the inverting input terminal of the first operational amplifier is electrically connected to the output terminal of the first operational amplifier, the output terminal of the first operational amplifier is grounded through the third resistor, the negative power supply terminal of the first operational amplifier is grounded, and the positive power supply terminal of the first operational amplifier is connected to the positive power supply. The beneficial effect produced is that the low-pass filtering unit can filter out high-frequency noise in the signal and retain the main low-frequency components, thereby improving the purity of the signal, which helps to obtain more accurate signals in subsequent processing steps and avoid noise interference.

[0017] Preferably, the excitation and detection unit includes a second operational amplifier, a fourth resistor, a fifth resistor, a sixth resistor, a fourth capacitor, a fortieth resistor, a seventh resistor, an eighth resistor and a MOS tube;

[0018] The output end of the second operational amplifier is grounded through a sixth resistor and a fortieth resistor, a node where the sixth resistor and the fortieth resistor are connected is electrically connected to the gate of the MOS tube, the drain of the MOS tube is electrically connected to the positive electrode of the battery through a seventh resistor, and the source of the MOS tube is electrically connected to the negative electrode of the battery through an eighth resistor;

[0019] The output end of the second operational amplifier is grounded through the sixth resistor and the fortieth resistor, the node where the sixth resistor and the fortieth resistor are connected is electrically connected to the gate of the MOS tube, the drain of the MOS tube is electrically connected to the positive electrode of the battery through the seventh resistor, and the source of the MOS tube is electrically connected to the negative electrode of the battery through the eighth resistor. The beneficial effect produced is: the pulse width modulation (PWM) square wave signal is converted into an approximate sine wave, which simplifies the circuit structure without the need for a complex sine wave generation circuit. This greatly simplifies the generation process of the current excitation signal and improves the integration of the system. The excitation and detection unit causes the battery to generate current excitation disturbances, and at the same time converts the disturbed current signal into a voltage signal. Through high-precision differential amplification and phase-locked amplification technology, the converted voltage signal can be stably extracted and amplified to ensure the accuracy of the measurement.

[0020] Preferably, the signal extraction unit includes a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fifth capacitor, a sixth capacitor and a first differential amplifier;

[0021] The first band-pass filter unit is electrically connected to the output end of the first differential amplifier, the first gain setting end of the first differential amplifier and the second gain setting end of the first differential amplifier are electrically connected through a ninth resistor, the reference input end of the first differential amplifier is grounded, the negative power input end of the first differential amplifier is connected to the negative power supply, the negative power input end of the first differential amplifier is also grounded through a fifth capacitor, the positive power input end of the first differential amplifier is connected to the positive power supply, the positive power input end of the first differential amplifier is also grounded through a sixth capacitor, the negative input end of the first differential amplifier is grounded through a twelfth resistor, the negative input end of the first differential amplifier is also electrically connected to the negative pole of the battery through a thirteenth resistor, the positive input end of the first differential amplifier is grounded through a tenth resistor, and the positive input end of the first differential amplifier is also electrically connected to the source of the MOS tube through an eleventh resistor. The beneficial effects produced are: the differential amplifier, resistor and capacitor combination design in the signal extraction unit ensures high-precision signal extraction, low noise, stability and rapid response capability of the system, is suitable for an online monitoring system of a battery, and can more effectively capture the working state and performance changes of the battery.

[0022] Preferably, the first band-pass filter unit includes a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventh capacitor, an eighth capacitor, and a ninth capacitor;

[0023] The output end of the first differential amplifier is electrically connected to one end of the seventh capacitor, the two ends of the fourteenth resistor and the sixteenth resistor after being connected in series are connected in parallel with the two ends of the fifteenth resistor and the ninth capacitor after being connected in series and the eighth capacitor in turn, one end of the sixteenth resistor is grounded, the other end of the sixteenth resistor is electrically connected to the other end of the seventh capacitor, and the node where the fifteenth resistor and the sixteenth resistor are connected is electrically connected to the first phase-locked amplifier unit, resulting in the following beneficial effects: the design of the first bandpass filtering unit provides the battery monitoring system with efficient and accurate signal processing capabilities, ensures high-quality signal detection in complex environments, and enhances the sensitivity and anti-interference ability of the system, further improving the practicality and reliability of the system.

[0024] Preferably, the first phase-locked amplification unit includes a third operational amplifier, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, a twenty-second resistor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a first diode and a second diode;

[0025] The inverting input terminal of the third operational amplifier is grounded through an eighteenth resistor and a seventeenth resistor, and a node where the eighteenth resistor and the seventeenth resistor are connected is electrically connected to a node where the fifteenth resistor and the sixteenth resistor are connected;

[0026] The non-inverting input terminal of the third operational amplifier is connected to a reference voltage source via a nineteenth resistor, and an end of the nineteenth resistor away from the reference voltage source is grounded via a twentieth resistor;

[0027] The positive voltage terminal of the third operational amplifier is connected to a positive power supply, and the positive voltage terminal of the third operational amplifier is also grounded through a tenth capacitor;

[0028] The negative voltage terminal of the third operational amplifier is connected to a negative power supply, and the negative voltage terminal of the third operational amplifier is also grounded through an eleventh capacitor;

[0029] The inverting input terminal of the third operational amplifier is electrically connected to the output terminal of the third operational amplifier through a twenty-first resistor;

[0030] The output end of the third operational amplifier is grounded through the twenty-second resistor and the twelfth capacitor in sequence, the connection ends of the twenty-second resistor and the twelfth capacitor are connected to the positive power supply through the first diode and to the ground through the second diode respectively, and the node connected by the first diode and the second diode is electrically connected to the analog-to-digital conversion port of the single-chip microcomputer. The beneficial effects produced are as follows: the combination of the third operational amplifier and the relevant resistors and capacitors forms a high-precision amplification circuit, which can ensure that the input signal remains stable during amplification and keeps its phase locked. This design enables the system to better capture and process the voltage response signals of the battery at different frequencies, avoiding phase drift or distortion problems.

[0031] Preferably, the voltage response signal detection unit includes a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor, a seventeenth capacitor, an eighteenth capacitor, a nineteenth capacitor, a twentieth capacitor, a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, a twenty-sixth resistor, a twenty-seventh resistor, a twenty-eighth resistor, a twenty-ninth resistor, a thirtieth resistor, a thirty-first resistor, a thirty-second resistor, a thirty-third resistor, and a second differential amplifier;

[0032] The negative electrode of the battery is electrically connected to the negative input terminal of the second differential amplifier through a fourteenth capacitor, a twenty-fifth resistor, a twenty-sixth resistor, and a twenty-seventh resistor in sequence, and the positive electrode of the battery is electrically connected to the positive input terminal of the second differential amplifier through a fifteenth capacitor, a twenty-eighth resistor, a twenty-ninth resistor, and a thirtieth resistor in sequence, the node connected by the fourteenth capacitor and the twenty-fifth resistor is grounded through the twenty-third resistor, the node connected by the fifteenth capacitor and the twenty-eighth resistor is grounded through the twenty-fourth resistor, the node connected by the twenty-fifth resistor and the twenty-sixth resistor is electrically connected to the node connected by the twenty-eighth resistor and the twenty-ninth resistor through the sixteenth capacitor, the node connected by the twenty-sixth resistor and the twenty-seventh resistor is electrically connected to the node of the twenty-ninth resistor and the thirtieth resistor through the seventeenth capacitor, the node connected by the twenty-seventh resistor and the negative input terminal of the second differential amplifier and the node connected by the thirtieth resistor and the positive input terminal of the second differential amplifier are electrically connected through the eighteenth capacitor;

[0033] The negative input terminal of the second differential amplifier is grounded through a thirty-first resistor, and the positive input terminal of the second differential amplifier is grounded through a thirty-second resistor;

[0034] The first gain setting terminal of the second differential amplifier and the second gain setting terminal of the second differential amplifier are electrically connected via a thirty-third resistor;

[0035] The positive power input terminal of the second differential amplifier is connected to a positive power supply and is grounded through a nineteenth capacitor;

[0036] A negative power supply input terminal of the second differential amplifier is connected to a negative power supply and is grounded via a twentieth capacitor;

[0037] A ground terminal of the second differential amplifier is grounded;

[0038] The output end of the second differential amplifier is electrically connected to the second bandpass filter unit, and the beneficial effect produced is: the voltage response signal detection unit ensures the accurate collection of the voltage response signals of the positive and negative electrodes of the battery through a circuit network composed of multiple capacitors and resistors, especially through the second differential amplifier, the voltage difference between the positive and negative electrodes of the battery can be effectively distinguished, avoiding the influence of common mode noise, thereby improving the accuracy of signal acquisition.

[0039] Preferably, the second band-pass filtering unit includes a twenty-first capacitor, a thirty-fourth resistor, and a thirty-fifth resistor;

[0040] The output end of the second differential amplifier is grounded through the twenty-first capacitor and the thirty-fourth resistor, and the node connected by the twenty-first capacitor and the thirty-fourth resistor is electrically connected to the second phase-locked amplifier unit through the thirty-fifth resistor, resulting in the following beneficial effects: the second bandpass filter unit is composed of the twenty-first capacitor, the thirty-fourth resistor and the thirty-fifth resistor, and can filter signals within the target frequency range. This design effectively eliminates interference signals of other irrelevant frequencies, making the frequency spectrum components of the voltage response signal purer, thereby ensuring the measurement accuracy.

[0041] Preferably, the second phase-locked amplification unit electrically comprises a fourth operational amplifier, a thirty-sixth resistor, a thirty-seventh resistor, a thirty-eighth resistor, a thirty-ninth resistor, a twenty-second capacitor, a twenty-third capacitor, a twenty-fourth capacitor, a third diode, and a fourth diode;

[0042] The inverting input terminal of the fourth operational amplifier is electrically connected to the thirty-fifth resistor, and is electrically connected to the output terminal of the fourth operational amplifier through the thirty-sixth resistor, and the output terminal of the fourth operational amplifier is electrically connected to the analog-to-digital conversion port of the single-chip microcomputer through the thirty-seventh resistor;

[0043] The positive power supply terminal of the fourth operational amplifier is electrically connected to the positive power supply and is grounded through the twenty-second capacitor;

[0044] The negative power supply terminal of the fourth operational amplifier is electrically connected to the negative power supply and is grounded through the twenty-third capacitor;

[0045] The non-inverting input terminal of the fourth operational amplifier is grounded through a thirty-eighth resistor, and an end of the thirty-eighth resistor away from the ground is connected to the reference power supply terminal through a thirty-ninth resistor;

[0046] One end of the thirty-seventh resistor is grounded via the twenty-fourth capacitor;

[0047] One end of the twenty-fourth capacitor is electrically connected to the positive power supply through a third diode;

[0048] One end of the twenty-fourth capacitor is electrically connected to the negative power supply through the fourth diode, which produces the beneficial effect that the inverting input terminal of the fourth operational amplifier is connected to its output terminal through the thirty-sixth resistor, forming a feedback loop, thereby ensuring stable amplification of the signal. This design can effectively lock the signal phase, so that the amplified signal maintains phase consistency with the input signal, thereby ensuring the phase detection accuracy of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Figure 1 It is a schematic diagram of the block diagram structure of the present invention;

[0050] Figure 2 It is a schematic diagram of the circuit structure of the present invention;

[0051] Figure 3 It is a schematic diagram of the structure of the current excitation and signal detection unit of the present invention;

[0052] Figure 4 It is a schematic diagram of the structure of the voltage response signal detection unit of the present invention;

[0053] Figure 5 It is a schematic diagram of an equivalent circuit of a storage battery of the present invention. DETAILED DESCRIPTION

[0054] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. Unless otherwise defined, the technical terms or scientific terms used herein should be understood by people with general skills in the field to which the present invention belongs. "Including" and similar words used in this article mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects.

[0055] Combined with Figure 1 , the present application proposes a battery online impedance spectrum monitoring system, including a single chip computer 1, a current detection unit 2 and a voltage detection unit 3;

[0056] The current detection unit 2 includes a current excitation and signal detection unit 21, a first bandpass filter unit 22, and a first phase-locked amplifier unit 23. The current excitation and signal detection unit 21 is electrically connected to the single-chip computer 1 through the first bandpass filter unit 22 and the first phase-locked amplifier unit 23 in sequence;

[0057] The voltage detection unit 3 includes a voltage response signal detection unit 31, a second band-pass filter unit 32, and a second phase-locked amplifier unit 33. The voltage response signal detection unit 31 is electrically connected to the single-chip computer 1 through the second band-pass filter unit 32 and the second phase-locked amplifier unit 33 in sequence;

[0058] The storage batteries 4 are electrically connected to the current excitation and signal detection unit 21 and the response signal detection unit 22 respectively after being connected in series.

[0059] Specifically, the current excitation and signal detection unit 21 is responsible for giving the battery system a small current excitation disturbance signal and obtaining the current excitation signal value therefrom. This unit ensures that the PWM signal can effectively act on the battery, and detects the current excitation and voltage response of the battery at different frequencies to form basic data for impedance measurement. The first bandpass filtering unit 22 selects the frequency of the signal after the current excitation detection, retains the signal within the useful frequency range, and filters out noise and irrelevant frequencies to improve the signal quality. The first phase-locked amplifier unit 23 amplifies the filtered signal and maintains the phase consistency of the signal, which can enhance the signal amplitude and ensure that the phase information of the signal is not lost, thereby providing high-precision input for subsequent signal processing. The voltage response signal detection unit 31 is responsible for obtaining the voltage response signal from the battery system and detecting the battery response. The voltage response changes of excitation signals of different frequencies are another important dimension for analyzing battery impedance. The second bandpass filter unit 32 is used to perform frequency selection and filtering on the voltage signal to ensure that the signal entering the subsequent processing unit is pure and the noise is effectively suppressed. The filtered voltage signal is amplified and phase-locked to ensure the enhancement of the signal amplitude and the consistency of the phase, providing a high-quality input signal for the analog-to-digital conversion of the single-chip microcomputer. The single-chip microcomputer 1, as the core processing unit, is responsible for receiving and processing signals from the current detection unit and the voltage detection unit, converting the analog signal into a digital signal through analog-to-digital conversion, and performing real-time data processing and storage for analyzing the impedance characteristics of the battery. The battery is connected to the current excitation and signal detection unit and the voltage response signal detection unit to ensure that the current and voltage response data can be collected simultaneously under excitation signals of different frequencies.

[0060] In some specific embodiments, Figure 1 and Figure 2 , the current excitation and signal detection unit 21 includes a low-pass filtering unit 211, an excitation and detection unit 212, and a signal extraction unit 213;

[0061] The low-pass filter unit 211 is electrically connected to the first band-pass filter unit 22 via the excitation and detection unit 212 and the signal extraction unit 213 in sequence.

[0062] Specifically, the low-pass filter unit 211 is used to filter out high-frequency noise in the current excitation signal and retain the low-frequency components in the signal. By removing irrelevant high-frequency interference, the purity of the signal is guaranteed, so that the signal quality in the subsequent processing process is greatly improved. The filter unit can enhance the anti-interference ability of the system and ensure that the system can still accurately capture the current excitation signal of the battery in a complex environment. The excitation and detection unit 212 converts the PWM signal in the current excitation signal into a continuous voltage signal, which simplifies the signal processing process, which helps to eliminate the discreteness in the signal and further improves the smoothness and consistency of the signal. Through integral operation, the system can better process the frequency excitation signal and ensure the timing of the signal. The domain characteristics are suitable for subsequent amplification and analysis. The excitation and detection unit 212 is responsible for capturing the signal changes after the integral operation, and analyzing the amplitude and phase of the current excitation signal through a precise detection circuit. This is the basis for subsequent signal extraction and processing, ensuring that the system can accurately obtain the battery's response to the excitation signal. The unit ensures the accuracy of the signal and provides clear and effective raw data for subsequent filtering and amplification processing. The signal extraction unit 213 further processes the detected current excitation signal to extract useful signal components and remove useless components or noise. The unit can effectively extract the core information of the signal, ensuring that the subsequent first bandpass filtering unit can focus on processing important signal parts.

[0063] In some specific embodiments, Figure 2 , the low-pass filter unit 211 includes a first resistor R200, a second resistor R201, a third resistor R212, a first capacitor C201, a second capacitor C200, a third capacitor, and a first operational amplifier U200.1;

[0064] The PWM signal output of the single-chip computer 1 is grounded through the first resistor R200, and the end of the first resistor R200 away from the ground is grounded through the second resistor R201, the third resistor R212, and the second capacitor C200 in sequence, the node connected to the third resistor R212 and the second capacitor C200 is electrically connected to the in-phase input terminal of the first operational amplifier U200.1, the node connected to the second resistor R201 and the third resistor R212 is electrically connected to the output terminal of the first operational amplifier U200.1 through the first capacitor C201, the inverting input terminal of the first operational amplifier U200.1 is electrically connected to the output terminal of the first operational amplifier U200.1, the output terminal of the first operational amplifier U200.1 is grounded through the third resistor R212, the negative power supply terminal of the first operational amplifier U200.1 is grounded, the positive power supply terminal of the first operational amplifier U200.1 is connected to the positive power supply, and the positive power supply terminal of the first operational amplifier U200.1 is grounded through the third capacitor.

[0065] Specifically, the first resistor R200, the second resistor R201, the third resistor R212 and the first capacitor C201, the second capacitor C200, and the third capacitor together form a multi-stage RC filter network. By controlling the values ​​of the resistors and capacitors, the frequency selection of the input signal is achieved, allowing low-frequency signals to pass through and attenuating high-frequency signals. The first operational amplifier U200.1 plays a role in signal amplification and stabilization through its configuration. The in-phase input terminal of the amplifier is connected to the RC filter network to ensure that the filtered signal can be accurately amplified and that the signal will not lose effective information due to amplitude attenuation after low-pass filtering. The inverting input terminal of the operational amplifier is electrically connected to its output terminal to form a unit-gain buffer amplifier configuration, which can avoid the subsequent circuit from affecting the filter. The signal produces a load effect while ensuring the stability and consistency of the signal. The node connected by the second capacitor C200 and the third resistor R212 is electrically connected to the in-phase input terminal of the operational amplifier, ensuring the frequency characteristics of the input signal after low-pass filtering, that is, the high-frequency signal is weakened and the low-frequency signal is allowed to pass. This enables the current excitation signal of the battery system to more accurately reflect the actual working status of the battery. The positive power supply terminal of the first operational amplifier U200.1 is grounded through the third capacitor. This design is used to filter the noise in the power supply to prevent power supply ripple or interference signals from affecting the working performance of the operational amplifier, ensuring stable and reliable operation of the system. By grounding the negative power supply terminal of the first operational amplifier, it is ensured that the amplifier can operate under negative voltage conditions and is suitable for a wider voltage range.

[0066] In some embodiments, Figure 2 The circuit's PWM input signal comes from the microcontroller's timer, and can be programmed to output PWM waveforms of different frequencies.

[0067] In some specific embodiments, Figure 2 The excitation and detection unit 213 includes a second operational amplifier U200.2, a fourth resistor R216, a fifth resistor R204, a sixth resistor R210, a fourth capacitor C205, a fortieth resistor R215, a seventh resistor R217, an eighth resistor R211 and a MOS tube V200;

[0068] The non-inverting input terminal of the second operational amplifier U200.2 is electrically connected to the output terminal of the first operational amplifier U200.1 through a fourth resistor R216, the inverting input terminal of the second operational amplifier U200.2 is grounded through a fifth resistor R204, the node where the fifth resistor R204 and the inverting input terminal of the second operational amplifier U200.2 are electrically connected to the output terminal of the second operational amplifier U200.2 through a fourth capacitor C205, and the output terminal of the second operational amplifier U200.2 is electrically connected to the excitation and detection unit 213 through a sixth resistor R210;

[0069] The output end of the second operational amplifier U200.2 is grounded through the sixth resistor R210 and the fortieth resistor R215, the node where the sixth resistor R210 and the fortieth resistor R215 are connected is electrically connected to the gate of the MOS tube V200, the drain of the MOS tube V200 is electrically connected to the positive electrode of the battery 4 through the seventh resistor R217, and the source of the MOS tube V200 is electrically connected to the negative electrode of the battery 4 through the eighth resistor R211.

[0070] Specifically, the second operational amplifier U200.2 plays a core role in the integral operation in the circuit. By performing integral operation on the input signal, the unit can smooth the pulse or discrete signal into a continuous signal, reduce the noise and sharp changes in the signal, and make the signal more operable in subsequent processing. This integral operation is particularly useful for processing PWM signals, and can convert the PWM signal into a smoother voltage signal, so that the signal response is more in line with the actual physical process. The fourth resistor R216 is responsible for introducing the signal output by the first operational amplifier U200.1 into the in-phase input terminal of the second operational amplifier U200.2, so that the low-pass filtered signal can directly participate in the integral operation to ensure the consistency of signal processing. The fifth resistor R204 is connected to the inverting input terminal of the second operational amplifier U200.2, and is connected to the ground through the node, forming a restriction and adjustment on the input signal to ensure that the signal will not be distorted due to the amplifier input. The capacitor C205 is responsible for smoothing the input signal. The sixth resistor R210 is connected between the output terminal of the second operational amplifier and the excitation and detection unit, and plays the role of impedance matching and signal adjustment. Ensure that the amplitude and current of the output signal will not affect the subsequent circuit; the 40th resistor R215, the MOS tube V200 and the seventh resistor R217, the eighth resistor R211 constitute a detection circuit, which is used to control the signal after the integration operation and apply it to the actual load (battery). The MOS tube plays the role of a signal control switch in this circuit, and its gate is controlled by the signal output by the second operational amplifier U200.2. The gate of the MOS tube is connected to the output end of the second operational amplifier U200.2 through the sixth resistor R210 and the 40th resistor R215. When the gate When receiving the signal after the integration operation, the MOS tube will open or close to control the current between the drain and the source, and accurately detect the signal through the eighth resistor R211, especially playing a core role in the detection process of the current excitation signal. The drain of the MOS tube is connected to the positive electrode of the battery through the seventh resistor R217, and the source is connected to the negative electrode of the battery through the eighth resistor R211. This configuration allows the current in the detection circuit to pass through the battery to form a complete current excitation path. This design ensures that the signal can directly act on the current path of the battery, ensuring the effectiveness of signal detection.

[0071] In some specific embodiments, Figure 2 , the signal extraction unit 213 includes a ninth resistor R213, a tenth resistor R203, an eleventh resistor R205, a twelfth resistor R209, a thirteenth resistor, a fifth capacitor C202, a sixth capacitor C203 and a first differential amplifier U201;

[0072] The first bandpass filter unit 22 is electrically connected to the output end of the first differential amplifier U201, the first gain setting end of the first differential amplifier U201 and the second gain setting end of the first differential amplifier U201 are electrically connected through a ninth resistor R213, the reference input end of the first differential amplifier U201 is grounded, the negative power input end of the first differential amplifier U201 is connected to the negative power supply, the negative power input end of the first differential amplifier U201 is also grounded through a fifth capacitor C202, and the positive power input end of the first differential amplifier U201 is connected to the positive power supply. The positive power supply is connected, the positive power supply input terminal of the first differential amplifier U201 is also grounded through the sixth capacitor C203, the negative input terminal of the first differential amplifier U201 is grounded through the twelfth resistor R209, the negative input terminal of the first differential amplifier U201 is also electrically connected to the negative pole of the battery 4 through the thirteenth resistor R206, the positive input terminal of the first differential amplifier U201 is grounded through the tenth resistor R203, and the positive input terminal of the first differential amplifier U201 is also electrically connected to the source of the MOS tube V200 through the eleventh resistor R205.

[0073] Specifically, through the first differential amplifier U201, the differential component in the input signal can be effectively extracted, and the common mode noise can be suppressed, ensuring that the effective components in the current and voltage signals are retained, and filtering out irrelevant noise. The ninth resistor R213 is used as a gain setting resistor and is connected to the gain setting end of the first differential amplifier to ensure that the gain of the differential amplifier can be accurately controlled. By appropriately selecting the resistance value, the gain of the amplifier can be adjusted to adapt to the processing requirements of different signal amplitudes. The tenth resistor R203 and the eleventh resistor R205 are connected to the positive input terminal and the negative input terminal of the differential amplifier. The ground and the source of the MOS tube V200 are connected respectively. This configuration ensures that the differential amplifier can accurately extract the effective voltage difference in the signal to avoid external interference affecting the signal extraction process. The twelfth resistor R209 and the thirteenth resistor R206 are connected to the negative electrode of the battery through the negative input terminal to form a signal transmission path. At the same time, by adjusting the resistance value, the stability of the signal is ensured to prevent excessive current from damaging the differential amplifier and ensure the stability of the input signal. The fifth capacitor C202 and the sixth capacitor C203 are used to filter the positive and negative power supply terminals of the differential amplifier to remove high-frequency noise in the power supply.

[0074] In some specific embodiments, Figure 3 , the first bandpass filter unit 22 includes a fourteenth resistor R188, a fifteenth resistor R217, a sixteenth resistor R123, a seventh capacitor C102, an eighth capacitor C112, and a ninth capacitor C110;

[0075] The output end of the first differential amplifier U201 is electrically connected to one end of the seventh capacitor C102, the two ends of the fourteenth resistor R188 and the sixteenth resistor R123 after being connected in series are connected in parallel with the two ends of the fifteenth resistor R217 and the ninth capacitor C110 after being connected in series and the eighth capacitor C112, one end of the sixteenth resistor R123 is grounded, the other end of the sixteenth resistor R123 is electrically connected to the other end of the seventh capacitor C102, and the node where the fifteenth resistor R217 and the sixteenth resistor R123 are connected is electrically connected to the first phase-locked amplifier unit 23.

[0076] Specifically, the function of the bandpass filter is to allow signals within a specific frequency range to pass through, while suppressing frequency components above or below the range, thereby achieving accurate filtering of signals in a specific frequency band. In this circuit, the combination of resistors and capacitors determines the center frequency and bandwidth of the bandpass filter, ensuring that the system can effectively extract the required frequency components in the battery current excitation signal; the series connection of the fourteenth resistor R188 and the sixteenth resistor R123 determines the stopband characteristics of the filter, controls the amplitude attenuation of the signal, and ensures the stability of the filter. The seventh capacitor C102 is electrically connected to the output end of the differential amplifier U201. As an input capacitor, it matches the impedance of the subsequent circuit to ensure that the signal can be smoothly transmitted to the filtering circuit; the series connection of the fifteenth resistor R217 and the ninth capacitor C110, and the parallel connection with the eighth capacitor C112 determine the frequency range of the passing signal. The series connection of the resistor and the ninth capacitor defines the low-frequency attenuation characteristics, while the parallel connection of the eighth capacitor controls the high frequency to form a frequency selection window. The grounding of the sixteenth resistor R123 is connected to the other end of the seventh capacitor to ensure the correct circuit working path of the filter and provide a low-impedance grounding point to prevent excessive attenuation or distortion of the signal. The seventh capacitor C102 is connected to the output end of the differential amplifier to ensure that the signal processed by the differential amplifier can smoothly enter the bandpass filter. This design ensures that the signal has been amplified before entering the filter and can enter the filtering circuit with a strong signal strength. The node of the fifteenth resistor R217 and the sixteenth resistor R123 is connected to the first phase-locked amplifier unit 23. The filtered signal directly enters the phase-locked amplifier, eliminating unnecessary frequency components and providing a pure signal input for the phase-locked amplifier.

[0077] In some embodiments, in combination Figure 3 , the signal collected by differential amplifier U201 passes through Figure 3 The circuit is a bandpass filter composed of first-order high-pass and second-order low-pass RC, where the characteristic frequency is fH = 1 / 2πR1C1, R1 = R118, C1 = C102, fL = 1 / 2πR2C2, R2 = R123 = R127, C2 = C110 = C112, and the bandwidth is BW = fL-fH.

[0078] In some embodiments, the filtered current excitation signal is converted stably and accurately into a voltage waveform through a phase-locked amplifier circuit composed of U103 and input into the analog-to-digital conversion port AD3RI of the single-chip microcomputer. The gain of the amplifier circuit is A=-R126 / R124.

[0079] In some specific embodiments, Figure 3 , the first phase-locked amplifying unit 23 includes a third operational amplifier U103, a seventeenth resistor R218, an eighteenth resistor R124, a nineteenth resistor R125, a twentieth resistor R125, a twenty-first resistor R126, a twenty-second resistor R122, a tenth capacitor C115, an eleventh capacitor C113, a twelfth capacitor C118, a first diode D101 and a second diode D102;

[0080] The inverting input terminal of the third operational amplifier U103 is grounded through the eighteenth resistor R124 and the seventeenth resistor R218, and the node where the eighteenth resistor R124 and the seventeenth resistor R218 are connected is electrically connected to the node where the fifteenth resistor R217 and the sixteenth resistor R123 are connected;

[0081] The non-inverting input terminal of the third operational amplifier U103 is connected to a reference voltage source via a nineteenth resistor R113, and one end of the nineteenth resistor R113 away from the reference voltage source is grounded via a twentieth resistor R125;

[0082] The positive voltage terminal of the third operational amplifier U103 is connected to a positive power supply, and the positive voltage terminal of the third operational amplifier U103 is also grounded through a tenth capacitor C115;

[0083] The negative voltage terminal of the third operational amplifier U103 is connected to a negative power supply, and the negative voltage terminal of the third operational amplifier U103 is also grounded through an eleventh capacitor C113;

[0084] The inverting input terminal of the third operational amplifier U103 is electrically connected to the output terminal of the third operational amplifier U103 through a twenty-first resistor R126;

[0085] The output end of the third operational amplifier U103 is connected to the ground through the twenty-second resistor R122 and the twelfth capacitor C118 in sequence. The connection ends of the twenty-second resistor R122 and the twelfth capacitor C118 are connected to the positive power supply through the first diode D101 and to the ground through the second diode D102. The node where the first diode D101 and the second diode D102 are connected is electrically connected to the analog-to-digital conversion port of the single-chip computer 1.

[0086] Specifically, the core function of the phase-locked amplifier is to detect the phase of the input signal and amplify it, ensuring that the amplitude and phase of the signal remain consistent, effectively enhancing the signal strength, and avoiding phase drift. The third operational amplifier U103 is the core component of the phase-locked amplifier. U103 is responsible for phase locking and amplifying the input signal. Its input end is connected to the external circuit through multiple resistors to achieve accurate signal processing. The seventeenth resistor R218 and the eighteenth resistor R124 form a reference path for the input signal through the connection with the inverting input end to ensure the input stability of the signal. The connection with the ground node provides a low-noise signal reference to reduce the influence of external interference. The nineteenth resistor R125 and the twentieth resistor R125 are used to set the reference voltage of the in-phase input end to ensure that the input signal of the operational amplifier is within a suitable working range. The tenth capacitor C115 and the eleventh capacitor C113 are respectively connected to the positive and negative power supplies to filter the noise in the power supply. The twenty-first resistor R126 is connected to the A negative feedback loop is formed between the inverting input terminal and the output terminal. Negative feedback can stabilize the gain of the operational amplifier and ensure that the amplitude of the output signal is stable and undistorted. The first diode D101 and the second diode D102 are connected to the output terminal, which play a role in signal limiting and protection. Through forward conduction and reverse cutoff, the diode limits the amplitude of the signal to prevent the output signal from being too large, thereby protecting the subsequent circuit and the analog-to-digital conversion port of the single-chip computer. The twelfth capacitor C118 is connected to the twenty-second resistor R122, which plays a role in filtering the output signal, ensuring that the output signal is stable and further reducing the noise component in the signal. The signal after phase-locked amplification is finally input into the single-chip computer 1 through the analog-to-digital conversion port.

[0087] In some specific embodiments, Figure 4 , the voltage response signal detection unit 31 includes a fourteenth capacitor C100, a fifteenth capacitor C119, a sixteenth capacitor C105, a seventeenth capacitor C106, an eighteenth capacitor C103, a nineteenth capacitor C116, a twentieth capacitor C107, a twenty-third resistor R120, a twenty-fourth resistor R131, a twenty-fifth resistor R108, a twenty-sixth resistor R107, a twenty-seventh resistor R110, a twenty-eighth resistor R129, a twenty-ninth resistor R130, a thirtieth resistor R111, a thirty-first resistor R109, a thirty-second resistor R105, a thirty-third resistor R104, and a second differential amplifier U101;

[0088] The negative electrode of the battery 4 is electrically connected to the negative input terminal of the second differential amplifier U101 through the fourteenth capacitor C100, the twenty-fifth resistor R108, the twenty-sixth resistor R107, and the twenty-seventh resistor R110 in sequence.

[0089] The positive electrode of the battery 4 is electrically connected to the positive input terminal of the second differential amplifier U101 through the fifteenth capacitor C119, the twenty-eighth resistor R129, the twenty-ninth resistor R130, and the thirtieth resistor R111 in sequence.

[0090] The node connected by the fourteenth capacitor C100 and the twenty-fifth resistor R108 is grounded via the twenty-third resistor R120, and the node connected by the fifteenth capacitor C119 and the twenty-eighth resistor R129 is grounded via the twenty-fourth resistor R131.

[0091] The node where the twenty-fifth resistor R108 and the twenty-sixth resistor R107 are connected is electrically connected to the node where the twenty-eighth resistor R129 and the twenty-ninth resistor R130 are connected via the sixteenth capacitor C105.

[0092] The node where the twenty-sixth resistor R107 and the twenty-seventh resistor R110 are connected is electrically connected to the node where the twenty-ninth resistor R130 and the thirtieth resistor R111 are connected via the seventeenth capacitor C106.

[0093] A node where the twenty-seventh resistor R110 is connected to the negative input terminal of the second differential amplifier U101 and a node where the thirtieth resistor R111 is connected to the positive input terminal of the second differential amplifier U101 are electrically connected via an eighteenth capacitor C103;

[0094] The negative input terminal of the second differential amplifier U101 is grounded through a thirty-first resistor R109, and the positive input terminal of the second differential amplifier U101 is grounded through a thirty-second resistor R105;

[0095] The first gain setting terminal of the second differential amplifier U101 and the second gain setting terminal of the second differential amplifier U101 are electrically connected via a thirty-third resistor R104;

[0096] The positive power input terminal of the second differential amplifier U101 is connected to a positive power supply and is grounded via a nineteenth capacitor C116;

[0097] The negative power input terminal of the second differential amplifier U101 is connected to a negative power supply and is grounded via a twentieth capacitor C107;

[0098] The ground terminal of the second differential amplifier U101 is grounded;

[0099] The output end of the second differential amplifier U101 is electrically connected to the second bandpass filter unit 32 .

[0100] Specifically, the second differential amplifier U101 is used to process the voltage signal obtained from the positive and negative electrodes of the battery 4. The positive and negative electrodes of the battery are connected to the positive and negative electrodes respectively through the positive input terminal and the negative input terminal. The differential amplifier can extract the differential component of the signal, thereby effectively suppressing the common mode noise. The fourteenth capacitor C100 and the fifteenth capacitor C119 play a filtering role in the input signal path to reduce the high-frequency noise from the battery end. The twenty-fifth resistor R108, the twenty-eighth resistor R129 and other resistors are connected between the positive and negative input terminals to form a voltage divider network, which limits the input current and helps adjust the amplitude of the signal to avoid signal overload. The sixteenth capacitor C105 and the seventeenth capacitor C106: These capacitors are connected across the signal path to further filter out the low-frequency and high-frequency noise components, so that The signal is smoother and ensures that the signal input to the differential amplifier remains stable. The eighteenth capacitor C103 is used to couple the signal between the negative input terminal and the positive input terminal of the differential amplifier to ensure that the phase of the signal remains consistent and reduce the possibility of phase shift. The thirty-first resistor R109 and the thirty-second resistor R105 are respectively connected between the negative input terminal and the positive input terminal of the differential amplifier and the ground, providing a reference for the input signal and helping to stabilize the potential of the input signal. The thirty-third resistor R104 is used to set the gain of the second differential amplifier U101 to ensure that the amplifier can amplify according to the required gain when processing the signal. The nineteenth capacitor C116 and the twentieth capacitor C107 are respectively connected to the positive and negative power supplies to filter power supply noise and ensure the stable power supply of the differential amplifier.

[0101] In some specific embodiments, Figure 4 , the second band-pass filter unit 32 includes a twenty-first capacitor C108, a thirty-fourth resistor R121, and a thirty-fifth resistor R113;

[0102] The output end of the second differential amplifier U101 is grounded through the twenty-first capacitor C108 and the thirty-fourth resistor R121, and the node where the twenty-first capacitor C108 and the thirty-fourth resistor R121 are connected is electrically connected to the second phase-locked amplifier unit 33 through the thirty-fifth resistor R113.

[0103] In some specific embodiments, Figure 4 , the second phase-locked amplifier unit 33 electrically includes a fourth operational amplifier U102, a thirty-sixth resistor R114, a thirty-seventh resistor R117, a thirty-eighth resistor R115, a thirty-ninth resistor R116, a twenty-second capacitor C421, a twenty-third capacitor C109, a twenty-fourth capacitor C109, a third diode D103, and a fourth diode D104;

[0104] The inverting input terminal of the fourth operational amplifier U102 is electrically connected to the thirty-fifth resistor R113, and is electrically connected to the output terminal of the fourth operational amplifier U102 through the thirty-sixth resistor R114, and the output terminal of the fourth operational amplifier U102 is electrically connected to the analog-to-digital conversion port of the single-chip computer 1 through the thirty-seventh resistor R117;

[0105] The positive power supply terminal of the fourth operational amplifier U102 is electrically connected to the positive power supply and is grounded via the twenty-second capacitor C421;

[0106] The negative power supply terminal of the fourth operational amplifier U102 is electrically connected to the negative power supply and is grounded via the twenty-third capacitor C109;

[0107] The non-inverting input terminal of the fourth operational amplifier U102 is grounded via a thirty-eighth resistor R115, and one end of the thirty-eighth resistor R115 away from the ground is connected to the reference power supply terminal via a thirty-ninth resistor R116;

[0108] One end of the thirty-seventh resistor R117 is grounded via the twenty-fourth capacitor C109;

[0109] One end of the twenty-fourth capacitor C109 is electrically connected to the positive power supply through the third diode D103;

[0110] One end of the twenty-fourth capacitor C109 is electrically connected to the negative power supply through the fourth diode D104.

[0111] Specifically, the fourth operational amplifier U102 can achieve phase locking and amplification of the signal through its input and feedback network, amplify the signal, enhance the amplitude of the signal, and maintain phase consistency. The thirty-sixth resistor R114 and the thirty-seventh resistor R117 are used to connect the feedback path and the output end of the operational amplifier. The feedback resistor R114 forms a negative feedback loop by connecting to the inverting input end, which stabilizes the gain of the amplifier. The twenty-second capacitor C421 and the twenty-third capacitor C109 are used to filter the positive and negative power supplies of the operational amplifier, remove high-frequency noise in the power supply, and ensure the stability of the power supply of the amplifier. The thirty-eighth resistor R115 and the thirty-ninth resistor R116 connect the in-phase input end to the ground and the reference power supply end. The third diode D103 and the fourth diode D104 are used to limit the output signal. Through the design of the feedback resistor R114, the negative feedback loop ensures the stability of the gain of the operational amplifier and avoids excessive or distorted output signals. The amplified and processed signal is transmitted to the analog-to-digital conversion port of the single-chip computer through the thirty-seventh resistor R117.

[0112] In some embodiments, in combination Figure 4, the current excitation signal acts on the battery 4, which will produce voltage fluctuations of the same frequency, that is, the voltage feedback signal. The voltage feedback signal is connected to the U101 power consumption precision instrument differential amplifier after the interference is filtered through the bandpass circuit. The function is to accurately extract the voltage feedback signal of the same frequency, and then pass through the phase-locked amplifier circuit composed of U102 to stably and accurately output the response signal waveform to the analog-to-digital conversion port AD1RV of the single-chip microcomputer, where the characteristic frequency is fH=1 / 2πR1C1, where R1=R120=R131, C1=C100=C119, fL=1 / 2πR2C2, R2=R107=R108=R110=R111=R129=R130, C2=C103=C105=C106, the bandwidth is BW=fL-fH, and the gain of its amplifier circuit is A=-R114 / R113.

[0113] In some embodiments, in combination Figure 5 , Figure 5 The equivalent circuit of the battery is represented, and the ohmic internal resistance, polarization internal resistance and polarization capacitance of the battery are calculated by the voltage and current obtained by the above scheme;

[0114] The current excitation signal expression is:

[0115] i(t)=I sin (ωt)=Ie j(ωt) ;

[0116] The voltage feedback signal expression is:

[0117] u(t)=Usin(ωt+θ)=Ue j(ωt+θ) ;

[0118] The impedance calculation formula is:

[0119]

[0120] Use fast discrete Fourier transform to transform frequency domain function into discrete data acquisition of single chip microcomputer:

[0121]

[0122] Where Zω is the impedance value of the battery at different excitation signal frequencies, and T is the sampling period;

[0123] N = 2π / (Tω) is the length of the discrete time series signal, n is the discretized sampling number, u(nT) is the voltage feedback signal amplitude of each sampling in the sampling period, i(nT) is the current feedback signal amplitude of each sampling in the sampling period, and the single chip microcomputer outputs excitation signals at multiple different frequencies ω (ω = 2πf);

[0124] Collect the response values ​​of discrete u and i, and calculate the corresponding Zω value. There are at least 3 ω and Zω values, which can be calculated according to the equivalent circuit formula of impedance:

[0125]

[0126] The battery's ohmic internal resistance Rc, polarization internal resistance Rs and polarization capacitance Cs are calculated by joint solution;

[0127] In addition to detecting the battery's ohmic internal resistance, the above solution can also detect the battery's polarization internal resistance and polarization capacitance at multiple frequencies, reflecting more performance characteristics of the battery, and is used to analyze the battery's performance status and aging degree, and predict battery life more accurately.

[0128] Although the embodiments of the present invention are described in detail above, it is obvious to those skilled in the art that various modifications and variations can be made to these embodiments. However, it should be understood that such modifications and variations are within the scope and spirit of the present invention as described in the claims. Moreover, the present invention described herein may have other embodiments and may be implemented or realized in a variety of ways.

Claims

1. A battery online impedance spectrum monitoring system, characterized in that: It includes a single chip microcomputer, a current excitation and detection unit and a voltage detection unit; The current excitation and detection unit includes a current excitation and signal detection unit, a first bandpass filter unit, and a first phase-locked amplifier unit, and the current excitation and signal detection unit is electrically connected to the single-chip microcomputer through the first bandpass filter unit and the first phase-locked amplifier unit in sequence; The voltage detection unit includes a voltage response signal detection unit, a second band-pass filter unit, and a second phase-locked amplifier unit, and the voltage response signal detection unit is electrically connected to the single-chip computer through the second band-pass filter unit and the second phase-locked amplifier unit in sequence; The batteries are electrically connected to the current excitation and signal detection unit and the voltage response signal detection unit respectively after being connected in series.

2. The system according to claim 1, characterized in that The current excitation and signal detection unit includes a low-pass filtering unit, an excitation and detection unit, and a signal extraction unit; The low-pass filter unit is electrically connected to the first band-pass filter unit through the excitation and detection unit and the signal extraction unit in sequence.

3. The system according to claim 2, characterized in that The low-pass filter unit includes a first resistor, a second resistor, a third resistor, a first capacitor, a second capacitor, a third capacitor, and a first operational amplifier; The PWM signal output of the single-chip computer is grounded through a first resistor, and an end of the first resistor away from the ground is grounded through a second resistor, a third resistor, and a second capacitor in sequence, a node where the third resistor and the second capacitor are connected is electrically connected to a non-inverting input terminal of the first operational amplifier, a node where the second resistor and the third resistor are connected is electrically connected to an output terminal of the first operational amplifier through a first capacitor, an inverting input terminal of the first operational amplifier is electrically connected to an output terminal of the first operational amplifier, an output terminal of the first operational amplifier is grounded through a third resistor, a negative power supply terminal of the first operational amplifier is grounded, a positive power supply terminal of the first operational amplifier is connected to a positive power supply, and a positive power supply terminal of the first operational amplifier is grounded through a third capacitor.

4. The system according to claim 3, characterized in that The excitation and detection unit includes a second operational amplifier, a fourth resistor, a fifth resistor, a sixth resistor, a fourth capacitor, a fortieth resistor, a seventh resistor, an eighth resistor and a MOS tube; The output end of the second operational amplifier is grounded through a sixth resistor and a fortieth resistor, a node where the sixth resistor and the fortieth resistor are connected is electrically connected to the gate of the MOS tube, the drain of the MOS tube is electrically connected to the positive electrode of the battery through a seventh resistor, and the source of the MOS tube is electrically connected to the negative electrode of the battery through an eighth resistor; The output end of the second operational amplifier is grounded through a sixth resistor and a seventh resistor, a node where the sixth resistor and the seventh resistor are connected is electrically connected to the gate of the MOS tube, the drain of the MOS tube is electrically connected to the positive electrode of the battery through the seventh resistor, and the source of the MOS tube is electrically connected to the negative electrode of the battery through the eighth resistor.

5. The system according to claim 4, characterized in that The signal extraction unit includes a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fifth capacitor, a sixth capacitor and a first differential amplifier; The first band-pass filter unit is electrically connected to the output end of the first differential amplifier, the first gain setting end of the first differential amplifier and the second gain setting end of the first differential amplifier are electrically connected through a ninth resistor, the reference input end of the first differential amplifier is grounded, the negative power input end of the first differential amplifier is connected to the negative power supply, the negative power input end of the first differential amplifier is also grounded through a fifth capacitor, the positive power input end of the first differential amplifier is connected to the positive power supply, the positive power input end of the first differential amplifier is also grounded through a sixth capacitor, the negative input end of the first differential amplifier is grounded through a twelfth resistor, the negative input end of the first differential amplifier is also electrically connected to the negative pole of the battery through a thirteenth resistor, the positive input end of the first differential amplifier is grounded through a tenth resistor, and the positive input end of the first differential amplifier is also electrically connected to the source of the MOS tube through an eleventh resistor.

6. The system according to claim 5, characterized in that The first bandpass filter unit includes a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventh capacitor, an eighth capacitor, and a ninth capacitor; The output end of the first differential amplifier is electrically connected to one end of the seventh capacitor, the two ends of the fourteenth resistor and the sixteenth resistor after being connected in series are connected in parallel with the two ends of the fifteenth resistor and the ninth capacitor after being connected in series and the eighth capacitor in sequence, one end of the sixteenth resistor is grounded, the other end of the sixteenth resistor is electrically connected to the other end of the seventh capacitor, and the node where the fifteenth resistor and the sixteenth resistor are connected is electrically connected to the first phase-locked amplifier unit.

7. The system according to claim 6, characterized in that The first phase-locked amplifying unit includes a third operational amplifier, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, a twenty-second resistor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a first diode and a second diode; The inverting input terminal of the third operational amplifier is grounded through an eighteenth resistor and a seventeenth resistor, and a node where the eighteenth resistor and the seventeenth resistor are connected is electrically connected to a node where the fifteenth resistor and the sixteenth resistor are connected; The non-inverting input terminal of the third operational amplifier is connected to a reference voltage source via a nineteenth resistor, and an end of the nineteenth resistor away from the reference voltage source is grounded via a twentieth resistor; The positive voltage terminal of the third operational amplifier is connected to a positive power supply, and the positive voltage terminal of the third operational amplifier is also grounded through a tenth capacitor; The negative voltage terminal of the third operational amplifier is connected to a negative power supply, and the negative voltage terminal of the third operational amplifier is also grounded through an eleventh capacitor; The inverting input terminal of the third operational amplifier is electrically connected to the output terminal of the third operational amplifier through a twenty-first resistor; The output end of the third operational amplifier is connected to the ground through the twenty-second resistor and the twelfth capacitor in sequence, the connection ends of the twenty-second resistor and the twelfth capacitor are connected to the positive power supply through the first diode and to the ground through the second diode, and the node where the first diode and the second diode are connected is electrically connected to the analog-to-digital conversion port of the single-chip microcomputer.

8. The system according to claim 1, characterized in that The voltage response signal detection unit 31 includes a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor, a seventeenth capacitor, an eighteenth capacitor, a nineteenth capacitor, a twentieth capacitor, a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, a twenty-sixth resistor, a twenty-seventh resistor, a twenty-eighth resistor, a twenty-ninth resistor, a thirtieth resistor, a thirty-first resistor, a thirty-second resistor, a thirty-third resistor, and a second differential amplifier; The negative electrode of the battery is electrically connected to the negative input terminal of the second differential amplifier through a fourteenth capacitor, a twenty-fifth resistor, a twenty-sixth resistor, and a twenty-seventh resistor in sequence, and the positive electrode of the battery is electrically connected to the positive input terminal of the second differential amplifier through a fifteenth capacitor, a twenty-eighth resistor, a twenty-ninth resistor, and a thirtieth resistor in sequence, the node connected by the fourteenth capacitor and the twenty-fifth resistor is grounded through the twenty-third resistor, the node connected by the fifteenth capacitor and the twenty-ninth resistor is grounded, the node connected by the twenty-fifth resistor and the twenty-sixth resistor is electrically connected to the node connected by the twenty-eighth resistor and the twenty-ninth resistor through the sixteenth capacitor, the node connected by the twenty-sixth resistor and the twenty-seventh resistor is electrically connected to the node of the twenty-ninth resistor and the thirtieth resistor through the seventeenth capacitor, the node connected by the twenty-seventh resistor and the negative input terminal of the second differential amplifier and the node connected by the thirtieth resistor to the positive input terminal of the second differential amplifier are electrically connected through the eighteenth capacitor; The negative input terminal of the second differential amplifier is grounded through a thirty-first resistor, and the positive input terminal of the second differential amplifier is grounded through a thirty-second resistor; The first gain setting terminal of the second differential amplifier and the second gain setting terminal of the second differential amplifier are electrically connected via a thirty-third resistor; The positive power input terminal of the second differential amplifier is connected to a positive power supply and is grounded through a nineteenth capacitor; A negative power supply input terminal of the second differential amplifier is connected to a negative power supply and is grounded via a twentieth capacitor; A ground terminal of the second differential amplifier is grounded; The output end of the second differential amplifier is electrically connected to the second bandpass filter unit.

9. The system according to claim 8, characterized in that The second band-pass filter unit includes a twenty-first capacitor, a thirty-fourth resistor, and a thirty-fifth resistor; The output end of the second differential amplifier is grounded through a twenty-first capacitor and a thirty-fourth resistor, and a node where the twenty-first capacitor and the thirty-fourth resistor are connected is electrically connected to the second phase-locked amplifier unit through a thirty-fifth resistor.

10. The system according to claim 9, characterized in that The second phase-locked amplifying unit electrically comprises a fourth operational amplifier, a thirty-sixth resistor, a thirty-seventh resistor, a thirty-eighth resistor, a thirty-ninth resistor, a twenty-second capacitor, a twenty-third capacitor, a twenty-fourth capacitor, a third diode, and a fourth diode; The inverting input terminal of the fourth operational amplifier is electrically connected to the thirty-fifth resistor, and is electrically connected to the output terminal of the fourth operational amplifier through the thirty-sixth resistor, and the output terminal of the fourth operational amplifier is electrically connected to the analog-to-digital conversion port of the single-chip microcomputer through the thirty-seventh resistor; The positive power supply terminal of the fourth operational amplifier is electrically connected to the positive power supply and is grounded through the twenty-second capacitor; The negative power supply terminal of the fourth operational amplifier is electrically connected to the negative power supply and is grounded through the twenty-third capacitor; The non-inverting input terminal of the fourth operational amplifier is grounded through a thirty-eighth resistor, and an end of the thirty-eighth resistor away from the ground is connected to the reference power supply terminal through a thirty-ninth resistor; One end of the thirty-seventh resistor is grounded via the twenty-fourth capacitor; One end of the twenty-fourth capacitor is electrically connected to the positive power supply through a third diode; One end of the twenty-fourth capacitor is electrically connected to the negative power supply through a fourth diode.

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