Low power mode control module, method and circuitry system using the same
By using a stable output detector and amplitude detector in the crystal oscillator to adjust the reference voltage range, the problem of the oscillator oscillator is easily affected, and adaptive control of the process, system voltage and ambient temperature is achieved, avoiding the Misen-enabled or disabled improves control accuracy.
Patent Information
- Application Number
- CN202311216041.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-07-17
- Filing Date
- 2023-09-20
- Publication Date
- 2025-01-17
AI Technical Summary
In the prior art, the amplitude of the oscillating input signal and the oscillating output signal of the crystal oscillator are susceptible to the process, system voltage or ambient temperature, resulting in the controller detection error and the crystal oscillator is incorrectly enabled or disabled.
Using a low-power mode control module including a stable output detector, an amplitude detector, a programmable reference voltage generator and a low-power mode controller, the amplitude control signal and reference voltage range are adjusted by detecting the stability and amplitude of the oscillating output signal. , ensure accurate operation of the crystal oscillator enable and disable.
It effectively avoids misenablement or disable problems caused by changes in process, system voltage or ambient temperature, improves control accuracy, and ensures stable output in low-power mode.
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Figure CN119324681A_ABST
Abstract
Description
Technical Field
[0001] The present application is a low-power mode control module, method and circuit system using the same for a crystal oscillator, and in particular, a low-power mode control module, method and circuit system using the same for a crystal oscillator whose control accuracy is not affected by process, system voltage or ambient temperature. Background Art
[0002] The low-power crystal oscillator module is a necessary component of the integrated circuit. It uses a crystal oscillator to generate an oscillation signal for frequency use. The low-power crystal oscillator module is equipped with a controller, which controls the crystal oscillator to enable and disable, thereby reducing power consumption. The controller of the prior art mainly detects the amplitude of the oscillation input signal and the oscillation output signal of the crystal oscillator as a basis for enabling and disabling the crystal oscillator.
[0003] However, since the amplitude of the oscillation input signal and the oscillation output signal of the crystal oscillator is affected by the process, system voltage or ambient temperature, it is more difficult for the controller to detect the amplitude of the oscillation input signal and the oscillation output signal. In other words, if the variation of the process, system voltage or ambient temperature cannot be compensated, the detection result of the controller will be wrong, and the controller will mistakenly enable or disable the crystal oscillator. Summary of the invention
[0004] It can be understood from the above description that the present application is to provide a low-power mode control module, method and circuit system using the same for a crystal oscillator whose control accuracy is not affected by the process, system voltage or ambient temperature. In short, when the oscillation output signal of the crystal oscillator is affected by the process, system voltage or ambient temperature, the amplitude control signal used to generate the upper reference voltage and the lower reference voltage will be adjusted accordingly to avoid erroneously enabling or disabling the crystal oscillator.
[0005] In order to solve the above-mentioned conventional problems, the embodiment of the present application provides a low-power mode control module for a crystal oscillator, and the low-power mode control module includes a stable output detector, an amplitude detector, a programmable reference voltage generator and a low-power mode controller. The stable output detector is used to detect whether the oscillation output signal of the crystal oscillator is stably output. The amplitude detector is electrically connected to the stable output detector, and is used to compare the amplitude control signal with at least one of the oscillation input signal and the oscillation output signal of the crystal oscillator when the oscillation output signal is stably output, so as to determine whether the amplitude control signal needs to be adjusted. The programmable reference voltage generator is electrically connected to the amplitude detector, and is used to generate an upper reference voltage and a lower reference voltage associated with the amplitude control signal when the amplitude control signal does not need to be adjusted. The low-power mode controller is electrically connected to the programmable reference voltage generator, and is used to generate a low-power mode control output signal associated with a crystal oscillator enable signal for enabling the crystal oscillator according to whether the oscillation output signal exceeds the reference voltage range of the upper reference voltage and the lower reference voltage.
[0006] Based on the above purpose, the present application further provides a circuit system, which includes the aforementioned low power mode control module, a crystal oscillator and a functional circuit. The low power mode control module is electrically connected to the crystal oscillator. The functional circuit is electrically connected to the crystal oscillator, and is used to receive an oscillation output signal as a frequency used when the functional circuit is running.
[0007] Based on the above purpose, the present application further provides a low-power mode control method for a crystal oscillator, which includes the following steps: detecting whether the oscillation output signal of the crystal oscillator is stably output; when the oscillation output signal is stably output, comparing the amplitude control signal with at least one of the oscillation input signal and the oscillation output signal of the crystal oscillator to determine whether the amplitude control signal needs to be adjusted; when the amplitude control signal does not need to be adjusted, generating an upper reference voltage and a lower reference voltage associated with the amplitude control signal; and generating a low-power mode control output signal associated with a crystal oscillator enable signal for enabling the crystal oscillator based on whether the oscillation output signal exceeds the reference voltage range of the upper reference voltage and the lower reference voltage.
[0008] In summary, according to the low power mode control module, method and circuit system using the same provided above, the low power mode control output signal will not be erroneous due to the influence of process, system voltage or ambient temperature, thereby avoiding erroneous enabling or disabling of the crystal oscillator. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] In order to make the above and other purposes, features, advantages and embodiments of the present application more clearly understood, the accompanying drawings are described as follows:
[0010] Figure 1is a schematic block diagram of a low power mode control module according to an embodiment of the present application;
[0011] Figure 2 is a schematic waveform diagram of multiple signals in a low power mode control module according to an embodiment of the present application;
[0012] Figure 3 is a schematic circuit diagram of an amplitude detector of a low power mode control module according to an embodiment of the present application;
[0013] Figure 4 is a schematic waveform diagram of multiple signals in an amplitude detector of a low power mode control module according to an embodiment of the present application;
[0014] Figure 5 is a schematic circuit diagram of a low power mode controller of a low power mode control module of an embodiment of the present application;
[0015] Figure 6 is a schematic waveform diagram of multiple signals of a low power mode controller of a low power mode control module according to an embodiment of the present application; and
[0016] Figure 7 It is a schematic flow chart of the low power mode control method of an embodiment of the present application. DETAILED DESCRIPTION
[0017] In order to solve the technical problems of the prior art, the low power mode control module, method and circuit system using the same in the embodiment of the present application are to determine the swing size of the oscillation output signal by adjusting the amplitude control signal when the oscillation output signal of the crystal oscillator is stable, and after determining the swing size of the oscillation output signal, there is no need to adjust the amplitude control signal. Then, when it is determined that there is no need to adjust the amplitude control signal, the upper reference voltage and the lower reference voltage can be generated by the amplitude control signal, and the low power mode is entered, and the crystal oscillator is enabled or disabled according to whether the oscillation output signal is greater than the upper reference voltage or less than the lower reference voltage. Since the swing size of the oscillation output signal is constantly monitored, when the oscillation output signal changes due to process, system voltage or ambient temperature variation, the amplitude control signal will be adjusted, and the upper reference voltage and the lower reference voltage will also be adjusted accordingly, so the crystal oscillator will not be enabled or disabled by mistake due to the influence of process, system voltage or ambient temperature.
[0018] First, please refer to Figure 1 , Figure 1: is a schematic block diagram of a low power mode control module of an embodiment of the present application. The low power mode control module includes at least a control core 1, and may further include a decision circuit 2, wherein the control core 1 and the decision circuit 2 are electrically connected to each other, and a crystal oscillator 3 is electrically connected to the control core 1 and the decision circuit 2. The control core 1, the decision circuit 2 and the crystal oscillator 3 can form a circuit system with a functional circuit (not shown in the figure), wherein the functional circuit is electrically connected to the crystal oscillator and is used to receive an oscillation output signal as the frequency used when the functional circuit is running.
[0019] The control core 1 includes a stable output detector 11, an amplitude detector 12, a programmable reference voltage generator 13 and a low power mode controller 14. The stable output detector 11 is used to detect whether the oscillation output signal X_OUT of the crystal oscillator 3 is stably output. The amplitude detector 12 is electrically connected to the stable output detector 11 through the decision circuit 2, and is used to compare the amplitude control signal AMP_C with at least one of the oscillation input signal X_IN and the oscillation output signal X_OUT of the crystal oscillator 3 when the oscillation output signal X_OUT is stably output, so as to determine whether the amplitude control signal AMP_C needs to be adjusted. In this embodiment, the amplitude detector 12 compares both the oscillation input signal X_IN and the oscillation output signal X_OUT with the amplitude control signal AMP_C, but the present application is not limited thereto.
[0020] Furthermore, the amplitude control signal AMP_C defines an amplitude range. The amplitude detector 12 determines whether the amplitudes of the oscillation input signal X_IN and the oscillation output signal X_OUT do not exceed the amplitude range. If they do not exceed the amplitude range, the amplitude control signal AMP_C is adjusted to increase the amplitude range until the amplitudes of the oscillation input signal X_IN and the oscillation output signal X_OUT exceed the amplitude range. The previous amplitude control signal AMP_C before the amplitudes of the oscillation input signal X_IN and the oscillation output signal X_OUT exceed the amplitude range is the target amplitude control signal AMP_C, which is used to subsequently generate the upper reference voltage VREFA and the lower reference voltage VREFB. In short, the amplitudes of the oscillation input signal X_IN and the oscillation output signal X_OUT are constantly monitored to adjust the upper reference voltage VREFA and the lower reference voltage VREFB in real time.
[0021] The programmable reference voltage generator 13 is electrically connected to the amplitude detector 12 through the decision circuit 2, and is used to generate an upper reference voltage VREFA and a lower reference voltage VREFB associated with the amplitude control signal AMP_C when the amplitude control signal AMP_C does not need to be adjusted. The low power mode controller 14 is electrically connected to the programmable reference voltage generator 13, and is used to generate a low power mode control output signal LPD associated with the crystal oscillator enable signal X_EN for enabling the crystal oscillator 3 according to whether the oscillation output signal X_OUT exceeds the reference voltage range of the upper reference voltage VREFA and the lower reference voltage VREFB (i.e., whether the oscillation output signal X_OUT is greater than the upper reference voltage VREFA or less than the lower reference voltage VREFB).
[0022] The stable output detector 11 generates a first judgment signal C1_OUT according to whether the oscillation output signal X_OUT is stably output, and the amplitude detector 12 compares at least one of the oscillation output signal X_OUT and the oscillation input signal X_IN with the amplitude control signal AMP_C to generate a second judgment signal C2_OUT. The decision circuit 2 is used to receive the first judgment signal C1_OUT, the second judgment signal C2_OUT and the low power mode control output signal LPD, and output the amplitude control signal AMP_C, the upper limit reference voltage control signal CV1 for determining the upper limit reference voltage VREFA, the lower limit reference voltage control signal CV2 for determining the lower limit reference voltage VREFB and the crystal oscillator enable signal X_EN.
[0023] Further, the decision circuit 2 outputs the amplitude control signal AMP_C when the first judgment signal C1_OUT indicates that the oscillation output signal X_OUT is stably output. The decision circuit 2 adjusts the amplitude control signal AMP_C when the second judgment signal C2_OUT does not change for at least a predetermined period of time, wherein the predetermined period is equal to the oscillation period of the oscillation output signal X_OUT or the oscillation input signal X_IN. When the amplitude control signal AMP_C does not need to be adjusted, the decision circuit 2 calculates the upper reference voltage VREFA and the lower reference voltage VREFB according to the amplitude control signal AMP_C, and generates the upper reference voltage control signal CV1 and the lower reference voltage control signal CV2 accordingly. The decision circuit 2 generates the crystal oscillator enable signal X_EN according to the low power mode control output signal LPD.
[0024] In this embodiment, the crystal oscillator 3 includes a controllable inverter INV1, a resistor R, an oscillation crystal CX, a first capacitor C1 and a second capacitor C2. The controllable inverter INV1 is enabled according to the crystal oscillator enable signal X_EN, and when enabled, the oscillation input signal X_IN is reversed logically to generate an oscillation output signal X_OUT, that is, the oscillation input signal X_IN and the oscillation output signal X_OUT are opposite to each other. The two ends of the resistor R are electrically connected to the input and output of the controllable inverter INV1 respectively. The two ends of the oscillation crystal CX are electrically connected to the input and output of the controllable inverter INV1 respectively. The two ends of the first capacitor C1 are electrically connected to the input and low voltage (for example, ground voltage) of the controllable inverter INV1 respectively. The two ends of the second capacitor C2 are electrically connected to the output and low voltage (for example, ground voltage) of the controllable inverter INV1 respectively. It should be noted that the implementation of the above-mentioned crystal oscillator 3 is not used to limit the present application. In other embodiments, the crystal oscillator 3 can be implemented in other ways.
[0025] Please also refer to Figure 1 and Figure 2 , Figure 2 Schematic waveform diagram of multiple signals in the low power mode control module of the embodiment of the present application. The low power mode control module will first operate in the first time interval S1. In the first time interval S1, the crystal oscillator enable signal X_EN is a logic high level to enable the crystal oscillator 3. When the crystal oscillator 3 is first enabled, its oscillation output signal X_OUT is not stable, so the first judgment signal C1_OUT is a logic low level. In addition, in the first time interval S1, the default value of the amplitude control signal AMP_C is the minimum value.
[0026] After the oscillation output signal X_OUT is stably output, the first determination signal C1_OUT becomes a logic high level, and the low power mode control module enters the second time interval S2 for operation. In the second time interval S2, when the amplitude control signal AMP_C is adjusted to the default value plus M, it is determined that the amplitude control signal AMP_C does not need to be adjusted (i.e., when the amplitude control signal AMP_C is the default value plus (M+1), the second determination signal C2_OUT does not change for at least a predetermined period of time, and when the amplitude control signal AMP_C is the default value plus M, the second determination signal C2_OUT continuously changes with the oscillation period), where M is a positive integer.
[0027] Next, the low power mode control module will enter the third time interval S3 to operate, and the upper reference voltage control signal CV1 and the lower reference voltage control signal CV2 will be set to the default value plus P and the default value minus R according to the amplitude control signal AMP_C, wherein P and R are positive integers, so as to determine the upper reference voltage VREFA and the lower reference voltage VREFB, and allow the low power mode controller 14 to enter the low power mode, so as to generate the low power mode control output signal LPD associated with the crystal oscillator enable signal X_EN for enabling the crystal oscillator 3 according to whether the oscillation output signal X_OUT exceeds the reference voltage range of the upper reference voltage VREFA and the lower reference voltage VREFB.
[0028] The low power mode control module then enters the fourth time interval S4 to operate. However, in the fourth time interval S4, due to the variation of the process, system voltage or ambient temperature, the swing amplitudes of the oscillation input signal X_IN and the oscillation output signal X_OUT become smaller, and the second determination signal C2_OUT does not change for at least a predetermined period of time. Therefore, the decision circuit 2 adjusts the amplitude control signal AMP_C so that the corresponding swing range becomes smaller until the amplitude control signal AMP_C does not need to be adjusted. In this embodiment, the amplitude control signal AMP_C is adjusted to a default value plus N, where N is a positive integer.
[0029] The low power mode control module then enters the fifth time interval S5 to operate. In the fifth time interval S5, the upper reference voltage control signal CV1 and the lower reference voltage control signal CV2 are set to the default value plus Q and the default value minus S according to the amplitude control signal AMP_C, wherein Q and S are positive integers, so as to determine the upper reference voltage VREFA and the lower reference voltage VREFB, and allow the low power mode controller 14 to enter the low power mode, so as to generate the low power mode control output signal LPD associated with the crystal oscillator enable signal X_EN for enabling the crystal oscillator 3 according to whether the oscillation output signal X_OUT exceeds the reference voltage range of the upper reference voltage VREFA and the lower reference voltage VREFB.
[0030] Please refer to Figure 1 and Figure 3 , Figure 3 is a schematic circuit diagram of an amplitude detector of a low power mode control module according to an embodiment of the present application. Figure 3 yes Figure 1The amplitude detector 12 is one of the implementations of the amplitude detector 12, but the present application is not limited thereto. The amplitude detector 12 includes a first P-type transistor MP1, a second P-type transistor MP2, a first N-type transistor MN1, a second N-type transistor MN2, a first inverter INV2, a second inverter INV3, a switch SW1, a voltage-controlled resistor element R_VAR, a first current source CS1, and a second current source CS2.
[0031] The source of the first P-type transistor MP1 and the source of the second P-type transistor MP2 are electrically connected to the system voltage VDD, the gate of the first P-type transistor MP1 is electrically connected to the gate of the second P-type transistor MP2, the drain of the first P-type transistor MP1 and the drain of the first N-type transistor MN1, the drain of the second P-type transistor MP2 is electrically connected to the drain of the second N-type transistor MN2, and the gate of the first N-type transistor MN1 and the gate of the second N-type transistor MN2 receive the oscillation input signal X_IN and the oscillation output signal X_OUT respectively.
[0032] The input end of the first inverter INV2 is electrically connected to the drain of the second N-type transistor MN2, and the output end of the first inverter INV2 is electrically connected to the input end of the second inverter INV3. The first current source CS1 and the second current source CS2 are used to provide the first current I1 and the second current I2 respectively, the first current source CS1 is electrically connected to the source of the first N-type transistor MN1, and the second current source CS2 is electrically connected to the source of the second N-type transistor MN2.
[0033] The switch SW1 is electrically connected between the source of the first N-type transistor MN1 and the source of the second N-type transistor MN2, and is turned on or off by the output signal (i.e., the second determination signal C2_OUT) at the output end of the second inverter INV3. The output signal at the output end of the second inverter INV3 is the second determination signal C2_OUT. The purpose of setting the switch SW1 is to avoid the hysteresis of the second determination signal C2_OUT. Therefore, when the second determination signal C2_OUT is at a logic high level, the source of the first N-type transistor MN1 and the source of the second N-type transistor MN2 are short-circuited.
[0034] The voltage-controlled resistor component R_VAR is electrically connected between the source of the first N-type transistor MN1 and the source of the second N-type transistor MN2, and its resistance value is determined according to the amplitude control signal AMP_C. The first current I1 is provided to the first N-type transistor MN1, the voltage-controlled resistor component R_VAR and the end of the switch SW1 that are electrically connected, and the second current I2 is provided to the second N-type transistor MN2, the voltage-controlled resistor component R_VAR and the end of the switch SW1 that are electrically connected. When the oscillation output signal X_OUT is less than the oscillation input signal X_IN, the second determination signal C2_OUT is a logic high level, and when the oscillation output signal X_OUT is greater than the oscillation input signal X_IN, the second determination signal C2_OUT is a logic low level.
[0035] The voltage across the voltage-controlled resistor component R_VAR is VAMP, which is VAMP={[(I2-I1) / 2]+I1}*R, where R is the resistance value of the voltage-controlled resistor component R_VAR, which is determined by the amplitude control signal AMP_C. When the amplitude control signal AMP_C causes the voltage across the voltage-controlled resistor component R_VAR to be VAMP (i.e., the aforementioned swing range) greater than the swing of the oscillation output signal X_OUT and the oscillation input signal X_IN, the second determination signal C2_OUT will not oscillate for at least a predetermined period of time, that is, a frequency waveform oscillating with an oscillation period will not be formed. On the other hand, the voltage-controlled resistor component R_VAR can be changed to a fixed resistor, and the first current I1 and the second current I2 are controlled by the amplitude control signal AMP_C to change the voltage across the voltage to VAMP.
[0036] Please refer to Figure 1 to Figure 4 , Figure 4 1 is a schematic waveform diagram of multiple signals in the amplitude detector of the low power mode control module of the embodiment of the present application. In the third time interval S3, the amplitude control signal AMP_C is the default value plus M, the amplitude control signal AMP_C does not need to be adjusted, and when the cross voltage VAMP of the voltage-controlled resistor component R_VAR is the first swing VP1, the second judgment signal C2_OUT will oscillate with an oscillation period. However, in the fourth time interval S4, due to the variation of the process, system voltage or ambient temperature, the swing of the oscillation input signal X_IN and the oscillation output signal X_OUT becomes smaller, and the swing of the oscillation input signal X_IN and the oscillation output signal X_OUT is smaller than the cross voltage VAMP of the voltage-controlled resistor component R_VAR (i.e., the first swing VP1), the decision circuit 2 adjusts the amplitude control signal AMP_C so that the cross voltage VAMP of the voltage-controlled resistor component R_VAR becomes smaller, and when the cross voltage VAMP is adjusted to the second swing VP2, the second judgment signal C2_OUT will oscillate with an oscillation period, and the amplitude control signal AMP_C does not need to be adjusted.
[0037] Please refer to Figure 1and Figure 5 , Figure 5 4 is a schematic circuit diagram of a low power mode controller of a low power mode control module according to an embodiment of the present application. Figure 5 yes Figure 1 One of the implementations of the low power mode controller 14 is provided, but the present application is not limited thereto. The low power mode controller 14 includes a first comparator CMP1, a second comparator CMP2 and a logic gate AND1. The first comparator CMP1 is used to compare the oscillation output signal X_OUT with the upper reference voltage VREFA to output a first comparison result signal CR1. The second comparator CMP2 is used to compare the oscillation output signal X_OUT with the lower reference voltage VREFB to output a second comparison result signal CR2. The logic gate AND1 is an AND gate in this embodiment, which is electrically connected to the first comparator CMP1 and the second comparator CMP2, and is used to perform a logic operation (a logic and operation in this embodiment) on the first comparison result signal CR1 and the second comparison result signal CR2 to generate a low power mode control output signal LPD.
[0038] Please refer to Figure 5 and Figure 6 , Figure 6 1 is a schematic waveform diagram of multiple signals of the low power mode controller of the low power mode control module of the embodiment of the present application. In this example, when the oscillation output signal X_OUT is greater than the upper reference voltage VREFA, the first comparison result signal CR1 becomes a logic low level, so that the low power mode control output signal LPD becomes a logic low level, and when the oscillation output signal X_OUT is less than the lower reference voltage VREFB, the second comparison result signal CR2 becomes a logic low level, so that the low power mode control output signal LPD becomes a logic low level.
[0039] Finally, please refer to Figure 1 and Figure 7 , Figure 7 is a schematic flow chart of the low power mode control method of an embodiment of the present application. In step S701, the crystal oscillator 3 is enabled to start the crystal oscillator 3. Then, in step S702, it is checked whether the output of the oscillation output signal X_OUT is stable. In step S703, it is determined whether the output of the oscillation output signal X_OUT is stable. If the output of the oscillation output signal X_OUT is stable, step S704 is executed, otherwise, step S702 is continued.
[0040] In step S704, by comparing at least one of the oscillation input signal X_IN and the oscillation output signal X_OUT with the amplitude control signal AMP_C, it is determined whether the amplitude control signal AMP_C needs to be adjusted. In step S705, it is checked whether the amplitude control signal AMP_C needs to be adjusted. If the amplitude control signal AMP_C does not need to be adjusted, step S706 is executed, otherwise, step S704 is continued to be executed. Please note that steps S704 and S705 are permanent steps. Even if the following steps S707 to S710 are continuously executed, once the swing amplitude of at least one of the oscillation input signal X_IN and the oscillation output signal X_OUT changes, steps S707 to S710 will be interrupted, and steps S704 and S705 will be re-executed.
[0041] In step S706, the upper reference voltage VREFA and the lower reference voltage VREFB are calculated and set according to the amplitude control signal AMP_C. Then, in step S707, the low power mode is entered, and the oscillation output signal X_OUT is compared with the upper reference voltage VREFA and the lower reference voltage VREFB. Then, in step S708, it is determined whether the oscillation output signal X_OUT exceeds the reference voltage range of the upper reference voltage VREFA and the lower reference voltage VREFB. If the oscillation output signal X_OUT exceeds the reference voltage range, step S709 is executed, otherwise, step S710 is executed. In step S709, the crystal oscillator 3 is disabled. In step S710, the crystal oscillator 3 is enabled. After steps S709 and S710, if the swing of the oscillation output signal X_OUT is not affected, step S706 is continued.
[0042] In summary, compared to the prior art, the power mode control module, method and circuit system using the same of the embodiment of the present application can adjust the upper reference voltage and the lower reference voltage used for comparison with the oscillation output signal when the oscillation output signal of the crystal oscillator is affected by the process, system voltage or ambient temperature. Accordingly, the low power mode control output signal will not be wrong due to the process, system voltage or ambient temperature, so it can avoid the crystal oscillator from being enabled or disabled by mistake, that is, the control accuracy is effectively improved.
[0043] This application is disclosed herein only in terms of preferred embodiments, but anyone familiar with the technical field should understand that the above embodiments are only used to describe this application and are not used to limit the scope of the claims claimed in this application. Any changes or substitutions that are equal or equivalent to the above embodiments should be interpreted as being included in the spirit or scope of this application. Therefore, the scope of protection of this application should be based on the definition of the claims.
Claims
1. A low power mode control module, characterized in that: include: a stable output detector, used to detect whether an oscillation output signal of the crystal oscillator is stably output; an amplitude detector, electrically connected to the stable output detector, for comparing an amplitude control signal with at least one of an oscillation input signal of the crystal oscillator and the oscillation output signal when the oscillation output signal is stably output, so as to determine whether the amplitude control signal needs to be adjusted; a programmable reference voltage generator, electrically connected to the amplitude detector, for generating an upper reference voltage and a lower reference voltage associated with the amplitude control signal when the amplitude control signal does not need to be adjusted; as well as A low power mode controller is electrically connected to the programmable reference voltage generator and is used to generate a low power mode control output signal associated with a crystal oscillator enable signal for enabling the crystal oscillator according to whether the oscillation output signal exceeds a reference voltage range of the upper reference voltage and the lower reference voltage.
2. The low power mode control module according to claim 1, characterized in that: Also includes: a decision circuit, for receiving a first determination signal, a second determination signal and the low power mode control output signal, and outputting the amplitude control signal, an upper reference voltage control signal for determining the upper reference voltage, a lower reference voltage control signal for determining the lower reference voltage, and the crystal oscillator enable signal; The stable output detector is electrically connected to the amplitude detector through the decision circuit, and the amplitude detector is electrically connected to the programmable reference voltage generator through the decision circuit. The stable output detector generates the first judgment signal according to whether the oscillation output signal is stably output, and the amplitude detector compares the oscillation output signal with at least one of the oscillation input signal and the amplitude control signal to generate the second judgment signal.
3. The low power mode control module according to claim 2, characterized in that: The decision circuit outputs the amplitude control signal when the first judgment signal indicates that the oscillation output signal is stably output; the decision circuit adjusts the amplitude control signal when the second judgment signal does not change for at least a predetermined time, wherein the predetermined time is equal to an oscillation period of the oscillation output signal or the oscillation input signal; when the amplitude control signal does not need to be adjusted, the decision circuit calculates the upper reference voltage and the lower reference voltage according to the amplitude control signal, and generates the upper reference voltage control signal and the lower reference voltage control signal accordingly; And the decision circuit generates the crystal oscillator enable signal according to the low power mode control output signal.
4. The low power mode control module according to claim 2, characterized in that: The amplitude detector comprises: a first P-type transistor, a second P-type transistor, a first N-type transistor and a second N-type transistor, wherein a source of the first P-type transistor and a source of the second P-type transistor are electrically connected to a system voltage, a gate of the first P-type transistor is electrically connected to a gate of the second P-type transistor, a drain of the first P-type transistor and a drain of the first N-type transistor, a drain of the second P-type transistor is electrically connected to a drain of the second N-type transistor, and a gate of the first N-type transistor and a gate of the second N-type transistor receive the oscillation input signal and the oscillation output signal respectively; a first inverter and a second inverter, wherein an input terminal of the first inverter is electrically connected to the drain of the second N-type transistor, and an output terminal of the first inverter is electrically connected to an input terminal of the second inverter; a first current source and a second current source, respectively used to provide a first current and a second current, wherein the first current source is electrically connected to a source of the first N-type transistor, and the second current source is electrically connected to a source of the second N-type transistor; a switch electrically connected between the source of the first N-type transistor and the source of the second N-type transistor, and turned on or off by an output signal at an output end of the second inverter, wherein the output signal at the output end of the second inverter is the second determination signal; and a voltage-controlled resistor element, electrically connected between the source of the first N-type transistor and the source of the second N-type transistor, and having a resistance value determined according to the amplitude control signal; The first current is provided to the first N-type transistor, one end of the voltage-controlled resistor component and the switch electrically connected, and the second current is provided to the second N-type transistor, one end of the voltage-controlled resistor component and the switch electrically connected.
5. The low power mode control module according to claim 2, characterized in that: The low power mode controller comprises: a first comparator, used for comparing the oscillation output signal with the upper reference voltage to output a first comparison result signal; a second comparator, used for comparing the oscillation output signal with the lower reference voltage to output a second comparison result signal; and A logic gate is electrically connected to the first comparator and the second comparator, and is used for performing a logic operation on the first comparison result signal and the second comparison result signal to generate the low power mode control output signal.
6. The low power mode control module according to claim 2, characterized in that: When a process, a system voltage or an ambient temperature variation causes the oscillation output signal to vary, the decision circuit adjusts the amplitude control signal until the amplitude control signal does not need to be adjusted.
7. A circuit system, characterized in that: include: a crystal oscillator; A low power mode control module according to any one of claims 1 to 6, electrically connected to the crystal oscillator; and A functional circuit is electrically connected to the crystal oscillator and is used to receive an oscillation output signal as a frequency used when the functional circuit is running.
8. The circuit system according to claim 7, characterized in that: The crystal oscillator comprises: a controllable inverter, which is enabled according to a crystal oscillator enable signal and, when enabled, performs an inverse logic operation on an oscillation input signal to generate the oscillation output signal; a resistor, two ends of which are electrically connected to an input end and an output end of the controllable inverter respectively; an oscillating crystal, two ends of which are electrically connected to the input end and the output end of the controllable inverter respectively; a first capacitor, two ends of which are electrically connected to the input end of the controllable inverter and a low voltage respectively; and A second capacitor has two ends electrically connected to the output end of the controllable inverter and the low voltage respectively.
9. A low power mode control method for a crystal oscillator, characterized in that: include: Detecting whether an oscillation output signal of the crystal oscillator is stably output; When the oscillation output signal is stably output, comparing an amplitude control signal with at least one of an oscillation input signal of the crystal oscillator and the oscillation output signal to determine whether the amplitude control signal needs to be adjusted; When the amplitude control signal does not need to be adjusted, generating an upper reference voltage and a lower reference voltage associated with the amplitude control signal; A low power mode control output signal associated with a crystal oscillator enable signal for enabling the crystal oscillator is generated according to whether the oscillation output signal exceeds a reference voltage range between the upper reference voltage and the lower reference voltage.
10. The low power mode control method according to claim 9, characterized in that: When a process, a system voltage or an ambient temperature variation causes the oscillation output signal to vary, the amplitude control signal is adjusted until the amplitude control signal does not need to be adjusted.