Pixel unit, pixel array and image sensor

Abstract

The invention discloses a pixel unit, a pixel array and an image sensor. The pixel unit comprises a reset tube, a floating diffusion region, a gain switch tube, a first capacitor, a second capacitor, a photoelectric conversion unit, a source follower and a latch unit. The first end of the reset tube is suitable for inputting power supply voltage, and the second end of the reset tube is connected with the first end of the gain switch tube and the first end of the first capacitor. And the floating diffusion region is connected with the second end of the gain switch tube, the first end of the second capacitor, the control end of the source follower and the photoelectric conversion unit. The first end of the source follower is suitable for inputting the power supply voltage, and the second end of the source follower is connected with the output end of the pixel unit. The second end of the first capacitor and the second end of the second capacitor are both grounded. And the latch unit is suitable for adjusting the voltage of the control end of the gain switch tube according to the voltage of the second end of the source follower.

Description

Technical Field

[0001] The present invention relates to the field of circuits, and in particular to a pixel unit, a pixel array and an image sensor. Background Art

[0002] Figure 1 It is a traditional CIS pixel unit, that is, a 4-transmission gate CIS pixel unit. The existing 4-transmission gate CIS pixel unit includes: a reset tube RST1, a floating diffusion area FD1, a first capacitor CS11, a photoelectric conversion unit 11, a source follower SF1 and a row selection tube ROW1. Among them, the first end of the reset tube RST1 is suitable for inputting a power supply voltage VDD, and the second end of the reset tube RST1 is connected to the floating diffusion area FD1, the first end of the first capacitor CS11 and the control end of the source follower SF1. The floating diffusion area FD1 is connected to the photoelectric conversion unit 11. The first end of the source follower SF1 is suitable for inputting a power supply voltage VDD, and the second end of the source follower is connected to the first end of the row selection tube ROW1. The second end of the row selection tube ROW1 is connected to the output end Vout of the pixel unit.

[0003] However, the 4-transmission gate CIS pixel unit does not have a gain adjustment function. In order to achieve variable gain of the CIS pixel unit, the prior art provides a 5-transmission gate CIS pixel unit, such as Figure 2 As shown. The existing 5-transmission gate CIS pixel unit includes: a reset tube RST2, a gain switch tube SCG2, a floating diffusion area FD2, a first capacitor CS21, a second capacitor CS22, a photoelectric conversion unit 21, a source follower SF2 and a row select tube ROW2. Among them, the first end of the reset tube RST2 is suitable for inputting a power supply voltage VDD, and the second end of the reset tube RST2 is connected to the first end of the gain switch tube SCG2 and the first end of the first capacitor CS21. The floating diffusion area FD2 is connected to the second end of the gain switch tube CSG2, the first end of the second capacitor CS22, the control end of the source follower SF2 and the photoelectric conversion unit 21. The first end of the source follower SF2 is suitable for inputting a power supply voltage VDD, and the second end of the source follower SF2 is connected to the first end of the row select tube ROW2. The second end of the row select tube ROW2 is connected to the output end Vout of the pixel unit. The second end of the first capacitor CS21 and the second end of the second capacitor CS22 are both grounded.

[0004] use Figure 2 Although the image sensor composed of the pixel units shown can adjust the gain, when the light intensity distribution of the photograph is large, image distortion will still occur in the overly bright or dark areas. Summary of the invention

[0005] The technical problem to be solved by the present invention is that when the light intensity distribution of a photograph is large, image distortion will still occur in overly bright or overly dark areas.

[0006] The present invention provides a pixel unit, comprising: a reset tube, a floating diffusion region, a gain switch tube, a first capacitor, a second capacitor, a photoelectric conversion unit, a source follower and a latch unit.

[0007] The first end of the reset tube is suitable for inputting a power supply voltage, and the second end of the reset tube is connected to the first end of the gain switch tube and the first end of the first capacitor; the floating diffusion area is connected to the second end of the gain switch tube, the first end of the second capacitor, the control end of the source follower and the photoelectric conversion unit; the first end of the source follower is suitable for inputting a power supply voltage, and the second end of the source follower is connected to the output end of the pixel unit; the second end of the first capacitor and the second end of the second capacitor are both grounded; and the latch unit is suitable for adjusting the voltage of the control end of the gain switch tube according to the voltage of the second end of the source follower.

[0008] Optionally, the latch unit is adapted to turn on the gain switch tube when the voltage at the second end of the source follower is less than or equal to the threshold voltage.

[0009] Optionally, the latch unit is adapted to put the gain switch tube into a cut-off state when the voltage at the second end of the source follower is greater than a threshold voltage.

[0010] Optionally, the latch unit includes: a comparator, an inverter and a first latch unit; the first input end of the comparator is connected to the second end of the source follower, the second input end of the comparator is suitable for inputting a threshold voltage, and the output end of the comparator is connected to the input end of the inverter; the output end of the inverter is connected to the first latch unit and the control end of the gain switch tube.

[0011] Optionally, the latch unit includes: a first PMOS tube and a second latch unit; the control end of the first PMOS tube is connected to the second end of the source follower, the first end of the first PMOS tube is suitable for inputting a power supply voltage, and the second end of the first PMOS tube is connected to the control end of the second latch unit and the gain switch tube.

[0012] Optionally, the latch unit includes: a second PMOS tube and a first NMOS tube; the control end of the second PMOS tube is connected to the second end of the source follower, the first end of the second PMOS tube is suitable for inputting the power supply voltage, and the second end of the second PMOS tube is connected to the control end of the first NMOS tube; the first end of the first NMOS tube is suitable for inputting the power supply voltage, and the second end of the first NMOS tube is connected to the control end of the gain switch tube.

[0013] Optionally, the pixel unit further includes: a row selection tube; the second end of the source follower is connected to the output end of the pixel unit through the row selection tube.

[0014] Optionally, the photoelectric conversion unit includes: a photodiode and a transmission tube; the first end of the transmission tube is connected to the floating diffusion region, and the second end of the transmission tube is connected to the cathode of the photodiode; the anode of the photodiode is grounded.

[0015] An embodiment of the present invention further provides a pixel array, comprising: the above-mentioned pixel units. The pixel units are arranged in an array.

[0016] An embodiment of the present invention also provides an image sensor, comprising: a gain reading and resetting unit, and the above-mentioned pixel array; the gain reading and resetting unit is connected to the control end of the gain switch tube, and is suitable for reading or resetting the voltage of the control end of the gain switch tube.

[0017] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0018] The present invention adds a latch unit in the pixel unit, and the latch unit can adjust the voltage of the control end of the gain switch tube according to the voltage of the second end of the source follower, thereby turning on or off the gain switch tube, so as to achieve the purpose of adjusting the gain of a single pixel unit. Therefore, when the light intensity distribution is large, image distortion will not occur in overly bright or overly dark areas. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a schematic diagram of the structure of an existing 4-transmission gate CIS pixel unit;

[0020] Figure 2 It is a schematic diagram of the structure of an existing 5-transmission gate CIS pixel unit;

[0021] Figure 3 is a schematic structural diagram of a pixel unit according to an embodiment of the present invention;

[0022] Figure 4 is a structural schematic diagram of a latch unit according to an embodiment of the present invention;

[0023] Figure 5 is another structural schematic diagram of a latch unit according to an embodiment of the present invention;

[0024] Figure 6 is another structural schematic diagram of a latch unit according to an embodiment of the present invention;

[0025] Figure 7 is a schematic structural diagram of an image sensor according to an embodiment of the present invention;

[0026] Figure 8 is a timing diagram of an image sensor in a high light condition according to an embodiment of the present invention;

[0027] Fig. 9 FIG. 4 is a timing diagram of an image sensor in a low light condition according to an embodiment of the present invention. DETAILED DESCRIPTION

[0028] The inventor Figure 2 The image sensor composed of the pixel units shown in the figure is analyzed and found that its gain adjustment is performed by controlling the pixel array, and it is impossible to perform gain variable operation on a specified single pixel unit, which results in image distortion in overly bright or overly dark areas when the light intensity distribution is large. Based on this conclusion, the inventor proposes a new pixel unit.

[0029] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and understandable, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0030] like Figure 3 As shown, this embodiment provides a pixel unit, including: a reset tube RST, a floating diffusion area FD, a gain switch tube SCG, a first capacitor CS1, a second capacitor CS2, a source follower SF, a photoelectric conversion unit 1 and a latch unit 2.

[0031] The first end of the reset tube RST is suitable for inputting the power supply voltage VDD, and the second end of the reset tube RST is connected to the first end of the gain switch tube SCG and the first end of the first capacitor CS1. The floating diffusion area FD is connected to the second end of the gain switch tube SCG, the first end of the second capacitor CS2, the control end of the source follower SF and the photoelectric conversion unit 1. The first end of the source follower SF is suitable for inputting the power supply voltage VDD, and the second end of the source follower SF is connected to the output end Vout of the pixel unit.

[0032] The second end of the first capacitor CS1 and the second end of the second capacitor CS2 are both grounded. The latch unit 2 is adapted to adjust the voltage V2 of the control end of the gain switch SCG according to the voltage V1 of the second end of the source follower SF.

[0033] In this embodiment, a latch unit 2 is added to the pixel unit, and the latch unit 2 can adjust the voltage V2 of the control end of the gain switch tube SCG according to the voltage V1 of the second end of the source follower SF, thereby turning on or off the gain switch tube SCG, so as to achieve the purpose of adjusting the gain of a single pixel unit. In this case, when the light intensity distribution is large, image distortion will not occur in overly bright or overly dark areas.

[0034] Specifically, the latch unit 2 turns on the gain switch SCG when the voltage V1 at the second end of the source follower SF is less than or equal to the threshold voltage Vref. The latch unit 2 can also turn off the gain switch SCG when the voltage V1 at the second end of the source follower SF is greater than the threshold voltage Vref.

[0035] When the light is too strong, the source follower SF will work in the subthreshold region, and the voltage V1 at the second end of the source follower SF is low. When the latch unit 2 detects that the voltage V1 at the second end of the source follower SF is lower than the threshold voltage Vref, the gain switch tube SCG is controlled to be in the on state, and the pixel unit enters the low gain state, and the distortion problem of the output signal will be suppressed. Then, the algorithm restoration and image optimization are performed based on the sampled image data, and the image distortion will not occur in the overly bright or dark areas, and the photo has a better dynamic response range.

[0036] like Figure 4 As shown, the latch unit 2 may include: a comparator 21, an inverter 22 and a first latch unit. The first latch unit may be a third capacitor CS3, and the third capacitor CS3 may be a MOSCAP, a MOM CAP, a MIM CAP, etc.

[0037] The first input terminal of the comparator 21 is connected to the second terminal of the source follower SF, the second input terminal of the comparator 21 is suitable for inputting the threshold voltage Vref, and the output terminal of the comparator 21 is connected to the input terminal of the inverter 22. The output terminal of the inverter 22 is connected to the first terminal of the third capacitor CS3 and the control terminal of the gain switch tube SCG. The second terminal of the third capacitor SCG is grounded.

[0038] When the voltage V1 at the second end of the source follower SF is less than or equal to the threshold voltage Vref, the comparator 21 outputs a low level, and the inverter 22 outputs a high level according to the low level output by the comparator 21. The high level is stored in the third capacitor CS3 and is stably applied to the control end of the gain switch tube SCG, so that the gain switch tube SCG is in the on state, and the pixel unit remains in a low gain state.

[0039] When the voltage V1 at the second end of the source follower SF is greater than the threshold voltage Vref, the comparator 21 outputs a high level, and the inverter 22 outputs a low level according to the high level output by the comparator 21. The low level is stored in the third capacitor CS3 and is stably applied to the control end of the gain switch tube SCG, so that the gain switch tube SCG is in the cut-off state, and the pixel unit remains in a high gain state.

[0040] The first latch unit may also be composed of a programmable device, and the programmable device may be Flash, RRAM, MRAM, DRAM, etc.

[0041] like Figure 5 As shown, as another possible implementation, the latch unit 2 may include: a first PMOS transistor P1 and a second latch unit. The second latch unit may include: a fourth capacitor CS4, and the fourth capacitor CS4 may be MOSCAP, MOM CAP, MIMCAP, etc.

[0042] The control end of the first PMOS transistor P1 is connected to the second end of the source follower SF, the first end of the first PMOS transistor P1 is suitable for inputting the power supply voltage VDD, the second end of the first PMOS transistor P1 is connected to the first end of the fourth capacitor CS4 and the control end of the gain switch tube SCG. The second end of the fourth capacitor CS4 is grounded.

[0043] When the voltage V1 at the second end of the source follower SF is less than or equal to the threshold voltage Vref of the first PMOS tube P1, the first PMOS tube P1 is in a conducting state. The conducting first PMOS tube P1 outputs the power supply voltage VDD to the fourth capacitor CS4 and the control end of the gain switch tube SCG, so that the gain switch tube SCG is in a conducting state, and the pixel unit is kept in a low gain state.

[0044] When the voltage V1 at the second end of the source follower SF is greater than the threshold voltage Vref of the first PMOS tube P1, the first PMOS tube P1 is in a cut-off state. The cut-off first PMOS tube P1 makes the control end of the gain switch tube SCG low level, so the gain switch tube SCG is in a cut-off state, and the pixel unit remains in a high gain state.

[0045] The second latch unit may also be composed of a programmable device, and the programmable device may be Flash, RRAM, MRAM, DRAM, etc.

[0046] like Figure 6 As shown, this embodiment further provides a feasible implementation of a latch unit 2 , and the latch unit 2 may include: a second PMOS transistor P2 and a first NMOS transistor N1 .

[0047] The control end of the second PMOS transistor P2 is connected to the second end of the source follower SF, the first end of the second PMOS transistor P2 is suitable for inputting the power supply voltage VDD, and the second end of the first PMOS transistor P2 is connected to the control end of the first NMOS transistor N1. The first end of the first NMOS transistor N1 is suitable for inputting the power supply voltage VDD, and the second end of the first NMOS transistor N1 is connected to the control end of the gain switch transistor SCG.

[0048] When the voltage V1 at the second end of the source follower SF is less than or equal to the threshold voltage Vref of the second PMOS tube P2, the second PMOS tube P2 is in the on state. The turned-on second PMOS tube P2 outputs the power supply voltage VDD to the control end of the first NMOS tube N1, so that the first NMOS tube N1 is in the on state. The turned-on first NMOS tube N1 outputs the power supply voltage VDD to the control end of the gain switch tube SCG, the gain switch tube SCG is turned on, and the pixel unit remains in a low gain state.

[0049] When the voltage V1 at the second end of the source follower SF is greater than the threshold voltage Vref of the second PMOS tube P2, the second PMOS tube P2 is in a cut-off state. The cut-off second PMOS tube P2 also cuts off the first NMOS tube N1, and the control end of the gain switch tube SCG is at a low level, so the gain switch tube SCG is in a cut-off state, and the pixel unit remains in a high gain state.

[0050] The photoelectric conversion unit 1 may include: a photodiode PD and a transmission tube Tx. A first end of the transmission tube Tx is connected to the floating diffusion region FD, and a second end of the transmission tube Tx is connected to the cathode of the photodiode PD. An anode of the photodiode PD is grounded.

[0051] The pixel unit may further include a row select tube ROW, and the second end of the source follower SF is connected to the output end Vout of the pixel unit through the row select tube ROW.

[0052] like Figure 7 As shown, this embodiment further provides an image sensor, including: a pixel array, and a gain reading and resetting unit 3.

[0053] The pixel array includes: pixel units arranged in an array. The gain reading and resetting unit 3 is connected to the control end of the gain switch tube SCG, and is suitable for reading or resetting the voltage V2 of the control end of the gain switch tube SCG.

[0054] The gain reading and resetting unit 3 may include: a gain resetting tube CGR, a gain reading tube CGO and a gain reading bit line BL1.

[0055] The first end of the gain reset tube CGR is suitable for inputting the reset voltage V3, and the second end of the gain reset tube CGR is connected to the control end of the gain switch tube SCG. The first end of the gain read tube CGO is connected to the gain readout bit line BL1, and the second end of the gain read tube CGO is connected to the control end of the gain switch tube SCG.

[0056] Combine the following Figure 8 The timing diagram shown is Figure 7 The image sensor shown illustrates the operation process in high light conditions.

[0057] In the reset stage, the reset tube RST, the transmission tube Tx and the gain reset tube CGR are controlled to be in the on state, and the row selection tube ROW and the gain reading tube CGO are controlled to be in the off state. In this case, the gain switch tube SCG is in the on state, and the voltage V1 at the second end of the source follower SF becomes a high level, so that the first PMOS tube P1 is in the off state.

[0058] Entering the exposure stage, the control reset tube RST, the transmission tube Tx, the gain reset tube CGR, the row selection tube ROW and the gain reading tube CGO are all in the cut-off state. In this case, the first PMOS tube P1 remains in the cut-off state, and the gain switch tube SCG becomes the cut-off state.

[0059] After the exposure is completed, the transmission stage is entered, the transmission tube Tx is controlled to be in the on state, the reset tube RST, the gain reset tube CGR, the row selection tube ROW and the gain reading tube CGO are all in the off state. In this case, the first PMOS tube P1 remains in the off state, and the gain switch tube SCG remains in the off state.

[0060] After the transmission is completed, the first sampling phase begins, the row select tube ROW is controlled to be in the on state, the reset tube RST, the transmission tube Tx, the gain reset tube CGR and the gain reading tube CGO are all in the off state. In this case, the first PMOS tube P1 remains in the off state, and the gain switch tube SCG remains in the off state.

[0061] After the transmission is completed, the comparison phase begins, and the gain reading tube CGO is controlled to be in the on state, and the reset tube RST, the transmission tube Tx, the gain reset tube CGR and the row selection tube ROW are all in the off state. In this case, the control terminal voltage of the first PMOS tube gradually decreases until the first PMOS tube P1 is turned on. The turned-on first PMOS tube P1 gradually increases the control terminal voltage of the gain switch tube SCG until the gain switch tube SCG enters the on state.

[0062] After the comparison is completed, the second sampling phase begins, and the gain reading tube CGO and the row selection tube ROW are controlled to be in the on state, and the reset tube RST, the transmission tube Tx and the gain reset tube CGR are all in the off state. In this case, the first PMOS tube P1 and the gain switch tube SCG are both in the on state.

[0063] Combination Fig. 9 As shown in the timing diagram, compared with the high light condition, when the image sensor is in the low light condition, in the comparison stage, the first PMOS tube P1 and the gain switch tube SCG do not enter the on state, but are always in the off state, and the pixel unit is in a high gain state.

[0064] From the above description, it can be seen that this embodiment can realize dynamic adjustment of gain in pixel units, and in the pixel array, the pixel unit gain can be intelligently controlled, solving the problem of image distortion. In addition, the newly added part of this embodiment is compatible with the original CIS process and occupies a small area.

[0065] Each of the control tubes mentioned above can be implemented by a MOS tube, the first end of the MOS tube is one of the source and the drain, and the second end is the other of the source and the drain. The specific implementation method is known to those skilled in the art and will not be repeated here.

[0066] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A pixel unit, characterized in that: include: A reset tube, a floating diffusion region, a gain switch tube, a first capacitor, a second capacitor, a photoelectric conversion unit, a source follower and a latch unit; The first end of the reset tube is suitable for inputting a power supply voltage, and the second end of the reset tube is connected to the first end of the gain switch tube and the first end of the first capacitor; The floating diffusion region is connected to the second end of the gain switch tube, the first end of the second capacitor, the control end of the source follower and the photoelectric conversion unit; The first end of the source follower is suitable for inputting the power supply voltage, and the second end of the source follower is connected to the output end of the pixel unit; The second end of the first capacitor and the second end of the second capacitor are both grounded; The latch unit is adapted to adjust the voltage of the control terminal of the gain switch tube according to the voltage of the second terminal of the source follower.

2. The pixel unit according to claim 1, characterized in that: The latch unit is adapted to enable the gain switch tube to be in a conducting state when the voltage at the second end of the source follower is less than or equal to a threshold voltage.

3. The pixel unit according to claim 2, characterized in that: The latch unit is adapted to put the gain switch tube into a cut-off state when the voltage at the second end of the source follower is greater than the threshold voltage.

4. The pixel unit according to claim 1, characterized in that: The latch unit comprises: a comparator, an inverter and a first latch unit; The first input terminal of the comparator is connected to the second terminal of the source follower, the second input terminal of the comparator is suitable for inputting a threshold voltage, and the output terminal of the comparator is connected to the input terminal of the inverter; The output end of the inverter is connected to the first latch unit and the control end of the gain switch tube.

5. The pixel unit according to claim 1, characterized in that: The latch unit comprises: a first PMOS tube and a second latch unit; The control end of the first PMOS tube is connected to the second end of the source follower, the first end of the first PMOS tube is suitable for inputting the power supply voltage, and the second end of the first PMOS tube is connected to the control end of the second latch unit and the gain switch tube.

6. The pixel unit according to claim 1, characterized in that: The latch unit comprises: a second PMOS tube and a first NMOS tube; The control end of the second PMOS tube is connected to the second end of the source follower, the first end of the second PMOS tube is suitable for inputting the power supply voltage, and the second end of the second PMOS tube is connected to the control end of the first NMOS tube; The first end of the first NMOS tube is suitable for inputting the power supply voltage, and the second end of the first NMOS tube is connected to the control end of the gain switch tube.

7. The pixel unit according to claim 1, characterized in that: Also includes: Election management; The second end of the source follower is connected to the output end of the pixel unit through the row selection tube.

8. The pixel unit according to claim 1, characterized in that: The photoelectric conversion unit includes: a photodiode and a transmission tube; The first end of the transmission tube is connected to the floating diffusion area, and the second end of the transmission tube is connected to the cathode of the photodiode; The anode of the photodiode is grounded.

9. A pixel array, characterized in that: include: The pixel unit according to any one of claims 1 to 8, wherein the pixel units are arranged in an array.

10. An image sensor, characterized in that: include: A gain reading and resetting unit, and a pixel array as claimed in claim 9; The gain reading and resetting unit is connected to the control end of the gain switch tube, and is suitable for reading or resetting the voltage of the control end of the gain switch tube.

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