Circuit and method for independently diagnosing MOS (Metal Oxide Semiconductor) switch in BMS (Battery Management System)
By designing the circuit used for the independent diagnosis of MOS switches in BMS, using parallel current source and detecting switch, combining the ADC collection module, solving the problem of difficult diagnosis of MOS switching in existing technology, realizing the efficiency of the MOS switch status of the MOS switch status Monitor and diagnosis.
Patent Information
- Application Number
- CN202411482242.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-23
- Publication Date
- 2025-01-21
AI Technical Summary
The prior art is difficult to independently diagnose the faults of MOS switches in BMS, especially when diagnosing them outside the charge and discharge process, which limits the practicality and wide application of the diagnosis.
A circuit for independent diagnosis of MOS switches in BMS is designed. By connecting current sources and detection switches in parallel, combined with the ADC acquisition module, the status monitoring and diagnosis of a single MOS switch in the MOS switch matrix can be carried out.
It realizes independent diagnosis of MOS switches, can detect faults such as short circuit, open circuit and performance degradation, and improves the stability and battery life of the battery management system.
Smart Images

Figure CN119335377A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of new energy technology, and in particular to a circuit and method for independent diagnosis of MOS switches in a BMS. Background Art
[0002] In new energy vehicles or energy storage systems, more and more MOS switch matrices are used as power switches on the battery bus. In the Battery Management System (BMS), MOS (Metal-Oxide-Semiconductor) switches are widely used to control the battery charging and discharging process. The high efficiency, low power consumption and good switching characteristics of MOS switches make them an ideal choice for battery charging and discharging management. MOS switches may fail during long-term use, such as short circuits, open circuits or performance degradation, which may affect the performance and safety of the battery. In order to ensure the stable operation of the battery management system and extend the battery life, real-time monitoring and diagnosis of the MOS switches in the BMS is very necessary.
[0003] Currently, although there are some diagnostic methods for MOS switches, they often require complex circuits and algorithms and cannot perform diagnosis independently of the charging and discharging process, which limits the practicality and wide application of the diagnostic methods. Summary of the invention
[0004] In order to overcome the above-mentioned defects in the prior art, the present invention provides a circuit for independent diagnosis of MOS switches in a BMS, which can monitor and diagnose the state of a single MOS in a MOS switch matrix.
[0005] To achieve the above object, the present invention adopts the following technical solutions, including:
[0006] A circuit for independent diagnosis of MOS switches in a BMS.
[0007] The MOS switch matrix in the BMS includes several parallel MOS switch pairs, each of which is composed of a charging MOS and a discharging MOS. The charging MOS is denoted as Q n , the discharge MOS is Q n+1 , n=1,3,5,..., n+1=2,4,6,..., the mth MOS switch pair consists of Q n and Q n+1 Composition, m = (n + 1) / 2;
[0008] In each MOS switch pair, the drain of the charging MOS is connected to the drain of the discharging MOS, and the connection point between the drain of the charging MOS and the drain of the discharging MOS is recorded as the middle point DOUT of the MOS switch pair;
[0009] The sources of the charging MOS are connected in parallel as the total negative output terminal of the charging of the MOS switch matrix; the sources of the discharging MOS are connected in parallel as the total negative input terminal of the discharging of the MOS switch matrix;
[0010] The gates of each charging MOS and each discharging MOS are connected to the MCU in the BMS to control the closing / opening of each charging MOS and each discharging MOS;
[0011] A first diode D1 is provided between the drain and source of each discharge MOS, the anode of the first diode D1 is connected to the source of the discharge MOS, and the cathode of the first diode D1 is connected to the drain of the discharge MOS; a second diode D2 is provided between the drain and source of each charge MOS, the anode of the second diode D2 is connected to the source of the charge MOS, and the cathode of the second diode D2 is connected to the drain of the charge MOS;
[0012] A current source A is connected in parallel between the total negative charging output terminal and the total negative discharging input terminal of the MOS switch matrix, the total negative discharging input terminal of the MOS switch matrix is connected to the negative electrode of the current source A, and a first resistor R1 and a first switch S1 are sequentially connected in series between the total negative discharging input terminal and the negative electrode of the current source A; the total negative charging output terminal of the MOS switch matrix is connected to the negative electrode of the current source A, and a second resistor R2 and a second switch S2 are sequentially connected in series between the total negative charging output terminal and the negative electrode of the current source A;
[0013] The positive electrode of the current source A is connected to the middle point DOUT of each MOS switch pair, wherein the positive electrode of the current source A is connected to the detection switch S in series. m ' and detection diode D m 'Connected to the middle point DOUT of the mth MOS switch pair, the detection diode D m 'The positive pole and the detection switch S m 'Connect, detect diode D m ' is connected to the middle point DOUT of the mth MOS switch pair;
[0014] The ADC acquisition module is used to respectively acquire the voltage values across the first resistor R1 and the second resistor R2. Preferably, or, two current sources are designed, namely, the first current source A1 and the second current source A2;
[0015] The total negative discharge input terminal of the MOS switch matrix is connected to the negative electrode of the first current source A1 through the first resistor R1 and the first switch S1, and the positive electrode of the first current source A1 is connected to the positive electrode of the first current source A1 through the detection switches S1 connected in series. m1 ' and detection diode D m1 'With each discharge MOS, Q n+1 The drain connection of
[0016] The total negative output terminal of the MOS switch matrix is connected to the negative electrode of the second current source A2 through the second resistor R2 and the second switch S2, and the positive electrode of the second current source A2 is connected to the negative electrode of the second current source A2 through the detection switches S2 connected in series. m2 ' and detection diode D m2 'With each charging MOS, i.e. Q n Drain connection.
[0017] A method for independent diagnosis of MOS switches in a BMS is applicable to the above-mentioned circuit for independent diagnosis of MOS switches in a BMS, and is used for the charging MOS, namely Q n To make a diagnosis, the specific method is as follows:
[0018] Close the first switch S1 and the detection switch S m ', and disconnect the other switches. At this time, if the voltage value across the second resistor R2 collected by the ADC acquisition module is 0, then Q n In normal state, if the voltage value across the second resistor R2 collected by the ADC acquisition module is U2, then Q n It is in abnormal short circuit state;
[0019] Alternatively, close the first switch S1, Q n , detection switch S m ', and disconnect the other switches. At this time, if the voltage value across the second resistor R2 collected by the ADC acquisition module is U2, then Q n In normal state, if the voltage value across the second resistor R2 collected by the ADC acquisition module is 0, then Q n It is in abnormal short circuit state;
[0020] Wherein, U2=I×r2; I is the output current of the current source A, and r2 is the resistance value of the second resistor R2.
[0021] A method for independent diagnosis of MOS switches in a BMS is applicable to the above-mentioned circuit for independent diagnosis of MOS switches in a BMS, and is used for the discharge MOS, i.e., Q n+1 To make a diagnosis, the specific method is as follows:
[0022] Close the second switch S2 and the detection switch S m ', and disconnect other switches. At this time, if the voltage value across the first resistor R1 collected by the ADC acquisition module is 0, then Q n+1 In normal state, if the voltage value across the first resistor R1 collected by the ADC acquisition module is U1, then Q n+1 It is in abnormal short circuit state;
[0023] Alternatively, close the second switch S2, Q n+1 , detection switch Sm ', and disconnect other switches. At this time, if the voltage value across the first resistor R1 collected by the ADC acquisition module is U1, then Q n+1 In normal state, if the voltage value across the first resistor R1 collected by the ADC acquisition module is 0, then Q n+1 It is in abnormal short circuit state;
[0024] Wherein, U=I×r1; I is the output current of the current source A, and r1 is the resistance value of the first resistor R1.
[0025] A method for independent diagnosis of MOS switches in a BMS is applicable to the above-mentioned circuit for independent diagnosis of MOS switches in a BMS, and is used for the charging MOS, namely Q n To make a diagnosis, the specific method is as follows:
[0026] Close the first switch S1, Q n , detection switch S m ', and turn off the other switches. At this time, if the voltage of current source A = I×(R2+Q n Half-conduction impedance), then determine Q n It is in a semi-conducting state;
[0027] Wherein, I is the output current of the current source A, and r2 is the resistance value of the second resistor R2.
[0028] A method for independent diagnosis of MOS switches in a BMS is applicable to the above-mentioned circuit for independent diagnosis of MOS switches in a BMS, and is used for the charging MOS, namely Q n To make a diagnosis, the specific method is as follows:
[0029] Close the second switch S2, Q n+1 , detection switch S m ', and turn off the other switches. At this time, if the voltage of current source A = I×(R1+Q n+1 Half-conduction impedance), then Q n+1 It is in a semi-conducting state;
[0030] Wherein, I is the output current of the current source A, and r1 is the resistance value of the first resistor R1.
[0031] A computer program product includes a computer program / instruction, which implements the above-mentioned method for independent diagnosis of MOS switches in a BMS when the computer program / instruction is executed by a processor.
[0032] A BMS comprises a MOS switch matrix, an MCU, and a circuit for independent diagnosis of MOS switches in the BMS;
[0033] The MCU is used to control the closing / opening of each MOS in the MOS switch matrix;
[0034] The circuit is used for independently diagnosing each MOS in the MOS switch matrix.
[0035] The advantages of the present invention are:
[0036] (1) The present invention provides a circuit for independent diagnosis of MOS switches in a BMS, which can monitor and diagnose the status of a single MOS switch in a MOS switch matrix.
[0037] (2) The present invention can detect MOS switch faults such as short circuit, open circuit and performance degradation through an innovative circuit design and diagnostic method, and provide corresponding fault diagnosis results.
[0038] (3) The present invention can detect the current flowing through the MOS switch through a constant current source multi-way switch matrix, thereby diagnosing, monitoring and evaluating the open circuit, short circuit and semi-conducting state of the MOS switch.
[0039] (4) The present invention can also detect the current flowing through the MOS switch through a two-way constant current source multi-way switch matrix, thereby diagnosing, monitoring and evaluating the open circuit, short circuit and semi-conducting state of the MOS switch. Compared with the advantage of a one-way constant current source multi-way switch matrix, the charging and discharging MOS switches can be diagnosed separately and simultaneously, shortening the diagnosis time.
[0040] (5) Compared with the existing voltage monitoring and diagnosis scheme, the present invention can perform independent MOS switch diagnosis. BRIEF DESCRIPTION OF THE DRAWINGS
[0041] Figure 1 This is the architecture diagram of the battery management system BMS.
[0042] Figure 2 This is the circuit diagram of the MOS switch matrix.
[0043] Figure 3 The present invention is a circuit diagram for independent diagnosis of MOS switches in a BMS. DETAILED DESCRIPTION
[0044] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0045] Example 1
[0046] Depend on Figure 1 As shown, the battery management system (BMS) includes single cell voltage collection, total voltage collection, current collection, cell temperature collection wiring harness, as well as some switch signal detection ports and communication ports. The power port of the BMS connects the total positive and negative and low-voltage power supply ports of the battery pack. The MOS switch matrix is located in the BMS, and the external output is the total negative / total positive port of the PACK. The shunt is located in the BMS and is used for current collection of the battery bus. The MCU is located in the BMS and is used to control the closing / opening of each MOS.
[0047] Depend on Figure 2 As shown in FIG. 1 , the MOS switch matrix in the BMS includes several parallel MOS switch pairs, each of which is composed of a charging MOS and a discharging MOS. The charging MOS is denoted as Q n , the discharge MOS is Q n+1 , n=1,3,5,..., n+1=2,4,6,..., the mth MOS switch pair consists of Q n and Q n+1 Structure, m = (n + 1) / 2.
[0048] In each MOS switch pair, the drain of the charging MOS is connected to the drain of the discharging MOS, and the connection point between the drain of the charging MOS and the drain of the discharging MOS is recorded as the middle point DOUT of the MOS switch pair.
[0049] The sources of the various charging MOS are connected in parallel as the total negative output terminal of the MOS switch matrix, which is connected to the negative terminal of the external power supply or the negative terminal of the load; the sources of the various discharging MOS are connected in parallel as the total negative input terminal of the MOS switch matrix, which is connected to the negative terminal of the battery pack. If the charging MOS is disconnected and the discharging MOS is closed, the current direction of the discharging current is from P- to B-; if the discharging MOS is disconnected and the charging MOS is closed, the current direction of the charging current is from B- to P-.
[0050] The gate of each charging MOS is connected to the charging drive module in the BMS; the gate of each discharging MOS is connected to the discharging drive module in the BMS; the charging drive module and the discharging drive module are both connected to the MCU in the BMS, and the MCU controls the closing / opening of each charging MOS through the charging drive module, and the MCU controls the closing / opening of each discharging MOS through the discharging drive module.
[0051] A first diode D1 is connected in parallel between the drain and source of each discharge MOS, the anode of the first diode D1 is connected to the source of the discharge MOS, and the cathode of the first diode D1 is connected to the drain of the discharge MOS.
[0052] A second diode D2 is connected in parallel between the drain and source of each charging MOS; the anode of the second diode D2 is connected to the source of the charging MOS, and the cathode of the second diode D2 is connected to the drain of the charging MOS.
[0053] Depend on Figure 3 As shown, this embodiment provides a circuit for independent diagnosis of MOS switches in a BMS, which is specifically as follows:
[0054] A current source A is connected in parallel between the total negative charging output terminal and the total negative discharging input terminal of the MOS switch matrix, the total negative discharging input terminal of the MOS switch matrix is connected to the negative electrode of the current source A, and a first resistor R1 and a first switch S1 are connected in series between the total negative discharging input terminal and the negative electrode of the current source A in sequence; the total negative charging output terminal of the MOS switch matrix is connected to the negative electrode of the current source A, and a second resistor R2 and a second switch S2 are connected in series between the total negative charging output terminal and the negative electrode of the current source A in sequence.
[0055] The positive electrode of the current source A is connected to the middle point DOUT of each MOS switch pair, wherein the positive electrode of the current source A is connected to the detection switch S in series. m ' and detection diode D m 'Connected to the middle point DOUT of the mth MOS switch pair, the detection diode D m 'The positive pole and the detection switch S m 'Connect, detect diode D m The cathode of ' is connected to the middle point DOUT of the mth MOS switch pair.
[0056] The ADC acquisition module is used to respectively acquire the voltage values across the first resistor R1 and the second resistor R2.
[0057] Among them, the current source A is located in the BMS board and is used to provide power for diagnosing the MOS state. The first resistor R1 and the second resistor R2 are located in the BMS and are sampling resistors for detecting the states of the charging MOS and the discharging MOS. The first switch S1 and the second switch S2 are located in the BMS board and are selection switches for detecting the charging MOS and the discharging MOS.
[0058] The method for independent diagnosis of MOS switches in a BMS in this embodiment is specifically as follows:
[0059] When charging MOS, Q n The driving logic is 0, that is, the MCU controls Q through the charging drive module n When disconnected, if Q n If the voltage across the second resistor R2 collected by the ADC acquisition module is 0, n If it is a short-circuit fault state, the voltage value across the second resistor R2 collected by the ADC acquisition module is U2;
[0060] When charging MOS, Q n The driving logic is 1, that is, the MCU controls Q through the charging drive module n When closed, if Q n If the voltage across the second resistor R2 collected by the ADC acquisition module is U2, then the voltage across the second resistor R2 collected by the ADC acquisition module is U2. n If the voltage across the second resistor R2 is 0, the voltage across the second resistor R2 collected by the ADC acquisition module is 0. n When it is half-conducting, the voltage of current source A = I×(r2+Q n half-on impedance).
[0061] Wherein, U2=I×r2; I is the output current of the current source A, and r2 is the resistance value of the second resistor R2.
[0062] Therefore, the charging MOS, i.e., Q n To make a diagnosis, the specific method is as follows:
[0063] Close the first switch S1 and the detection switch S m ', and disconnect the other switches. At this time, if the voltage value across the second resistor R2 collected by the ADC acquisition module is 0, then Q n In normal state, if the voltage value across the second resistor R2 collected by the ADC acquisition module is U2, then Q n It is an abnormal short circuit state.
[0064] Alternatively, close the first switch S1, Q n , detection switch S m ', and disconnect the other switches. At this time, if the voltage value across the second resistor R2 collected by the ADC acquisition module is U2, then Q n In normal state, if the voltage value across the second resistor R2 collected by the ADC acquisition module is 0, then Q n It is an abnormal short circuit state; if the voltage of current source A = I×(r2+Q n Half-conduction impedance), then determine Q n It is in half-conduction state.
[0065] When the discharge MOS is Q n+1 The driving logic is 0, that is, the MCU controls Q through the discharge drive module n+1 When disconnected, if Q n+1 If the voltage across the first resistor R1 collected by the ADC acquisition module is 0, n+1 If it is a short-circuit fault state, the voltage value across the first resistor R1 collected by the ADC acquisition module is U1.
[0066] When the discharge MOS is Qn+1 The driving logic is 1, that is, the MCU controls Q through the discharge drive module n+1 When closed, if Q n+1 If the voltage across the first resistor R1 collected by the ADC acquisition module is U1, then the voltage across the first resistor R1 collected by the ADC acquisition module is U1. n+1 If the voltage across the first resistor R1 is 0, the voltage across the first resistor R1 collected by the ADC acquisition module is 0. n+1 When it is half-conducting, the voltage of current source A = I×(r1+Q n+1 half-on impedance).
[0067] Wherein, U1=I×r1; I is the output current of the current source A, and r1 is the resistance value of the first resistor R1;
[0068] Therefore, the discharge MOS, Q n+1 To make a diagnosis, the specific method is as follows:
[0069] Close the second switch S2 and the detection switch S m ', and disconnect other switches. At this time, if the voltage value across the first resistor R1 collected by the ADC acquisition module is 0, then Q n+1 In normal state, if the voltage value across the first resistor R1 collected by the ADC acquisition module is U1, then Q n+1 It is in abnormal short circuit state;
[0070] Alternatively, close the second switch S2, Q n+1 , detection switch S m ', and disconnect other switches. At this time, if the voltage value across the first resistor R1 collected by the ADC acquisition module is U1, then Q n+1 In normal state, if the voltage value across the first resistor R1 collected by the ADC acquisition module is 0, then Q n+1 It is an abnormal short circuit state; if the voltage of current source A = I×(r1+Q n+1 Half-conduction impedance), then Q n+1 It is in half-conduction state.
[0071] Example 2
[0072] On the basis of Embodiment 1, two current sources may be designed, namely a first current source A1 and a second current source A2.
[0073] The total negative discharge input terminal of the MOS switch matrix is connected to the negative electrode of the first current source A1 through the first resistor R1 and the first switch S1, and the positive electrode of the first current source A1 is connected to the positive electrode of the first current source A1 through the detection switches S1 connected in series. m1 ' and detection diode D m1 'With each discharge MOS, Q n+1 Drain connection.
[0074] The total negative output terminal of the MOS switch matrix is connected to the negative electrode of the second current source A2 through the second resistor R2 and the second switch S2, and the positive electrode of the second current source A2 is connected to the negative electrode of the second current source A2 through the detection switches S2 connected in series. m2 ' and detection diode D m2 'With each charging MOS, i.e. Q n Drain connection.
[0075] Compared with one current source in Embodiment 1, Embodiment 2 can diagnose the discharge MOS and the charge MOS simultaneously, thus shortening the diagnosis time.
[0076] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.
Claims
1. A circuit for independent diagnosis of MOS switches in BMS, The MOS switch matrix in the BMS includes several parallel MOS switch pairs, each of which is composed of a charging MOS and a discharging MOS. The charging MOS is denoted as Q n , the discharge MOS is Q n+1 , n=1,3,5,..., n+1=2,4,6,..., the mth MOS switch pair consists of Q n and Q n+1 Composition, m = (n + 1) / 2; In each MOS switch pair, the drain of the charging MOS is connected to the drain of the discharging MOS, and the connection point between the drain of the charging MOS and the drain of the discharging MOS is recorded as the middle point DOUT of the MOS switch pair; The sources of the charging MOS are connected in parallel as the total negative output terminal of the charging of the MOS switch matrix; the sources of the discharging MOS are connected in parallel as the total negative input terminal of the discharging of the MOS switch matrix; The gates of each charging MOS and each discharging MOS are connected to the MCU in the BMS to control the closing / opening of each charging MOS and each discharging MOS; A first diode D1 is provided between the drain and source of each discharge MOS, the anode of the first diode D1 is connected to the source of the discharge MOS, and the cathode of the first diode D1 is connected to the drain of the discharge MOS; a second diode D2 is provided between the drain and source of each charge MOS, the anode of the second diode D2 is connected to the source of the charge MOS, and the cathode of the second diode D2 is connected to the drain of the charge MOS; It is characterized in that A current source A is connected in parallel between the total negative charging output terminal and the total negative discharging input terminal of the MOS switch matrix, the total negative discharging input terminal of the MOS switch matrix is connected to the negative electrode of the current source A, and a first resistor R1 and a first switch S1 are sequentially connected in series between the total negative discharging input terminal and the negative electrode of the current source A; the total negative charging output terminal of the MOS switch matrix is connected to the negative electrode of the current source A, and a second resistor R2 and a second switch S2 are sequentially connected in series between the total negative charging output terminal and the negative electrode of the current source A; The positive electrode of the current source A is connected to the middle point DOUT of each MOS switch pair, wherein the positive electrode of the current source A is connected to the detection switch S in series. m ' and detection diode D m 'Connected to the middle point DOUT of the mth MOS switch pair, the detection diode D m 'The positive pole and the detection switch S m 'Connect, detect diode D m ' is connected to the middle point DOUT of the mth MOS switch pair; The ADC acquisition module is used to respectively acquire the voltage values across the first resistor R1 and the second resistor R2.
2. A circuit for independent diagnosis of MOS switches in a BMS according to claim 1, characterized in that: Alternatively, two current sources are designed, namely a first current source A1 and a second current source A2; The total negative discharge input terminal of the MOS switch matrix is connected to the negative electrode of the first current source A1 through the first resistor R1 and the first switch S1, and the positive electrode of the first current source A1 is connected to the positive electrode of the first current source A1 through the detection switches S1 connected in series. m1 ' and detection diode D m1 'With each discharge MOS, Q n+1 The drain connection of The total negative output terminal of the MOS switch matrix is connected to the negative electrode of the second current source A2 through the second resistor R2 and the second switch S2, and the positive electrode of the second current source A2 is connected to the negative electrode of the second current source A2 through the detection switches S2 connected in series. m2 ' and detection diode D m2 'With each charging MOS, i.e. Q n Drain connection.
3. A method for independent diagnosis of MOS switches in a BMS, characterized in that: The circuit for independent diagnosis of MOS switches in BMS according to claim 1 is applicable to the charging MOS, i.e., Q n To make a diagnosis, the specific method is as follows: Close the first switch S1 and the detection switch S m ', and disconnect the other switches. At this time, if the voltage value across the second resistor R2 collected by the ADC acquisition module is 0, then Q n In normal state, if the voltage value across the second resistor R2 collected by the ADC acquisition module is U2, then Q n It is in abnormal short circuit state; Alternatively, close the first switch S1, Q n , detection switch S m ', and disconnect the other switches. At this time, if the voltage value across the second resistor R2 collected by the ADC acquisition module is U2, then Q n In normal state, if the voltage value across the second resistor R2 collected by the ADC acquisition module is 0, then Q n It is in abnormal short circuit state; Wherein, U2=I×r2; I is the output current of the current source A, and r2 is the resistance value of the second resistor R2.
4. A method for independent diagnosis of MOS switches in a BMS, characterized in that: The circuit for independent diagnosis of MOS switches in BMS according to claim 1 is applicable to the discharge MOS, i.e., Q n+1 To make a diagnosis, the specific method is as follows: Close the second switch S2 and the detection switch S m ', and disconnect other switches. At this time, if the voltage value across the first resistor R1 collected by the ADC acquisition module is 0, then Q n+1 In normal state, if the voltage value across the first resistor R1 collected by the ADC acquisition module is U1, then Q n+1 It is in abnormal short circuit state; Alternatively, close the second switch S2, Q n+1 , detection switch S m ', and disconnect other switches. At this time, if the voltage value across the first resistor R1 collected by the ADC acquisition module is U1, then Q n+1 In normal state, if the voltage value across the first resistor R1 collected by the ADC acquisition module is 0, then Q n+1 It is in abnormal short circuit state; Wherein, U=I×r1; I is the output current of the current source A, and r1 is the resistance value of the first resistor R1.
5. A method for independent diagnosis of MOS switches in a BMS, characterized in that: The circuit for independent diagnosis of MOS switches in BMS according to claim 1 is applicable to the charging MOS, i.e., Q n To make a diagnosis, the specific method is as follows: Close the first switch S1, Q n , detection switch S m ', and turn off the other switches. At this time, if the voltage of current source A = I×(R2+Q n Half-conduction impedance), then determine Q n It is in a semi-conducting state; Wherein, I is the output current of the current source A, and r2 is the resistance value of the second resistor R2.
6. A method for independent diagnosis of MOS switches in a BMS, characterized in that: The circuit for independent diagnosis of MOS switches in BMS according to claim 1 is applicable to the charging MOS, i.e., Q n To make a diagnosis, the specific method is as follows: Close the second switch S2, Q n+1 , detection switch S m ', and turn off the other switches. At this time, if the voltage of current source A = I×(R1+Q n+1 Half-conduction impedance), then Q n+1 It is in a semi-conducting state; Wherein, I is the output current of the current source A, and r1 is the resistance value of the first resistor R1.
7. A computer program product, characterized in that It includes a computer program / instruction, which, when executed by a processor, implements a method for independent diagnosis of a MOS switch in a BMS as described in any one of claims 3 to 6.
8. A BMS, characterized in that: It comprises a MOS switch matrix, an MCU, and a circuit for independent diagnosis of MOS switches in a BMS as claimed in claim 1 or 2; The MCU is used to control the closing / opening of each MOS in the MOS switch matrix; The circuit is used for independently diagnosing each MOS in the MOS switch matrix.