Layout optimization method and system

Abstract

The invention provides a layout optimization method and system, and belongs to the field of semiconductors. The layout optimization method comprises the following steps: providing an initial layout, wherein the initial layout comprises a plurality of main patterns which are separately arranged; and screening target graphs in the main graphs, wherein the target graphs comprise a first target graph and a second target graph. And obtaining an addition rule of an auxiliary graph, and adding the auxiliary graph on the periphery of the first target graph. And extending the two first auxiliary patterns in the direction towards the second target pattern, and connecting the two first auxiliary patterns with the pattern extending from the second auxiliary pattern to form a target auxiliary pattern. And on the basis of the target auxiliary graph, enabling the initial layout to form an optimized layout. According to the invention, photoetching is carried out by adopting the optimized layout, and when the process conditions change, the change of the contour formed on the photoresist layer is smaller. In the next etching process, the etching process can be kept stable, so that the outline formed by the photoresist layer is as expected, and the chip yield is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a layout optimization method and system. Background Art

[0002] Sub-Resolution Assistant Feature (SRAF) is a widely used optical proximity correction method. With the development of semiconductor technology and the reduction of critical dimensions, sub-resolution auxiliary graphics have begun to become an effective means to improve resolution and process windows. In the metal layer, the layout can be corrected through sub-resolution auxiliary graphics technology, which can effectively improve the graphic resolution of the lithography process, increase the process window, and improve the product yield. The general practice of adding auxiliary graphics is to add auxiliary graphics according to the corresponding rules after obtaining the SRAF addition rules.

[0003] When the process conditions change, it is hoped that the profile change of the photoresist pattern at the feature structure can be controlled as expected, so as to improve the stability of the photolithography and subsequent etching processes. Therefore, the SRAF at this location is optimized so that the profile change can achieve the expected result.

[0004] It should be noted that the information disclosed in the background technology section of the invention is only intended to deepen the understanding of the general background technology of the invention, and should not be regarded as an admission or suggestion in any form that the information constitutes prior art already known to those skilled in the art. Summary of the invention

[0005] The purpose of the present invention is to provide a layout optimization method and system to solve the problem of how to correct sub-resolution auxiliary graphics to improve the stability of etching process.

[0006] In order to solve the above technical problems, the present invention provides a layout optimization method, comprising:

[0007] Providing an initial layout, wherein the initial layout includes a plurality of discretely arranged main graphics;

[0008] Filtering target graphics in the main graphics, the target graphics including a first target graphic and a second target graphic, wherein an extension line of the first target graphic toward the second target graphic intersects with the second target graphic;

[0009] Acquire an adding rule of auxiliary graphics, and based on the adding rule, add auxiliary graphics around the first target graphics, wherein the auxiliary graphics include first auxiliary graphics located on both sides of the first target graphics and second auxiliary graphics located between the first target graphics and the second target graphics;

[0010] The two first auxiliary graphics are extended in a direction toward the second target graphic and connected with the graphics extending from the second auxiliary graphics to form a target auxiliary graphic, so as to optimize the auxiliary graphics, thereby optimizing the initial layout to form an optimized layout, wherein the second auxiliary graphics extend in a direction parallel to the second target graphic.

[0011] Preferably, the first target pattern has a line end, and after the line end is developed, the first target pattern forms an arc-shaped outline, and an extension line of the line end is perpendicular to the second target pattern.

[0012] Preferably, the shape of the first target figure includes a rectangle, the shape of the second target figure includes a rectangle, and the short sides of the first target figure and the second target figure adjacent to each other are line ends.

[0013] Preferably, the first target figure and the second target figure are both rectangles, and the target figures in the main figure are screened, the target figures include the first target figure and the second target figure, and the extension line of the first target figure toward the second target figure intersects with the second target figure, including:

[0014] The main figure is filtered to obtain a first target figure and a second target figure, wherein an extension line of a short side of the first target figure intersects perpendicularly with a long side of the second target figure.

[0015] Preferably, the adding rule for obtaining the auxiliary graphics includes:

[0016] Obtain the rules for adding auxiliary graphics through the design rules of the initial layout.

[0017] Preferably, the first auxiliary graphic and the second auxiliary graphic are both rectangular, the direction where the long side of the first auxiliary graphic is parallel to the first target graphic, the direction where the long side of the second auxiliary graphic is parallel to the second target graphic, the two first auxiliary graphics are extended in the direction toward the second target graphic, and connected with the graphics extended from the second auxiliary graphics to form a target auxiliary graphic, and the second auxiliary graphic is extended in a direction parallel to the second target graphic, comprising:

[0018] Extending the first auxiliary pattern along its long side;

[0019] The second auxiliary pattern is extended along the long side direction thereof to be connected with the extension line of the first auxiliary pattern to form a target auxiliary pattern.

[0020] Preferably, the line width of the target auxiliary pattern is equal to the line width of the first auxiliary pattern and the line width of the second auxiliary pattern.

[0021] Preferably, the distance between the target auxiliary pattern and the first target pattern and the second target pattern is equal to the distance between the first auxiliary pattern and the first target pattern and the distance between the second auxiliary pattern and the first target pattern.

[0022] Preferably, the target auxiliary graphic is added at the same priority as the first auxiliary graphic and the second auxiliary graphic.

[0023] Based on the same inventive concept, the present invention also provides a layout optimization system, comprising:

[0024] An acquisition module, used for providing an initial layout, wherein the initial layout includes a plurality of discretely arranged main graphics;

[0025] A logic operation module is used to screen target graphics in the main graphic, wherein the target graphics include a first target graphic and a second target graphic, and an extension line of the first target graphic toward the second target graphic intersects with the second target graphic; obtain an adding rule for auxiliary graphics, and based on the adding rule, add auxiliary graphics to the periphery of the first target graphic, wherein the auxiliary graphics include a first auxiliary graphics located on both sides of the first target graphic and a second auxiliary graphics located between the first target graphic and the second target graphic; extend the two first auxiliary graphics in a direction toward the second target graphic, and connect them with a graphic extending from the second auxiliary graphics to form a target auxiliary graphic, so as to optimize the auxiliary graphics, thereby optimizing the initial layout to form an optimized layout, wherein the second auxiliary graphics extends in a direction parallel to the second target graphic.

[0026] Compared with the prior art, the layout optimization method and system of the present invention have the following advantages:

[0027] The present invention provides an initial layout, wherein the initial layout includes a plurality of discretely arranged main graphics;

[0028] Screening the target graphics in the main graphics, the target graphics include a first target graphics and a second target graphics, and the extension line of the first target graphics toward the second target graphics intersects with the second target graphics; obtaining the adding rule of the auxiliary graphics, and based on the adding rule, adding auxiliary graphics to the periphery of the first target graphics, the auxiliary graphics include first auxiliary graphics located on both sides of the first target graphics and second auxiliary graphics located between the first target graphics and the second target graphics; extending the two first auxiliary graphics in the direction toward the second target graphics, and connecting with the graphics extended from the second auxiliary graphics to form a target auxiliary graphics, so as to optimize the auxiliary graphics, thereby optimizing the initial layout to form an optimized layout, wherein the second auxiliary graphics extend in a direction parallel to the second target graphics. When the optimized layout is used for lithography, the process window can be increased. The profile formed in the photoresist layer changes less. In the subsequent etching process, the etching process can be kept stable, so that the profile formed by the photoresist layer is as expected, and the chip yield is improved.

[0029] The layout optimization system provided by the present invention and the layout optimization method provided by the present invention belong to the same inventive concept, therefore, the layout optimization system provided by the present invention has at least all the advantages of the layout optimization method provided by the present invention, can correct the pattern of the layout, and when the optimized layout is used for photolithography, when the process conditions change, the profile formed in the photoresist layer changes less, and a stable pattern as expected can be obtained. In the subsequent etching process, the etching process can be kept stable, so that the profile formed by the photoresist layer is as expected, and the chip yield is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 is a flow chart of a layout optimization method in one embodiment of the present invention;

[0031] Figure 2 is a layout pattern with a sub-resolution auxiliary pattern added in one embodiment;

[0032] Figure 3 is a layout pattern with a sub-resolution auxiliary pattern added in another embodiment;

[0033] Figure 4 It is a layout pattern after optimizing the added sub-resolution auxiliary pattern in one embodiment of the present invention;

[0034] Figure 5 is a comparison diagram of the contours formed before and after optimization by adding sub-resolution auxiliary graphics in one embodiment of the present invention;

[0035] In the figure,

[0036] 100-first target pattern; 110-line end;

[0037] 200-first auxiliary graphic; 300-second auxiliary graphic;

[0038] 310-first outline; 400-second target figure;

[0039] 500-target auxiliary graphics; 510-second outline. DETAILED DESCRIPTION

[0040] In order to make the purpose, advantages and features of the present invention clearer, the layout optimization method and system proposed in the present invention are further described in detail in combination with the drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. It should be understood that the drawings in the specification do not necessarily show the specific structure of the present invention in proportion, and the illustrative features used to illustrate certain principles of the present invention in the drawings in the specification will also adopt a slightly simplified drawing method. The specific design features of the present invention disclosed herein include, for example, specific dimensions, directions, positions and shapes, which will be determined in part by the specific environment to be applied and used. And, in the embodiments described below, sometimes the same figure mark is used in common between different drawings to represent the same part or a part with the same function, and its repeated description is omitted. In this specification, similar numbers and letters are used to represent similar items, so once an item is defined in one drawing, it does not need to be further discussed in subsequent drawings.

[0041] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0042] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0043] Ginseng Figure 1 As shown, Figure 1 A layout pattern with sub-resolution auxiliary patterns added to the prior art. After the sub-resolution auxiliary patterns are added to the layout, development is performed directly. However, after the layout is developed using the layout, the profile formed on the photoresist layer undergoes a significant change, which can easily cause changes in the etching process in the subsequent etching process, thereby making the etching process unstable. If the profile formed by the photoresist layer is not as expected, the metal layer will not be able to transmit current smoothly, affecting the chip yield.

[0044] The core idea of ​​the present invention is to provide a layout optimization method, which can reduce the change of the contour formed in the photoresist layer after the layout pattern is developed when the process conditions change, so as to increase the process window and keep the etching process stable.

[0045] In order to realize the above idea, the present invention provides a layout optimization method. Figures 1 to 5 A specific implementation of a layout optimization method disclosed herein includes the following steps S1 to S4.

[0046] Step S1: providing an initial layout, wherein the initial layout includes a plurality of discretely arranged main graphics.

[0047] Specifically, refer to Figure 1 and Figure 2 As shown in the figure, the original layout is the various patterns that need to be formed on the mask for the etching process when designing an integrated circuit. The original layout includes several Figure 2 The first target graphics 100 and the second target graphics 400 are shown in FIG. It should be noted that: Figure 2 The graphics shown in are graphics related to the inventive point disclosed in this embodiment. The initial layout also includes other etching graphics, which have been omitted here.

[0048] Step S2: Filtering target graphics in the main graphics, the target graphics include a first target graphic 100 and a second target graphic 400 , and an extension line of the first target graphic 100 toward the second target graphic 400 intersects with the second target graphic 400 .

[0049] Specifically, refer to Figure 1 , Figure 2 and Figure 3As shown, the target graphics are screened out from the main graphics through the script from the initial layout. In this step, the sub-resolution auxiliary graphics have not been added. The sub-resolution auxiliary graphics are referred to as "auxiliary graphics" below. That is, in this embodiment, only the first target graphics 100 and the second target graphics 400 located at a specific position are screened out. The first target graphics 100 has a line end 110. After the first target graphics 100 is developed at the line end 110, an arc-shaped profile is formed in the photoresist. The second target graphics 400 is located near the line end 110. And the extension line of the first target graphics 100 toward the second target graphics 400 intersects with the second target graphics 400.

[0050] The shape of the first target pattern 100 includes a rectangle, a square, a T-shape, etc. The shape of the second target pattern 400 also includes a rectangle, a square, a T-shape, etc. Figure 3 Since the shape of the common pattern in the etching process is a rectangle, the following explanation will be given by taking the shape of the first target pattern 100 as a rectangle and the shape of the second target pattern 400 as a rectangle as an example.

[0051] The long side of the first target pattern 100 is along the longitudinal direction (ie, Figure 2 The second target pattern 400 extends in the direction of the arrow n in the middle), and the short side close to the second target pattern 400 is the line end 110. The long side of the second target pattern 400 extends in the horizontal direction (ie, Figure 2 The extension line of the line end 110 is perpendicular to the second target pattern 400. That is, the first target pattern 100 is extended to form a T-shaped structure with the second target pattern 400.

[0052] The first target graphic 100 and the second target graphic 400 are both rectangular, and the target graphics in the main graphic are screened, and the target graphics include the first target graphic 100 and the second target graphic 400, and the extension line of the first target graphic 100 toward the second target graphic 400 intersects with the second target graphic 400, including:

[0053] The main graphics are screened to obtain a first target graphic 100 and a second target graphic 400, wherein an extension line of a short side of the first target graphic 100 intersects a long side of the second target graphic 400 at a right angle.

[0054] Step S3: Obtain the adding rule of auxiliary graphics, and based on the adding rule, add auxiliary graphics on the periphery of the first target graphic 100, wherein the auxiliary graphics include a first auxiliary graphic 200 located on both sides of the first target graphic 100 and a second auxiliary graphic 300 located between the first target graphic 100 and the second target graphic 400.

[0055] Specifically, continue to Figure 1 , Figure 2 and Figure 3 As shown, the adding rule of the auxiliary pattern is obtained through the design rule of the initial layout. Based on the adding rule, the first auxiliary pattern 200 is added on both sides of the long side of the first target pattern 100. At the same time, the second auxiliary pattern 300 is added between the line end 110 and the second target pattern 400.

[0056] The shapes of the first auxiliary pattern 200 and the second auxiliary pattern 300 include rectangular, positive direction, T-shaped, etc. Similarly, for the convenience of explanation of this embodiment, the first auxiliary pattern 200 and the second auxiliary pattern 300 are both rectangular as an example for explanation. Further, the long side of the first auxiliary pattern 200 is arranged parallel to the long side of the first target pattern 100. The long side of the second auxiliary pattern 300 is arranged parallel to the long side of the second target pattern 400. In this embodiment, as long as the first auxiliary pattern 200 and the second auxiliary pattern 300 can form an arc structure at the line end 110 after development.

[0057] In addition, the line widths of the two first auxiliary graphics 200 are d1 and d2, respectively. The line width of the second auxiliary graphics 300 is d5. d1, d2, and d5 may be equal or unequal. The distances between the two first auxiliary graphics 200 and the first target graphics 100 are d3 and d4, respectively. The distance between the second auxiliary graphics 300 and the first target graphics 100 is d6. d3, d4, and d6 may be equal or unequal. This is not required.

[0058] Step S4: Extend the two first auxiliary graphics 200 in a direction toward the second target graphic 400 and connect them with the graphics extending from the second auxiliary graphics 300 to form a target auxiliary graphic 500, so as to optimize the auxiliary graphics, thereby optimizing the initial layout to form an optimized layout, wherein the second auxiliary graphics 300 extends in a direction parallel to the second target graphic 400.

[0059] Specifically, refer to Figure 1 , Figure 4 and Figure 5 As shown, the two first auxiliary graphics 200 are extended in a direction toward the second target graphic 400 and connected with the graphics extending from the second auxiliary graphics 300 to form a target auxiliary graphic 500, and the second auxiliary graphics 300 are extended in a direction parallel to the second target graphic 400, including:

[0060] First, the first auxiliary pattern 200 is extended along its long side direction. Figure 4 Extend in the direction of the arrow m.

[0061] Next, the second auxiliary pattern 300 is extended along its long side direction. Figure 4 The two directions of the arrow n are extended to connect with the extension line of the first auxiliary pattern 200. The two first auxiliary patterns 200 and the second auxiliary pattern 300 are extended and connected to form a target auxiliary pattern 500. Figure 4 It can be seen from the figure that after the first auxiliary pattern 200 and the second auxiliary pattern 300 are extended, the target auxiliary pattern 500 formed has a U-shaped structure.

[0062] The line width of the target auxiliary pattern 500, and the distance between the target auxiliary pattern 500 and the first target pattern 100 and the distance between the target auxiliary pattern 500 and the second target pattern 400 are equal, that is, they are still d1, d2, d3, d4, d5 and d6.

[0063] The target auxiliary graphic 500 is added at the same priority as the first auxiliary graphic 200 and the second auxiliary graphic 300. That is, after the first auxiliary graphic 200 and the second auxiliary graphic 300 are added, the first auxiliary graphic 200 and the second auxiliary graphic 300 are first extended and connected, and then other levels of graphic layers are added.

[0064] Ginseng Figure 5 As shown, after the first auxiliary pattern 200 and the second auxiliary pattern 300 are modified, a target auxiliary pattern 500 is formed to optimize the auxiliary pattern, thereby optimizing the initial layout to form an optimized layout. Figure 3 After the original layout is developed, the photoresist layer is formed as follows Figure 5 The first profile 310 in FIG. Figure 4 After the optimized layout is developed, the photoresist layer is formed as follows Figure 5 The second contour 510 in . Figure 5 It can be seen that the inner circle of the first contour 310 at a is inside the second contour 510, and the outer circle of the first contour 310 at b is outside the second contour 510. Therefore, it can be seen from the first contour 310 and the second contour 510 that when using Figure 4 When the optimized layout is used for lithography, the profile formed at the line end 110 changes less, increasing the process window. That is, when the process conditions change, the optimized layout is used. Figure 4 When the optimized layout is used for photolithography, the process window is increased when the contour is formed, and the contour formed changes less, so that the process can be kept stable. In the subsequent etching process, the etching process can be kept stable, so that the contour formed by the photoresist layer is as expected, improving the chip yield.

[0065] To realize the above idea, this embodiment also discloses a layout optimization system, including:

[0066] An acquisition module, used for providing an initial layout, wherein the initial layout includes a plurality of discretely arranged main graphics;

[0067] A logic operation module is used to screen target graphics in the main graphic, wherein the target graphics include a first target graphic 100 and a second target graphic 400, and an extension line of the first target graphic 100 toward the second target graphic 400 intersects with the second target graphic 400; obtain an adding rule for auxiliary graphics, and based on the adding rule, add auxiliary graphics to the periphery of the first target graphic 100, wherein the auxiliary graphics include a first auxiliary graphic 200 located on both sides of the first target graphic 100 and a second auxiliary graphic 300 located between the first target graphic 100 and the second target graphic 400; extend the two first auxiliary graphics 200 in a direction toward the second target graphic 400, and connect them with the graphics extending from the second auxiliary graphics 300 to form a target auxiliary graphic 500, so as to optimize the auxiliary graphics, thereby optimizing the initial layout to form an optimized layout, wherein the second auxiliary graphics 300 extends in a direction parallel to the second target graphic 400.

[0068] The layout optimization system provided in this embodiment and the layout optimization method provided in this embodiment belong to the same inventive concept, therefore, the layout optimization system provided in this embodiment has at least all the advantages of the layout optimization method provided in this embodiment, can optimize the pattern of the layout, and when the optimized layout is used for photolithography, the profile formed in the photoresist layer changes less. In the subsequent etching process, the etching process can be kept stable, so that the profile formed by the photoresist layer is as expected, and the chip yield is improved.

[0069] In summary, the above embodiments have detailed descriptions of different configurations of the layout optimization method and system. Of course, the above description is only a description of the preferred embodiments of the present invention, and is not any limitation to the scope of the present invention. The present invention includes but is not limited to the configurations listed in the above implementations. Those skilled in the art can draw inferences based on the contents of the above embodiments. Any changes and modifications made by ordinary technicians in the field of the present invention based on the above disclosure are within the scope of protection of the claims.

Claims

1. A layout optimization method, characterized in that: include: Providing an initial layout, wherein the initial layout includes a plurality of discretely arranged main graphics; Filtering target graphics in the main graphics, the target graphics including a first target graphic and a second target graphic, wherein an extension line of the first target graphic toward the second target graphic intersects with the second target graphic; Acquire an adding rule of auxiliary graphics, and based on the adding rule, add auxiliary graphics around the first target graphics, wherein the auxiliary graphics include first auxiliary graphics located on both sides of the first target graphics and second auxiliary graphics located between the first target graphics and the second target graphics; The two first auxiliary graphics are extended in a direction toward the second target graphic and connected with the graphics extended from the second auxiliary graphics to form a target auxiliary graphic, so as to optimize the auxiliary graphics, thereby optimizing the initial layout to form an optimized layout, wherein the second auxiliary graphics extend in a direction parallel to the second target graphic.

2. The layout optimization method according to claim 1, characterized in that: The first target pattern has a line end. After the line end is developed, the first target pattern forms an arc-shaped outline. The extension line of the line end is perpendicular to the second target pattern.

3. The layout optimization method according to claim 2, characterized in that: The shape of the first target figure includes a rectangle, the shape of the second target figure includes a rectangle, and the short sides of the first target figure and the second target figure adjacent to each other are line ends.

4. The layout optimization method according to claim 1, characterized in that: The first target figure and the second target figure are both rectangles, and the target figures in the main figure are screened, the target figures include the first target figure and the second target figure, and the extension line of the first target figure toward the second target figure intersects with the second target figure, including: The main figure is filtered to obtain a first target figure and a second target figure, wherein an extension line of a short side of the first target figure intersects perpendicularly with a long side of the second target figure.

5. The layout optimization method according to claim 1, characterized in that: The rules for obtaining auxiliary graphics include: Obtain the rules for adding auxiliary graphics through the design rules of the initial layout.

6. The layout optimization method according to claim 2, characterized in that: The first auxiliary figure and the second auxiliary figure are both rectangular, the direction where the long side of the first auxiliary figure is parallel to the first target figure, the direction where the long side of the second auxiliary figure is parallel to the second target figure, the two first auxiliary figures are extended in the direction toward the second target figure, and connected with the figure extended from the second auxiliary figure to form a target auxiliary figure, and the second auxiliary figure is extended in a direction parallel to the second target figure, comprising: Extending the first auxiliary pattern along its long side; The second auxiliary pattern is extended along the long side direction thereof to be connected with the extension line of the first auxiliary pattern to form a target auxiliary pattern.

7. The layout optimization method according to claim 1, characterized in that: The line width of the target auxiliary pattern is equal to the line width of the first auxiliary pattern and the line width of the second auxiliary pattern.

8. The layout optimization method according to claim 1, characterized in that: The distance between the target auxiliary pattern and the first target pattern and the second target pattern is equal to the distance between the first auxiliary pattern and the first target pattern and the distance between the second auxiliary pattern and the first target pattern.

9. The layout optimization method according to claim 1, characterized in that: The target auxiliary graphic is added at the same priority as the first auxiliary graphic and the second auxiliary graphic.

10. A layout optimization system, characterized in that: include: An acquisition module, used for providing an initial layout, wherein the initial layout includes a plurality of discretely arranged main graphics; a logic operation module, used for screening target graphics in the main graphics, wherein the target graphics include a first target graphics and a second target graphics, and an extension line of the first target graphics toward the second target graphics intersects with the second target graphics; Acquire an adding rule of auxiliary graphics, and based on the adding rule, add auxiliary graphics around the first target graphics, wherein the auxiliary graphics include first auxiliary graphics located on both sides of the first target graphics and second auxiliary graphics located between the first target graphics and the second target graphics; The two first auxiliary graphics are extended in a direction toward the second target graphic and connected with the graphics extended from the second auxiliary graphics to form a target auxiliary graphic, so as to optimize the auxiliary graphics, thereby optimizing the initial layout to form an optimized layout, wherein the second auxiliary graphics extend in a direction parallel to the second target graphic.

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