Improved data throughput using TCM

Abstract

The invention relates to improved data throughput using TCM. Aspects of the present disclosure configure a memory subsystem processor using thermally conductive material (TCM) to improve thermal energy storage and heat dissipation to improve data transfer rates. The TCM surrounds a set of memory components and a processing device and is configured to dissipate heat from the processing device and the set of memory components.

Description

Technical Field

[0001] Examples of the present disclosure relate generally to memory subsystems, and more particularly, to using thermally conductive materials (TCMs) to provide thermal management and heat dissipation. Background Art

[0002] The memory subsystem may be a storage system such as a solid state drive (SSD), and may include one or more memory components that store data. The memory components may be, for example, non-volatile memory components and volatile memory components. In general, the host system may utilize the memory subsystem to store data at the memory components and retrieve data from the memory components. Summary of the invention

[0003] On the one hand, the present disclosure provides a system comprising: a group of memory components of a memory subsystem; a processing device operably coupled to the group of memory components; and a thermally conductive material (TCM) surrounding the group of memory components and the processing device, the TCM being configured to dissipate heat from the processing device and the group of memory components, wherein the processing device is configured to perform operations including: measuring a temperature of at least one of the processing device or the group of memory components; accessing a reference temperature to control a data transfer rate between a host and the group of memory components; comparing the measured temperature with the reference temperature; and adjusting the data transfer rate based on the comparison of the measured temperature with the reference temperature.

[0004] On the other hand, the present disclosure further provides a method, comprising: measuring a temperature of at least one of a processing device or a set of memory components, wherein heat associated with the processing device or the at least one of the set of memory components is at least partially dissipated through a thermally conductive material (TCM) surrounding the set of memory components and the processing device; accessing a reference temperature to control a data transfer rate between a host and the set of memory components; comparing the measured temperature with the reference temperature; and adjusting the data transfer rate based on the comparison of the measured temperature with the reference temperature.

[0005] On the other hand, the present disclosure further provides a method of manufacturing a printed circuit board (PCB) including a memory system, the method comprising: placing a processing device on a first portion of the PCB; placing a group of memory components of the memory system on a second portion of the PCB; and depositing a thermally conductive material (TCM) on the PCB to surround the group of memory components and the processing device. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The present disclosure will be more fully understood from the detailed description given below and from the accompanying drawings of various embodiments of the present disclosure.

[0007] Figure 1 is a block diagram illustrating an example computing environment including a memory subsystem according to some examples.

[0008] Figure 2 is a diagram of an example physical assembly of a memory subsystem with a TCM according to some examples.

[0009] Figure 3 is a block diagram of an example physical assembly of a memory controller with a TCM according to some examples.

[0010] Figure 4A is a flow chart of an example method for performing data throughput management and heat dissipation according to some examples.

[0011] Figure 4B is a flow chart of an example method for fabricating a physical assembly of a memory subsystem having a TCM, according to some examples.

[0012] Figure 5 is a block diagram illustrating a diagrammatic representation of a machine in the form of a computer system according to some examples within which a set of instructions may be executed for causing the machine to perform any one or more of the methodologies discussed herein. DETAILED DESCRIPTION

[0013] Aspects of the present disclosure configure system components, such as a memory subsystem processor or controller, such as a power management unit or module, to control data throughput (e.g., transfers between a memory component and a host) based on heat dissipated through a TCM. In response to detecting that the temperature of a processor or memory exceeds a threshold or reference temperature (e.g., 85 degrees Celsius), the memory subsystem processor or controller adjusts (e.g., throttles or reduces) data throughput (the rate at which data is exchanged with a host or transferred from the processor to an external component) to reduce the temperature. When the temperature no longer exceeds the threshold or reference temperature, the processor or controller increases the data throughput. Using a TCM physically deposited on a printed circuit board (PCB) implementing one of the memory subsystem components (e.g., a memory controller, a memory component, and / or a memory cell), the temperature can be controlled (minimized or reduced) to delay when the data throughput will be throttled or adjusted.

[0014] The TCM can be deposited to completely encapsulate any component on the PCB that has a height less than the reference height limit. The height of the TCM may correspond to the height of the memory controller chip and / or the height of the memory component chip, but may not exceed their height. In this way, the TCM surrounds the memory controller chip and / or the memory component chip, exposing their top surfaces completely or partially to the air. The TCM is configured to dissipate heat similar to a radiator. This ensures that the performance of the memory system remains optimal and avoids severe throttling or reduced data throughput with minimal hardware added. This improves the thermal energy storage and overall efficiency of the operation and implementation of the memory subsystem.

[0015] The memory subsystem may be a storage device, a memory module, or a mixture of a storage device and a memory module. Figure 1 Examples of storage devices and memory modules are described. In general, a host system may utilize a memory subsystem that includes one or more memory components, such as memory devices (e.g., memory dies) that store data. The host system may send access requests (e.g., write commands, read commands) to the memory subsystem, such as for storing data at the memory subsystem and reading data from the memory subsystem. Data (or data sets) specified by the host are referred to hereinafter as "host data," "application data," or "user data."

[0016] The memory subsystem may initiate media management operations, such as write operations, on host data stored on the memory device. For example, the firmware of the memory subsystem may rewrite host data previously written from a location on the memory device to a new location as part of a junk collection management operation. The data that is rewritten (e.g., initiated by the firmware) is referred to below as "junk collection data." "User data" may include host data and junk collection data. "System data" refers below to data created and / or maintained by the memory subsystem for performing operations in response to host requests and for media management. Examples of system data include, but are not limited to, system tables (e.g., logical to physical address mapping tables), data from logging, scratch pad data, and the like.

[0017] Many different media management operations may be performed on a memory device. For example, media management operations may include different scan rates, different scan frequencies, different wear leveling, different read disturb management, different near error error correction (ECC), and / or different dynamic data refreshes. Wear leveling ensures that all blocks in a memory component approach their defined erase cycle budget at the same time, rather than some blocks approaching the erase cycle budget earlier. Read disturb management counts all read operations to a memory component. If a certain threshold is reached, the enclave is refreshed. Near error ECC refreshes all data read by an application that exceeds a configured error threshold. As a background operation, dynamic data refresh scans read all data and identifies error states for all blocks. If a certain error threshold per block or ECC unit is exceeded in this scan-read, a refresh operation is triggered.

[0018] The memory device may be a non-volatile memory device. A non-volatile memory device is a package of one or more dice / dies. Each die may include one or more planes. For some types of non-volatile memory devices (e.g., NAND devices), each plane includes a set of physical blocks. For some memory devices, a block is the smallest area that can be erased. Each block includes a set of pages. Each page includes a set of memory cells that store data bits. The memory device may be a raw memory device (e.g., NAND) that is externally managed by an external controller, for example. The memory device may be a managed memory device (e.g., managed NAND), which is a raw memory device combined with a local embedded controller for memory management within the same memory device package.

[0019] In the case where the memory device and / or memory controller has a high temperature, such as when the internal temperature of the memory device / controller exceeds 85 degrees Celsius, there are challenges in efficiently managing or performing media management operations on a typical memory device. Specifically, a typical memory subsystem is implemented on a PCB and the components are distributed on the PCB in a manner that minimizes the heat accumulated on certain components. Sometimes, dedicated hardware (such as a heat sink) that is physically attached to the corresponding component can be used to improve the heat dissipation and cooling of the component. When the memory device / controller becomes overheated (for example, reaches a temperature that exceeds a threshold temperature), the typical device begins to throttle or reduce data throughput and may slow down certain operations in an attempt to reduce the operating temperature. Although these systems and methods generally work well, the need to add these large heat sinks to reduce power may consume a large amount of physical substrate real estate on the PCB and may exceed the maximum allowable height that the components on the PCB are allowed to reach. Therefore, fewer memory components can be added and heat sinks cannot always be included, which causes the components to reach the threshold temperature quickly, which reduces the overall data throughput and speed at which the memory subsystem can operate.

[0020] Aspects of the present disclosure address the above and other shortcomings by providing a TCM that is thermally coupled to one or more memory components, such as a memory processor and / or memory die or unit, which can improve heat dissipation and act as a heat sink without violating any specifications, such as maximum height or PCB space restrictions. The TCM can collect heat dissipated by the memory components by physically and thermally touching or thermally contacting the physical components that implement the processor and / or memory components and transferring the heat to the air. In some examples, the TCM physically encapsulates certain components (such as active and / or passive components) that are implemented by the physical chip at a height lower than the maximum height limit. In some examples, the TCM physically encapsulates the processor and / or memory component chip all the way to its top surface without overlying its top surface to avoid violating the maximum height limit. This provides a heat sink for various components on the PCB without violating certain specifications and restrictions. In this way, the operating temperature of the memory system can be maintained at a relatively low level (e.g., below a threshold temperature) for a longer period of time than a typical system, which can postpone, delay or prevent throttling of data throughput and degradation of the performance of the memory system. This increases the efficiency of operating the memory system and can reduce the amount of physical resources consumed by the memory subsystem and improve thermal energy storage.

[0021] In some examples, a memory controller (or throughput management unit) accesses a reference temperature to control data transfer throughput (e.g., a data transfer rate between a host and a set of memory components). The controller measures a temperature of at least one of a processing device or a set of memory components. Heat associated with at least one of the processing device or a set of memory components may be at least partially dissipated through the TCM. The controller adjusts (e.g., increases or decreases) the data transfer throughput (e.g., data transfer rate) based on comparing the measured temperature to the reference temperature.

[0022] In some examples, a PCB is provided, on which a set of memory components, a processing device, and a TCM are implemented. In some examples, the processing device is implemented by a physical chip having a specified height relative to a top layer of the PCB, and the height of the TCM is less than or equal to the specified height of the physical chip. In some cases, a set of memory components is implemented by one or more physical chips each having a specified height relative to a top layer of the PCB, and the height of the TCM is less than or equal to the specified height of the one or more physical chips. In some examples, the specified height includes 1.5 mm.

[0023] In some examples, the PCB includes an M.2 interface through which a set of memory components and a processing device communicate with a host, and the TCM is deposited on the PCB. In some cases, the PCB includes one or more passive or active components, and the TCM encapsulates the one or more passive or active components. In some examples, the TCM includes a heat sink.

[0024] In some instances, the TCM is thermally coupled to a wall of a physical chip implementing a processing device and a set of memory components. In some instances, the TCM comprises a potting material including a thermal epoxy. In some cases, the thermal epoxy comprises a thermal conductivity of 1 W / mK. In some cases, the TCM comprises a phase change material (PCM). In some cases, the PCM comprises a thermal conductivity of 0.7 W / mK.

[0025] In some examples, the TCM includes a first type of material and a second type of material. The first type of material may surround a processing device and the second type of material may surround a set of memory components. In some cases, a portion of the TCM may be removed by applying a debonding fluid to access one or more circuit components covered by the TCM to debug the memory subsystem. In some examples, the TCM is configured to absorb physical impact to the memory subsystem to add stability to the memory subsystem. In such cases, depositing an underfill material under a set of memory components or the processing device is excluded.

[0026] In some examples, the technology described herein relates to a method of manufacturing a PCB that includes a memory system. The method includes placing a processing device on a first portion of the PCB and placing a set of memory components of the memory system on a second portion of the PCB. The method includes depositing a TCM on the PCB to surround the set of memory components and the processing device.

[0027] Although various embodiments are described herein as being implemented with respect to a memory subsystem (eg, a controller of a memory subsystem), some or all portions of the embodiments may be implemented with respect to a host system, such as a software application or operating system of the host system.

[0028] Figure 1 An example computing environment 100 including a memory subsystem 110 is illustrated according to some examples. The memory subsystem 110 may include media, such as memory components 112A-112N (also referred to below as "memory devices"). The memory components 112A-112N may be volatile memory devices, non-volatile memory devices, or a combination of such devices. The memory components 112A-112N may be implemented by individual dies, such that a first memory component 112A may be implemented by a first memory die (or a first set of memory dies) and a second memory component 112N may be implemented by a second memory die (or a second set of memory dies). These individual dies may be coupled to each other on an integrated circuit and placed on a PCB as individual or combined components.

[0029] In some examples, the memory subsystem 110 is a storage system. The memory subsystem 110 may be a storage device, a memory module, or a mixture of a storage device and a memory module. Examples of storage devices include solid state drives (SSDs), flash drives, universal serial bus (USB) flash drives, embedded multimedia controller (eMMC) drives, universal flash storage (UFS) drives, and hard disk drives (HDDs). Examples of memory modules include dual inline memory modules (DIMMs), small outline DIMMs (SO-DIMMs), and non-volatile dual inline memory modules (NVDIMMs).

[0030] The computing environment 100 may include a host system 120 coupled to a memory system. The memory system may include one or more memory subsystems 110. In some examples, the host system 120 is coupled to memory subsystems 110 of different types. Figure 1 An example of a host system 120 coupled to one memory subsystem 110 is illustrated. The host system 120 uses the memory subsystem 110, for example, to write data to the memory subsystem 110 and read data from the memory subsystem 110. As used herein, "coupled to" generally refers to a connection between components, which can be an indirect communication connection or a direct communication connection (e.g., without intervening components), whether wired or wireless, including connections such as electrical, optical, magnetic, etc.

[0031] The host system 120 may be a computing device such as a desktop computer, a laptop computer, a network server, a mobile device, an embedded computer (e.g., an embedded computer included in a vehicle, an industrial device, or a networked commercial device), or such a computing device including a memory and a processing device. The host system 120 may include or be coupled to the memory subsystem 110 so that the host system 120 can read data from the memory subsystem 110 or write data to the memory subsystem 110. The host system 120 may be coupled to the memory subsystem 110 via a physical host interface. Examples of the physical host interface include, but are not limited to, a Serial Advanced Technology Attachment (SATA) interface, a Peripheral Component Interconnect Express (PCIe) interface, a USB interface, a Fibre Channel interface, a Serial Attached SCSI (SAS) interface, an M.2 SSD interface, etc. The physical host interface may be used to transfer data between the host system 120 and the memory subsystem 110. When the memory subsystem 110 is coupled to the host system 120 through the PCIe interface, the host system 120 may further utilize an NVM Express (NVMe) interface to access the memory components 112A to 112N. The physical host interface may provide an interface for passing control, address, data, and other signals between the memory subsystem 110 and the host system 120. The memory subsystem 110 may be implemented on a PCB coupled to the host system 120 via a designated interface, such as an M.2 SSD interface.

[0032] Memory components 112A to 112N may include any combination of different types of non-volatile memory components and / or volatile memory components. Examples of non-volatile memory components include NAND-type flash memory. Each of memory components 112A to 112N may include one or more memory cell arrays, such as single-level cells (SLC) or multi-level cells (MLC) (e.g., TLC or QLC). In some cases, a particular memory component 112 may include both an SLC portion and an MLC portion of memory cells. Each of the memory cells may store one or more data bits (e.g., blocks) used by a host system 120. Although non-volatile memory components (e.g., NAND-type flash memory) are described, memory components 112A to 112N may be based on any other type of memory, such as volatile memory. In some examples, memory components 112A-112N may be, but are not limited to, random access memory (RAM), read-only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), phase change memory (PCM), magnetoresistive random access memory (MRAM), NOR flash memory, electrically erasable programmable read-only memory (EEPROM), and cross-point arrays of nonvolatile memory cells.

[0033] The cross-point array of non-volatile memory cells may perform bit storage based on bulk resistance changes in conjunction with a stacked cross-grid data access array. Thus, in contrast to many flash-based memories, cross-point non-volatile memory may perform write-in-place operations, where non-volatile memory cells may be programmed without previously erasing the non-volatile memory cells. Furthermore, the memory cells of memory components 112A-112N may be grouped into memory pages or blocks, which may refer to a unit of memory component 112 for storing data.

[0034] The memory subsystem controller 115 may communicate with the memory components 112A-112N to perform memory operations, such as reading data, writing data, or erasing data and other such operations at the memory components 112A-112N. The memory subsystem controller 115 may communicate with the memory components 112A-112N to perform various memory management operations, such as different scan rates, different scan frequencies, different wear leveling, different read disturb management, different near error ECC operations, and / or different dynamic data refreshes.

[0035] The memory subsystem controller 115 may include hardware, such as one or more integrated circuits and / or discrete components, a throughput management unit 122, a TCM 130, a buffer memory, and / or a combination thereof. The memory subsystem controller 115 may be a microcontroller, a dedicated logic circuit system (e.g., a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), etc.), or another suitable processor. The memory subsystem controller 115 may include a processor (processing device) 117 configured to execute instructions stored in a local memory 119. In the illustrated example, the local memory 119 of the memory subsystem controller 115 includes an embedded memory configured to store instructions for executing various processes, operations, logic flows, and routines for controlling the operation of the memory subsystem 110, including handling communications between the memory subsystem 110 and the host system 120. In some cases, the local memory 119 may include memory registers that store memory pointers, extracted data, etc. The local memory 119 may also include a ROM for storing microcode (e.g., firmware) having instructions for execution by the memory subsystem controller 115. Although the local memory 119 of the memory subsystem controller 115 has been described, the local memory 119 may be a memory register that stores memory pointers, extracted data, etc. The local memory 119 may also include a ROM for storing microcode (e.g., firmware) having instructions for execution by the memory subsystem controller 115. Figure 1 The example memory subsystem 110 in the embodiment is illustrated as including a memory subsystem controller 115, but in another example of the present disclosure, the memory subsystem 110 may not include the memory subsystem controller 115, but may instead rely on external control (e.g., provided by an external host, or by a processor 117 or controller separate from the memory subsystem 110).

[0036] In general, the memory subsystem controller 115 may receive commands or operations from the host system 120 and may convert the commands or operations into instructions or appropriate commands to achieve the desired access to the memory components 112A to 112N. The memory subsystem controller 115 may be responsible for other memory management operations, such as wear leveling operations, obsolete item collection operations, error detection and error correction code (ECC) operations, encryption operations, cache operations, memory component 112A to 112N initialization and / or address translation. The memory subsystem controller 115 may further include a host interface circuit system that communicates with the host system 120 via a physical host interface. The host interface circuit system may convert commands received from the host system 120 into command instructions to access the memory components 112A to 112N, and also convert responses associated with the memory components 112A to 112N into information for the host system 120. The memory subsystem controller 115 may include a memory interface for communicating with the memory components 112A to 112N. Any components included as part of the memory subsystem controller 115 may be included in the memory interface, and vice versa.

[0037] The memory subsystem 110 may also include additional circuitry or components not illustrated, such as capacitors, resistors, transistors, and various other active or passive devices. In some examples, the memory subsystem 110 may include a cache or buffer (e.g., a DRAM or other temporary storage location or device) and address circuitry (e.g., a row decoder and a column decoder) that may receive addresses from the memory subsystem controller 115 and decode the addresses to access the memory components 112A-112N.

[0038] The memory device may be, for example, a raw memory device (e.g., NAND) that is externally managed by an external controller (e.g., memory subsystem controller 115). The memory device may be a managed memory device (e.g., managed NAND), which is a raw memory device combined with a local embedded controller (e.g., a local media controller) for memory management within the same memory device package. Any of the memory components 112A-112N may include a media controller (e.g., media controller 113A and media controller 113N) for managing the memory cells of the memory component (e.g., for performing one or more memory management operations) to communicate with the memory subsystem controller 115 and to execute memory requests (e.g., reads or writes) received from the memory subsystem controller 115.

[0039] The memory subsystem controller 115 may include a throughput management unit 122 coupled to a TCM 130. In some cases, the throughput management unit 122 may be a physical component separate from the components of the memory subsystem controller 115. In some cases, the throughput management unit 122 and the components of the memory subsystem controller 115 are implemented by the same physical device or integrated circuit. The TCM 130 is a physical device, material, and / or layer (or combination of layers) separate from the throughput management unit 122 and / or the memory subsystem controller 115. The TCM 130 implements a heat sink that is configured to draw or receive heat from one of the components of the memory subsystem 110 and dissipate this heat to air or other fluid or gas to cool the components of the memory subsystem 110.

[0040] In some examples, TCM 130 may be implemented by a material (e.g., a potting material such as an epoxy (e.g., having 1.48 W / mK), a polyurethane (e.g., having 2.5 W / mK or 0.2 W / mK), a silicone adhesive, a thermal epoxy having a thermal conductivity of 1 W / mK, and / or a phase change material having a thermal conductivity of 0.7 W / mK) coupled to a ground plane of a PCB on which memory subsystem 110 is implemented. In such cases, TCM 130 may be any combination of a first type of material (e.g., a potting material) and / or a second type of material (e.g., a PCM). Heat may be transferred to TCM 130 by making thermal contact between TCM 130 and individual components on the PCB. This heat may be dissipated to an external fluid or gas. In this way, TCM 130 acts as a heat sink, and the temperature of memory subsystem 110 can be reduced or maintained at a relatively low level to prevent throughput management unit 122 from reducing the throughput of memory subsystem 110 in response to detecting that the temperature of one or more components of memory subsystem 110 exceeds a temperature threshold or reference temperature. This keeps the data rate operating at an optimal or maximum level, which improves the overall efficiency and functionality of the device. In some examples, TCM 130 can collect heat dissipated by memory subsystem controller 115 and / or one or more components of memory subsystem 110 (e.g., memory components 112A to 112N).

[0041] Depending on the example, the throughput management unit 122 may include logic (e.g., a set of transient or non-transient machine instructions, such as firmware) or one or more components that enable the throughput management unit 122 to perform the operations described herein. The throughput management unit 122 may include a tangible or non-tangible unit capable of performing the operations described herein.

[0042] For example, the throughput management unit 122 may be configured to access a reference temperature to control data transfer throughput (data transfer rate between a host and a memory subsystem). The throughput management unit 122 measures the temperature of at least one of a processing device or a set of memory components. Heat associated with at least one of the components of the memory subsystem 110 may be dissipated at least in part through the TCM 130 thermally coupled to the processing device and the set of memory components. The throughput management unit 122 adjusts or decreases the data transfer throughput in response to determining that the measured temperature exceeds the reference temperature. The throughput management unit 122 adjusts or increases the data transfer throughput in response to determining that the measured temperature no longer exceeds or fails to exceed the reference temperature.

[0043] In some examples, a PCB is provided on which a set of memory components, a processing device, and TCM 130 (as well as various other components of memory subsystem 110) are implemented. In some examples, the PCB includes multiple layers, each accessible by one or more vias, including a ground layer. Both the set of memory components and the processing device are surrounded (partially and / or entirely) by TCM 130, except for the top surface thereof. Other active or passive components (such as resistors, capacitors, inductors, and / or transistors) that are smaller in height than the set of memory components and the processing device may be completely encapsulated by TCM 130. In some cases, TCM 130 is composed of a first material type that physically and thermally surrounds the set of memory components and is composed of a second material type that physically and thermally surrounds the processing device.

[0044] In some examples, the height of TCM 130 may be less than or equal to the specified / maximum height of one or more physical chips on the PCB. That is, the height of TCM 130 relative to the base or top surface of the PCB on which TCM 130 is deposited may be no greater than the height of the highest physical component placed on the same PCB relative to the top surface of the PCB. In some examples, a group of memory components is implemented by a physical chip with a specified height relative to the top layer of the PCB. The height of TCM 130 may be less than or equal to the specified height of the physical chip. In some examples, the specified height comprises 1.5 mm or less.

[0045] In some instances, the PCB includes an M.2 interface through which a set of memory components and the throughput management unit 122 communicate with the host system 120. In some instances, the TCM 130 includes a heat sink. In some instances, the TCM 130 is disposed on the PCB in an area between the processing device and the set of memory components. In some instances, a debonding fluid may be applied to some portions of the TCM 130 or all portions of the TCM 130. This debonding fluid may be used to remove some or all portions of the TCM 130 to allow direct physical access to the underlying physical components. This may be used to perform a debugging operation or function. After the debugging operation or function is completed, the TCM 130 may be deposited again in the portion of the PCB from which the TCM 130 was removed by the debonding fluid.

[0046] Figure 2 is a diagram 200 of an example physical assembly or PCB on which the memory subsystem 110 and the TCM 130 are implemented according to some examples. The PCB shown in diagram 200 includes an interface 220 (eg, an M.2 interface), a control component 210, a memory component 230, and the TCM 130.

[0047] The control component 210 may include a physical chip or integrated circuit package in which any of the components of the memory subsystem 110 (e.g., the memory subsystem controller 115) may be implemented. The memory component 230 may include one or more physical chips or integrated circuit packages in which any of the memory components 112 are implemented. The memory subsystem 110 communicates with the host system 120 via the interface 220. In some cases, the memory subsystem 110 communicates with the host system 120 at a first throughput or data rate. When the throughput management unit 122 determines that the temperature of the control component 210 and / or the memory component 230 reaches or exceeds a temperature threshold or reference temperature, the throughput management unit 122 may throttle or reduce the data rate so that the memory subsystem 110 communicates with the host system 120 at a second throughput or data transfer rate. This allows the throughput management unit 122 to reduce the operating temperature of the memory subsystem 110 to continue operation without having to shut down any components.

[0048] To increase the amount of time for the memory subsystem 110 to reach a temperature threshold or reference temperature from ambient temperature, the PCB includes a TCM 130. The TCM 130 is physically thermally coupled to one or more of the control component 210, the memory component 230, the passive / active component 240, and / or the interface 220. The TCM 130 may be a thermally conductive material that also acts as an electrical insulator.

[0049] In some examples, interface 220 is associated with a height restriction. The height restriction limits the total height (e.g., the vertical distance between the surface of the PCB and the top of any component placed on the PCB). In such cases, the distance or vertical displacement between the surface of the PCB and the top of each component on the PCB (including TCM 130 deposited on the PCB) is set to not exceed the total height of the height restriction. TCM 130 can be distributed on the PCB in various empty portions, such as between control component 210 and memory component 230.

[0050] In some examples, component 240 may include physical components having a height that is less than the height of control component 210 and / or memory component 230. In such cases, TCM 130 is deposited on top of component 240 to complete encapsulation of component 240. The diagonal lines in diagram 200 about component 240 illustrate that component 240 is completely encapsulated by TCM 130, while the top surface of each of control component 210 and / or memory component 230 remains exposed to air and completely uncovered by TCM 130. TCM 130 surrounds control component 210 and / or memory component 230, including walls that physically and thermally touch the chip or physical components that implement control component 210 and / or memory component 230.

[0051] In some examples, a first portion of TCM 130 may be a first type of material. The first portion of TCM 130 may physically surround at least a portion of control component 210. A second portion of TCM 130 may be a second type of material. The second portion of TCM 130 may physically surround at least a portion of memory component 230. In some cases, a first portion of control component 210 (and / or memory component 230) may be surrounded by the first type of material of TCM 130 and a second portion of control component 210 (and / or memory component 230) may be surrounded by the second type of material of TCM 130.

[0052] In some instances, for Figure 2 130, it may be necessary to perform a debug operation. The debug operation may require access to a portion of a component that is at least partially covered by TCM 130. In such a case, a debonding fluid may be deposited on a portion of TCM 130 to remove the portion of TCM 130. This exposes the physical component covered by the portion of TCM 130 and allows the debug operation to be performed. Once the debug is complete, the portion may be filled again with the same type of material that was removed or with TCM 130 of a different type of material that was removed.

[0053] In some examples, the control component 210 and / or the memory component 230 may be placed on the PCB without first depositing the bottom fill material. That is, the control component 210 and / or the memory component 230 may be placed directly on the PCB without being placed on top of the bottom fill material that is typically included under the control component 210 and / or the memory component 230 to absorb physical impact. Because the bottom fill material is not included, the TCM 130 may be deposited to not only absorb heat, but also absorb and reduce the physical impact that the control component 210 and / or the memory component 230 may be exposed to. This improves the overall reliability and performance of the memory subsystem 110. In this way, the TCM 130 may reduce the cost of producing the PCB because the bottom fill material may not be included and the bottom fill material may be replaced by the TCM 130.

[0054] Figure 3 is a block diagram of an example physical assembly 300 of a memory controller with a TCM according to some examples. Figure 3 A cross-sectional or perspective view of the PCB shown in FIG. 200 is shown, which shows a top view of the PCB on which the TCM 130 is implemented / deposited. Figure 2 The components in Figure 3 are marked similarly in .

[0055] like Figure 3 , interface 220 may be associated with a height constraint. The height constraint may specify a maximum height 232 that any individual component placed on the PCB may have. For example, memory component 230 may be implemented by a physical chip having a height less than or equal to the maximum height 232 measured from the surface of the PCB to the top of the physical chip.

[0056] The TCM 130 includes materials deposited on top of all components of the PCB. The TCM 130 may completely encapsulate some passive / active components 320, but only cover the sidewalls of the control component 210 and the memory component 230, leaving their top surfaces exposed to the air. In this way, heat can be collected or transferred from the interface 220, the control component 210, the memory component 230, and / or the active component 320 through the TCM 130. The heat is then dissipated to the fluid or gas that contacts the TCM 130.

[0057] Figure 4A is a flow chart of an example method (or process) for performing data throughput management and heat dissipation according to some embodiments of the present disclosure. Method 400 may be performed by processing logic, which may include hardware (e.g., a processing device, a circuit system, a dedicated logic, a programmable logic, a microcode, hardware of a device, an integrated circuit, etc.), software (e.g., instructions running or executing on a processing device), or a combination thereof. In some embodiments, method 400 is performed by Figure 1The processes are performed by the throughput management unit 122 of the embodiment. Although the processes are shown in a specific sequence or order, the order of the processes may be modified unless otherwise specified. Therefore, the illustrated examples should be understood as examples only, and the illustrated processes may be performed in a different order, and some processes may be performed in parallel. In addition, one or more processes may be omitted in various examples. Therefore, not all processes are required for each example. Other process flows are possible.

[0058] Reference now Figure 4A , the method (or process) 400 begins with operation 405, where a throughput management unit 122 of a memory subsystem (e.g., memory subsystem 110) accesses a reference temperature to control a data transfer rate between a host and a group of memory components. Next, at operation 410, the throughput management unit 122 measures a temperature of at least one of a processing device (e.g., memory subsystem controller 115) or a group of memory components 112. In an example, heat associated with the processing device (e.g., memory subsystem controller 115) or at least one of the group of memory components 112 is at least partially dissipated by a TCM 130 surrounding the processing device (e.g., memory subsystem controller 115) and at least one of the group of memory components 112. At operation 415, the throughput management unit 122 adjusts the data transfer rate based on comparing the measured temperature to the reference temperature (e.g., reducing the data transfer rate in response to determining that the temperature exceeds the reference temperature by more than a specified amount).

[0059] Figure 4B 401 is a flowchart of an example method (or process) for manufacturing a physical assembly of a memory subsystem with a TCM according to some embodiments of the present disclosure. Method 401 may be performed by processing logic, which may include hardware (e.g., a processing device, a circuit system, a dedicated logic, a programmable logic, a microcode, hardware of a device, an integrated circuit, etc.), software (e.g., instructions running or executed on a processing device), or a combination thereof. Although the processes are shown in a specific sequence or order, the order of the processes may be modified unless otherwise specified. Therefore, the illustrated examples should be understood as examples only, and the illustrated processes may be performed in different orders, and some processes may be performed in parallel. In addition, one or more processes may be omitted in various examples. Therefore, not all processes are required for each example. Other process flows are possible.

[0060] Reference now Figure 4B , the method (or process) 401 begins with operation 406, where a processing device is placed on a first portion of a PCB, and at operation 411, a set of memory components 112 are placed on a second portion of the PCB. Next, at operation 416, a TCM 130 is deposited on the PCB to surround the set of memory components and the processing device.

[0061] In view of the above disclosure, various examples are set forth below. It should be noted that within the disclosure of this application, one or more features of the examples should be considered alone or in combination.

[0062] Example 1. A system comprising: a set of memory components of a memory subsystem; a processing device operably coupled to the set of memory components; and a TCM surrounding the set of memory components and the processing device, the TCM being configured to dissipate heat from the processing device and the set of memory components, wherein the processing device is configured to perform operations including: measuring a temperature of the processing device or at least one of the set of memory components; accessing a reference temperature to control a data transfer rate between a host and the set of memory components; comparing the measured temperature to the reference temperature; and adjusting the data transfer rate based on the comparison of the measured temperature to the reference temperature.

[0063] Example 2. The system of example 1, comprising: a PCB, the set of memory components, the processing device, and the TCM being implemented on the PCB.

[0064] Example 3. The system of Example 2, wherein the processing device is implemented by a physical chip having a specified height relative to a top layer of the PCB, and wherein a height of the TCM is less than or equal to the specified height of the physical chip.

[0065] Example 4. A system according to any of Examples 2 to 3, wherein the set of memory components is implemented by one or more physical chips, each having a specified height relative to the top layer of the PCB, and wherein the height of the TCM is less than or equal to the specified height of the one or more physical chips.

[0066] Example 5. The system of Example 4, wherein the specified height comprises 1.5 mm.

[0067] Example 6. The system according to any one of examples 1 to 5, wherein a PCB includes an M.2 interface, the set of memory components and the processing device communicate with a host through the M.2 interface, and the TCM is deposited on the PCB.

[0068] Example 7. The system of example 6, wherein the PCB includes one or more passive or active components, and wherein the TCM encapsulates the one or more passive or active components.

[0069] Example 8. The system of any of examples 1 to 7, wherein the TCM includes a heat sink.

[0070] Example 9. The system of any of examples 1-8, wherein the TCM is thermally coupled to a wall of a physical chip that implements the processing device and the set of memory components.

[0071] Example 10. The system of any of examples 1 to 9, wherein the TCM comprises a potting material comprising a thermal epoxy.

[0072] Example 11. The system of Example 10, wherein the thermal epoxy comprises a thermal conductivity of 1 W / mK.

[0073] Example 12. The system of any of examples 1 to 11, wherein the TCM comprises a PCM.

[0074] Example 13. The system of Example 12, wherein the PCM comprises a thermal conductivity of 0.7 W / mK.

[0075] Example 14. The system of any of examples 1-13, wherein the TCM includes a first type of material and a second type of material, the first type of material surrounding the processing device and the second type of material surrounding the set of memory components.

[0076] Example 15. The system of any of examples 1-14, wherein a portion of the TCM is removable by applying a debonding fluid to access one or more circuit components covered by the TCM to debug the memory subsystem.

[0077] Example 16. The system of any of Examples 1 to 15, wherein the TCM is configured to absorb physical impact to the memory subsystem to add stability to the memory subsystem, and wherein deposition of an underfill material under the set of memory components or the processing device is excluded.

[0078] Example 17. A method comprising: measuring the temperature of at least one of a processing device or a set of memory components, wherein heat associated with the processing device or the at least one of the set of memory components is at least partially dissipated through a TCM surrounding the set of memory components and the processing device; accessing a reference temperature to control a data transfer rate between a host and the set of memory components; comparing the measured temperature to the reference temperature; and adjusting the data transfer rate based on the comparison of the measured temperature to the reference temperature.

[0079] Example 18. The method of Example 17, wherein the processing device is implemented by a physical chip having a specified height relative to a top layer of a PCB, and wherein a height of the TCM is less than or equal to the specified height of the physical chip.

[0080] Example 19. According to the method described in Example 18, the set of memory components is implemented by one or more physical chips each having a specified height relative to the top layer of the PCB, and wherein the height of the TCM is less than or equal to the specified height of the one or more physical chips.

[0081] Example 20. A method for manufacturing a PCB including a memory system, the method comprising: placing a processing device on a first portion of the PCB; placing a group of memory components of the memory system on a second portion of the PCB; and depositing a TCM on the PCB to surround the group of memory components and the processing device.

[0082] Methods and computer-readable storage media having instructions for performing any of the above examples.

[0083] Figure 5 An example machine is illustrated in the form of a computer system 500 within which a set of instructions for causing the machine to perform any one or more of the methodologies discussed herein may be executed. In some embodiments, the computer system 500 may correspond to a host system (e.g., Figure 1 ) that includes, is coupled to, or utilizes a memory subsystem (e.g., Figure 1 110) or can be used to perform operations of the controller (for example, to execute an operating system to execute a corresponding Figure 1 In some embodiments, the machine may be connected (e.g., using a network) to other machines in a local area network (LAN), an intranet, an extranet, and / or the Internet. The machine may operate in the capacity of a server or a client user machine in a client-server network environment, as a peer machine in a peer-to-peer (or distributed) network environment, or as a server or a client user machine in a cloud computing infrastructure or environment.

[0084] The machine may be a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a cellular phone, a network appliance, a server, a network router, a network switch or bridge, or any machine capable of executing (sequentially or otherwise) a set of instructions that specify actions to be taken by the machine. Furthermore, while a single machine is described, the term "machine" shall also be taken to include any collection of machines that individually or jointly execute a set (or multiple sets) of instructions to perform any one or more of the methodologies discussed herein.

[0085] The example computer system 500 includes a processing device 502, a main memory 504 (e.g., ROM, flash memory, DRAM, such as SDRA or Rambus DRAM (RDRAM)), etc.), a static memory 506 (e.g., flash memory, static random access memory (SRAM), etc.), and a data storage device 518, which communicate with each other via a bus 530.

[0086] The processing device 502 represents one or more general purpose processing devices, such as a microprocessor, a central processing unit, or the like. More specifically, the processing device 502 may be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, a processor implementing other instruction sets, or multiple processors implementing a combination of instruction sets. The processing device 502 may also be one or more special purpose processing devices, such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a digital signal processor (DSP), a network processor, or the like. The processing device 502 is configured to execute instructions 526 for performing the operations and steps discussed herein. The computer system 500 may further include a network interface device 508 to communicate over a network 520.

[0087] The data storage device 518 may include a machine-readable storage medium 524 (also referred to as a computer-readable medium) on which is stored one or more sets of instructions 526 or software embodying any one or more of the methodologies or functions described herein. The instructions 526 may also reside, in whole or in part, within the main memory 504 and / or the processing device 502 during execution thereof by the computer system 500, the main memory 504 and the processing device 502 also constituting machine-readable storage media. The machine-readable storage medium 524, the data storage device 518, and / or the main memory 504 may correspond to Figure 1 Memory subsystem 110.

[0088] In one embodiment, instruction 526 implements the Figure 1 The functionality of the throughput management unit 122 of the present disclosure is provided. Although the machine-readable storage medium 524 is shown as a single medium in the example embodiment, the term "machine-readable storage medium" should be taken to include a single medium or multiple media storing one or more sets of instructions. The term "machine-readable storage medium" should also be taken to include any medium capable of storing or encoding a set of instructions for execution by a machine and causing the machine to perform any one or more of the methodologies of the present disclosure. Therefore, the term "machine-readable storage medium" should be taken to include, but not limited to, solid-state memory, optical media, and magnetic media.

[0089] Some portions of the foregoing detailed description have been presented in terms of algorithms and symbolic representations of operations on data bits within a computer memory. These algorithmic descriptions and representations are the means used by those skilled in the data processing arts to most effectively convey the substance of their work to others skilled in the art. An algorithm is generally conceived here to be a self-consistent sequence of operations leading to a desired result. Operations are those requiring physical manipulation of physical quantities. Typically, but not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, combined, compared, and otherwise manipulated. It has proven convenient at times, primarily for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like.

[0090] It should be remembered, however, that all of these and similar terms should be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. The present disclosure may involve the actions and processes of computer systems or similar electronic computing devices that manipulate and transform data represented as physical (electronic) quantities within the computer system's registers and memories into other data similarly represented as physical quantities within the computer system's memories or registers or other such information storage systems.

[0091] The present disclosure also relates to an apparatus for performing the operations described herein. This apparatus may be specially constructed for the intended purpose, or it may comprise a general purpose computer selectively activated or reconfigured by a computer program stored in the computer. This computer program may be stored in a computer-readable storage medium, such as, but not limited to, any type of disk, including floppy disks, optical disks, CD-ROMs, and magneto-optical disks; ROM; RAM; erasable programmable read-only memory (EPROM); EEPROM; magnetic or optical cards; or any type of medium suitable for storing electronic instructions, each coupled to a computer system bus.

[0092] The algorithms and displays presented herein are not inherently related to any particular computer or other device. Various general purpose systems may be used in conjunction with the programs according to the teachings herein, or it may prove convenient to construct more specialized devices to perform the methods. The structures of various of these systems will appear as set forth in the description above. In addition, the present disclosure is not described with reference to any particular programming language. It should be appreciated that various programming languages ​​may be used to implement the teachings of the present disclosure described herein.

[0093] The present disclosure may be provided as a computer program product or software that may include a machine-readable medium having instructions stored thereon, which instructions may be used to program a computer system (or other electronic device) to perform a method according to the present disclosure. A machine-readable medium includes any mechanism for storing information in a form that can be read by a machine (e.g., a computer). In some embodiments, a machine-readable (e.g., computer-readable) medium includes a machine-readable (e.g., computer-readable) storage medium, such as ROM, RAM, magnetic disk storage media, optical storage media, flash memory components, etc.

[0094] In the foregoing description, embodiments of the present disclosure have been described with reference to specific example embodiments of the present disclosure. It should be understood that various modifications may be made to the present disclosure without departing from the broader spirit and scope of the embodiments of the present disclosure as set forth in the appended claims. Therefore, the description and drawings should be viewed in an illustrative rather than a restrictive sense.

Claims

1. A system comprising: A set of memory components of a memory subsystem; a processing device operatively coupled to the set of memory components; and a thermally conductive material (TCM) surrounding the set of memory components and the processing device, the TCM being configured to dissipate heat from the processing device and the set of memory components, wherein the processing device is configured to perform operations including: measuring a temperature of at least one of the processing device or the set of memory components; accessing a reference temperature to control a data transfer rate between a host and the set of memory components; comparing the measured temperature with the reference temperature; and The data transfer rate is adjusted based on the comparing the measured temperature to the reference temperature.

2. The system according to claim 1, comprising a printed circuit board (PCB), the set of memory components, the processing device and the TCM being implemented on the PCB.

3. The system of claim 2, wherein the processing device is implemented by a physical chip having a specified height relative to a top layer of the PCB; and The height of the TCM is less than or equal to the specified height of the physical chip.

4. The system of claim 2, wherein the set of memory components is implemented by one or more physical chips each having a specified height relative to a top layer of the PCB; and The height of the TCM is less than or equal to the designated height of the one or more physical chips. The system of claim 4 , wherein the specified height comprises 1.5 millimeters.

6. The system according to claim 1, wherein the PCB includes an M.2 interface, the group of memory components and the processing device communicate with a host through the M.2 interface, and the TCM is deposited on the PCB.

7. The system of claim 6, wherein the PCB comprises one or more passive or active components; and Wherein the TCM encapsulates the one or more passive or active components.

8. The system of claim 1, wherein the TCM comprises a heat sink.

9. The system of claim 1, wherein the TCM is thermally coupled to a wall of a physical chip that implements the processing device and the set of memory components.

10. The system of claim 1, wherein the TCM comprises a potting material comprising a thermal epoxy.

11. The system of claim 10, wherein the thermal epoxy comprises a thermal conductivity of 1 W / mK.

12. The system of claim 1, wherein the TCM comprises a phase change material (PCM).

13. The system of claim 12, wherein the PCM comprises a thermal conductivity of 0.7 W / mK.

14. The system of claim 1, wherein the TCM comprises a first type of material and a second type of material, the first type of material surrounding the processing device and the second type of material surrounding the set of memory components.

15. The system of claim 1, wherein a portion of the TCM is removable by applying a debonding fluid to access one or more circuit components covered by the TCM to debug the memory subsystem.

16. The system of claim 1, wherein the TCM is configured to absorb physical shock to the memory subsystem to add stability to the memory subsystem; and Wherein depositing an underfill material beneath the set of memory components or the processing device is excluded.

17. A method comprising: measuring a temperature of at least one of a processing device or a set of memory components, wherein heat associated with the processing device or the at least one of the set of memory components is at least partially dissipated through a thermally conductive material (TCM) surrounding the set of memory components and the processing device; accessing a reference temperature to control a data transfer rate between a host and the set of memory components; comparing the measured temperature with the reference temperature; and The data transfer rate is adjusted based on the comparing the measured temperature to the reference temperature.

18. The method of claim 17, wherein the processing device is implemented by a physical chip having a specified height relative to a top layer of a printed circuit board PCB; and The height of the TCM is less than or equal to the specified height of the physical chip.

19. The method of claim 18, wherein the set of memory components is implemented by one or more physical chips each having a specified height relative to a top layer of the PCB; and The height of the TCM is less than or equal to the designated height of the one or more physical chips.

20. A method of manufacturing a printed circuit board (PCB) including a memory system, the method comprising: placing a processing device on the first portion of the PCB; placing a set of memory components of the memory system on a second portion of the PCB; and A thermally conductive material (TCM) is deposited on the PCB to surround the set of memory components and the processing device.

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