Data storage method, data storage device, storage medium and electronic equipment

By using memory ring buffers in embedded systems, the problems of memory leaks and space waste caused by dynamic memory applications are solved, and efficient memory utilization and data storage are achieved.

CN119336661APending Publication Date: 2025-01-21CHENGDU OPPO TELECOMM TECH CORP LTD
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Patent Information

Application Number
CN202310895934.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-07-20
Publication Date
2025-01-21

AI Technical Summary

Technical Problem

When embedded systems frequently generate logs, dynamic memory application results in memory fragmentation, resulting in memory leakage and space waste.

Method used

The memory ring -shaped buffer has a fixed start and end position. The first pointer is updated according to the length of the data to be stored in real time, and the cache data is written into an external memory when meeting the preset conditions.

Benefits of technology

Effectively avoid memory leakage, improve the utilization of memory space, and ensure the continuous storage of data and the efficiency of external storage.

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Abstract

The invention relates to the technical field of data processing, in particular to a data storage method, a data storage device, a computer readable storage medium and electronic equipment. The method comprises the steps that real-time to-be-stored data is obtained, according to a to-be-written position indicated by a first pointer of a memory annular buffer area, the real-time to-be-stored data is written into the memory annular buffer area so as to generate cache data, the memory annular buffer area is provided with a fixed starting position and a fixed ending position in a memory, and the fixed starting position and the fixed ending position correspond to the fixed starting position and the fixed ending position. The memory annular buffer area occupies a continuous actual storage space in a memory; according to the length of the real-time to-be-stored data, a first pointer of the memory annular buffer area is updated; and when a preset condition is met, writing the cache data in the memory annular buffer area into an external memory. The memory leakage can be avoided, and the utilization efficiency of the storage space can be improved.
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Description

Background Art

[0002] The memory capacity of embedded systems is limited. When encountering a large amount of information data, it is necessary to save the data in the memory to external storage such as flash, disk, CD or CF (Compact Flash), SD (Secure Digital Memory Card) card, so as to extract the call data from the external storage when needed.

[0003] Taking log data as an example, log cache systems usually use memory buffers to improve system performance. In related technologies, a circular buffer is implemented with a linked list. That is, each time a log is generated, a section of memory is dynamically requested based on the log length and inserted at the end of the circular buffer.

[0004] However, with this dynamic memory application method, when logs are frequently generated, the system will frequently apply for memory. Frequent application and release are prone to memory fragmentation, leading to memory leaks. In addition, the dynamically applied memory may not be continuous in the actual memory space, so it will cause a waste of memory space to a certain extent.

[0005] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention

[0006] The purpose of the present disclosure is to provide a data storage method, a data storage device, a computer-readable medium and an electronic device, thereby avoiding the problem of memory leakage during data storage at least to a certain extent and improving the utilization rate of memory space.

[0007] According to a first aspect of the present disclosure, a data storage method is provided, comprising: acquiring real-time data to be stored, and writing the real-time data to be stored into a memory ring buffer according to a position to be written indicated by a first pointer of the memory ring buffer to generate cache data; updating the first pointer of the memory ring buffer according to the length of the real-time data to be stored; and writing the cache data in the memory ring buffer into an external memory when a preset condition is met; wherein the preset condition comprises one or more of the following: the length of the cache data reaches a first preset length, the time from the last time the cache data was written into the external memory reaches a first preset time from the current time, the first preset length is less than the length of the memory ring buffer, the memory ring buffer has a fixed start position and a fixed end position in the memory, the memory ring buffer occupies a continuous actual storage space in the memory, and the length of the memory ring buffer is determined according to the fixed start position and the fixed end position.

[0008] According to a second aspect of the present disclosure, a data storage device is provided, comprising: a memory write module, configured to obtain real-time data to be stored, and write the real-time data to be stored into a memory ring buffer according to a position to be written indicated by a first pointer of the memory ring buffer to generate cache data; a first pointer update module, configured to update the first pointer of the memory ring buffer according to the length of the real-time data to be stored; an external storage module, configured to write the cache data in the memory ring buffer into an external memory when a preset condition is met; wherein the preset condition includes one or more of the following: the length of the cache data reaches a first preset length, the time from the last time the cache data was written to the external memory reaches a first preset time length from the current time, the first preset length is less than the length of the memory ring buffer, the memory ring buffer has a fixed start position and a fixed end position in the memory, the memory ring buffer occupies a continuous actual storage space in the memory, and the length of the memory ring buffer is determined according to the fixed start position and the fixed end position.

[0009] According to a third aspect of the present disclosure, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the data storage method described in the first aspect is implemented.

[0010] According to a fourth aspect of the present disclosure, an electronic device is provided, characterized in that it includes: one or more processors; and a memory for storing one or more programs, so that when the one or more programs are executed by the one or more processors, the one or more processors implement the data storage method described in the first aspect above.

[0011] According to a fifth aspect of the present disclosure, there is provided a computer program product comprising instructions, which, when executed on a computer, enables the computer to execute the steps of the data storage method as described in the first aspect.

[0012] The technical solution disclosed in this disclosure has the following beneficial effects:

[0013] In the present disclosure, on the one hand, since the memory ring buffer has a fixed starting position and a fixed ending position, that is, the memory ring buffer does not change in the actual physical memory space, there is no need to repeatedly dynamically apply for memory, which can effectively avoid the problem of memory leakage; on the other hand, the memory ring buffer in the present disclosure occupies continuous actual storage space in the memory, and updates the to-be-written position of the memory ring buffer according to the real-time length of the real-time data to be stored, thereby ensuring that the real-time data to be stored is continuously stored in the memory, does not waste memory space, and improves the utilization rate of the memory space.

[0014] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The drawings herein are incorporated into the specification and constitute a part of the specification, showing embodiments consistent with the present disclosure, and together with the specification, are used to explain the principles of the present disclosure. Obviously, the drawings described below are only some embodiments of the present disclosure, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0016] Figure 1 A schematic diagram showing a flow chart of a data storage method in an exemplary embodiment of the present disclosure;

[0017] Figure 2 A schematic diagram showing an actual state of a memory ring buffer in a memory in an exemplary embodiment of the present disclosure;

[0018] Figure 3 A schematic diagram showing a logic state of a memory ring buffer during logic implementation in an exemplary embodiment of the present disclosure is shown;

[0019] Figure 4 A schematic diagram showing the actual state of the memory ring buffer in the memory when the present disclosure is in the starting state in an exemplary embodiment;

[0020] Figure 5 A schematic flow chart showing a method for writing data into a memory buffer in an exemplary embodiment of the present disclosure;

[0021] Figure 6 A schematic diagram showing an actual state of a memory ring buffer in a memory after data is written into the memory ring buffer in an exemplary embodiment of the present disclosure;

[0022] Figure 7 A schematic flow chart showing a method for reading data from a memory ring buffer and writing data into an external memory in an exemplary embodiment of the present disclosure;

[0023] Figure 8 A schematic diagram showing a logic state of a memory ring buffer in an exemplary embodiment of the present disclosure is shown;

[0024] Fig. 9 A schematic diagram showing an actual state of a memory ring buffer in a memory in an exemplary embodiment of the present disclosure is shown;

[0025] Fig.10A schematic diagram showing an actual state of a memory ring buffer in a memory after cache data in the memory ring buffer is cleared in an exemplary embodiment of the present disclosure;

[0026] Fig.11 A schematic diagram showing an actual state of a memory ring buffer in a memory after cache data in the memory ring buffer is cleared and data is continued to be written into the memory ring buffer in an exemplary embodiment of the present disclosure;

[0027] Fig.12 A schematic diagram showing an actual state of a memory ring buffer in a memory after data is continuously written into the memory ring buffer after a first pointer and a fixed end position coincide with each other in an exemplary embodiment of the present disclosure;

[0028] Fig.13 A schematic diagram showing an actual state of a memory ring buffer in a memory after cache data in another memory ring buffer in an exemplary embodiment of the present disclosure is cleared;

[0029] Fig.14 A schematic diagram showing the composition of a data storage device in an exemplary embodiment of the present disclosure;

[0030] Fig.15 A schematic diagram showing an electronic device to which the exemplary embodiments of the present disclosure can be applied. DETAILED DESCRIPTION

[0031] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that the disclosure will be more comprehensive and complete and to fully convey the concepts of the example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0032] In addition, the accompanying drawings are only schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the figures represent the same or similar parts, and their repeated description will be omitted. Some of the block diagrams shown in the accompanying drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software form, or implemented in one or more hardware modules or integrated circuits, or implemented in different networks and / or processor devices and / or microcontroller devices.

[0033] The memory capacity of embedded systems is limited. When encountering a large amount of information data, it is necessary to save the data in the memory to external storage such as flash, disk, CD or CF (Compact Flash), SD (Secure Digital Memory Card) card, so as to extract the call data from the external storage when needed.

[0034] Taking log data as an example, log cache systems usually use memory buffers to improve system performance.

[0035] In a related technology, a linked list is used to implement a circular buffer. Each time a log is generated, a section of memory is dynamically requested according to the length of the log and inserted into the end of the circular buffer.

[0036] However, this dynamic way of applying for new memory will cause the system to frequently apply for memory when logs are frequently generated. Frequent application and release can easily cause memory fragmentation and memory leaks. Secondly, since the length of each log is not fixed and can be large or small, the size of each memory application cannot be fixed, and it is impossible to use the memory pool to pre-allocate log nodes to avoid the problem of frequent memory application.

[0037] In another related technology, two buffers A and B are used. When the A buffer is full, the current buffer is switched to the B buffer, and the write task is started immediately to write the log in the A buffer to the Flash. If there is a new log at this time, the data is written to the B buffer. When the B buffer is full, the current buffer is switched to the A buffer, and the write task is started immediately to write the log in the B buffer to the Flash, and this process is repeated.

[0038] However, for the AB buffer solution, assuming that the A buffer is full, the system switches the current buffer to the B buffer and immediately starts the write task to write the content of the A buffer to the Flash. Since the Flash write speed is slow, if the log generation speed is too high at this moment, the B buffer will also become full in a short time. At this time, although part of the space in the A buffer has been released (due to the Flash write speed limit, only part of the data in the A buffer is written to the Flash), the A buffer must be fully released before it can be used. Therefore, the A buffer cannot be used at this time, resulting in no buffer available, thereby causing a waste of part of the buffer.

[0039] In view of the above problems, an exemplary embodiment of the present disclosure provides a data storage method to improve the related problems existing in the above related technologies to a certain extent.

[0040] Combine the following Figure 1A data storage method in this exemplary embodiment is described. Figure 1 An exemplary process of the data storage method is shown, which may include:

[0041] Step S110, acquiring real-time data to be stored, and writing the real-time data to be stored into the memory ring buffer according to the position to be written indicated by the first pointer of the memory ring buffer to generate cache data;

[0042] Step S120, updating the first pointer of the memory ring buffer according to the length of the real-time data to be stored;

[0043] Step S130, when a preset condition is met, writing the cache data in the memory ring buffer into an external memory;

[0044] Among them, the preset conditions include one or more of the following: the length of the cached data reaches a first preset length, the time from the last time the cached data was written to the external memory to the current time reaches a first preset length, the first preset length is less than the length of the memory ring buffer, the memory ring buffer has a fixed start position and a fixed end position in the memory, the memory ring buffer occupies continuous actual storage space in the memory, and the length of the memory ring buffer is determined according to the fixed start position and the fixed end position.

[0045] Based on the above method, on the one hand, since the memory ring buffer has a fixed starting position and a fixed ending position, that is, the memory ring buffer does not change in the actual physical memory space, there is no need to repeatedly dynamically apply for memory, which can effectively avoid the problem of memory leakage; on the other hand, the memory ring buffer in the present disclosure occupies continuous actual storage space in the memory, and updates the to-be-written position of the memory ring buffer according to the real-time length of the real-time data to be stored, thereby ensuring that the real-time data to be stored is continuously stored in the memory, does not waste memory space, and improves the utilization rate of the memory space.

[0046] Below Figure 1 The steps shown are explained in detail.

[0047] In step S110, real-time data to be stored is acquired, and the real-time data to be stored is written into the memory ring buffer according to the position to be written indicated by the first pointer of the memory ring buffer to generate cache data.

[0048] In an exemplary embodiment, the real-time data to be stored includes any one of log data, serial port receiving and sending data, network data processed by a network card, communication data between tasks, audio stream data, and video stream data.

[0049] For example, the real-time data to be stored may include data generated in real time as time changes or data generated in real time as a result of a real-time operation event, that is, the real-time data to be stored may include data in a data stream generated as time changes or as a result of a real-time operation event. For example, log data is recorded data corresponding to a real-time operation event generated during system operation, and audio stream data is data generated in real time as time changes.

[0050] The buffer is a part of the memory space, that is, a certain amount of storage space is reserved in the memory space, which is used to buffer input or output data. This reserved space is called the buffer. In other words, the buffer is a piece of memory area, which is used between the input and output devices and the CPU to store data.

[0051] The buffer can reduce the number of times data is read and written. If only a little data is transmitted each time, it needs to be transmitted many times, which will waste a lot of time, because it takes a long time to start and end reading and writing. If the data is sent to the buffer and then transmitted, the number of times of reading and writing will be greatly reduced, which can save a lot of time. For example, if you want to write data to the disk, you don’t write the data to the disk immediately, but enter it into the buffer first. When a certain amount of data is stored in the buffer, the data cached in the buffer is written to the disk. This can reduce the number of times the disk is read and written, otherwise the disk will easily break down.

[0052] In an exemplary embodiment, the memory ring buffer in the present disclosure has a fixed start position and a fixed end position in the memory and occupies a continuous actual storage space in the memory, and the length of the memory ring buffer is determined according to the fixed start position and the fixed end position.

[0053] For example, Figure 2 The straight line in exemplarily shows the actual state of the memory ring buffer in the present disclosure in the memory. Figure 2 As shown, the memory ring buffer in the present disclosure occupies continuous actual storage space in the memory and has a fixed start position buff_s and a fixed end position buff_e. The length of the memory ring buffer is the fixed end position minus the fixed start position. Taking the length of the memory buffer as len as an example, len = buff_e-buff_s. The size (i.e., length) of the memory ring buffer can be customized according to user needs, such as Len = 2M Bytes (i.e., 2 megabytes). Figure 3 FIG. 1 is a schematic diagram showing the logical state of a memory ring buffer in an exemplary embodiment of the present disclosure during logical implementation. Figure 3As shown, the memory ring buffer in the present disclosure is connected head to tail in logical implementation, that is, in implementation logic, buff_s and buff_e point to the same position in the ring buffer, that is, "connected head to tail".

[0054] In other words, the memory ring buffer in the present disclosure actually occupies a fixed and continuous memory space in the memory, but reads and writes this memory space through a circular logic to achieve the reuse of this memory space and avoid memory leaks caused by frequent memory application and release.

[0055] In an exemplary embodiment, the memory ring buffer can be reused logically by means of a double pointer. For example, the memory ring buffer in the present disclosure is configured with a first pointer and a second pointer. The first pointer is used to indicate the position to be written in the memory ring buffer. When data needs to be stored, the data to be stored is written with the position to be written as the starting position, and the second pointer is used to indicate the position to be read in the memory ring buffer, that is, when the data in the memory buffer is read out and stored in the external memory, the data is read starting from the position to be read.

[0056] Since the memory ring buffer is logically connected end to end, the first-in-first-out of the data in the memory ring buffer can be achieved through the double pointer, that is, the data written into the memory ring buffer first is read out first.

[0057] For example, Figure 4 As shown, in the starting state, that is, when the memory ring buffer is just created, the position to be written indicated by the first pointer is the same as the fixed starting position of the memory ring buffer, and the position to be read indicated by the second pointer is the same as the fixed ending position of the memory ring buffer. Take the first pointer as free_s and the second pointer as free_e as an example, that is, in the starting state, free_s = buff_s, free_e = buff_e.

[0058] Exemplarily, the remaining space length of the memory ring buffer is determined according to the position to be written indicated by the first pointer and the position to be read indicated by the second pointer of the memory ring buffer. Taking the remaining space length as freeLen as an example, freeLen=free_e-free_s. That is, the length from the position to be written to the position to be read is the remaining space length of the memory ring buffer.

[0059] Based on this, for example, Figure 5 A flow chart showing a method for writing data into a memory buffer in an exemplary embodiment of the present disclosure is shown. Figure 5 , the method may include steps S510 to S540.

[0060] In step S510, real-time data to be stored is obtained;

[0061] In step S520, it is determined whether the length of the real-time data to be stored is less than or equal to the length of the remaining space of the memory ring buffer. If so, the process proceeds to step S530; otherwise, the process proceeds to step S540;

[0062] In step S530, the real-time data to be stored is written into the memory ring buffer according to the position to be written indicated by the first pointer in the memory buffer to generate cache data;

[0063] In step S540, the real-time data to be stored is discarded.

[0064] For example, when real-time data to be stored is generated, the length of the real-time data to be stored can be compared with the current remaining space length of the memory ring buffer. If it is less than or equal to the current remaining space length, it means that the newly generated real-time data to be stored can be completely stored, so the real-time data to be stored can be written into the memory ring buffer according to the position to be written currently indicated by the first pointer. If the length of the real-time data to be stored is greater than the current remaining space length, it means that the newly generated real-time data to be stored cannot be completely stored, and the real-time data to be stored can be directly discarded, that is, the writing to the memory ring buffer is abandoned, and the next real-time data to be stored is continued to be waited for.

[0065] Take the case where the real-time data to be stored is log data. When a log is generated, assuming the length is n, if n is less than or equal to freeLen, the log is written to the memory ring buffer, otherwise it is discarded. Unless the length of a single log is greater than the length of the entire buffer, it will need to be discarded. However, in general, the length of a single log will not be greater than the length of the entire buffer, so the number of discards is small.

[0066] After the real-time data to be stored is written into the memory ring buffer, the cache data can be obtained. In other words, the real-time data to be stored written into the memory ring buffer can be understood as cache data.

[0067] Continue to refer Figure 1 In step S120, the first pointer of the memory ring buffer is updated according to the length of the real-time data to be stored.

[0068] Taking the example that the length of the real-time data to be stored currently written into the memory ring buffer is len1, and when the real-time data to be stored has not been written, the position to be written indicated by the first pointer is ptr1, then after the real-time data to be stored is written, the first pointer is updated from ptr1 to ptr1+len1, that is, the next real-time data to be stored is written to the cache in the memory ring buffer starting from the position indicated by ptr1+len1.

[0069] For example, Figure 6 A schematic diagram showing the actual state of a memory ring buffer in a memory after writing data to the memory ring buffer in an exemplary embodiment of the present disclosure. Figure 6 After the real-time data to be stored is written multiple times, the position to be written indicated by the first pointer can be changed from Figure 4 The position 41 shown is updated to Figure 6 The position shown is 61. That is, the first pointer can be moved rightward according to the length of the real-time data to be stored currently written, so as to update the first pointer.

[0070] Since the length of the real-time data to be stored written into the memory ring buffer each time is not fixed, the update amount of the first pointer each time is also not fixed, and is determined according to the data length of the real-time data to be stored currently written.

[0071] In the present disclosure, since the memory ring buffer occupies actual continuous storage space in the memory, the first pointer is updated according to the length of the real-time data to be stored, so that the real-time data to be stored can be continuously stored in the memory. When the length of each real-time data to be stored is not fixed, it can be ensured that each memory unit is fully utilized, avoiding waste of memory space and improving the utilization rate of memory space.

[0072] For example, if the capacity of each memory unit is 8 bytes, the length of the first real-time data to be stored is 3 bytes, the length of the second real-time data to be stored is 6 bytes, and the length of the third real-time data to be stored is 7 bytes, then the first real-time data to be stored is stored in the first memory unit, the second real-time data to be stored occupies the remaining 5 bytes of the first memory unit and the first byte of the second memory unit, and the third real-time data to be stored occupies the remaining 7 bytes of the second memory unit. In this way, it can be ensured that each memory unit in the memory ring buffer is fully utilized, thereby avoiding the waste of memory space.

[0073] Continue to refer Figure 1 In step S130, when a preset condition is met, the cache data in the memory ring buffer is written into the external memory.

[0074] The external memory may include flash, hard disk, optical disk, CF, SD, etc., which is not particularly limited in this exemplary embodiment.

[0075] In an exemplary embodiment, the preset condition includes one or more of the following: the length of the cache data reaches a first preset length, the time from the last time the cache data was written to the external memory reaches a first preset duration, and the first preset length is less than the length of the memory ring buffer. Reaching the first preset length can be understood as being greater than or equal to the first preset length, and reaching the first preset duration can be understood as being equal to the first preset duration.

[0076] The reason why reaching the first preset length can be understood as being greater than or equal to the first preset length is because the length of the real-time data to be stored is not fixed. The first preset length is 100 bytes, and the first 50 real-time data to be stored occupy 99 bytes. The length of the 51st real-time stored data may be greater than or equal to 1 byte. If the length of the 51st real-time data to be stored is equal to 1 byte, after writing it to the memory ring buffer, the length of the cached data is equal to 100 bytes. At this time, the thread of writing the cached data in the memory ring buffer to the external memory can be started immediately. If the length of the 51st real-time data to be stored is greater than 1 byte, it will not be discarded, and it will also be written to the memory ring buffer. In this way, after writing the 51st real-time data to be stored, the length of the cached data is already greater than 100 bytes, then the thread of writing the cached data in the memory ring buffer to the external memory can also be started immediately.

[0077] For example, the first preset length can be one half, two thirds, three quarters, etc. of the length of the memory ring buffer, as long as it is less than the length of the memory ring buffer. It should be noted that if the first preset length is set too large, it may affect the reuse of the memory ring buffer due to the slow speed of writing to the external memory. If it is set too small, it will cause a waste of storage space of the memory ring buffer. Therefore, a suitable first preset length can be determined according to the size of the data to be stored. This exemplary embodiment does not make special restrictions on this. The first preset duration can be customized according to demand. Similarly, the first preset duration should not be set too large or too small. If it is too large, it may result in no memory space available at the moment. If it is too small, it will result in frequent writing to the external memory.

[0078] In the case where the preset conditions include that the length of the cached data is greater than the first preset length, by setting the first preset length, the thread for writing to the external memory is started when the memory ring buffer is not full, so that the newly generated logs in the process of writing to the external memory can be stored in the remaining storage space of the memory ring buffer. At the same time, the memory space originally occupied by the cached data written to the external memory has also been released. When the remaining storage space is full, the released memory space can continue to be used to store data, and so on and so forth, which can avoid the problem of no available memory buffer space due to the slow speed of writing to the external memory, and realize the reuse of memory space, thereby improving the utilization efficiency of memory space.

[0079] When the preset conditions include that the time from the last time the cached data was written to the external memory to the current time reaches a first preset time length, the first preset time length can be used to avoid the situation where the cached data is lost due to power failure due to the cached data not reaching the first preset length for a long time, thereby improving the accuracy of data storage.

[0080] For example, when the length of the cached data in the memory ring buffer is greater than or equal to a first preset length, the cached data in the memory ring buffer can be started to be read to write the cached data in the memory ring buffer to the external memory; the cached data in the memory ring buffer can also be read every first preset time period, such as every 10 minutes, to write the cached data in the memory buffer to the external memory; or when the length of the cached data in the memory ring buffer is greater than or equal to the first preset length, the cached data in the memory ring buffer can be started to be written to the external memory, and when the cached data in the memory ring buffer has not reached the first preset length, but the time from the last write to the external memory has reached the first preset time, the cached data in the memory ring buffer can also be started to be written to the external memory. In this way, the memory space can be released in time to avoid the situation where the memory buffer is full and there is no memory space available, and the problem of cached data loss caused by power failure due to long-term non-reading of cached data in the memory can be avoided.

[0081] For example, Figure 7 A flow chart showing a method for reading data from a memory ring buffer and writing it to an external memory in an exemplary embodiment of the present disclosure is shown. Figure 7 , the method may include steps S710 to S720.

[0082] In step S710, cache data is read from the memory ring buffer in a direction from the to-be-read position to the to-be-written position, so as to write the cache data in the range from the to-be-read position to the to-be-written position into the external memory.

[0083] For example, after writing multiple real-time data to be stored, the logical state of the memory ring buffer is as follows: Figure 8 As shown, the fixed start position buff_s and the fixed end position buff_e of the memory ring buffer do not change with data writing or reading, and the fixed start position and the fixed end position are still logically connected head to tail, such as Figure 8 In the example, buff_s and buff_e are logically overlapped. As mentioned above, as the real-time data to be stored is written, the first pointer free_s will change with the length of the real-time data to be stored, such as Figure 8 As shown, the first pointer free_s changes from the position that coincides with buff_s at the beginning to the position that coincides with buff_s at the beginning. Figure 8 Position shown.

[0084] Because the first pointer free_s changes with the length of the real-time data to be stored newly written into the memory ring buffer, that is, the first pointer free_s indicates the latest real-time data to be stored. Fig. 9 As shown, Fig. 9 Shown with Figure 8 The logical state diagram of the memory ring buffer in the corresponding memory ring buffer in the actual state diagram in the memory, refer to Fig. 9 , when writing data to the memory ring buffer, the second pointer free_e does not change, that is, the second pointer free_e indicates the data first written to the memory ring buffer. Based on this, when writing the cached data in the memory ring buffer to the external memory, the direction from the position to be read indicated by the second pointer free_e to the position to be written indicated by the first pointer free_s is as follows, Figure 8 The data in the memory ring buffer is read sequentially in the direction indicated by the arrow 81 in FIG. Fig. 9 The data corresponding to the black part in the memory is written into the external memory so that the cache data within the range from the to-be-read position indicated by the second pointer to the to-be-written position indicated by the first pointer is written into the external memory. In this way, the correctness of the data finally stored in the external memory can be guaranteed according to the first-in-first-out principle.

[0085] Exemplarily, writing cache data in the memory ring buffer into the external memory includes: based on a mutex, writing the cache data in the memory ring buffer into the external memory in batches.

[0086] For example, when reading data from the memory ring buffer, the second pointer needs to be updated according to the length of the read data, such as the reading direction and the writing direction are as described above. Figure 8Taking the clockwise direction shown as an example, when the thread writing to the external memory continuously writes the cached data in the memory ring buffer to the external memory, the second pointer continuously moves in the clockwise direction. When new real-time data to be stored is generated and written to the memory ring buffer, the first pointer also needs to continuously move in the clockwise direction. Both operate on the same buffer. By adding a mutex lock to the memory ring buffer, multi-thread competition can be avoided.

[0087] Mutex locks can protect operations on shared resources, that is, they can protect the operation code of threads on shared resources to be fully executed without being interrupted by other threads in the middle of the access. The code segment for shared resource operations is usually called a critical section, and its shared resources can also be called critical resources. Mutex locks can lock the critical section to ensure that the thread in the critical section is not interrupted by other threads, ensuring that the critical section runs completely.

[0088] For example, when the preset conditions are met, the thread that writes to the external memory will acquire the lock to ensure that the thread that writes to the external memory is not interrupted in the process of reading data from the memory ring buffer and writing it to the external memory. After the thread that writes to the external memory completes access to the memory ring buffer, it can release the lock. In this way, the thread that writes to the memory ring buffer can acquire the lock to write the newly generated real-time data to be stored into the memory ring buffer without being interrupted by other threads during the writing process. After the thread that writes to the memory ring buffer completes access to the memory ring buffer, it can release the lock again, and the thread that writes to the external memory can acquire the lock again, and so on. Based on the mutex lock, the two threads are not disturbed by other threads during their respective execution, thus avoiding multi-threaded competition.

[0089] Considering that the speed of writing to the external memory is slow, the cache data in the memory ring buffer can be written to the external memory in batches based on the mutex lock, thereby avoiding the system performance degradation caused by the external memory being occupied by the lock for a long time.

[0090] In an exemplary embodiment, based on a mutex lock, the cache data in the memory ring buffer is written to the external memory in batches, including: based on the mutex lock, the cache data of a second preset length is read each time to write the cache data in the memory ring buffer to the external memory in batches.

[0091] The second preset length can be customized according to needs, and this exemplary embodiment does not specifically limit this, but the second preset length is smaller than the first preset length.

[0092] Taking the second preset length of 1K bytes as an example, based on the mutual exclusion lock, 1K bytes of cache data can be read each time to write to the external memory. After all the 1K bytes of cache data are written to the external memory, the lock is released. Then, during the lock release period, the thread that writes to the memory ring buffer can obtain the lock. After the thread that writes to the memory ring buffer completes the access, the lock can be released again. The thread that writes to the external memory can obtain the lock again and continue to write 1K bytes of cache data to the external memory, and so on, until all the cache data in the memory ring buffer is written to the external memory. For example, the corresponding pseudo code can be expressed as:

[0093] "While (there is data in the memory ring buffer): / / When there is data in the memory ring buffer;

[0094] Lock(memory ring buffer); / / Lock;

[0095] Write 1K bytes of cache data to external memory;

[0096] UnLock (memory ring buffer) / / Release lock"

[0097] In another exemplary embodiment, based on a mutex lock, the cache data in the memory ring buffer is written to the external memory in batches, including: based on the mutex lock, the cache data is read each time based on a second preset time length to write the cache data in the memory ring buffer to the external memory in batches.

[0098] The second preset duration can also be customized according to user needs, and its purpose is to ensure that the thread writing to the external memory does not occupy the lock for too long at a time, but a certain amount of cache data can be written to the external memory.

[0099] Taking the second preset time length as T as an example, based on the mutex lock, the time length for each access to the memory ring buffer by the thread that writes to the external memory is T. After the access time length is reached, the lock is released and then locked again. The thread that writes to the external memory accesses the memory ring buffer again for T time length, and so on and so forth until all the cached data in the memory ring buffer is written to the external memory.

[0100] In step S720, the second pointer is updated according to the length of the read cache data.

[0101] Exemplarily, a specific implementation of step S720 may include: updating the second pointer according to the length of the cache data read each time.

[0102] For example, in the present disclosure, based on a mutex lock, cache data is read in batches to be written into the external memory. Therefore, after each writing into the external memory is completed, the second pointer is updated according to the length of the cache data written into the external memory. Figure 8 In the direction shown, taking the cache data in the memory ring buffer as an example, the second pointer is moved clockwise according to the length of the cache data written to the external memory, such as Fig. 9 For example, in the actual memory, according to the length of the cache data written to the external memory, the second pointer is shifted right. If the length of the cache data written to the external memory is len2, the second pointer is shifted right by len2.

[0103] In an exemplary implementation, when the to-be-read position indicated by the updated second pointer is the same as the to-be-written position indicated by the first pointer, it is determined that all cache data stored in the memory ring buffer has been written into the external memory.

[0104] For example, after the thread that writes to the external memory is started, the cache data will be read from the position of the second pointer, and the second pointer will be moved according to the length of the read data. The second pointer will approach the first pointer. When the second pointer coincides with the first pointer, it indicates that the cache data in the memory ring buffer has been completely written to the external memory.

[0105] Exemplarily, when the cached data in the memory ring buffer is cleared, an exemplary actual state of the memory ring buffer in the memory may be as follows: Fig.10 As shown, the second pointer free_e and the first pointer free_s overlap, and there is no cached data in the memory ring buffer at this time.

[0106] When the memory ring buffer is cleared, if new real-time data to be stored is generated, the new real-time data to be stored is still written into the memory ring buffer according to the position to be written indicated by the first pointer, such as Fig.11 As shown, Fig.11 A schematic diagram showing the actual state of a memory ring buffer in a memory after the cache data in the memory ring buffer is cleared and data is continued to be written into the memory ring buffer in an exemplary embodiment of the present disclosure. Fig.11 , the first pointer will move right according to the length of the real-time data to be stored. Fig.11 In the process, the first pointer is moved right to a position that coincides with the fixed end position of the memory ring buffer.

[0107] exist Fig.11In the example, although the first pointer and the fixed end position of the memory ring buffer coincide, the memory ring buffer is logically connected end to end and occupies continuous actual storage space in the memory. Fig.11 In the case shown in FIG. 1 , if new real-time data to be stored continues to be generated, the new real-time data to be stored can be written from the fixed starting position. Fig.12 As shown, when the length of the cached data of parts1 makes the first pointer coincide with the fixed end position, the real-time data to be stored can be written from the fixed start position to obtain the cached data of parts2. Fig.12 The cached data is identified as parts1 and parts2, but parts1 and parts2 are logically continuous.

[0108] Based on this, a specific implementation of the above-mentioned step S110 may include: obtaining real-time data to be stored, and when the position to be written indicated by the first pointer coincides with the fixed end position and the length of the real-time data to be stored is less than the remaining space length of the memory ring buffer, writing the real-time data to be stored into the memory ring buffer according to the fixed start position to generate cache data.

[0109] For example, Fig.12 For the cache data shown in FIG. 1 , the thread writing to the external memory first writes to the parts1 part, that is, free_e to the buff_e part, and the free_e pointer moves to the right until buff_e (that is, buff_s), and then writes to the parts2 part, that is, buff_s to the free_s part, and free_e continues to move to the right. Fig.12 After all cache data in the memory is written to the external memory, free_e moves to the free_s position, such as Fig.13 As shown, the second pointer and the first pointer overlap again. In this way, the permanent recycling of the memory ring buffer can be achieved by repeating this process.

[0110] In fact, for Fig.12 As for the cache data shown, when writing it to the external memory, the cache data is essentially read in the direction from the to-be-read position indicated by the second pointer to the to-be-written position indicated by the first pointer, so as to write the cache data in the range from the to-be-read position indicated by the second pointer to the to-be-written position indicated by the first pointer into the external memory.

[0111] In another exemplary embodiment, writing the cache data in the memory ring buffer into the external memory includes: compressing the cache data stored in the memory ring buffer to write the compressed cache data into the external memory.

[0112] For example, when writing to the external memory, the buffered data may be compressed using any compression method before writing, which can effectively save the space of the external memory, thereby storing as much content as possible in the limited external memory space.

[0113] In the present disclosure, by fixing the starting position and the ending position, the memory ring buffer occupies continuous storage space in the actual memory. During the whole process of writing data to the memory ring buffer and reading data from the memory ring buffer and writing it to the external memory, the physical storage space of the memory ring buffer does not change at all, and there is no need to repeatedly apply for memory dynamically, thereby effectively avoiding the generation of memory fragmentation caused by memory leaks.

[0114] At the same time, when writing cached data to the external memory, due to the use of a batch writing method, such as writing 1K bytes each time, the mutex lock resources can be released in time, which not only releases the memory space of the memory ring buffer in a timely and effective manner, but also avoids the slow writing speed of the external memory and the long-term occupation of lock resources, resulting in the newly generated real-time data to be stored cannot be written into the memory in time, and the system performance is reduced.

[0115] Furthermore, by compressing the cached data before writing it to the external memory, the compression is relatively high for real-time data to be stored with highly similar content, such as video streams, log data, etc., which are data with highly similar content before and after. On embedded devices with relatively tight external storage resources, storage space can be saved, effectively improving the utilization rate of storage space.

[0116] It should be noted that the above figures are only schematic illustrations of the processes included in the method according to the exemplary embodiments of the present disclosure, and are not intended to be limiting. It is easy to understand that the processes shown in the above figures do not indicate or limit the time sequence of these processes. In addition, it is also easy to understand that these processes can be performed synchronously or asynchronously, for example, in multiple modules.

[0117] For further reference, Fig.14As shown, in the implementation of this example, a data storage device 1400 is also provided. The data storage device 1400 may include a memory write module 1410 , a first pointer update module 1420 , and an external storage module 1430 . Among them: the memory writing module 1410 is configured to obtain real-time data to be stored, and write the real-time data to be stored into the memory ring buffer according to the position to be written indicated by the first pointer of the memory ring buffer to generate cache data; the first pointer updating module 1420 is configured to update the first pointer of the memory ring buffer according to the length of the real-time data to be stored; the external storage module 1430 is configured to write the cache data in the memory ring buffer into the external memory when the preset conditions are met, wherein the preset conditions include one or more of the length of the cache data reaching the first preset length, the time from the last time the cache data was written to the external memory to the current time reaching the first preset length, the first preset length is less than the length of the memory ring buffer, the memory ring buffer has a fixed start position and a fixed end position in the memory, the memory ring buffer occupies a continuous actual storage space in the memory, and the length of the memory ring buffer is determined according to the fixed start position and the fixed end position.

[0118] In an exemplary embodiment, based on the aforementioned embodiment, the memory ring buffer is configured with a second pointer, and the second pointer is used to indicate the position to be read of the memory ring buffer, and the remaining space length of the memory ring buffer is determined according to the position to be written and the position to be read of the memory ring buffer; based on this, the memory write module 1410 can be specifically configured to: obtain real-time data to be stored, and when the length of the real-time data to be stored is less than the remaining space length of the memory ring buffer, write the real-time data to be stored into the memory ring buffer according to the position to be written indicated by the first pointer in the memory buffer to generate cache data.

[0119] In an exemplary embodiment, based on the aforementioned embodiment, the writing of the cache data in the memory ring buffer into the external memory includes: reading the cache data from the memory ring buffer in a direction from the position to be read to the position to be written, so as to write the cache data in the range from the position to be read to the position to be written into the external memory, and updating the second pointer according to the length of the cache data read.

[0120] In an exemplary implementation, based on the foregoing embodiment, when the to-be-read position indicated by the updated second pointer is the same as the to-be-written position indicated by the first pointer, it is determined that all cache data stored in the memory ring buffer has been written to the external memory.

[0121] In an exemplary embodiment, based on the aforementioned embodiment, the memory write module 1410 can be specifically configured to: obtain real-time data to be stored, and when the position to be written indicated by the first pointer coincides with the fixed end position and the length of the real-time data to be stored is less than the remaining space length of the memory ring buffer, write the real-time data to be stored into the memory ring buffer according to the fixed start position to generate cache data.

[0122] In an exemplary implementation, based on the foregoing embodiment, writing the cache data in the memory ring buffer into the external memory includes: based on a mutex, writing the cache data in the memory ring buffer into the external memory in batches.

[0123] In an exemplary embodiment, based on the foregoing embodiment, the cache data in the memory ring buffer is written to the external memory in batches based on a mutex lock, including: based on a mutex lock, reading the cache data of a second preset length each time, so as to write the cache data in the memory ring buffer to the external memory in batches; or based on a mutex lock, reading the cache data based on a second preset time length each time, so as to write the cache data in the memory ring buffer to the external memory in batches.

[0124] In an exemplary embodiment, based on the aforementioned embodiment, writing the cache data in the memory ring buffer into the external memory includes: compressing the cache data stored in the memory ring buffer to write the compressed cache data into the external memory.

[0125] In an exemplary implementation, based on the foregoing embodiments, the real-time data to be stored includes any one of log data, serial port receiving and sending data, network data processed by a network card, communication data between tasks, audio stream data, and video stream data.

[0126] The specific details of each module in the above device have been described in detail in the implementation method of the method part. The undisclosed details can be found in the implementation method of the method part, so they will not be repeated here.

[0127] The exemplary embodiment of the present disclosure also provides an electronic device for executing the above data storage method, and the electronic device can be any embedded device. Generally, the electronic device can include a processor and a memory, the memory is used to store executable instructions of the processor, and the processor is configured to execute the above data storage method by executing the executable instructions.

[0128] Below Fig.15The mobile terminal 1500 in FIG. 1 is taken as an example to exemplify the structure of the electronic device. It should be understood by those skilled in the art that, in addition to the components specifically used for mobile purposes, Fig.15 The construction in can also be applied to fixed type equipment.

[0129] like Fig.15 As shown, the mobile terminal 1500 may specifically include: a processor 1501, a memory 1502, a bus 1503, a mobile communication module 1504, an antenna 1, a wireless communication module 1505, an antenna 2, a display screen 1506, a camera module 1507, an audio module 1508, a power module 1509 and a sensor module 1510.

[0130] Processor 1501 may include one or more processing units, for example, processor 1501 may include an AP (Application Processor), a modem processor, a GPU (Graphics Processing Unit), an ISP (Image Signal Processor), a controller, an encoder, a decoder, a DSP (Digital Signal Processor), a baseband processor and / or an NPU (Neural-Network Processing Unit), etc.

[0131] The processor 1501 may be connected to the memory 1502 or other components via a bus 1503 .

[0132] The memory 1502 may be used to store computer executable program codes, which include instructions. The processor 1501 executes various functional applications and data processing of the mobile terminal 1500 by running the instructions stored in the memory 1502. The memory 1502 may also store application data, such as images, videos and other files. The memory 1502 may include two parts, a memory and an external memory. The external memory may store cache data read from the memory ring buffer of the mobile terminal 1500.

[0133] The communication function of the mobile terminal 1500 can be implemented by the mobile communication module 1504, antenna 1, wireless communication module 1505, antenna 2, modem processor and baseband processor. Antenna 1 and antenna 2 are used to transmit and receive electromagnetic wave signals. The mobile communication module 1504 can provide 2G, 3G, 4G, 5G and other mobile communication solutions applied to the mobile terminal 1500. The wireless communication module 1505 can provide wireless communication solutions such as wireless LAN, Bluetooth, near field communication, etc. applied to the mobile terminal 1500.

[0134] The display screen 1506 is used to implement display functions, such as displaying a user interface. The camera module 1507 is used to implement shooting functions, such as shooting images and videos. The audio module 1508 is used to implement audio functions, such as playing audio and collecting voice. The power module 1509 is used to implement power management functions, such as charging the battery, powering the device, monitoring the battery status, etc. The sensor module 1510 may include a depth sensor 15101, a speed sensor 15102, a gyroscope sensor 15103, an air pressure sensor 15104, etc., to implement corresponding sensing detection functions.

[0135] Those skilled in the art will appreciate that various aspects of the present disclosure may be implemented as systems, methods or program products. Therefore, various aspects of the present disclosure may be specifically implemented in the following forms, namely: complete hardware implementation, complete software implementation (including firmware, microcode, etc.), or a combination of hardware and software, which may be collectively referred to herein as "circuits", "modules" or "systems".

[0136] In particular, according to an embodiment of the present disclosure, the process described above with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present disclosure includes a computer program product, which includes a computer program carried on a computer-readable storage medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network, and / or installed based on a removable medium. When the computer program is executed by a central processing unit (CPU), various functions defined in the method and apparatus of the present application are executed.

[0137] The exemplary embodiments of the present disclosure also provide a computer-readable storage medium on which a program product capable of implementing the above-mentioned method of the present specification is stored. In some possible implementations, various aspects of the present disclosure can also be implemented in the form of a program product, which includes program code. When the program product is run on a terminal device, the program code is used to enable the terminal device to execute the steps according to various exemplary embodiments of the present disclosure described in the above-mentioned "Exemplary Method" section of the present specification, for example, it can execute Figure 1 Any one or more steps in .

[0138] The computer-readable medium shown in the present disclosure may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to, an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0139] In the present disclosure, a computer-readable storage medium may be any tangible medium containing or storing a program that may be used by or in combination with an instruction execution system, apparatus, or device. In the present disclosure, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, which carries a computer-readable program code. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium, which may send, propagate, or transmit a program for use by or in combination with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium may be transmitted using any suitable medium, including but not limited to: wireless, wire, optical cable, RF, etc., or any suitable combination of the above.

[0140] In addition, program code for performing the operations of the present disclosure may be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java, C++, etc., and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, as a separate software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server. In cases involving a remote computing device, the remote computing device may be connected to the user computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computing device (e.g., through the Internet using an Internet service provider).

[0141] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary technical means in the art that are not disclosed in the present disclosure. The specification and examples are to be considered exemplary only, and the true scope and spirit of the present disclosure are indicated by the claims.

[0142] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A data storage method, characterized in that: include: Acquire real-time data to be stored, and write the real-time data to be stored into the memory ring buffer according to the position to be written indicated by the first pointer of the memory ring buffer to generate cache data; According to the length of the real-time data to be stored, updating the first pointer of the memory ring buffer; When a preset condition is met, the cache data in the memory ring buffer is written into the external memory; Among them, the preset conditions include one or more of the following: the length of the cached data reaches a first preset length, the time from the last time the cached data was written to the external memory to the current time reaches a first preset length, the first preset length is less than the length of the memory ring buffer, the memory ring buffer has a fixed start position and a fixed end position in the memory, the memory ring buffer occupies continuous actual storage space in the memory, and the length of the memory ring buffer is determined according to the fixed start position and the fixed end position.

2. The data storage method according to claim 1, characterized in that: The memory ring buffer is configured with a second pointer, the second pointer is used to indicate a to-be-read position of the memory ring buffer, and the remaining space length of the memory ring buffer is determined according to the to-be-written position and the to-be-read position of the memory ring buffer; The step of acquiring the real-time data to be stored and writing the real-time data to be stored into the memory ring buffer according to the position to be written indicated by the first pointer in the memory buffer to generate cache data includes: Acquire real-time data to be stored. When the length of the real-time data to be stored is less than the remaining space length of the memory ring buffer, write the real-time data to be stored into the memory ring buffer according to the position to be written indicated by the first pointer in the memory buffer to generate cache data.

3. The data storage method according to claim 2, characterized in that: Writing the cache data in the memory ring buffer into the external memory includes: The cache data is read from the memory ring buffer in a direction from the position to be read indicated by the first pointer to the position to be written indicated by the second pointer, so as to write the cache data in the range from the position to be read to the position to be written into the external memory, and the second pointer is updated according to the length of the cache data read.

4. The data storage method according to claim 3, characterized in that: The method further comprises: When the to-be-read position indicated by the updated second pointer is the same as the to-be-written position indicated by the first pointer, it is determined that all cache data stored in the memory ring buffer has been written into the external memory.

5. The data storage method according to claim 1, characterized in that: The acquiring of real-time data to be stored and writing the real-time data to be stored into the memory ring buffer according to the position to be written indicated by the first pointer of the memory ring buffer to generate cache data comprises: Acquire real-time data to be stored, and when the position to be written indicated by the first pointer coincides with the fixed end position and the length of the real-time data to be stored is less than the length of the remaining space of the memory ring buffer, write the real-time data to be stored into the memory ring buffer according to the fixed start position to generate cache data.

6. The data storage method according to claim 1, characterized in that: Writing the cache data in the memory ring buffer into the external memory includes: Based on the mutual exclusion lock, the cache data in the memory ring buffer is written into the external memory in batches.

7. The data storage method according to claim 6, characterized in that: The method of writing the cache data in the memory ring buffer to the external memory in batches based on the mutex lock includes: Based on the mutual exclusion lock, the cache data of the second preset length is read each time, so as to write the cache data in the memory ring buffer into the external memory in batches; or Based on the mutual exclusion lock, the cache data is read each time based on the second preset time length, so as to write the cache data in the memory ring buffer into the external memory in batches.

8. The data storage method according to claim 1, characterized in that: Writing the cache data in the memory ring buffer into the external memory includes: The cache data stored in the memory ring buffer is compressed to write the compressed cache data into the external memory.

9. The data storage method according to claim 1, characterized in that: The real-time data to be stored includes any one of log data, serial port receiving and sending data, network data processed by a network card, communication data between tasks, audio stream data, and video stream data.

10. A data storage device, characterized in that: include: A memory writing module is configured to obtain real-time data to be stored, and write the real-time data to be stored into the memory ring buffer according to the position to be written indicated by the first pointer of the memory ring buffer to generate cache data; A first pointer updating module is configured to update a first pointer of the memory ring buffer according to the length of the real-time data to be stored; An external storage module is configured to write the cache data in the memory ring buffer into an external memory when a preset condition is met; Among them, the preset conditions include one or more of the following: the length of the cached data reaches a first preset length, the time from the last time the cached data was written to the external memory to the current time reaches a first preset length, the first preset length is less than the length of the memory ring buffer, the memory ring buffer has a fixed start position and a fixed end position in the memory, the memory ring buffer occupies continuous actual storage space in the memory, and the length of the memory ring buffer is determined according to the fixed start position and the fixed end position.

11. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 9 is implemented.

12. An electronic device, characterized in that: include: one or more processors; as well as A memory for storing one or more programs, which, when executed by the one or more processors, enables the one or more processors to implement the method according to any one of claims 1 to 9.