High-sampling-rate multi-channel USB sound card and audio system

Abstract

The invention provides a high-sampling-rate multi-channel USB sound card and an audio system. The high-sampling-rate multi-channel USB sound card is connected with an audio host and comprises a micro-control unit and a multi-channel audio codec connected with the micro-control unit. The micro-control unit is provided with a high-speed USB interface, an I2S interface, an audio channel selection switch and a timer; the high-speed USB interface is connected with an audio host; the I2S interface is connected with the multi-channel audio codec; first high-speed multi-channel audio data of the audio host is transmitted to the multi-channel audio codec through the high-speed USB interface and the I2S interface in sequence for audio playing; and second high-speed multi-channel audio data of the multi-channel audio codec is transmitted to the audio host through the I2S interface and the high-speed USB interface in sequence so as to carry out audio recording. According to the invention, the USB sound card is realized through the universal micro-control unit, recording and playing of high-sampling-rate multi-channel audio data can be supported, and the USB sound card has high universality and can flexibly adapt to different application requirements.

Description

Technical Field

[0001] The present application relates to the technical field of audio information processing, and in particular to a high sampling rate multi-channel USB sound card and an audio system. Background Art

[0002] Higher audio sampling rates and channels make recording and sound transmission more high-definition, rich and realistic. At present, existing terminal devices such as computers and mobile phones cannot achieve higher-definition recording, nor can they achieve high-sampling rate and multi-channel audio playback, which makes it difficult to meet the market demand in the professional audio field. Using USB AUDIO devices to expand professional recording sound cards is one of the best choices.

[0003] In the USB protocol, there is a class called USB AUDIO CLASS (UAC). In order to better support high-speed audio devices, the UAC2.0 standard came into being. Under the high-speed USB standard endpoint, it supports up to 384KHz / 32Bit / 5Channel or 192KHz / 32Bit / 10Channel audio data, which greatly improves the sound quality and number of channels, and can provide users with a better sound experience. Currently, the existing high-sampling rate, multi-channel audio data processing devices usually use XMOS dedicated audio processing chips, which have excellent performance and powerful functions, but are expensive and have poor replaceability. Summary of the invention

[0004] In view of the above-mentioned shortcomings of the prior art, the purpose of this application is to provide a high sampling rate multi-channel USB sound card and audio system, which is used to solve the problem that the existing sound cards generally use XMOS dedicated audio processing chips, which have poor economy and versatility.

[0005] To achieve the above-mentioned purpose and other related purposes, the first aspect of the present application provides a high sampling rate multi-channel USB sound card, which is connected to an audio host, including: a micro control unit and a multi-channel audio codec connected to the micro control unit; wherein the micro control unit is configured with a high-speed USB interface, an I2S interface, an audio channel selection switch and a timer; the high-speed USB interface is connected to the audio host; the I2S interface is connected to the multi-channel audio codec; the micro control unit establishes a playback buffer and a recording buffer for audio data transmission between interfaces; after the audio host starts audio playback, a first high-speed multi-channel audio data received from the audio host through the high-speed USB interface is received The data are sequentially stored in the playback buffer so that the I2S interface can sequentially obtain the first high-speed multi-channel audio data from the playback buffer according to the first audio channel number configured by the audio channel selection switch under the control of the timer and transmit it to the multi-channel audio codec; after the audio host starts audio recording, the second high-speed multi-channel audio data from the multi-channel audio codec obtained by the I2S interface under the control of the timer is sequentially stored in the recording buffer according to the second audio channel number configured by the audio channel selection switch, so that the high-speed USB interface can sequentially obtain the second high-speed multi-channel audio data from the recording buffer and transmit it to the audio host.

[0006] In some embodiments of the first aspect of the present application, the playback buffer is composed of multiple playback sub-buffers; the playback buffer is configured with a first data storage index, a first data sending index and a playback buffer address index to assist in writing and acquiring first high-speed multi-channel audio data; the recording buffer is composed of multiple recording sub-buffers; the recording buffer is configured with a second data storage index, a second data sending index and a recording buffer address index to assist in writing and acquiring second high-speed multi-channel audio data; wherein each index is initialized by the high-speed USB interface.

[0007] In some embodiments of the first aspect of the present application, the audio host sends the first high-rate multi-channel audio data in the form of audio data packets at certain time intervals; the process of storing the first high-rate multi-channel audio data into the playback buffer in sequence specifically includes: each time an audio data packet is received through the high-speed USB interface, the audio data packet is stored in the playback sub-buffer corresponding to the current value of the first data storage index, and a USB interrupt is generated after the storage is completed to update the first data storage index.

[0008] In some embodiments of the first aspect of the present application, when an I2S interface start flag appears in the interrupt processing function of the timer, the I2S interface starts to sequentially obtain the first high-speed multi-channel audio data from the playback buffer; wherein, when the cached number of data packets in the playback buffer is equal to the set I2S start depth, the I2S interface start flag is set by the high-speed USB interface.

[0009] In some embodiments of the first aspect of the present application, the I2S interface module obtains the first high-rate multi-channel audio data from the playback buffer in sequence according to the first audio channel number configured by the audio channel selection switch under the control of the timer. The process specifically includes: each time a timer interrupt is triggered, according to the current value of the playback buffer address index, a corresponding frame of audio data is obtained from the playback sub-buffer corresponding to the current value of the first data sending index and written into the sending FIFO area of ​​the I2S interface; wherein the length of a frame of audio data depends on the first audio channel number configured by the audio channel selection switch; after writing is completed, the playback buffer address index is numerically updated; when all the audio data in the sub-buffer corresponding to the current value of the first data sending index is obtained, the first data sending index is numerically updated.

[0010] In some embodiments of the first aspect of the present application, when an I2S interface receiving flag appears in the interrupt processing function of the timer, the second high-speed multi-channel audio data is stored in the recording buffer in sequence through the I2S interface; wherein, after the audio host starts audio recording, the I2S interface receiving flag is set by the high-speed USB interface.

[0011] In some embodiments of the first aspect of the present application, according to the second audio channel number configured by the audio channel selection switch, the process of sequentially storing the second high-rate multi-channel audio data from the multi-channel audio codec obtained by the I2S interface under the control of the timer into the recording buffer specifically includes: each time a timer interrupt is triggered, according to the current value of the recording buffer address index, writing a corresponding frame of audio data obtained from the receiving FIFO area of ​​the I2S interface into the recording sub-buffer corresponding to the current value of the second data storage index; wherein the length of a frame of audio data depends on the second audio channel number configured by the audio channel selection switch; after writing is completed, the recording buffer address index is numerically updated; when the amount of audio data in the recording sub-buffer corresponding to the current value of the second data storage index is equal to the set maximum data packet length, the second data storage index is numerically updated.

[0012] In some embodiments of the first aspect of the present application, the process of the high-speed USB interface sequentially obtaining the second high-speed multi-channel audio data from the recording buffer specifically includes: when it is determined that the data in the recording buffer is not empty and there is no busy flag in the USB transaction, the second high-speed multi-channel audio data is sequentially obtained from each recording sub-buffer of the recording buffer by numerically updating the second data sending index.

[0013] In some embodiments of the first aspect of the present application, the multi-channel audio codec includes: an analog-to-digital converter and a digital-to-analog converter; wherein the digital-to-analog converter is used to convert the first high-rate multi-channel audio data received through the I2S interface into analog audio data for audio playback by an audio playback device; and the analog-to-digital converter is used to convert the sound analog signal collected by a recording device into a second high-rate multi-channel audio data for audio recording by an audio host.

[0014] To achieve the above-mentioned purpose and other related purposes, the second aspect of the present application provides an audio system, including: the high sampling rate multi-channel USB sound card as described above and an audio host connected to the high sampling rate multi-channel USB sound card.

[0015] As described above, the high sampling rate multi-channel USB sound card and audio system of the present application have the following beneficial effects:

[0016] The present application implements a USB sound card through a universal microcontroller unit, which can support the recording and playback of high-sampling-rate multi-channel audio data, and has a high degree of versatility and can flexibly adapt to different application requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 Shown is a schematic diagram of the structure of a high sampling rate multi-channel USB sound card in one embodiment of the present application.

[0018] Figure 2 Shown is a waveform diagram of a frame of data signal of 8-channel input and output of an I2S interface in a specific embodiment of the present application.

[0019] Figure 3 Shown is a schematic diagram of the structure of the playback buffer in one embodiment of the present application.

[0020] Figure 4 Shown is a schematic diagram of the process of initializing the I2S interface in one embodiment of the present application.

[0021] Figure 5 Shown is a schematic diagram of the process of storing an audio data packet into a playback buffer in an embodiment of the present application.

[0022] Figure 6Shown is a schematic diagram of a process of obtaining audio data from a playback buffer via an I2S interface in an embodiment of the present application.

[0023] Figure 7 Shown is a schematic diagram of a frame of audio data stored in 8-channel SDOUT in a specific embodiment of the present application.

[0024] Figure 8 Shown is a schematic diagram of a frame of audio data stored in 4-channel SDOUT in a specific embodiment of the present application.

[0025] Fig. 9 Shown is a schematic diagram of the audio recording workflow in one embodiment of the present application.

[0026] Fig.10 The figure shows a schematic diagram of obtaining an 8-channel SDIN frame of audio data in one embodiment of the present application.

[0027] Fig.11 Shown is a schematic diagram of obtaining a frame of SDIN audio data of 4 channels in a specific embodiment of the present application. DETAILED DESCRIPTION

[0028] The following describes the embodiments of the present application through specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification. The present application can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.

[0029] In the embodiments of the present application, words such as "first" and "second" are used to distinguish the same or similar items with substantially the same functions and effects. Those skilled in the art can understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit the difference.

[0030] It should be noted that in the embodiments of the present application, words such as "exemplary" or "for example" represent examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0031] In the embodiments of the present application, "at least one" refers to one or more, and "plurality" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can represent: a, b, c, ab, ac, bc or abc, where a, b, c can be single or multiple.

[0032] Before further describing the present invention in detail, the nouns and terms involved in the embodiments of the present invention are explained. The nouns and terms involved in the embodiments of the present invention are applicable to the following interpretations:

[0033] <1> USB (Universal Serial Bus): USB is a widely used serial bus protocol for connection and communication between computers and various peripheral devices.

[0034] <2> I2S (Inter-IC Sound): I2S is a serial interface protocol mainly used between audio devices. It is mainly used for the transmission of digital audio data, such as the connection between audio codecs, digital signal processors and audio interfaces. I2S transmission includes three basic signals: serial clock (SCK / BCLK), field selection signal (WS / LRCK) and serial data (SD).

[0035] <3> SPI (Serial Peripheral Interface) is a widely used serial communication protocol for communication between microcontrollers and their peripheral devices.

[0036] <4> FIFO (First In, First Out) is a basic queue data structure that is widely used in computer science and electronic engineering, especially in processing data flow and task scheduling.

[0037] The present application provides a high sampling rate multi-channel USB sound card and an audio system, wherein the high sampling rate multi-channel USB sound card is connected to an audio host and includes: a microcontroller unit and a multi-channel audio codec connected to the microcontroller unit; the microcontroller unit is configured with a high-speed USB interface, an I2S interface, an audio channel selection switch, and a timer; the high-speed USB interface is connected to the audio host; the I2S interface is connected to the multi-channel audio codec; the first high-speed multi-channel audio data of the audio host is sequentially transmitted to the multi-channel audio codec through the high-speed USB interface and the I2S interface for audio playback; the second high-speed multi-channel audio data of the multi-channel audio codec is sequentially transmitted to the audio host through the I2S interface and the high-speed USB interface for audio recording. The present application implements a USB sound card through a universal microcontroller unit, which can support the recording and playback of high sampling rate multi-channel audio data, and has a high degree of versatility and can flexibly adapt to different application requirements.

[0038] To facilitate understanding of the embodiments of the present application, first Figure 1 Detailed description. Figure 1 A schematic block diagram of a high sampling rate multi-channel USB sound card in an embodiment of the present invention is shown.

[0039] The high sampling rate multi-channel USB sound card in this embodiment includes:

[0040] A micro control unit 1 (MCU) and a multi-channel audio codec 2 (Multi-Channel CODEC) connected to the micro control unit 1;

[0041] The microcontroller unit 1 is provided with a high-speed USB interface 11, an I2S interface 12, an audio channel selection switch 13 and a timer 14; the high-speed USB interface 11 is connected to the audio host; the I2S interface 12 is connected to the multi-channel audio codec 2; the microcontroller unit 2 establishes a play buffer and a recording buffer for audio data transmission between interfaces;

[0042] After the audio host starts audio playback, the first high-rate multi-channel audio data received from the audio host through the high-speed USB interface 11 is sequentially stored in the playback buffer, so that the I2S interface 12, under the control of the timer 14, sequentially obtains the first high-rate multi-channel audio data from the playback buffer according to the first audio channel number configured by the audio channel selection switch 13 and transmits it to the multi-channel audio codec 2;

[0043] After the audio host starts audio recording, the second high-rate multi-channel audio data from the multi-channel audio codec 2 obtained by the I2S interface 12 under the control of the timer 14 is stored in the recording buffer in sequence according to the second audio channel number configured by the audio channel selection switch 13, so that the high-speed USB interface 11 can sequentially obtain the second high-rate multi-channel audio data from the recording buffer and transmit it to the audio host.

[0044] In one embodiment, a high sampling rate multi-channel USB sound card can be connected to an audio playback device or a recording device; wherein the types of audio playback devices include but are not limited to speakers, etc., and the types of recording devices include but are not limited to microphones, etc.

[0045] In one embodiment, the micro control unit may be any type of micro control unit, which is not limited in the present invention.

[0046] In one embodiment, if Figure 2 As shown, the multi-channel audio codec 2 includes: an analog-to-digital converter (DAC) and a digital-to-analog converter (ADC); wherein the digital-to-analog converter 21 is used to convert the first high-rate multi-channel audio data received through the I2S interface 12 into analog audio data for audio playback by an audio playback device; the analog-to-digital converter 22 is used to convert the sound analog signal collected by a recording device into a second high-rate multi-channel audio data for audio recording by an audio host.

[0047] In a specific embodiment, the high-rate multi-channel audio data is generally audio data with a sampling rate of 32 bits and 192 kHz and 8 channels, or audio data with a sampling rate of 32 bits and 384 kHz and 4 channels.

[0048] It should be understood that the present invention does not impose specific limitations on the sampling rate and the number of audio channels, as long as the maximum data packet length calculated based on the sampling rate and the number of audio channels does not exceed 1024 bytes, the number of audio channels does not exceed 8, and the sampling rate does not exceed 384KHz.

[0049] In one embodiment, the maximum packet size (MPS) is calculated using the following formula 1:

[0050] MPS=S×C×b×P; (Formula 1)

[0051] Among them, S represents the sampling rate, C represents the number of channels, B represents the number of bytes per channel, and P represents the communication period.

[0052] For example, the communication cycle is generally 125us. For audio data with a sampling rate of 32 bits and 192KHz and 8 channels, the corresponding maximum data packet length MPS=192000×8×(32 / 8)×0.000125=768Bytes; for audio data with a sampling rate of 32 bits and 384KHz and 4 channels, the corresponding maximum data packet length MPS=384000×4×(32 / 8)×0.000125=768Bytes.

[0053] In one embodiment, the audio channel selection switch 13 selects the number of audio channels through GPIO input.

[0054] In one embodiment, the high-speed USB interface 12 meets the USB 2.0 protocol specification, so that the high-sampling rate multi-channel USB sound card is a UAC2.0 audio device for communicating with the audio host. The USB descriptor is dynamically configured according to the GPIO audio channel number selection value, and informs the audio host of the parameter characteristics of the high-sampling rate multi-channel USB sound card, for example, the audio channel value is 4 and the maximum sampling rate is 32 bits 384KHz, or the audio channel number is 8 and the maximum sampling rate is 32 bits 192KHz. After the high-sampling rate multi-channel USB sound card is connected to the audio host, the audio host will enumerate an M-channel speaker SPEAKER and an M-channel microphone MIC, and the M value is the GPIO audio channel number selection value.

[0055] In a specific embodiment, if Figure 2 As shown, the I2S interface has 4 transmit data signals SDOUT[0:-3] and 4 receive data signals SDIN[0:-3]. Each transmit signal has an output FIFO buffer of 8 words deep and 32 bits wide, and each receive signal has an input FIFO buffer of 8 words deep and 32 bits wide. MCLK is the master clock signal, which is the driving clock of the multi-channel audio codec (Multi-Channel CODEC). LRCLK is the frame control clock signal, which indicates the start of the frame and controls the data of the left and right channels. The 4 data signal lines correspond to 8 channels of audio data. BCLK is the bit clock signal, which drives the input and output of the data bits.

[0056] It should be understood that the I2S interface can support data protocol formats such as the Philips standard, the MSB alignment standard, the LSB alignment standard, and the PCM standard. For example, the waveform of a frame of data signal of an 8-channel input / output of an I2S interface using the MSB alignment standard is as follows: Figure 2 shown.

[0057] In one embodiment, if Figure 2As shown, in each LRCLK cycle, each transmission data signal SDOUT consumes two words of data, and each reception data signal SDIN generates two words of data. For 8 channels, there are 4 transmission data signals SDOUT and 4 reception data signals SDIN, and the 4 transmission data signals SDOUT consume a total of 8 words of data, and the 4 reception data signals SDIN generate a total of 8 words of data; for 4 channels, there are 2 transmission data signals SDOUT and 2 reception data signals SDIN, and the 2 transmission data signals SDOUT consume a total of 4 words of data, and the 2 reception data signals SDIN generate a total of 4 words of data.

[0058] In one embodiment, the SPI in the microcontroller unit 1 is used as a control signal of a multi-channel audio codec, with an operating frequency of 8 MHz, to configure the operating clock frequency, audio data sampling rate, and number of channels of the multi-channel audio codec, and can adjust the volume and set mute.

[0059] In one embodiment, the LRCLK signal of I2S is used as the clock source of the timer (GPTMR) 13, and the start edge of the L channel is valid. GPTMR generates a timer interrupt, and in its interrupt processing function (GPTMR_ISR), the data transmission between the high-speed USB interface and the I2S interface is completed.

[0060] In one embodiment, the playback buffer is composed of multiple playback sub-buffers; the playback buffer is configured with a first data storage index, a first data sending index and a playback buffer address index to assist in writing and acquiring first high-speed multi-channel audio data; the recording buffer is composed of multiple recording sub-buffers; the recording buffer is configured with a second data storage index, a second data sending index and a recording buffer address index to assist in writing and acquiring second high-speed multi-channel audio data; wherein each index is initialized by the high-speed USB interface.

[0061] In one embodiment, the following may be used: Figure 3 The ring buffer shown is used as a recording buffer. The buffer has n sub-buffers (BUF0, BUF1, ..., BUFn). The buffer is equipped with a Rear index (first data storage index) and a Front index (first data transmission index). The Rear index is used to assist the storage of data in the ring buffer, and the Front index is used to assist the retrieval of data from the ring buffer.

[0062] Specifically, when the current value of the Rear index plus 1 equals the number of sub-buffers in the ring buffer, it means the ring buffer is full, and the Rear index is set to 0; when the Rear index equals the Front index, it means the ring buffer is empty; when the current value of the Rear index plus 1 equals the Front index, it means the ring buffer is full. The Rear index and the Front index are used to help determine how many packets of data are in the ring buffer.

[0063] It should be noted that the recording buffer may also adopt a ring buffer with the same structure, which will not be described in detail here.

[0064] In a specific embodiment, the playback buffer has 16 playback sub-buffers (BUF0-BUF15), each sub-buffer has a length of 786 bytes; the recording buffer has 16 recording sub-buffers (BUF0-BUF15), each sub-buffer has a length of 786 bytes.

[0065] In one embodiment, before starting data transmission of the I2S interface, the I2S interface needs to be initialized; wherein the initialization process is as follows: Figure 4 As shown, specifically including:

[0066] Configure the clock of the I2S interface according to the configured sampling rate and the number of audio channels; fill 0 into the output FIFO buffer of each channel sending data signal SDOUT in the I2S interface, and fill up each output FIFO buffer; clear the input FIFO buffer of each channel receiving signal SDIN in the I2S interface.

[0067] In one embodiment, the audio host sends the first high-rate multi-channel audio data in the form of audio data packets at certain time intervals; the process of storing the first high-rate multi-channel audio data in the playback buffer in sequence specifically includes: whenever an audio data packet is received through the high-speed USB interface, the audio data packet is stored in the playback sub-buffer corresponding to the current value of the first data storage index, and a USB interrupt is generated after the storage is completed to update the first data storage index.

[0068] In one embodiment, when an I2S interface start flag appears in the interrupt processing function of the timer, the I2S interface starts to sequentially obtain the first high-speed multi-channel audio data from the playback buffer; wherein, when the cached number of data packets in the playback buffer is equal to the set I2S start depth, the I2S interface start flag is set by the high-speed USB interface.

[0069] In one embodiment, the process in which the I2S interface module sequentially obtains the first high-rate multi-channel audio data from the playback buffer according to the first audio channel number configured by the audio channel selection switch under the control of the timer specifically includes: each time a timer interrupt is triggered, according to the current value of the playback buffer address index, a corresponding frame of audio data is obtained from the playback sub-buffer corresponding to the current value of the first data transmission index and written into the transmission FIFO area of ​​the I2S interface; wherein the length of one frame of audio data depends on the first audio channel number configured by the audio channel selection switch; after writing is completed, the playback buffer address index is numerically updated; when all the audio data in the sub-buffer corresponding to the current value of the first data transmission index is obtained, the first data transmission index is numerically updated.

[0070] In one embodiment, the value that the play buffer address index increases each time is related to the length of a frame of audio data.

[0071] In one embodiment, the data of the high-speed USB interface and the I2S interface need to be synchronized to avoid data overflow or loss. For example, within 125us, the audio host sends a 768-byte audio data packet to the sound card through the high-speed USB interface, and the I2S interface also consumes 768 bytes of audio data; within 125us, the I2S interface generates 768 bytes of audio data, and the sound card sends 768 bytes of audio data to the audio host through the high-speed USB interface.

[0072] The following will be combined with the attached Figure 5 And attached Figure 6 , explains the audio playback process:

[0073] After the audio host starts audio playback, the high-speed USB interface receives a startup instruction and then initializes the first data storage index, the first data sending index, and the playback buffer address index to 0.

[0074] The USB transaction of UAC2.0 is synchronous transmission. Under the standard endpoint, the audio host sends an audio data packet to the sound card through the high-speed USB interface every 125us, and then stores the audio data packet in the sub-buffer corresponding to the current value of the first data storage index in the playback buffer. Then, after the storage is completed, a USB interrupt is generated. In USB_ISR (Universal Serial Bus Interrupt Service Routine), the first data storage index is increased by 1. Repeat the above data packet storage process until the number of data packets in the playback buffer is equal to the set I2S startup depth, and the I2S interface startup flag is set by the high-speed USB interface.

[0075] It should be understood that for a playback buffer with n sub-buffers, the I2S startup depth can be set to n / 4, n / 2 or 3n / 4. Generally, the I2S startup depth is set to n / 2, which can better determine whether the data transmission between the high-speed USB interface and the I2S interface is synchronized. The purpose of caching the data packet before starting the I2S interface to transmit data is to avoid data loss caused by fluctuation errors between the master clock of the I2S interface and the master clock of the high-speed USB interface, to ensure that there is always data in the playback buffer when the I2S interface obtains data, and to synchronize the audio stream for the subsequent audio host and the USB recording sound card.

[0076] When the I2S interface start flag does not appear in the interrupt processing function of the timer, 0 is written to the transmit FIFO buffer of each SDOUT of the I2S interface, and the transmit FIFO buffer is filled.

[0077] When the I2S interface start flag appears in the timer interrupt processing function, the I2S interface starts to obtain the first high-speed multi-channel audio data from the playback buffer in sequence. The timer timing period is set to 1, that is, each L channel start edge of LRCLK triggers a timer interrupt. Whenever a timer interrupt (GPTMR interrupt) is triggered, the timer interrupt processing function (GPTMR_ISR) controls the I2S interface to obtain a frame of audio data from the playback buffer.

[0078] The following describes the data acquisition process of the I2S interface by taking audio data with a sampling rate of 32 bits and 192 kHz and 8 channels and audio data with a sampling rate of 32 bits and 384 kHz and 4 channels as examples.

[0079] (a) Audio data with a sampling rate of 32 bits and 192 kHz and 8 channels:

[0080] The 8 words of data stored continuously in the playback sub-buffer are the 8-channel audio data. Whenever a timer interrupt is triggered, such as Figure 7 As shown, the play sub-buffer where the data to be acquired this time is located is determined according to the current value of the first data transmission index, and the address of a frame of audio data to be acquired this time is determined according to the play buffer address index, and then 8 words of data (a frame of audio data) are acquired from the play buffer according to the determined address, and then the 8 words of data taken out are sequentially written into the 4-way SDOUT transmission FIFO buffer (that is, two words of data are written into the transmission FIFO buffer of each SDOUT), and the writing of the frame of audio data is completed at this time. Then the value of the play buffer address index is updated so that the play buffer address index points to the address of the next frame of audio data to be acquired.

[0081] The data length of the play sub-buffer is 768 bytes, a total of 768 / 4 = 192 words, each timer interrupt takes away 8 words (32 bytes), the play buffer address index increases by 32, a total of 24 timer interrupts will take away all the data of a sub-buffer, at this time the value of the first data transmission index increases by 1, pointing to the next play sub-buffer. For a 192KHz sampling rate, the time corresponding to 24 timer interrupts is exactly 125us, which is synchronized with the speed at which the high-speed USB interface receives data.

[0082] (b) Audio data with a sampling rate of 32 bits and 384 kHz and 4 channels:

[0083] The 4 words of data stored continuously in the playback sub-buffer are the 4-channel audio data. Whenever a timer interrupt is triggered, such as Figure 8 As shown, the play sub-buffer where the data to be acquired this time is located is determined according to the current value of the first data transmission index, and the address of a frame of audio data to be acquired this time is determined according to the play buffer address index, and then 4 words of data (a frame of audio data) are acquired from the play buffer according to the determined address, and then the 4 words of data taken out are sequentially written into the 2-way SDOUT transmission FIFO buffer (that is, two words of data are written into the SDOUT0 and SDOUT1 transmission FIFO buffers respectively), and the writing of the frame of audio data is completed at this time. Then the value of the play buffer address index is updated so that the play buffer address index points to the address of the next frame of audio data to be acquired.

[0084] The data length of the play sub-buffer is 768 bytes, a total of 768 / 4 = 192 words. Each timer interrupt takes away 4 words (16 bytes), and the play buffer address index is increased by 16. A total of 48 timer interrupts will take away all the data of a play sub-buffer. At this time, the value of the first data transmission index is increased by 1, pointing to the next play sub-buffer. For a 384KHz sampling rate, the time corresponding to 48 timer interrupts is exactly 125us, which is synchronized with the speed at which the high-speed USB interface receives data. When the audio host stops audio playback and the high-speed USB interface receives the stop command, after the I2S interface obtains all the audio data in the play buffer, that is, after the play buffer is empty, the I2S interface start flag is cleared.

[0085] In one embodiment, when an I2S interface receiving flag appears in the interrupt processing function of the timer, the second high-speed multi-channel audio data is sequentially stored in the recording buffer through the I2S interface; wherein, after the audio host starts audio recording, the I2S interface receiving flag is set by the high-speed USB interface.

[0086] In one embodiment, according to the second audio channel number configured by the audio channel selection switch, the process of sequentially storing the second high-rate multi-channel audio data from the multi-channel audio codec obtained by the I2S interface under the control of the timer into the recording buffer specifically includes: each time a timer interrupt is triggered, according to the current value of the recording buffer address index, writing a corresponding frame of audio data obtained from the receiving FIFO area of ​​the I2S interface into the recording sub-buffer corresponding to the current value of the second data storage index; wherein the length of one frame of audio data depends on the second audio channel number configured by the audio channel selection switch; after writing is completed, updating the value of the recording buffer address index; when the amount of audio data in the recording sub-buffer corresponding to the current value of the second data storage index is equal to the set maximum data packet length, updating the value of the second data storage index.

[0087] In one embodiment, the process of the high-speed USB interface sequentially obtaining the second high-speed multi-channel audio data from the recording buffer specifically includes: when it is determined that the data in the recording buffer is not empty and there is no busy flag in the USB transaction, the second high-speed multi-channel audio data is sequentially obtained from each recording sub-buffer of the recording buffer by numerically updating the second data sending index.

[0088] The following will be combined with the attached Fig. 9 The process of audio recording is explained as follows:

[0089] After the audio host starts audio recording, the high-speed USB interface receives the start instruction, then initializes the second data storage index, the second data sending index and the recording buffer address index to 0, and sets the I2S interface receiving flag.

[0090] When the I2S interface receiving flag does not appear in the interrupt processing function of the timer, all data in each SDIN of the I2S interface are discarded.

[0091] When the I2S interface receiving flag appears in the timer interrupt processing function, the data in each SDIN of the I2S interface starts to be stored in the recording buffer. The timer timing period is set to 1, that is, each L channel start edge of LRCLK triggers a timer interrupt. Whenever a timer interrupt (GPTMR interrupt) is triggered, the timer interrupt processing function (GPTMR_ISR) controls the storage of a frame of audio data obtained from each SDIN of the I2S interface into the recording buffer.

[0092] The following describes the data acquisition process of the I2S interface by taking audio data with a sampling rate of 32 bits and 192 kHz and 8 channels and audio data with a sampling rate of 32 bits and 384 kHz and 4 channels as examples.

[0093] (a) Audio data with a sampling rate of 32 bits and 192 kHz and 8 channels:

[0094] Each SDIN receive FIFO buffer has 2 words of data, representing 2 channels of data. 4 SDINs have 8 channels of data. Whenever a timer interrupt is triggered, Fig.10 As shown, the recording sub-buffer where the data to be stored this time is located is determined according to the current value of the second data storage index, the address of a frame of audio data to be stored this time is determined according to the recording buffer address index, and then the acquired 8 words of data are sequentially written into the recording buffer according to the determined address, and the writing of the frame of audio data is completed at this time. Then, the value of the recording buffer address index is updated so that the playback buffer address index points to the address where the next frame of audio data is to be stored.

[0095] The data length of the recording sub-buffer is 768 bytes, a total of 768 / 4 = 192 words, each timer interrupt obtains 8 words (32 bytes), the value of the recording buffer address index is added by 32, a total of 24 timer interrupts will fill a recording sub-buffer, at this time the value of the second data storage index is increased by 1, pointing to the next recording sub-buffer. For a 192KHz sampling rate, the time corresponding to 24 timer interrupts is exactly 125us, which is synchronized with the speed at which the high-speed USB interface sends data.

[0096] (b) Audio data with a sampling rate of 32 bits and 384 kHz and 4 channels:

[0097] Each SDIN receive FIFO buffer has 2 words of data, representing 2 channels of data. 2 SDINs have 4 channels of data. Whenever a timer interrupt is triggered, Fig.11 As shown, the recording sub-buffer where the data to be stored this time is located in the recording buffer is determined according to the current value of the second data storage index, and the address of a frame of audio data (a frame of MIC data) to be stored this time is determined according to the recording buffer address index, and then the acquired 4-word data is sequentially written into the recording buffer according to the determined address, and the writing of the frame of audio data is completed at this time. Then, the value of the recording buffer address index is updated so that the playback buffer address index points to the address where the next frame of audio data is to be stored.

[0098] The data length of the recording sub-buffer is 768 bytes, a total of 768 / 4 = 192 words, each timer interrupt obtains 4 words (16 bytes), the value of the recording buffer address index is increased by 16, a total of 48 timer interrupts will fill a recording sub-buffer, at this time the value of the second data storage index is increased by 1, pointing to the next sub-buffer. For a 192KHz sampling rate, the time corresponding to 48 timer interrupts is exactly 125us, which is synchronized with the speed at which the high-speed USB interface sends data.

[0099] When it is determined that the data in the recording buffer is not empty and there is no busy flag in the USB IN transaction, the USB IN transaction is started. The USB IN transaction refers to the process of sending data from the high-speed USB interface to the audio host. After the audio data in the sub-buffer corresponding to the current value of the second data sending index is sent to the audio host, the busy flag of the USB IN transaction is set, and then the value of the second data sending index is increased by 1. All data transmission in the recording buffer is completed (USB IN transaction transmission is completed), and a USB interrupt is generated. In the USB interrupt, the busy flag of the USB IN transaction is cleared. When the audio host stops audio recording and the high-speed USB interface receives the stop command, the I2S interface reception flag is cleared.

[0100] In one embodiment, since the clock of the audio host and the clock of the high-speed USB interface cannot be completely and accurately synchronized, a fixed direction of drift will occur during long-term operation, resulting in data overflow or loss. When the data of the high-speed USB interface and the I2S interface are not synchronized, any of the following methods can be used for data synchronization:

[0101] First way:

[0102] Dynamically adjust the clock frequency of the I2S interface according to the number of valid audio data packets in the playback buffer. When the number of valid audio data packets in the playback buffer exceeds 3 / 4 of the number of sub-buffers in the playback buffer, increase the clock frequency of the I2S interface; when the number of valid audio data packets in the playback buffer is less than 1 / 4 of the number of sub-buffers in the playback buffer, reduce the clock frequency of the I2S interface;

[0103] Second way:

[0104] The actual sampling rate of the sound card is calculated according to the number of valid audio data packets in the playback buffer, such as 191.99KHz or 192.01KHz; the actual sampling rate is notified to the audio host through the USB feedback endpoint, and the audio host adjusts the data transmission amount according to the actual sampling rate, such as sending one more or one less frame of data to the sound card at a certain moment.

[0105] It should be understood that before starting the I2S interface to transmit data, 1 / 2 of the number of sub-buffers of audio data packets are buffered in the play buffer. Ideally, if the clocks of the audio host and the sound card are completely synchronized, the number of data packets in the play buffer will remain at about 1 / 2 of the number of sub-buffers. When the number of audio data packets in the play buffer gradually increases, it means that the audio host clock frequency is faster than the I2S interface clock frequency; when the number of audio data packets in the play buffer gradually decreases, it means that the audio host clock frequency is slower than the I2S interface clock frequency.

[0106] It should be noted that these two methods ensure data synchronization between the high-speed USB interface and the I2S interface, avoiding data overflow or loss.

[0107] In a preferred embodiment, the timing period of the timer is set to M LRCLK cycles, where N is 1 / 4 of the word depth of the FIFO buffer, that is, a timer interrupt is generated when half of the FIFO buffer is used.

[0108] For example, the word depth of the FIFO buffer of each SDOUT and SDIN is 8, so M is 2, that is, a timer interrupt is generated once every 2 LRCLK cycles, so the timer interrupt frequency can be reduced by half. At this time, at each timer interrupt, each SDOUT consumes 4 words of data and each SDIN generates 4 words of data. Because before I2S is started, the I2SSDOUT FIFO is full and the SDIN FIFO is empty, so at the time of the timer interrupt, each SDOUT FIFO still has 4 words of data, and the SDIN FIFO has 4 words of data.

[0109] When getting data from the playback buffer, for 2 LRCLKs, each SDOUT consumes 2 frames of data, so the GPTMR_ISR loops twice to take data out of the playback buffer and fill it into the transmit FIFO buffer of each SDOUT, that is, fill 2 frames of data to fill up the transmit FIFO buffer of each SDOUT; when storing data in the recording buffer, for 2 LRCLKs, each SDIN generates 2 frames of data, so the GPTMR_ISR loops twice to take data out of the receive FIFO buffer of each SDIN and put it into the recording buffer, that is, take away 2 frames of data and empty the receive FIFO buffer of each SDIN.

[0110] It should be noted that when the timer interrupt cycle is one LRCLK cycle, for a sampling rate of 192KHz, the interrupt cycle is approximately 5.208us; for a sampling rate of 384KHz, the interrupt cycle is approximately 2.604us. It can be seen that the interrupt frequency of the timer is very high. When the microcontroller unit enters and exits the interrupt too frequently, the overhead of interrupt push or pop will account for a large part of the CPU usage. At the same time, a short interrupt cycle means that the MCU has less time margin to process tasks in the interrupt processing function of the timer. If the performance of the MCU is weak, it is likely that the task cannot be processed in the interrupt processing function, and thus the expected function cannot be achieved. This embodiment makes full use of the resources of the FIFO buffer, reduces the interrupt cycle of the timer, increases the time for task processing in the interrupt processing function, reduces the CPU usage, allows the MCU to have more time to process other tasks, and also reduces the performance requirements for the MCU.

[0111] Similar to the above embodiment, the present invention further provides an audio system, which includes: a high sampling rate multi-channel USB sound card and an audio host connected to the high sampling rate multi-channel USB sound card.

[0112] It should be noted that, since the principle of structure 2 of the high sampling rate multi-channel USB sound card in this embodiment is the same as that of the high sampling rate multi-channel USB sound card in the above embodiment, it will not be described in detail here.

[0113] In one embodiment, the high sampling rate multi-channel USB sound card can be connected to an audio playback device and also can be connected to a recording device.

[0114] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

[0115] In summary, the present application provides a high sampling rate multi-channel USB sound card and an audio system, wherein the high sampling rate multi-channel USB sound card is connected to an audio host and includes: a microcontroller unit and a multi-channel audio codec connected to the microcontroller unit; the microcontroller unit is configured with a high-speed USB interface, an I2S interface, an audio channel selection switch, and a timer; the high-speed USB interface is connected to the audio host; the I2S interface is connected to the multi-channel audio codec; the first high-speed multi-channel audio data of the audio host is sequentially transmitted to the multi-channel audio codec through the high-speed USB interface and the I2S interface for audio playback; the second high-speed multi-channel audio data of the multi-channel audio codec is sequentially transmitted to the audio host through the I2S interface and the high-speed USB interface for audio recording. The present application realizes the audio input and output functions of the USB sound card through a universal microcontroller unit, has a high degree of versatility, and can flexibly adapt to different application requirements. Therefore, the present application effectively overcomes the limitations of the prior art and has a high industrial utilization value.

[0116] The above embodiments are merely illustrative of the principles and effects of the present application and are not intended to limit the present application. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present application. Therefore, all equivalent modifications or changes made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed in the present application shall still be covered by the claims of the present application.

Claims

1. A high sampling rate multi-channel USB sound card, characterized in that: Connect with audio host, including: A micro control unit and a multi-channel audio codec connected to the micro control unit; Wherein, the micro control unit is configured with a high-speed USB interface, an I2S interface, an audio channel selection switch and a timer; the high-speed USB interface is connected to the audio host; the I2S interface is connected to the multi-channel audio codec; The microcontroller unit establishes a play buffer and a recording buffer for audio data transmission between interfaces; After the audio host starts audio playback, the first high-rate multi-channel audio data received from the audio host through the high-speed USB interface is sequentially stored in the playback buffer, so that the I2S interface, under the control of the timer and according to the first audio channel number configured by the audio channel selection switch, sequentially obtains the first high-rate multi-channel audio data from the playback buffer and transmits it to the multi-channel audio codec; After the audio host starts audio recording, the second high-rate multi-channel audio data from the multi-channel audio codec obtained by the I2S interface under the control of the timer is stored in the recording buffer in sequence according to the second audio channel number configured by the audio channel selection switch, so that the high-speed USB interface can sequentially obtain the second high-rate multi-channel audio data from the recording buffer and transmit it to the audio host.

2. The high sampling rate multi-channel USB sound card according to claim 1, characterized in that: The playback buffer is composed of multiple playback sub-buffers; the playback buffer is configured with a first data storage index, a first data sending index and a playback buffer address index to assist in writing and acquiring first high-speed multi-channel audio data; the recording buffer is composed of multiple recording sub-buffers; the recording buffer is configured with a second data storage index, a second data sending index and a recording buffer address index to assist in writing and acquiring second high-speed multi-channel audio data; wherein each index is initialized by the high-speed USB interface.

3. The high sampling rate multi-channel USB sound card according to claim 2, characterized in that: The audio host sends the first high-rate multi-channel audio data in the form of audio data packets at a certain time interval; and the process of sequentially storing the first high-rate multi-channel audio data into the playback buffer specifically includes: Whenever an audio data packet is received through the high-speed USB interface, the audio data packet is stored in the playback sub-buffer corresponding to the current value of the first data storage index, and a USB interrupt is generated after the storage is completed to update the first data storage index.

4. The high sampling rate multi-channel USB sound card according to claim 3, characterized in that: When an I2S interface start flag appears in the interrupt processing function of the timer, the I2S interface starts to sequentially obtain the first high-speed multi-channel audio data from the playback buffer; wherein, when the cached number of data packets in the playback buffer is equal to the set I2S start depth, the I2S interface start flag is set by the high-speed USB interface.

5. The high sampling rate multi-channel USB sound card according to claim 4, characterized in that: The process of the I2S interface module sequentially acquiring the first high-rate multi-channel audio data from the playback buffer according to the first audio channel number configured by the audio channel selection switch under the control of the timer specifically includes: Whenever a timer interrupt is triggered, a corresponding frame of audio data is obtained from the playback sub-buffer corresponding to the current value of the first data transmission index according to the current value of the playback buffer address index and written into the transmission FIFO area of ​​the I2S interface; wherein the length of a frame of audio data depends on the number of first audio channels configured by the audio channel selection switch; after the writing is completed, the playback buffer address index is numerically updated; When all the audio data in the sub-buffer corresponding to the current value of the first data sending index is acquired, the value of the first data sending index is updated.

6. The high sampling rate multi-channel USB sound card according to claim 2, characterized in that: When an I2S interface receiving flag appears in the interrupt processing function of the timer, the second high-speed multi-channel audio data is sequentially stored in the recording buffer through the I2S interface; wherein, after the audio host starts audio recording, the I2S interface receiving flag is set by the high-speed USB interface.

7. The high sampling rate multi-channel USB sound card according to claim 6, characterized in that: The process of sequentially storing the second high-rate multi-channel audio data from the multi-channel audio codec acquired by the I2S interface under the control of the timer into the recording buffer according to the number of second audio channels configured by the audio channel selection switch specifically includes: Whenever a timer interrupt is triggered, a corresponding frame of audio data obtained from the receiving FIFO area of ​​the I2S interface is written into the recording sub-buffer corresponding to the current value of the second data storage index according to the current value of the recording buffer address index; wherein the length of a frame of audio data depends on the number of second audio channels configured by the audio channel selection switch; after the writing is completed, the recording buffer address index is numerically updated; When the amount of audio data in the recording sub-buffer corresponding to the current value of the second data storage index is equal to the set maximum data packet length, the value of the second data storage index is updated.

8. The high sampling rate multi-channel USB sound card according to claim 7, characterized in that: The process of the high-speed USB interface sequentially acquiring the second high-rate multi-channel audio data from the recording buffer specifically includes: When it is determined that the data in the recording buffer is not empty and there is no busy flag in the USB transaction, the second high-speed multi-channel audio data is sequentially obtained from each recording sub-buffer of the recording buffer by numerically updating the second data sending index.

9. The high sampling rate multi-channel USB sound card according to claim 8, characterized in that: The multi-channel audio codec includes: an analog-to-digital converter and a digital-to-analog converter; Among them, the digital-to-analog converter is used to convert the first high-speed multi-channel audio data received through the I2S interface into analog audio data for the audio playback device to play the audio; the analog-to-digital converter is used to convert the sound analog signal collected by the recording device into the second high-speed multi-channel audio data for the audio host to record the audio.

10. An audio system, characterized in that: include: A high sampling rate multi-channel USB sound card as claimed in any one of claims 1 to 9 and an audio host connected to the high sampling rate multi-channel USB sound card.

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