Method and computing device for generating neural network model and performing circuit simulation

Abstract

Methods and computing devices are presented that generate a neural network model and perform circuit simulation by using the neural network model. The method includes: generating sample data by performing a process simulation based on temperature and process parameters; training a neural network model based on the sample data; performing a lightweight operation of the neural network model to generate a lightweight neural network model; retraining the lightweight neural network model; and performing circuit simulation by using the retrained lightweight neural network model with the process parameters as inputs.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application is based on and claims the benefit of priority of Korean Patent Application No. 10-2023-0093352 filed in the Korean Intellectual Property Office on July 18, 2023, and Korean Patent Application No. 10-2024-0018412 filed in the Korean Intellectual Property Office on February 6, 2024, the disclosures of which are incorporated herein in their entirety by reference. Technical Field

[0003] The present disclosure relates to modeling, and more particularly, to a method and a computing device for generating a neural network model and performing circuit simulation by using the neural network model. Background Art

[0004] As semiconductors have become highly integrated and miniaturized, factors in each stage of designing and manufacturing semiconductor devices interact in a complex manner, and as a result, various undesirable electrical characteristics have appeared in semiconductor devices. Therefore, in order to overcome the limitations of semiconductor processes and devices, understand phenomena, and reduce experimental costs, the demand for technical computer-aided design (TCAD) process-device simulation environments based on physical simulation has been increasing in the semiconductor industry. In addition, in order to provide accurate product specifications for semiconductor devices, it is necessary to predict the characteristics of semiconductor devices and simulate the characteristics of semiconductor devices. Summary of the invention

[0005] The present disclosure provides a method and a computing device for generating a neural network model with improved performance and reduced cost and performing circuit simulation by using the neural network model.

[0006] Modeling techniques can be used to estimate objects or phenomena with causal relationships, and models generated by modeling techniques can be used to predict or optimize objects or phenomena.

[0007] According to some embodiments, a method for generating a neural network model and performing circuit simulation by using the neural network model is provided, the method comprising: generating sample data by performing process simulation based on temperature and process parameters; training the neural network model based on the sample data; performing lightweight operations of the neural network model to generate a lightweight neural network model; retraining the lightweight neural network model; and performing circuit simulation by using the retrained lightweight neural network model with the process parameters as input.

[0008] According to some examples, there is provided a computing device comprising at least one processor and a memory,

[0009] Wherein, the memory stores instructions which, when executed by at least one processor, allow at least one processor to generate a neural network model and perform circuit simulation by using the neural network model, and the at least one processor is configured to: generate sample data by performing process simulation based on temperature and process parameters; train the neural network model based on the sample data; perform lightweight operations of the neural network model to generate a lightweight neural network model; retrain the lightweight neural network model; and perform circuit simulation by using the retrained lightweight neural network model with the process parameters as input.

[0010] According to some examples, a method for generating a neural network model and performing circuit simulation by using the neural network model is provided, the method comprising: generating sample data by performing process simulation based on temperature and process parameters; dividing the sample data into training data and verification data; training the neural network model based on the training data; determining whether the fit between target data and output data of the neural network model is accurate; adjusting parameters of the neural network model until a threshold fit between the target data and the output data is reached; performing lightweight operations of the neural network model to generate a lightweight neural network model; retraining the lightweight neural network model based on the verification data; converting the lightweight neural network model into a format corresponding to a circuit simulator; and performing circuit simulation by using the converted lightweight neural network model with the process parameters as input. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0012] Figure 1 is a flowchart illustrating an example of the operation of a computing system according to some embodiments;

[0013] Figure 2 is a block diagram illustrating an example of a computing system according to some implementations;

[0014] FIG. 3A to FIG. 3C is a flow chart illustrating an example of the operation of a computing system;

[0015] Figure 4 is a diagram showing input data of a neural network model;

[0016] Figure 5 is a diagram illustrating an example of a neural network model according to some embodiments;

[0017] Figure 6 is a diagram illustrating an example of a neural network model according to some embodiments;

[0018] Figure 7 It is shown in detail Figure 1Flow chart of operation S130;

[0019] Figure 8 It is shown in detail Figure 1 Flow chart of operation S150;

[0020] Fig.9A and Fig. 9B is a diagram illustrating lightweight operation;

[0021] Fig.10 is a flow chart illustrating an example of a method of operation of a computing system according to some embodiments;

[0022] Fig.11 is a block diagram illustrating a computing system including a memory storing a program according to some embodiments;

[0023] Fig.12 is a block diagram illustrating a computing system accessing a storage medium storing a program according to some embodiments;

[0024] Fig.13 is a flow chart illustrating an example of a method of operation of a computing system according to some embodiments;

[0025] Fig.14 is a flow chart illustrating an example of a method of manufacturing an integrated circuit according to some embodiments;

[0026] Fig.15A and Fig. 15B is a graph showing results of applying a method of generating a neural network model and performing circuit simulation by using the neural network model according to some embodiments;

[0027] Fig.16A and Fig. 16B is a graph showing the result of a method of applying a neural network model and performing circuit simulation by using the neural network model according to an embodiment;

[0028] and

[0029] Fig.17 is a graph showing a result of applying a method of generating a neural network model and performing circuit simulation by using the neural network model according to an embodiment. DETAILED DESCRIPTION

[0030] Hereinafter, embodiments are described in detail and clearly to such an extent that one of ordinary skill in the art can easily implement the embodiments.

[0031] Figure 1 is a flow diagram illustrating an example of the operation of a computing system according to some implementations.

[0032] Reference Figure 1 A method of generating a neural network model and performing circuit simulation by using the neural network model is described. Figure 2 ) can generate a neural network model NNM (see Figure 2 ) (or device model). The neural network model NNM may be a device model based on a neural network. The computing system 100 may perform circuit simulation (e.g., a simulation program with integrated circuit enhancement (SPICE) simulation) by using the neural network model NNM. The method of generating a neural network model and performing circuit simulation by using the neural network model according to some embodiments may involve a method of optimizing semiconductor processes and designs.

[0033] The computing system 100 may include at least one processor and a non-transitory storage medium storing instructions that, when executed by the at least one processor, allow the at least one processor to generate a neural network model NNM and perform circuit simulation by using the neural network model NNM.

[0034] In the following, various operations performed by at least one processor of the computing system 100 may be implemented directly by hardware, by a software module executed by the processor, or by a combination thereof. When implemented by software, the functions may be stored as one or more instructions or codes on a tangible, non-transitory storage medium. The software module may reside on a random access memory (RAM), a flash memory, a read-only memory (ROM), an electrically programmable ROM (EPROM), an electrically erasable programmable ROM (EEPROM), a register, a hard disk, a removable disk, a CD ROM, or any other form of storage medium.

[0035] The computing system 100 can perform simulation while changing input data. The computing system 100 can perform circuit simulation for an integrated circuit (or circuit) while changing process parameters (or process conditions) and voltage. By using the neural network model NNM, the computing system 100 can perform circuit simulation for an integrated circuit (or circuit) while changing process parameters and voltage through the circuit simulator CS (see Figure 2 ) generates simulation results including current characteristics and charge characteristics.

[0036] The neural network model NNM can be implemented in the computing system 100 to model the semiconductor device (or the characteristics of the semiconductor device). For example, the neural network model NNM can model the performance of a transistor or the characteristics of a transistor. The neural network model NNM can receive voltage and process parameters to output current and charge.

[0037] For example, the neural network model NNM may be implemented in a stand-alone computing system or in a distributed computing system that can communicate with each other through a network or the like. In addition, the neural network model NNM may include a portion implemented by a processor that executes a program including a series of instructions, or may include a portion implemented by logic hardware designed by logic synthesis. In this document, a processor may refer to any hardware-implemented data processing device that includes physically structured circuits to perform predefined operations (including operations expressed as instructions and / or codes included in a program). For example, a data processing device may include a microprocessor, a central processing unit (CPU), a graphics processing unit (GPU), a neural processing unit (NPU), a processor core, a multi-core processor, a multiprocessor, an application-specific integrated circuit (ASIC), an application-specific instruction set processor (ASIP), and a field-programmable gate array (FPGA).

[0038] Reference Figure 1 In operation S110, the computing system 100 may generate sample data based on the temperature and the process parameters. In some embodiments, the computing system 100 may generate sample data by performing a process simulation (e.g., a technical computer-aided design (TCAD) simulation) based on the temperature and the process parameters. The computing system 100 may generate sample data while changing the temperature and the process parameters. The sample data may include simulator input data SIDT (see Figure 2 ) and simulator output data (SODT, SODT1, SODT2, and SODT3) (see Figure 2 ). The simulator input data SIDT can be input to the process simulator PS (see Figure 2 The simulator output data SODT may be data generated and output by the process simulator PS.

[0039] The computing system 100 may generate the simulator output data SODT through the process simulator PS. The computing system 100 may perform process simulation while changing the simulator input data SIDT to generate the simulator output data SODT. The computing system 100 may perform process simulation while changing the process parameters in the simulator input data SIDT. The computing system 100 may perform process simulation while changing the process parameters in consideration of process changes. The process simulator PS may receive the simulator input data SIDT including temperature and process parameters, and may output current-voltage characteristics and charge-voltage characteristics as the simulator output data SODT.

[0040] In some embodiments, the computing system 100 may receive sample data from an external source. For example, the sample data may include measurement data IDT (see Figure 2 ). The computing system 100 can obtain the measurement data from the measuring device 10 (see Figure 2)Receive measurement data IDT.

[0041] In operation S130, the computing system 100 may train the neural network model NNM based on the sample data. In some embodiments, the computing system 100 may train the neural network model NNM based on the difference between the target data in the sample data and the output data. For example, the target data may refer to an expected value or an actual value in the sample data corresponding to the output data of the neural network model NNM. For example, the target data may include simulator output data SODT and measurement data IDT in the sample data. In some embodiments, the computing system 100 may train the neural network model NNM based on all weights of the neural network model NNM.

[0042] In operation S150, the computing system 100 may perform a lightweight operation of the neural network model NNM. The lightweight operation may refer to an operation that reduces the complexity of the neural network model NNM or may be referred to as compression of the model. In some embodiments, the lightweight operation may refer to an operation that sets some of the weights of the neural network model NNM to "0". For example, the lightweight operation may be a pruning operation.

[0043] In some embodiments, the computing system 100 may divide the weights of the neural network model NNM into a first weight group and a second weight group. The first weight group may include weights to be excluded during the retraining operation. The second weight group may include weights to be used in the retraining operation. The computing system 100 may allocate 50% of all weights to the first weight group, and may allocate 50% of all weights to the second weight group. The computing system 100 may initialize the weights included in the first weight group. For example, the computing system 100 may initialize the weights included in the first weight group to "0".

[0044] In operation S170, the computing system 100 may retrain the neural network model NNM. The computing system 100 may retrain the lightweight neural network model NNM. In some embodiments, the computing system 100 may train the neural network model NNM based only on the weights included in the second weight group. The computing system 100 may train the neural network model NNM based on the weights included in the second weight group (excluding the weights included in the first weight group). The computing system 100 may retrain the neural network model NNM based on 50% of all weights.

[0045] In operation S190, the computing system 100 may perform (or run) circuit simulation by using the neural network model NNM with the process parameters of the integrated circuit as input. The computing system 100 may perform the simulation of the integrated circuit by using the neural network model NNM while changing the voltage and the process parameters. The computing system 100 may input the process parameters and the voltage to the circuit simulator CS. The computing system 100 may execute the circuit simulator CS. The computing system 100 may generate the characteristics of the integrated circuit as a simulation result. The computing system 100 may generate a current and a charge corresponding to the input data.

[0046] When optimizing semiconductor processes and designs, it takes a long time to perform process simulation. In addition, it takes a long time to extract model parameters based on process simulation results. However, the computing system 100 according to some embodiments can generate a neural network model NNM and perform circuit simulation by using the neural network model NNM. The neural network model NNM can receive process parameters and voltage as input data, and can output current and charge as output data. The computing system 100 can perform semiconductor process design optimization by executing the method according to some embodiments to generate a neural network model NNM and performing circuit simulation by using the neural network model NNM.

[0047] As described above, the computing system 100 according to some embodiments can perform circuit simulation by using a neural network model NNM, which receives process parameters and voltage as input data and outputs current and charge as output data. That is, by integrating process simulation into circuit simulation, the calculation time can be reduced. In addition, Monte Carlo (MC) simulation can be supported (or provided) by using the neural network model NNM according to some embodiments. Therefore, the turnaround time (TAT) of semiconductor process and design optimization can be reduced.

[0048] In the following, for the convenience of description, terms such as "neural network model" and "device model" are used interchangeably. These terms may have the same meaning or different meanings depending on the context of the embodiment, and the meaning of each term will be understood according to the context of the embodiment to be described.

[0049] Figure 2 is a block diagram illustrating an example of a computing system according to some implementations. FIG. 3A to FIG. 3C is a flow chart illustrating an example of the operation of a computing system.

[0050] Reference Figure 2 and FIG. 3A to FIG. 3C Describes how to generate sample data. Figure 2, the semiconductor system 1000 may include a computing system 100 and a measuring device 10. In some embodiments, the computing system 100 may be implemented separately from the measuring device 10. However, the scope of the present disclosure is not limited thereto, and the computing system 100 and the measuring device 10 may be implemented as a single semiconductor system 1000.

[0051] The computing system 100 may include a process simulator PS, a circuit simulator CS, and a neural network model NNM. The computing system 100 may be referred to as a neural network system. The computing system 100 may generate a neural network model NNM. The computing system 100 may train the neural network model NNM. The computing system 100 may optimize the parameters of the neural network model NNM. The computing system 100 may perform calculations of the neural network model NNM based on the received input data. Based on the calculation results, the computing system 100 may generate an information signal or may retrain the neural network model NNM. The computing system 100 may include a hardware accelerator for executing the neural network model NNM. The hardware accelerator may correspond to, for example, an NPU, a tensor processing unit (TPU), a neural engine, etc., which is a module dedicated to executing the neural network model NNM, but is not limited thereto.

[0052] The computing system 100 according to some embodiments may execute a neural network model NNM. The neural network model NNM refers to a deep learning model trained to perform specific operations such as process simulation, model parameter extraction, and device modeling. The neural network model NNM may be a neural network model used by the computing system 100 to extract a desired information signal.

[0053] For example, the neural network model NNM may include at least one of various types of neural network models (such as convolutional neural network (CNN), region with convolutional neural network (R-CNN), region proposal network (RPN), recurrent neural network (RNN), stacked-based deep neural network (S-DNN), state-space dynamic neural network (S-SDN), deconvolution network, deep belief network (DBN), restricted Boltzmann machine (RBM), fully convolutional network, long short-term memory (LSTM) network, classification network, generative adversarial network (GAN), transformer model (transformer) and attention network).

[0054] The neural network model NNM may be generated and trained in the computing system 100, and the trained neural network model NNM may be executed in the computing system 100. Hereinafter, the neural network model NNM refers to a neural network model whose configuration parameters (e.g., network topology, bias, weight, etc.) are determined by training. The configuration parameters of the neural network model NNM may be updated by retraining in the computing system 100, so that the updated neural network model NNM (or the converted neural network model NNM) may be applied to the computing system 100.

[0055] In some embodiments, the neural network model NNM may be applied to the circuit simulator CS. The circuit simulator CS may include the converted neural network model NNM. The circuit simulator CS may perform circuit simulation by using the converted neural network model NNM.

[0056] The measuring device 10 or the inspection equipment can measure the characteristics of the semiconductor device and can generate the measurement data IDT. The measurement data IDT may be data including the electrical / structural characteristics of the semiconductor product (or semiconductor device) that has been actually measured. For example, the measurement data IDT of the semiconductor device may be generated by a method of measuring electrical characteristics by a test element group (TEG). For example, the measurement data IDT of the semiconductor device may be generated by manufacturing TEG on a wafer and measuring the electrical characteristics according to the measurement requirements of the wafer with TEG. The measurement data IDT of the semiconductor device generated by the measuring device 10 may be data corresponding to the simulator output data SODT of the process simulator PS.

[0057] The process simulator PS, which is a physical model designed to simulate an actual environment, can perform simulation based on input data and generate output data as a simulation result. Alternatively, the process simulator PS can analyze physical phenomena (such as electrical characteristics, mechanical characteristics, and physical characteristics of semiconductor devices) and simulate physical phenomena (such as electrical characteristics, mechanical characteristics, and physical characteristics of semiconductor devices). In some embodiments, the process simulator PS can be implemented by mathematical equations based on mathematical and physical theories. For example, the process simulator PS can be a transistor simulation tool. For example, the process simulator PS can be a TCAD simulator and / or an electronic computer-aided design (ECAD) simulator.

[0058] In some embodiments, the process simulator PS may receive simulator input data SIDT. The simulator input data SIDT may include input parameters and environment information required for the simulation. For example, the environment information may include factors other than the input parameters that need to be set for the simulator to perform the simulation (e.g., simulation flow, input / output information about each simulator, etc.).

[0059] In some embodiments, the process simulator PS can simulate the characteristics of the process, device or circuit of the semiconductor device, and can output simulator output data SODT as the simulation result. For example, the process simulator PS can simulate each process step based on material, structure or process input data. One or more process steps may include an oxidation process, a photoresist coating process, an exposure process, a development process, an etching process, an ion implantation process, a diffusion process, a chemical vapor deposition process and a metallization process. The process simulator PS can simulate at least one device based on the simulation results of the process steps, and can output device characteristic data (or device data). The process simulator PS can generate and output simulator output data SODT including information about the electrical / structural characteristics of the semiconductor device.

[0060] In some embodiments, the simulator input data SIDT of the process simulator PS may include temperature, process parameters (or process conditions), etc. The process simulator PS may perform simulation by using the received data. The process simulator PS may output simulator output data SODT. The process simulator PS may output simulator output data SODT including current-voltage characteristic data, charge-voltage characteristic data, etc. as a simulation result. The process simulator PS may send the simulator output data SODT to the neural network model NNM.

[0061] In some embodiments, the neural network model NNM may receive sample data. The sample data may include simulator input data SIDT, simulator output data SODT, and measurement data IDT. The simulator output data SODT may include first simulator output data SODT1, second simulator output data SODT2, and third simulator output data SODT3. The first simulator output data SODT1 may include current-voltage average data and charge-voltage average data. The second simulator output data SODT2 may include current-voltage local variance data and charge-voltage local variance data. The third simulator output data SODT3 may include current-voltage global variance data and charge-voltage global variance data. For example, local variance data may indicate variations within a wafer. Global variance data may indicate wafer-to-wafer variations.

[0062] The process simulator PS may generate first simulator output data SODT1. Figure 3A The method of generating the first simulator output data SODT1 is described in detail. The process simulator PS can generate the second simulator output data SODT2. Figure 3B The method of generating the second simulator output data SODT2 is described in detail. The process simulator PS can generate the third simulator output data SODT3. Figure 3C A method of generating the third simulator output data SODT3 is described in detail. The process simulator PS may output the first simulator output data SODT1 to the third simulator output data SODT3 to the neural network model NNM.

[0063] That is, the computing system 100 can generate the first simulator output data SODT1 to the third simulator output data SODT3 through the process simulator PS. The computing system 100 can generate the current-voltage average data, the current-voltage local variance data, the current-voltage global variance data, the charge-voltage average data, the charge-voltage local variance data, and the charge-voltage global variance data through the process simulator PS.

[0064] The circuit simulator CS may be a simulation tool for simulating an integrated circuit. For example, the circuit simulator CS may be an electronic design automation (EDA) tool and / or a SPICE tool. The circuit simulator CS may simulate the integrated circuit by using a neural network model NNM. The circuit simulator CS may simulate the characteristics of each element (e.g., transistor) of the integrated circuit by using a neural network model NNM. For example, simulating the integrated circuit may refer to applying a voltage and / or a current to one node of the integrated circuit, and generating a simulation result including a voltage and / or a current for another node of the integrated circuit.

[0065] The computing system 100 may perform integrated circuit simulation to design an integrated circuit. The computing system 100 may execute a circuit simulator CS. The computing system 100 may run the circuit simulator CS that simulates the operation of at least one element of the integrated circuit.

[0066] The computing system 100 can perform circuit simulation by using the neural network model NNM. That is, by installing the neural network model NNM on the circuit simulator CS, the computing system 100 can perform circuit simulation. The computing system 100 can run the circuit simulator CS by using the neural network model NNM. Based on the result of simulating the integrated circuit, an operation of manufacturing the integrated circuit by a semiconductor process can be performed.

[0067] Reference Figure 3A, the computing system 100 may generate first simulator output data SODT1 including current-voltage average data and charge-voltage average data. In operation S111a, the process simulator PS may receive input data. For example, the input data may include temperature or process parameters (or process requirements). The process parameters may include technical parameters that vary with changes in the design tools used to design the target semiconductor device and design parameters that vary according to the physical / structural characteristics of the target semiconductor device. For example, when the target semiconductor device is a transistor, the design parameters may include gate line length, active area width, channel length, device width, doping profile, oxide film thickness, oxide film dielectric constant, channel length modulation constant, temperature of driving the target semiconductor device, etc.

[0068] In operation S112a, the process simulator PS may perform process simulation. For example, the process simulator PS may perform TCAD process simulation. In operation S113a, the process simulator PS may perform device simulation. For example, the process simulator PS may perform TCAD device simulation.

[0069] In operation S114a, the process simulator PS may generate first simulator output data SODT1. The process simulator PS may generate current-voltage average data and charge-voltage average data.

[0070] Reference Figure 3B , the computing system 100 may generate second simulator output data SODT2 including current-voltage local variance data and charge-voltage local variance data. In operation S111b, the process simulator PS may receive input data.

[0071] In operation S112b, the process simulator PS may perform process simulation. For example, the process simulator PS may perform TCAD process simulation. In operation S113b, the process simulator PS may perform device simulation. For example, the process simulator PS may perform TCAD device simulation. The process simulator PS may perform TCAD device simulation based on a doping profile. The process simulator PS may perform TCAD device simulation of random dopant fluctuation (RDF) and random geometry fluctuation (RGF).

[0072] In operation S114b, the process simulator PS may generate second simulator output data SODT2. The process simulator PS may generate current-voltage local variance data and charge-voltage local variance data.

[0073] Reference Figure 3C, the computing system 100 may perform simulation considering process variations. The computing system 100 may generate third simulator output data SODT3 including current-voltage global variance data and charge-voltage global variance data. In operation S111c, the process simulator PS may receive input data reflecting process variations. The input data may be generated considering process variations.

[0074] In operation S112c, the process simulator PS may perform process simulation. For example, the process simulator PS may perform TCAD process simulation. In operation S113c, the process simulator PS may perform device simulation. For example, the process simulator PS may perform TCAD device simulation.

[0075] In operation S114c, the process simulator PS may generate third simulator output data SODT3. The process simulator PS may generate current-voltage global variance data and charge-voltage global variance data.

[0076] As described above, the computing system 100 may generate sample data. The sample data may include first simulator output data SODT1, second simulator output data SODT2, and third simulator output data SODT3. The first simulator output data SODT1 may include current-voltage average data and charge-voltage average data. The second simulator output data SODT2 may include current-voltage local variance data and charge-voltage local variance data. The third simulator output data SODT3 may include current-voltage global variance data and charge-voltage global variance data.

[0077] Figure 4 is a diagram showing input data of a neural network model.

[0078] The neural network model NNM can receive input data. The input data can include both input parameters of the process simulator PS and input parameters of the circuit simulator CS. According to the requirements of the environment in which the target semiconductor device operates, the input parameters of the circuit simulator CS may include operating parameters, temperature, channel length, gate length, field effect transistor (FET) width, the number of pins, etc. The operating parameters may refer to the voltage input to the target semiconductor device. For example, the operating parameters may include drain voltage, gate voltage, source voltage, and body voltage. The input parameters of the process simulator PS may include technical parameters that vary with changes in the design tools used to design the target semiconductor device and design parameters that vary according to the physical / structural characteristics of the target semiconductor device.

[0079] [Table 1]

[0080]

[0081] Table 1 shows an example of design parameters. For example, the design parameters may include structural parameters and doping parameters. Figure 4 As shown in , structural parameters may include oxide / spacer, thickness, fin width, fin pitch, gate pitch, Epi (epitaxial), etc. Doping parameters may include well ion implantation (IIP), source / drain (S / D) IIP, etc. In one embodiment, the input data of the neural network model NNM may include voltage and process parameters. Voltage may refer to operating parameters. Process parameters may include technical parameters and design parameters.

[0082] Figure 5 is a diagram illustrating an example of a neural network model according to some embodiments.

[0083] Reference Figure 5 , the neural network model NNM may include an input layer IL, one or more hidden layers (eg, a first hidden layer HL1 and a second hidden layer HL2), an output layer OL, and a conversion function unit CFU. Figure 5 The neural network model NNM includes two hidden layers HL1 and HL2, but the scope of the present disclosure is not limited thereto. The number of hidden layers HL1 and HL2 included in the neural network model NNM may be increased or decreased according to implementation.

[0084] The neural network model NNM may receive input data and may generate and output output data. The input data may include operating parameters, technical parameters, design parameters, channel length, gate length, FET width, temperature, number of pins, etc. The input data may include voltage and process parameters. Voltage may refer to operating parameters, and process parameters may refer to technical parameters and design parameters. Output data may include current and charge.

[0085] In some embodiments, the input data may include a first input parameter IP1 and a second input parameter IP2. The first input parameter IP1 may refer to an input parameter of the circuit simulator CS. The second input parameter IP2 may refer to an input parameter of the process simulator PS.

[0086] The input layer IL may receive input data. The input layer IL may receive a first input parameter IP1 and a second input parameter IP2. The input layer IL may include voltage and process parameters. The input layer IL may apply weights and biases to the received input data and may output the input data to the first hidden layer HL1. The input layer IL may be connected to the first hidden layer HL1.

[0087] In some embodiments, based on an affine transformation of the form Wx+b, the output of each layer can be mapped to the input of the next layer in a completely complete manner. For example, the input parameters of the input layer IL can be mapped to the first hidden layer HL1 through the first weight W1 and the first bias b1. The output of the first hidden layer HL1 can be mapped to the input of the second hidden layer HL2 through the second weight W2 and the second bias b2. The output of the second hidden layer HL2 can be mapped to the output layer OL through the third weight W3 and the third bias b3.

[0088] In some embodiments, the hidden layers HL1 and HL2 may receive the output of the previous layer. Each node included in the hidden layers HL1 and HL2 may apply different weights and different biases to the sum of the values ​​received from the previous layer, and may output the sum of the values ​​to the next layer. The hidden layers HL1 and HL2 may be connected to the previous layer. The hidden layers HL1 and HL2 may be connected to the next layer. For example, the first hidden layer HL1 may be connected to the input layer IL. The first hidden layer HL1 may be connected to the second hidden layer HL2. The second hidden layer HL2 may be connected to the output layer OL.

[0089] In some embodiments, the activation function may be located between the output of the affine transformation and the input of the next layer. For example, the activation function may include a rectified linear (ReLU) function, a sigmoid function, etc. However, the scope of the present disclosure is not limited thereto.

[0090] In some embodiments, the output layer OL can be connected to the hidden layers HL1 and HL2. For example, the output layer OL can be connected to the second hidden layer HL2. The output layer OL can receive the output of the second hidden layer HL2. The output layer OL can calculate the output value y by adding all received values. The output layer OL can output the output value y to the conversion function unit CFU. The conversion function unit CFU can convert the output value y into an output parameter OP corresponding to the current and the charge.

[0091] In order to prevent calculation errors during the training of the neural network model NNM, a preprocessing operation may be performed by using an inverse hyperbolic sine function. When the voltage between the source and the drain is "0", the current between the source and the drain may be "0". To this end, the current I may be defined by Equation 1. The current I may refer to the current between the source and the drain. Here, I 0 may indicate a normalization factor, V may indicate a voltage between a source and a drain, and y may indicate an output value. The charge Q may be defined by Equation 2. Here, Q 0 may indicate a normalization factor, and y may indicate an output value.

[0092] [Equation 1]

[0093] I=I0 ·V·sinhy

[0094] [Equation 2]

[0095] Q=Q 0 ·y

[0096] As described above, the neural network model NNM can receive voltage and process parameters as input data, and can output current and charge as output data. The computing system 100 can generate and train the neural network model NNM. The computing system 100 can generate a neural network model NNM (or a device model) that can accurately predict the characteristics of a semiconductor device.

[0097] Figure 6 is a diagram illustrating an example of a neural network model according to some embodiments.

[0098] For the convenience of description, detailed description of the above components is omitted. Figure 6 , the neural network model NNM may include an input layer IL, one or more hidden layers, an output layer OL and a conversion function unit CFU. The neural network model NNM may receive input data and may generate output data. In some embodiments, the input data may include a first input parameter IP1 and a second input parameter IP2.

[0099] In some embodiments, the output data may include a first output parameter OP1 and a second output parameter OP2. The first output parameter OP1 may include average data and local variance data. The first output parameter OP1 may include current average data, current local variance data, charge average data, and charge local variance data. The second output parameter OP2 may include average data and global variance data. The second output parameter OP2 may include current average data, current global variance data, charge average data, and charge global variance data.

[0100] As described above, the neural network model NNM can receive voltage and process parameters as input data, and can output a first output parameter OP1 and a second output parameter OP2 as output data. That is, the neural network model NNM can output average data, local variance data, and global variance data. Therefore, the neural network model NNM can support (or provide) MC simulation.

[0101] Figure 7 It is shown in detail Figure 1 Flow chart of operation S130.

[0102] Reference Figure 1 and Figure 7, the computing system 100 may generate output data by using the neural network model NNM. The computing system 100 may perform a training operation of the neural network model NNM based on the output data and the target data of the neural network model NNM. The computing system 100 may train the neural network model NNM based on the error between the output data and the target data. For example, the target data may be simulator output data SODT in the sample data. Alternatively, the target data may be measurement data IDT.

[0103] For example, the computing system 100 may repeatedly perform operations to correct the weights of the neural network model NNM to reduce the error between the output data and the target data. In some embodiments, the computing system 100 may train the neural network model NNM in various ways. For example, the computing system 100 may perform automatic parameter optimization (backward propagation) through machine learning.

[0104] Figure 1 Operation S130 may include operations S210 to S250. In operation S210, the neural network model NNM may generate output data. The neural network model NNM may generate output data including a first output parameter OP1 and a second output parameter OP2.

[0105] In operation S230, the computing system 100 may calculate a loss function based on the output data and the target data. The loss function may be defined as the output data of the neural network model NNM. For example, the loss function may be referred to as a cost function. The loss function may be defined such that as the output data moves away from the expected value (or measured value) (e.g., the simulator output data in the sample data or the measured data in the sample data), the result value of the loss function increases. The result value of the loss function may increase as the difference between the output data and the target data increases.

[0106] In operation S250, the computing system 100 may train the neural network model NNM to reduce the result value of the loss function. The computing system 100 may correct the weight of the neural network model NNM based on the value back-propagated from the result value of the calculated loss function. The computing system 100 may correct the weight of the neural network model NNM to reduce the result value of the loss function.

[0107] In some embodiments, the Kullback-Leibler divergence (KL(p,q) or D KL ) can be used as the loss function. The global variance and the local variance follow independent normal distributions with the same mean and different standard deviations. The loss function Loss can be defined by Equation 3. D KL It can be defined by Equation 4. N can indicate a normal distribution, The average data in the second output parameter OP2 may be indicated, The global variance data in the second output parameter OP2 may be indicated, It can indicate the average data in the target data, can indicate the global variance data in the target data, The average data in the first output parameter OP1 may be indicated, The local variance data in the first output parameter OP1 may be indicated, can indicate the average data in the target data, and The local variance data in the target data may be indicated.

[0108] [Equation 3]

[0109]

[0110] [Equation 4]

[0111]

[0112] As described above, the neural network model NNM according to some embodiments may generate output data including a first output parameter OP1 and a second output parameter OP2. The neural network model NNM may calculate a loss function based on the output data and the target data. The computing system 100 may train the neural network model NNM to reduce the result value of the loss function. Therefore, the consistency of the neural network model NNM may be improved, and the accuracy of the simulation results of the characteristics of the integrated circuit may be improved.

[0113] Figure 8 It is shown in detail Figure 1 Flow chart of operation S150. Fig.9A and Fig. 9B is a diagram illustrating lightweight operation.

[0114] Reference Figure 1 , Figure 8 , Fig.9A and Fig. 9B , the computing system 100 can perform lightweight operations of the neural network model NNM. The computing system 100 can perform lightweight operations to reduce the complexity of the neural network model NNM. The computing system 100 can perform lightweight operations that can reduce the complexity of the neural network model NNM while maintaining the consistency of the neural network model NNM. Figure 1 Operation S130 may correspond to operation S310. Figure 1 Operation S150 may include operations S320 and S330. Figure 1 Operation S170 may correspond to operation S340.

[0115] As reference Figure 5 and Figure 6 As described, the neural network model NNM may include an input layer IL, a first hidden layer HL1, a second hidden layer HL2, and an output layer OL. Each of these layers may include a plurality of nodes referred to as neurons. Each node or neuron may indicate a computing unit having one or more inputs and outputs. Each input from a plurality of nodes of a layer may be supplied from each node of an adjacent layer. Similarly, the outputs of a plurality of nodes of a layer may be supplied to a plurality of nodes of an adjacent layer. Each node of a particular layer of the neural network model NNM may be connected to at least some nodes of an adjacent layer.

[0116] For example, the input layer IL may include a first node N1 and a second node N2. The first hidden layer HL1 may include a third node N3, a fourth node N4, a fifth node N5, and a sixth node N6. The second hidden layer HL2 may include a seventh node N7, an eighth node N8, a ninth node N9, and a tenth node N10. The output layer OL may include an eleventh node N11 and a twelfth node N12.

[0117] In operation S310, the computing system 100 may train the neural network model NNM based on all weights. Fig.9A , all nodes of the neural network model NNM (i.e., the first node N1 to the twelfth node N12) can be completely connected to each other. For example, the first node N1 can transmit the first output to the third node N3, the second output to the fourth node N4, the third output to the fifth node N5, and the fourth output to the sixth node N6. The connection relationship between the remaining nodes (i.e., the second node N2 to the twelfth node N12) is similar thereto, and therefore, a detailed description thereof is omitted.

[0118] In operation S320, the computing system 100 may divide the weights into a first weight group and a second weight group. The first weight group may include weights to be initialized. The second weight group may include weights to be used for retraining. The first weight group may include half of all weights (i.e., 50% of all weights). The second weight group may include half of all weights (i.e., 50% of all weights).

[0119] In some embodiments, the computing system 100 may classify the weights into a first weight group and a second weight group, taking into account the degree of correlation with the output parameter and the degree of influence on the inferred output parameter. The computing system 100 may classify the weights of low importance into the first weight group, and may classify the weights of high importance into the second weight group.

[0120] For example, the computing system 100 may sort the values ​​of the weights in ascending or descending order. The computing system 100 may divide the weights into a first weight group and a second weight group based on the size of the sorted data. For example, the computing system 100 may classify the lower 50% of the weights into the first weight group according to the size of the weights, and may classify the remaining weights into the second weight group. The criteria for dividing the weights into two groups are not limited thereto, and weights of low importance may be extracted by various methods. That is, the computing system 100 may select weights to be excluded when performing retraining.

[0121] In operation S330, the computing system 100 may initialize the weights included in the first weight group. For example, the computing system 100 may set the weights included in the first weight group to "0".

[0122] In operation S340, the computing system 100 may retrain the neural network model NNM based on the weights included in the second weight group. In order to reduce the complexity of the neural network model NNM, the computing system 100 may perform retraining based only on the weights included in the second weight group (excluding the weights included in the first weight group).

[0123] Reference Fig. 9B , because the computing system 100 has initialized the weights included in the first weight group, each of the nodes of the neural network model NNM can be connected to some nodes of the adjacent layer. For example, the first node N1 can transmit the output to the third node N3. The first node N1 may not transmit the output to the fourth node N4, the fifth node N5, and the sixth node N6. The second node N2 can transmit the output only to the fifth node N5 and the sixth node N6. The third node N3 can transmit the output only to the seventh node N7, the eighth node N8, and the tenth node N10. The fifth node N5 can transmit the output only to the tenth node N10. The sixth node N6 can transmit the output only to the eighth node N8. The seventh node N7 can transmit the output to the eleventh node N11 and the twelfth node N12. The eighth node N8 can transmit the output only to the eleventh node N11. The tenth node N10 can transmit the output only to the twelfth node N12.

[0124] As described above, the computing system 100 can perform lightweight operations of the neural network model NNM. The computing system 100 can train the neural network model NNM based on all weights. The computing system 100 can divide the weights into a first weight group and a second weight group. The computing system 100 can initialize the weights of the first weight group. The computing system 100 can retrain the neural network model NNM based on the weights included in the second weight group. The number of weights included in the first weight group can be half of the number of all weights.

[0125] Therefore, the computing system 100 can reduce the size of the neural network model NNM through lightweight operations. The computing system 100 can reduce the complexity of the neural network model NNM through lightweight operations. The computing system 100 can reduce the inference time through lightweight operations. That is, the computing system 100 can reduce the complexity of the neural network model NNM while maintaining the consistency of the neural network model NNM.

[0126] Fig.10 is a flow chart illustrating an example of a method of operation of a computing system according to some implementations.

[0127] Reference Figure 1 and Fig.10 By using the neural network model NNM, the computing system 100 can perform circuit simulation while changing both process parameters and voltage. The computing system 100 can perform operations S401 to S410. Operations S401, S403, S406, S407, and S409 are similar to Figure 1 Operations S110 to S190 are the same or similar, and thus, detailed descriptions thereof are omitted.

[0128] In operation S401, the computing system 100 may generate sample data based on temperature and process parameters. In operation S402, the computing system 100 may divide the sample data into training data and verification data. The training data may refer to data used in training the neural network model NNM. The verification data may refer to data used in training the lightweight neural network model NNM. That is, the verification data may refer to data used in retraining after the lightweight operation.

[0129] In operation S403, the computing system 100 may train the neural network model NNM based on the training data. The computing system 100 may train the neural network model NNM for all weights based on the training data.

[0130] In operation S404, the computing system 100 may determine whether the fit between the target data and the output data is accurate. The target data may refer to a portion of the sample data. The output data may refer to the output data of the neural network model NNM. When the fit is accurate, the computing system 100 may perform operation S406, and when the fit is inaccurate, the computing system 100 may perform operation S405.

[0131] In operation S405, the computing system 100 may adjust parameters. In some embodiments, the computing system 100 may adjust parameters (or hyperparameters, weights, biases, etc.). For example, the computing system 100 may increase or decrease the number of hidden layers. The computing system 100 may increase or decrease the number of nodes of a layer. After adjusting the parameters, the computing system 100 may perform operation S403. The computing system 100 may adjust the parameters and train the neural network model NNM.

[0132] In operation S406, the computing system 100 may perform a lightweight operation of the neural network model NNM. The computing system 100 may initialize 50% of all weights to "0". In operation S407, the computing system 100 may retrain the neural network model NNM based on the verification data. The computing system 100 may train the lightweight neural network model NNM based on the verification data different from the training data. The computing system 100 may retrain the neural network model NNM based on 50% of all weights.

[0133] In operation S408, the computing system 100 may convert the neural network model NNM into a format corresponding to the circuit simulator CS. The computing system 100 may perform an operation of programming the neural network model NNM to correspond to the circuit simulator CS. For example, the computing system 100 may program the neural network model NNM into a device model by using a model application program interface (API) provided by commercial EDA software, thereby enabling EDA circuit analysis. The device model may be included in a technical design toolkit used in an EDA tool (e.g., a SPICE tool).

[0134] In some embodiments, the computing system 100 can port the lightweight neural network model NNM to a circuit simulation code (such as The computing system 100 may convert the lightweight neural network model NNM into Verilog-A. The computing system 100 may provide the neural network model NNM, which has been converted into a device model, to the circuit simulator CS. That is, the computing system 100 may generate a device model. For example, the device model may refer to a model converted into a format that can be installed on the circuit simulator CS.

[0135] In operation S409, the computing system 100 may perform a simulation of the integrated circuit by using the neural network model NNM with the process parameters as input. The computing system 100 may perform a circuit simulation of the integrated circuit by using the device model while changing the process parameters. The computing system 100 may execute a circuit simulator CS by using the device model. For example, the computing system 100 may run a circuit simulator CS (e.g., a SPICE simulation tool) using the device model.

[0136] In some embodiments, the device model may be included in the circuit simulator CS. The computing system 100 may execute the circuit simulator CS including the device model to perform circuit simulation of the integrated circuit. The device model included in the circuit simulator CS may receive voltage and process parameters as input data. The device model may infer current and charge based on weights and parameters, and may output the current and charge to the circuit simulator CS.

[0137] In operation S410, the computing system 100 may determine whether the characteristics of the circuit meet the target requirements. The computing system 100 may determine whether the characteristics of the circuit generated by the circuit simulation meet the requirements. When the characteristics of the circuit do not meet the requirements, the computing system 100 may perform operation S409. In some embodiments, when the characteristics of the circuit meet the requirements, the computing system 100 may perform an operation of manufacturing an integrated circuit by a semiconductor process.

[0138] In some embodiments, when the characteristics of the circuit do not meet the requirements, the computing system 100 may perform a simulation of the integrated circuit while changing the voltage and process parameters. The computing system 100 may perform circuit simulation while adjusting the process parameters until the characteristics of the circuit meet the requirements. The neural network model NNM may receive the process parameters as input parameters, and may infer current characteristics and charge characteristics. Therefore, the computing system 100 may separately execute the process simulator PS to change the process parameters and generate the electrical characteristics of the semiconductor device, and may not perform the operation of extracting the model parameters from the electrical characteristics of the semiconductor device. The computing system 100 may reduce the process development time.

[0139] As described herein, according to various embodiments, a method of generating a neural network model and performing circuit simulation by using the neural network model may include performing MC simulation. The method may use process parameters as input. That is, the method may perform circuit simulation by using the neural network model while changing the process parameters. The method may reduce the training time of the neural network model. The method may prevent the neural network model from being repeatedly trained according to the process parameter changes. The method may perform semiconductor process and design optimization by performing only circuit simulation. That is, the method may improve semiconductor process and design optimization by using only the neural network model without performing a separate process simulation and performing model parameter extraction based on the process simulation results.

[0140] Fig.11 is a block diagram illustrating a computing system including a memory storing programs according to some embodiments.

[0141] At least some of the operations included in the method of generating a neural network model and performing circuit simulation by using the neural network model may be performed in the computing system 100. In some embodiments, the computing system 100 may be referred to as a neural network system.

[0142] The computing system 100 may be a stationary computing system such as a desktop computer, workstation, or server, or may be a portable computing system such as a laptop computer. Fig.11 As shown in , the computing system 100 may include a processor 110, an input / output (I / O) device 120, a network interface 130, a RAM 140, a ROM 150, and a storage device 160. The processor 110, the I / O device 120, the network interface 130, the RAM 140, the ROM 150, and the storage device 160 may be connected to a bus 170 and may communicate with each other through the bus 170.

[0143] The processor 110 may be referred to as a processing unit and may include at least one core capable of executing any instruction set (e.g., Intel Architecture 32 (IA-32), 64-bit extended IA-32, x86-64, PowerPC, Sparc, Million Instructions Per Second (MIPS), Advanced Reduced Instruction Set Computer (RISC) Machine (ARM), IA-64, etc.), such as a microprocessor, an application processor (AP), a digital signal processor (DSP), and a GPU. For example, the processor 110 may access a memory (i.e., RAM 140 or ROM 150) through a bus 170 and may execute instructions stored in the RAM 140 or ROM 150.

[0144] The RAM 140 may store a program 141 or at least a portion thereof for executing a method of generating a neural network model and performing circuit simulation by using the neural network model, and the program 141 may allow the processor 110 to perform at least some of the operations included in the method of generating a neural network model and performing circuit simulation by using the neural network model. That is, the program 141 may include a plurality of instructions executable by the processor 110, and the plurality of instructions included in the program 141 may allow the processor 110 to perform at least some of the operations included in the above-mentioned method. The program 141 may include a process simulator PS, a circuit simulator CS, and a neural network model NNM.

[0145] Even when the power supplied to the computing system 100 is cut off, the storage device 160 does not lose the stored data. For example, the storage device 160 may include a non-volatile memory device, or may include a storage medium such as a tape, an optical disk, or a magnetic disk. In addition, the storage device 160 may be detachable from the computing system 100. According to some embodiments, the storage device 160 may store the program 141, and before the program 141 is executed by the processor 110, the program 141 or at least a portion thereof may be loaded from the storage device 160 to the RAM 140.

[0146] Alternatively, the storage device 160 may store a file written in a programming language, and the program 141 generated from the file by a compiler or the like, or at least a portion thereof, may be loaded into the RAM 140. Fig.11 As shown in , the storage device 160 may store a database (DB) 161, and the DB 161 may include information required to perform the method of generating a neural network model and performing circuit simulation by using the neural network model, such as sample data.

[0147] The storage device 160 may store data to be processed by the processor 110 or data processed by the processor 110. That is, according to the program 141, the processor 110 may generate data by processing the data stored in the storage device 160, and may store the generated data in the storage device 160.

[0148] The I / O device 120 may include an input device such as a keyboard or a pointing device, and may include an output device such as a display device or a printer. For example, a user may trigger execution of the program 141 by the processor 110 through the I / O device 120, may input learning data, and may check result data.

[0149] Network interface 130 may provide access to a network external to computing system 100. For example, a network may include multiple computing systems and multiple communication links, and the communication links may include wired links, optical links, wireless links, or any other type of links.

[0150] Fig.12 is a block diagram illustrating a computing system accessing a storage medium storing a program according to some implementations.

[0151] At least some of the operations included in the method of generating a neural network model and performing circuit simulation by using the neural network model may be performed by a computing system 200. The computing system 200 may include a computer system 210 and a readable medium 220. The computing system 200 may be a reference Figures 1 to 11 A computing system 100 is described.

[0152] Computer system 210 can access readable medium 220 and can execute program 221 stored on readable medium 220. In some embodiments, computing system 200 can be generally referred to as a neural network system.

[0153] The computer system 210 may include at least one computer subsystem, and the program 221 may include at least one component executed by at least one computer subsystem. For example, the at least one component may include the neural network model NNM, the process simulator PS, and the circuit simulator CS described above with reference to the accompanying drawings. Fig.11 Like the storage device 160 of the computer system 210, the readable medium 220 may include a non-volatile memory device, or may include a storage medium such as a tape, an optical disk, or a magnetic disk. In addition, the readable medium 220 may be removable from the computer system 210.

[0154] Fig.13 is a flow chart illustrating an example of a method of operation of a computing system according to some implementations.

[0155] Reference Figure 1 and Fig.13 , the computing system 100 may generate a neural network model, and may perform circuit simulation by using the neural network model. The computing system 100 may perform operations S510 to S560. Operations S510, S520, S530, S540, and S560 are similar to Figure 1 Operations S110 , S130 , S150 , S170 , and S190 are the same or similar, and thus, detailed descriptions thereof are omitted.

[0156] In some embodiments, even when the input data input to the neural network model NNM and the input data input to the measuring device 10 are the same, the output data generated by the neural network model NNM may be different from the measurement data IDT generated by the measuring device 10. The computing system 100 may perform a calibration operation so that the measurement data and the output data of the neural network model NNM match each other within a threshold. The computing system 100 may correct the difference between the output data of the neural network model NNM and the measurement data by updating the weights or parameters of the neural network model NNM.

[0157] In operation S510, the computing system 100 may generate sample data based on temperature and process parameters. In some embodiments, the computing system 100 may generate simulator output data SODT in the sample data through a process simulator PS.

[0158] The computing system 100 may sense or receive measurement data of the semiconductor device from an external measurement device 10. For example, the measurement device 10 or the inspection equipment may measure characteristics of the semiconductor device and may generate measurement data IDT. The measurement data IDT of the semiconductor device generated by the measurement device 10 may be data corresponding to output data of the process simulator PS.

[0159] In operation S520, the computing system 100 may train the neural network model NNM based on the sample data. In operation S530, the computing system 100 may perform lightweight operations of the neural network model NNM. In operation S540, the computing system 100 may retrain the neural network model NNM.

[0160] In some embodiments, in operation S550, the computing system 100 may perform a calibration operation. The computing system 100 may calibrate the output data of the neural network model NNM to be closer to the measured data. The computing system 100 may train a transfer learning model based on the measured data. The computing system 100 may update the difference between the transfer learning model that has been trained on the measured data and the neural network model NNM that has been trained on the simulation data, thereby correcting the difference between the output data and the measured data in real time.

[0161] In operation S560 , the computing system 100 may perform simulation of the integrated circuit by using the neural network model NNM while changing the process parameters.

[0162] As described above, the computing system 100 can perform a calibration operation based on the output data of the neural network model NNM and the measurement data in the sample data, thereby improving the accuracy of the neural network model NNM.

[0163] Fig.14is a flow chart illustrating an example of a method of manufacturing an integrated circuit according to some embodiments.

[0164] Reference Fig.14 In operation S610, the computing system 100 may perform circuit simulation based on the device model. The device model may refer to a lightweight neural network model NNM and is converted as described above. That is, the device model may refer to a device model obtained by referring to Figures 1 to 13 The neural network model NNM generated by the described method. The computing system 100 can perform circuit simulation of the integrated circuit by using the device model. The computing system 100 can perform circuit simulation and can generate simulation results. For example, the computing system 100 can input voltage and process parameters received from the outside into the circuit simulator CS. The circuit simulator CS can generate simulation results of the integrated circuit by using the device model.

[0165] In operation S620, the computing system 100 may determine whether the characteristics of the integrated circuit meet the target requirements. The computing system 100 may determine whether the characteristics of the circuit generated by the simulation meet the requirements. When the characteristics of the circuit do not meet the requirements, the computing system 100 may perform operation S610. In some embodiments, when the characteristics of the circuit do not meet the requirements, the computing system 100 may perform circuit simulation of the changed integrated circuit by using the device model.

[0166] In some embodiments, when the process parameters are changed, the computing system 100 may input the changed process parameters into the circuit simulator CS. The computing system 100 may generate simulation results by using the circuit simulator CS of the device model. The computing system 100 may not perform process simulation of the changed process parameters. In addition, the computing system 100 may not extract model parameters based on the process simulation results. The computing system 100 may reduce processing time by not performing process simulation and not extracting model parameters.

[0167] In some embodiments, when the characteristics of the circuit meet the requirements, the computing system 100 may perform operation S630. In operation S630, based on the simulation results, an operation of manufacturing an integrated circuit including a target semiconductor device may be performed by a semiconductor process. For example, an integrated circuit may be manufactured by applying a semiconductor process of the process parameters finally adjusted in operation S610. The semiconductor process may include a front-end-of-line (FEOL) process and a back-end-of-line (BEOL) process using a mask based on integrated circuit manufacturing. For example, the FEOL process may include planarizing and cleaning the wafer, forming a trench, forming a well, forming a gate electrode, forming a source and a drain, etc. In addition, the BEOL process may include silicide gate regions, source regions and drain regions, adding dielectrics, planarizing, forming holes, adding metal layers, forming vias, forming a passivation layer, etc.

[0168] Due to the high consistency of the neural network model NNM, the integrated circuit manufactured in operation S630 may have characteristics similar to the simulation result generated in operation S610. Therefore, the time and cost for manufacturing an integrated circuit with good characteristics may be reduced, and an integrated circuit with better characteristics may be manufactured.

[0169] Fig.15A and Fig. 15B is a graph showing results of applying a method of generating a neural network model according to some embodiments and performing circuit simulation by using the neural network model.

[0170] Reference Fig.15A and Fig. 15B , showing the results of performing a ring oscillator simulation. Fig.15A The horizontal axis in the graph represents time, and the vertical axis represents output voltage. Fig. 15B The horizontal axis in the graph represents time, and the vertical axis represents current. Fig.15A and Fig. 15B In the graph of , the simulation results are shown in a solid line, and the reference is shown in a single-dot chain line.

[0171] The computing system 100 may perform circuit simulation by using the neural network model NNM according to some embodiments. As a result of the computing system 100 performing ring oscillator simulation by using the neural network model NNM, the output voltage in the simulation result may be the same as or similar to the output voltage of the reference. In addition, as a result of the computing system 100 performing ring oscillator simulation by using the neural network model NNM, the current in the simulation result may be the same as or similar to the current of the reference. By using the semiconductor process and design optimization method according to the embodiment, a device model capable of accurately predicting the characteristics of a semiconductor device may be provided.

[0172] Fig.16A and Fig. 16B is a graph showing results of applying a method of generating a neural network model according to some embodiments and performing circuit simulation by using the neural network model.

[0173] Fig.16A The horizontal axis in the graph of represents Equation 5, and the vertical axis represents the threshold voltage V between adjacent devices (eg, transistors). T (ΔV T ) is the standard deviation of the difference. Here, L represents the gate length of the device, and W eff Represents the effective gate width of the device. Fig. 16B The horizontal axis of the graph represents Equation 5, and the vertical axis represents the current (ΔI) between adjacent devices (eg, transistors). DS ). Fig.16A and Fig. 16B In the graph of , the simulation results are shown in a solid line, and the reference is shown in a single-dot chain line.

[0174] [Equation 5]

[0175]

[0176] like Fig.16A and Fig. 16B As shown in , by using the semiconductor process and design optimization method according to the embodiment, a device model capable of accurately predicting characteristics of a semiconductor device can be provided.

[0177] Fig.17 is a graph showing results of applying a method of generating a neural network model according to some embodiments and performing circuit simulation by using the neural network model.

[0178] Reference Fig.17 , shows the distribution of radiation current generated by performing a simulation of a current mirror circuit. Fig.17 The horizontal axis in the graph represents current, and the vertical axis represents density. Fig.17 In the graph, the reference is shown in a solid line, the first neural network model NNM1 is shown in a single-point dashed line, and the second neural network model NNM2 is shown in a double-point dashed line. The first neural network model NNM1 can be based on Figure 6 The neural network model NNM of the embodiment, and the second neural network model NNM2 can be based on Figure 5 That is, the first neural network model NNM1 may be a model that considers local variance and global variance, and the second neural network model NNM2 may be a model that does not consider local variance and global variance.

[0179] like Fig.17 As shown in , by using the semiconductor process and design optimization method according to the embodiment, a device model capable of accurately predicting the characteristics of the semiconductor device can be provided. In addition, compared with the second neural network model NNM2, the first neural network model NNM1 can predict the characteristics of the semiconductor device in the same or similar manner as the reference.

[0180] Although the present disclosure contains many specific real-time details, these should not be interpreted as limitations on the scope of what can be claimed. Specific features described in the context of separate embodiments in the present disclosure may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented in multiple embodiments individually or in any suitable sub-combination. In addition, although features may be described above as working in a particular combination, one or more features from a combination may be removed from the combination in some cases, and a combination may be directed to a sub-combination or a variation of a sub-combination.

[0181] While the emulator has been particularly shown and described with reference to embodiments thereof, it will be understood that various changes in form and details may be made therein without departing from the spirit and scope of the appended claims.

Claims

1. A method for generating a neural network model and performing circuit simulation by using the neural network model, the method comprising: generating sample data by performing process simulation based on temperature and process parameters; Training the neural network model based on the sample data; Executing lightweight operations of the neural network model to generate a lightweight neural network model; Retraining the lightweight neural network model; as well as The circuit simulation is performed by using the retrained lightweight neural network model with the process parameters as input.

2. The method according to claim 1, wherein: The sample data includes first simulator output data, second simulator output data and third simulator output data, and Among them, the first simulator output data includes current-voltage average data and charge-voltage average data, the second simulator output data includes current-voltage local variance data and charge-voltage local variance data, and the third simulator output data includes current-voltage global variance data and charge-voltage global variance data.

3. The method according to claim 1, wherein: Generating the sample data by performing the process simulation based on the temperature and the process parameter includes: receiving, by a process simulator, input data including at least the temperature and the process parameter; The process simulator performs the process simulation; executing device simulation by the process simulator; and The sample data including at least current-voltage average data and charge-voltage average data is generated by the process simulator.

4. The method according to claim 1, wherein: Generating the sample data by performing the process simulation based on the temperature and the process parameter includes: receiving, by a process simulator, input data including at least the temperature and the process parameter; The process simulator performs the process simulation; performing, by the process simulator, device simulation of random dopant fluctuations and random geometry fluctuations based on the doping profile; and The sample data including at least current-voltage local variance data and charge-voltage local variance data is generated by the process simulator.

5. The method according to claim 1, wherein: Generating the sample data by performing the process simulation based on the temperature and the process parameter includes: receiving, by a process simulator, input data including at least the temperature, the process parameters and also reflecting process variations; The process simulator performs the process simulation; executing device simulation by the process simulator; and The sample data including at least current-voltage global variance data and charge-voltage global variance data is generated by the process simulator.

6. The method according to claim 1, wherein: The neural network model is configured to receive the voltage and the process parameter as input data, and output a current value and a charge value as output data.

7. The method according to claim 6, wherein: The neural network model includes an input layer, one or more hidden layers, an output layer and a conversion function unit, and Wherein, the conversion function unit is configured as follows: converting a first output value corresponding to the current value received from the output layer based on a first equation I=I0·V·sinh(y), wherein I0 represents a first normalization factor, V represents a voltage between a source and a drain, and y represents the first output value; outputting the first converted output value as first output data; converting a second output value corresponding to the charge value received from the output layer based on a second equation Q=Q0·x, wherein Q0 represents a second normalization factor and x represents the second output value; and The second converted output value is output as second output data.

8. The method according to claim 1, wherein: The neural network model is configured to receive the voltage and the process parameter as input data, and output a first output parameter and a second output parameter as output data, and wherein the first output parameter comprises at least one of current average data, current local variance data, charge average data and charge local variance data, and The second output parameter includes at least one of current average data, current global variance data, charge average data, and charge global variance data.

9. The method according to claim 1, wherein: Training the neural network model based on the sample data includes: generating output data including a first output parameter and a second output parameter; Calculating a value of a loss function based on the output data and target data in the sample data; and The neural network model is updated to reduce the value of the loss function.

10. The method according to claim 9, wherein: The loss function is defined by the following equation: Among them, Loss represents the loss function, D KL represents the Kullback-Leibler divergence, N represents the normal distribution, represents the average data in the second output parameter, represents the global variance data in the second output parameter, represents the average data in the target data, represents the global variance data in the target data, represents the average data in the first output parameter, represents the local variance data in the first output parameter, represents the average data in the target data, and represents the local variance data in the target data.

11. The method according to claim 1, wherein: Training the neural network model based on the sample data includes training the neural network model based on all weights, Executing the lightweight operation of the neural network model includes: dividing the weights into a first weight group and a second weight group; and Initialize the weights of the first weight group, Retraining the lightweight neural network model includes retraining the neural network model based on the weights included in the second weight group, and The number of weights included in the first weight group is half the number of all weights.

12. The method according to claim 1, further comprising: Dividing the sample data into training data used when training the neural network model and verification data used when retraining the lightweight neural network model; Determining whether the fit between the target data and the output data of the neural network model is accurate; Adjusting the parameters of the neural network model until a threshold fit between the target data and the output data is achieved; After retraining the lightweight neural network model, converting the lightweight neural network model into a format corresponding to a circuit simulator; as well as It is determined whether the characteristics of the circuit generated by the circuit simulation meet the requirements.

13. The method of claim 1, further comprising performing a calibration operation based on output data of the neural network model and measurement data in the sample data.

14. A computing device comprising at least one processor and a memory, in, The memory stores instructions that, when executed by the at least one processor, allow the at least one processor to generate a neural network model and perform circuit simulation by using the neural network model, and The at least one processor is configured to: generating sample data by performing process simulation based on temperature and process parameters; Training the neural network model based on the sample data; Executing lightweight operations of the neural network model to generate a lightweight neural network model; Retrain lightweight neural network models; as well as The circuit simulation is performed by using the retrained lightweight neural network model with the process parameters as input.

15. The computing device of claim 14, wherein: The sample data includes first simulator output data, second simulator output data and third simulator output data, and Among them, the first simulator output data includes current-voltage average data and charge-voltage average data, the second simulator output data includes current-voltage local variance data and charge-voltage local variance data, and the third simulator output data includes current-voltage global variance data and charge-voltage global variance data.

16. The computing device of claim 14, wherein: The neural network model includes: an input layer configured to receive the voltage and the process parameter as input data; One or more hidden layers; Output layer; and A conversion function unit is configured to convert the output value received from the output layer and output a current value and a charge value as output data.

17. The computing device of claim 14, wherein: The neural network model includes: an input layer configured to receive the voltage and the process parameter as input data; One or more hidden layers; Output layer; and a conversion function unit configured to convert the output value received from the output layer and output a first output parameter and a second output parameter as output data, and wherein the first output parameter comprises at least one of current average data, current local variance data, charge average data and charge local variance data, and The second output parameter includes at least one of current average data, current global variance data, charge average data, and charge global variance data.

18. The computing device of claim 14, wherein: Training the neural network model based on the sample data includes: Generate output data; Calculating a value of a loss function based on the output data and target data in the sample data; and The neural network model is trained to reduce the calculated value of the loss function.

19. The computing device of claim 14, wherein: Training the neural network model based on the sample data includes training the neural network model based on all weights, Executing the lightweight operation of the neural network model to generate the lightweight neural network model includes: dividing the weights into a first weight group and a second weight group; and Initialize the weights of the first weight group, retraining the lightweight neural network model comprises retraining the lightweight neural network model based on the weights included in the second weight group, and The number of weights included in the first weight group is half the number of all weights.

20. A method of generating a neural network model and performing circuit simulation by using the neural network model, the method comprising: generating sample data by performing process simulation based on temperature and process parameters; Dividing the sample data into training data and verification data; Training the neural network model based on the training data; Determining whether the fit between the target data and the output data of the neural network model is accurate; Adjusting the parameters of the neural network model until a threshold fit between the target data and the output data is achieved; Executing lightweight operations of the neural network model to generate a lightweight neural network model; Retraining the lightweight neural network model based on the verification data; Converting the lightweight neural network model into a format corresponding to a circuit simulator; as well as The circuit simulation is performed by using the converted lightweight neural network model with the process parameters as input.

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