Online error correction method and device for FLASH system for laser communication

Abstract

The embodiment of the invention provides an online error correction method and device for a FLASH system for laser communication, and relates to the technical field of technologies. The method comprises the following steps: carrying out initialization processing on a FLASH system; performing segmentation processing on the initial data in the FLASH system after initialization processing according to a preset byte quantity to obtain first information segment data of a second byte quantity after segmentation, and performing first coding processing on the first information segment data, obtaining second information segment data of the second byte quantity and first verification segment data of the first byte quantity; decoding the second information segment data and the first verification segment data; and determining a decoding correction strategy according to the decoding processing result, and carrying out decoding online correction processing on the second information segment data according to the decoding correction strategy so as to recover to the first information segment data. According to the method and the device, the problem of weak online error correction capability of the FLASH system unit is solved, and the effect of improving the online error correction capability of the FLASH system unit is further achieved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of laser communication technology, and in particular to an online error correction method and device for a FLASH system used in laser communication. Background Art

[0002] The space radiation environment is filled with a large number of high-energy particles. Under the influence of space particle radiation, the FLASH unit used to store software on laser communication equipment is prone to single event upset (SEU), causing software logic errors, abnormal operation, and even system failure. In order to ensure the availability and integrity of system functions, additional anti-SEU design is required to ensure the correctness of the FLASH storage unit.

[0003] At present, common anti-SEU methods for devices sensitive to SEU effects include: triple-mode redundancy, error correction code, dynamic refresh and system monitoring. The main idea of ​​triple-mode redundancy is to store three copies of the same storage content and use the majority voting principle when outputting. If one copy of the content has an SEU failure, the other two normal contents can still ensure normal output and complete error correction, but this method requires additional hardware support, resulting in an increase in volume, weight and power consumption; error correction codes use specific encoding and decoding algorithms to detect and correct faults in memory, but the currently commonly used ECC encoding has limited error correction capabilities and cannot correct multiple consecutive errors, which easily causes error accumulation; dynamic refresh refreshes the contents of the storage unit through periodic erasure, but each refresh takes a long time and is not very timely; system monitoring can be set to monitor the impact of SEU and isolate faults in a timely manner, but it cannot correct errors.

[0004] There is currently no better solution to the above problems. Summary of the invention

[0005] The embodiment of the present invention provides a method and device for online error correction of a FLASH system for laser communication, so as to at least solve the problem of weak error correction capability of the FLASH unit in the related art.

[0006] According to one embodiment of the present invention, there is provided a method for online error correction of a FLASH system for laser communication, comprising:

[0007] Performing initialization processing on the FLASH system, wherein the initialization processing includes initializing coding information and parameters in a preset finite field based on a preset first coding scheme;

[0008] Segmenting the initial data in the FLASH system after the initialization processing according to a preset byte amount to obtain first information segment data of a second byte amount after the segmentation, and performing a first encoding processing on the first information segment data to obtain second information segment data of a second byte amount and first check segment data of a first byte amount;

[0009] Decoding the second information segment data and the first check segment data;

[0010] A decoding correction strategy is determined according to the decoding processing result, and decoding online correction processing is performed on the second information segment data according to the decoding correction strategy to restore it to the first information segment data.

[0011] In an exemplary embodiment, performing a first encoding process on the first information segment data includes:

[0012] Reading a second byte of data in the first information segment data, and performing RS encoding processing on the read data through a preset first encoder to obtain the second information segment data and verification data;

[0013] The FLASH decoding address contained in the encoding information is written into the verification data as the first address to obtain the first verification segment data.

[0014] In an exemplary embodiment, after obtaining the second information segment data and the first verification segment data, the method further includes:

[0015] Performing encoding and completion detection on all the second information segment data;

[0016] When the encoding detection result shows that the encoding of all the second information segment data is completed, resetting the preset FLASH encoding address;

[0017] When the encoding detection result is that all the second information segment data have not been encoded, the preset FLASH encoding address is first processed to obtain the third information segment data, and the first encoding process is performed on the third information segment data to obtain the second verification segment data; and the preset FLASH decoding address is second processed to store the second verification segment data, wherein the encoding information includes the FLASH encoding address and the FLASH decoding address.

[0018] In an exemplary embodiment, determining a decoding correction strategy according to a decoding processing result, and performing decoding online correction processing on the first data according to the decoding correction strategy includes:

[0019] In the case where the decoding result is a first error type, erasing the stored target error data according to a preset FLASH encoding address, and filling the corrected data into the location of the target error data, wherein the encoding information includes the FLASH encoding address;

[0020] When the decoding result is a second error type, a data request is sent to an external processor through an on-chip bus to reacquire the first information segment data; the first encoding process is performed on the reacquired first information segment data to obtain third check segment data;

[0021] The third check segment data and the re-acquired first information segment data are written into the location where the target error data is located.

[0022] According to another embodiment of the present invention, there is provided an online error correction device for a FLASH system for laser communication, comprising:

[0023] An initialization module, used for performing initialization processing on the FLASH system, wherein the initialization processing includes initializing coding information and parameters in a preset finite field based on a preset first coding scheme;

[0024] A first encoding module is used to segment the initial data in the FLASH system after the initialization processing according to a preset byte amount to obtain first information segment data of a second byte amount after the segmentation, and perform a first encoding processing on the first information segment data to obtain second information segment data of a second byte amount and a first check segment number of the first byte amount;

[0025] A decoding module, used for decoding the second information segment data and the first check segment data;

[0026] The error correction module is used to determine a decoding correction strategy according to the decoding processing result, and perform decoding online correction processing on the second information segment data according to the decoding correction strategy to restore it to the first information segment data.

[0027] In an exemplary embodiment, performing a first encoding process on the information segment data includes:

[0028] Reading a second byte of data in the first information segment data, and performing RS encoding processing on the read data through a preset first encoder to obtain the second information segment data and verification data;

[0029] The FLASH decoding address contained in the encoding information is written into the check segment as the first address to obtain the first check segment data.

[0030] In an exemplary embodiment, the apparatus further comprises:

[0031] an encoding completion detection module, configured to perform encoding completion detection on all the information segment data after obtaining the second information segment data and the first verification segment data;

[0032] A reset module, used for resetting the preset FLASH encoding address when the encoding detection result shows that the encoding of all the information segment data is completed;

[0033] A reprocessing module is used to, when the encoding detection result is that all the second information segment data have not been encoded, first process the preset FLASH encoding address to obtain the third information segment data, and perform the first encoding process on the third information segment data to obtain the second verification segment data; and perform a second process on the preset FLASH decoding address to store the second verification segment data, wherein the encoding information includes the FLASH encoding address and the FLASH decoding address.

[0034] In an exemplary embodiment, determining a decoding correction strategy according to a decoding processing result, and performing decoding online correction processing on the first data according to the decoding correction strategy includes:

[0035] In the case where the decoding result is a first error type, erasing the stored target error data according to a preset FLASH encoding address, and filling the corrected data into the location of the target error data, wherein the encoding information includes the FLASH encoding address;

[0036] When the decoding processing result is a second error type, a data request is sent to an external processor through an on-chip bus to retrieve the first information segment data; the first encoding processing is performed on the retrieved first information segment data to obtain third check segment data; and the third check segment data and the retrieved first information segment data are written into the location where the target error data is located.

[0037] According to yet another embodiment of the present invention, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any one of the above method embodiments when run.

[0038] According to yet another embodiment of the present invention, there is provided an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0039] Through the present invention, since the first coding scheme with stronger error correction capability is implemented, different error correction strategies are selected according to different error situations to adapt to different error situations, thereby improving the online error correction capability of the FLASH unit. Therefore, the problem of poor online error correction capability of the FLASH unit can be solved, thereby achieving the effect of improving the online error correction capability of the FLASH unit. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 is a flow chart of an online error correction method for a FLASH system for laser communication according to an embodiment of the present invention;

[0041] Figure 2 It is a structural block diagram of an online error correction device for a FLASH system for laser communication according to an embodiment of the present invention;

[0042] Figure 3 is a flow chart according to a specific embodiment of the present invention. DETAILED DESCRIPTION

[0043] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0044] In the following, the terms "first", "second", etc. are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first", "second", etc. may explicitly or implicitly include one or more of the features. In the description of this application, unless otherwise specified, "plurality" means two or more.

[0045] In addition, in the present application, directional terms such as "up", "down", "left" and "right" may be defined including but not limited to the orientation relative to the schematic placement of the components in the drawings. It should be understood that these directional terms may be relative concepts, which are used for relative description and clarification, and may change accordingly according to the change in the orientation of the components in the drawings.

[0046] In this application, unless otherwise specified or limited, the term "connection" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection or an indirect connection through an intermediate medium. In addition, the term "coupling" can be a way of achieving electrical connection for signal transmission.

[0047] As used herein, "about," "substantially," or "approximately" includes the stated value and an average value that is within an acceptable range of variation from the particular value as determined by one of ordinary skill in the art taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0048] In this embodiment, a method for online error correction of a FLASH system for laser communication is provided. Figure 1 is a flow chart of an online error correction method for a FLASH system for laser communication according to an embodiment of the present invention. Figure 1 As shown, the process includes the following steps:

[0049] Step S11, performing initialization processing on the FLASH system, wherein the initialization processing includes initializing coding information and parameters in a preset finite field based on a preset first coding scheme;

[0050] In this embodiment, the initialization process is completed when the FLASH system is powered on, so as to facilitate the subsequent encoding of relevant data.

[0051] The first coding scheme includes the RS (255, 223) coding scheme, the finite field includes the Galois finite field GF (256), the coding information initialization includes the FLASH coding address, the FLASH decoding address, and the initialization of the RS code type, wherein the parameter initialization includes the number of information bits m represented by a symbol, the number of symbols n contained in a codeword, the number of symbols k in the coded information segment, the maximum number of error symbols that can be corrected by a codeword t = (nk) / 2, the minimum Hamming distance d = 2t + 1, the primitive polynomial, the generating polynomial, etc., wherein the primitive polynomial p (x) = x 8 +x 4 +x 3 +x 2 +1, generating polynomial g(x)=Π(x+α i ), where c = 1 and α is the root of the primitive polynomial.

[0052] It should be noted that the Galois finite field GF(256) contains a field of 256 elements, which is suitable for encoding 8-bit data; the primitive polynomial is a key parameter on the finite field GF(256), which is used to define arithmetic operations on the field; the generating polynomial is also an important parameter in RS coding, which is related to the primitive polynomial and is used to generate the check code.

[0053] Step S12, segmenting the initial data in the FLASH system after the initialization processing according to a preset byte amount to obtain first information segment data of a second byte amount after segmentation, and performing a first encoding processing on the first information segment data to obtain second information segment data of a second byte amount and a first check segment number of the first byte amount;

[0054] In this embodiment, in order to ensure the continuity of the storage address of the relevant information segment data, the information segment and the check segment of the relevant information segment data are stored in segments. Through this segmentation and encoding processing, the FLASH system can ensure the integrity and reliability of the data and maintain normal operation even in the face of space radiation effects such as single event upset (SEU).

[0055] For example, if the number of symbols in the coded information segment is 223 and the number of symbols in the check segment is 32, the initial data will be divided into multiple blocks of 223 bytes (i.e., the aforementioned second byte quantity), which are called information segments, and a check segment of 32 bytes (i.e., the aforementioned first byte quantity) will be generated at the same time. The check segment is additional data calculated during the encoding process and is used for error detection and correction; the encoded first data will be written to FLASH according to a specific storage structure, where the information segment and the check segment may be stored in different physical locations to optimize storage efficiency and error correction capabilities; and once the first data is written to FLASH, the system will be ready for error detection and correction. If an error is detected, the system will use the data in the check segment to determine the location and type of the error and perform corresponding corrective measures.

[0056] It should be noted that when making an error judgment, it can be achieved by calculating the companion vector. If the elements of the companion vector are all zero, the codeword has no error. If there is at least one non-zero element, this indicates that there is an error in the codeword; or by constructing a decoding matrix with the decoding results, and then calculating the correlation value of the data matrix by the Pearson coefficient, when the correlation value is within the preset range, it is determined that the relevant data is correct, otherwise it is judged to be an error, and it can also be achieved by other methods; in addition, the FLASH encoding address stores the information segment; the check segment exists on the FLASH decoding address; and the second information segment data obtained by the first encoding process is basically the same as the first information segment data, and its main purpose is to obtain the check segment data. Of course, in other encoding methods, the second information segment data may be different from the first information segment data, but as long as the relevant purpose is to obtain the check segment data, it falls within the protection scope of this application.

[0057] Step S13, decoding the second information segment data and the first check segment data;

[0058] In this embodiment, decoding processing is performed to determine whether a single event flip has occurred in the data at the relevant position, so that the relevant error can be corrected in time, ensuring that the data stored in the FLASH can maintain its integrity and accuracy even when subjected to external interference.

[0059] Specifically, the decoder will use the received information segment and check segment to calculate the companion, which is a key step in the decoding process and is used to determine the location and type of the error; then based on the companion, the system will solve the roots of the error location polynomial, and then using the roots of the error location polynomial, the system will determine the error locations in the data; once the error locations are determined, the system will calculate the error values ​​at these locations, which is usually done by comparing expected values ​​with actual values; then, error correction operations are performed based on the error locations and error values, which may include replacing the value of the erroneous bit to restore the original data.

[0060] It should be noted that after decoding is completed, the system will update the encoding and decoding address to facilitate decoding of the next segment of data.

[0061] Step S14, determining a decoding correction strategy according to the decoding processing result, and performing decoding online correction processing on the second information segment data according to the decoding correction strategy to restore it to the first information segment data.

[0062] In this embodiment, a decoding correction strategy is intelligently selected and implemented according to the decoding processing result to ensure data reliability and system stability, and to maintain normal operation even in the face of complex and unpredictable space radiation environments.

[0063] Specifically, RS (255, 223) coding can correct up to 16 errors, so the system needs to evaluate the number of errors to determine whether it is within the error correction capability of RS coding; then select the corresponding error correction strategy based on the number of errors to achieve online error correction of the system.

[0064] It should be noted that when performing online error correction for decoding, the first check code data will also be corrected. After the error correction is completed, the error correction result is stored in the decoding address for subsequent processing.

[0065] Through the above steps, by implementing the first coding scheme with stronger error correction capability and selecting different error correction strategies according to different error situations to adapt to different error situations, the problem of poor online error correction capability of the FLASH unit is solved and the online error correction capability of the FLASH unit is improved.

[0066] In an optional embodiment, performing a first encoding process on the first information segment data includes:

[0067] Step S131, reading a second byte of data in the first information segment data, and performing RS encoding processing on the read data by a preset first encoder to obtain the second information segment data and verification data;

[0068] Step S132, writing the FLASH decoding address contained in the encoding information as the first address into the verification data to obtain the first verification segment data.

[0069] In this embodiment, before encoding, the FLASH encoding address is used as the first address; 223 bytes are read as the encoding information segment and RS encoding is performed.

[0070] Among them, the first encoder is an NK-level encoder based on polynomial division; during encoding, the coefficients of the aforementioned primitive polynomial are output in sequence from high to low, so as to realize the output of the information segment in front of the system code, and then the coefficients of the various terms of redundant information are output to complete the RS encoding; after the encoding is completed, a check segment (i.e. the aforementioned check data) will be generated. At this time, the FLASH decoding address is used as the first address, and the 32-byte check segment is written to obtain a complete first check data.

[0071] In an optional embodiment, after obtaining the second information segment data and the first verification segment data, the method further includes:

[0072] Step S133, performing encoding completion detection on all the second information segment data;

[0073] Step S134, when the encoding detection result shows that the encoding of all the second information segment data is completed, resetting the preset FLASH encoding address;

[0074] Step S135, when the encoding detection result is that all the second information segment data have not been encoded, the preset FLASH encoding address is subjected to a first processing to obtain the third information segment data, and the third information segment data is subjected to the first encoding processing to obtain the second verification segment data; and the preset FLASH decoding address is subjected to a second processing to store the second verification segment data; wherein the encoding information includes the FLASH encoding address and the FLASH decoding address.

[0075] In this embodiment, after the encoding and verification data are written, it is necessary to determine whether all the data have been encoded. If the encoding of all the data has not been completed, the FLASH encoding address + 223 (i.e., the aforementioned first processing) and the decoding address + 32 (i.e., the aforementioned second processing) are added. Specifically, the FLASH encoding address is subjected to the first processing, and the third information segment data is read from the processed address; the FLASH decoding address is subjected to the second processing, and then the third information segment data is RS encoded, and the obtained verification data (the fourth information segment data will be obtained at the same time) is stored in the address obtained after the second processing, thereby obtaining the second verification segment data; if the encoding of all the data is completed, the FLASH encoding and decoding address will be reset, that is, the FLASH encoding address is reset to 0x0000000, and the decoding address is reset to 0x1BE0000, so as to repeat the aforementioned related operations.

[0076] In an optional embodiment, determining a decoding correction strategy according to a decoding processing result, and performing decoding online correction processing on the first data according to the decoding correction strategy includes:

[0077] Step S141, when the decoding result is a first error type, erasing the stored target error data according to a preset FLASH coding address, and filling the corrected data into the location of the target error data, wherein the coding information includes the FLASH coding address;

[0078] Step S142, when the decoding processing result is a second error type, sending a data request to an external processor through the on-chip bus to re-acquire the first information segment data; performing the first encoding processing on the re-acquired first information segment data to obtain third verification data; writing the third verification segment data and the re-acquired first information segment data into the location where the target error data is located.

[0079] In this embodiment, when the number of errors is greater than 16, it is determined to be an uncorrectable error, otherwise it is a correctable error, and then a corresponding error correction strategy is selected.

[0080] Among them, for correctable errors (i.e., the first error type mentioned above), the error-corrected codeword is obtained by decoding. At this time, the originally stored error data is erased according to the FLASH encoding address, and the error-corrected codeword is written to the corresponding address; and for uncorrectable errors (i.e., the second error type mentioned above), the erroneous codeword is corrected in a manner similar to breakpoint resumption. The specific steps are as follows:

[0081] 1. Send error information to the external processor through the on-chip bus, requesting the external processor to resend the information segment data;

[0082] 2. Receive the retransmitted information segment data (i.e., the aforementioned re-acquired first information segment data) through the on-chip bus;

[0083] 3. Re-encode the information segment data by RS to obtain the check segment data (i.e. the aforementioned third check segment data) and the information segment data;

[0084] 4. Erase the originally stored erroneous data according to the FLASH encoding and decoding address, and write the recovered correct information segment (ie the aforementioned recovered first information segment) and the check segment data into the location in the FLASH where the erroneous data was originally stored.

[0085] It should be noted that for correctable errors, the correct specific codeword can be filled into the original erroneous data position. For uncorrectable errors, since the specific location of the error cannot be confirmed (that is, whether it is an information segment error or a check segment error), the correct information segment and check segment can only be filled into the error area together for subsequent processing.

[0086] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, a magnetic disk, or an optical disk), and includes a number of instructions for enabling a terminal device (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present invention.

[0087] In this embodiment, a FLASH system online error correction device for laser communication is also provided, which is used to implement the above embodiments and preferred implementations, and will not be repeated for what has been described. As used below, the term "module" can implement a combination of software and / or hardware for a predetermined function. Although the device described in the following embodiments is preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0088] Figure 2 is a structural block diagram of an online error correction device for a FLASH system for laser communication according to an embodiment of the present invention. Figure 2 As shown, the device comprises:

[0089] An initialization module 21, configured to perform initialization processing on the FLASH system, wherein the initialization processing includes initializing coding information and parameters in a preset finite field based on a preset first coding scheme;

[0090] The first encoding module 22 is used to segment the initial data in the FLASH system after the initialization processing according to a preset byte amount to obtain first information segment data of a second byte amount after the segmentation, and perform a first encoding processing on the first information segment data to obtain second information segment data of a second byte amount and a first check segment number of the first byte amount;

[0091] A decoding module 23, configured to decode the second information segment data and the first check segment data;

[0092] The error correction module 24 is used to determine a decoding correction strategy according to the decoding processing result, and perform decoding online correction processing on the first information segment data according to the decoding correction strategy.

[0093] In an optional embodiment, the performing a first encoding process on the information segment data includes:

[0094] Reading a second byte of data in the first information segment data, and performing RS encoding processing on the read data through a preset first encoder to obtain the second information segment data and verification data;

[0095] The FLASH decoding address contained in the encoding information is written into the verification segment data as the first address to obtain the second verification segment data, so as to restore to the first information segment data.

[0096] In an optional embodiment, the device further comprises:

[0097] an encoding completion detection module, configured to perform encoding completion detection on all the second information segment data after obtaining the second information segment data and the first verification segment data;

[0098] A reset module, configured to reset a preset FLASH encoding address when the encoding detection result indicates that the encoding of all the second information segment data has been completed;

[0099] A reprocessing module is used to, when the encoding detection result is that all the second information segment data have not been encoded, first process the preset FLASH encoding address to obtain the third information segment data, and perform the first encoding process on the third information segment data to obtain the second verification segment data; and perform a second process on the preset FLASH decoding address to store the second verification segment data, wherein the encoding information includes the FLASH encoding address and the FLASH decoding address.

[0100] In an optional embodiment, determining a decoding correction strategy according to a decoding processing result, and performing decoding online correction processing on the first data according to the decoding correction strategy includes:

[0101] In the case where the decoding result is a first error type, erasing the stored target error data according to a preset FLASH encoding address, and filling the corrected data into the location of the target error data, wherein the encoding information includes the FLASH encoding address;

[0102] When the decoding processing result is a second error type, a data request is sent to an external processor through an on-chip bus to retrieve the first information segment data; the first encoding processing is performed on the retrieved first information segment data to obtain third check segment data; and the third check segment data and the retrieved first information segment data are written into the location where the target error data is located.

[0103] It should be noted that the above modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0104] The following is an explanation using specific examples.

[0105] The software implementation process of the FLASH software online error correction method described in this proposal is as follows Figure 3 As shown:

[0106] From the above software flow chart, the specific description of the software implementation process is as follows:

[0107] Step 1: Power on the system and complete the initialization of FLASH encoding address, decoding address, RS code type and parameters. Step 1.1: RS code type and parameter initialization

[0108] The RS coding scheme used is RS(255,223), which is defined on the Galois finite field GF(256) and its parameters are as follows:

[0109] m, the number of bits of information represented by a symbol;

[0110] n, the number of symbols contained in a codeword;

[0111] k, the number of symbols encoding the information segment;

[0112] t = (nk) / 2, the maximum number of error symbols that can be corrected by a codeword;

[0113] d = 2t + 1, minimum Hamming distance;

[0114] Primitive polynomial: p(x) = x 8 +x 4 +x 3+x 2 +1;

[0115] Generator polynomial: c=1, α is the root of the primitive polynomial.

[0116] Step 1.2: Initialize the FLASH encoding address

[0117] The number of symbols in the coded information segment is 223, and the number of symbols in the check segment is 32. To ensure the continuity of the data storage address of the information segment, the information segment and the check segment are stored in segments. Taking 256Mb, 8bit FLASH as an example, the address allocation is as follows: the space of the information segment is 223Mb, corresponding to the address segment 0x000000~0x1BDFFFF, the space of the check segment is 32Mb, corresponding to the address segment 0x1BE0000~0x1FE0000, the FLASH encoding address is initialized to 0x0000000, and the decoding address is initialized to 0x1BE0000.

[0118] Step 2: Divide the data of the information segment in the FLASH into 223-byte segments, perform RS (255, 223) encoding on each segment, and write the 32-byte checksum generated after encoding into the corresponding checksum segment.

[0119] Step 2.1: RS encoding

[0120] Before encoding, the FLASH encoding address is used as the first address; 223 bytes are read as the encoding information segment and RS encoding is performed. A NK-level encoder based on polynomial division is used.

[0121] At the beginning of the calculation, the coefficients of each item are output from high to low in sequence to realize the output of the information segment in front of the system code, and then the coefficients of each item of redundant information are output to complete the RS encoding; after encoding, the FLASH decoding address is used as the first address and 32 bytes of check data are written.

[0122] Step 2.2: Update the encoding address

[0123] After the encoding and verification data are written, it is necessary to determine whether all data have been encoded. If all data encoding is not completed, the FLASH encoding address + 223; the decoding address + 32, and the new information segment data is encoded; if all data encoding is completed, the FLASH encoding and decoding address will be reset, that is, the FLASH encoding address 0x0000000, the decoding address 0x1BE0000.

[0124] Step 3: Read the information segment and the check segment according to the FLASH encoding address, perform RS (255, 223) decoding on each segment of data, and determine the error status based on the decoding result.

[0125] Step 3.1RS: Decoding

[0126] Calculate the companion from the received information;

[0127] According to the companion, find the error position polynomial coefficient;

[0128] Find the root of the error position polynomial to obtain the number of error positions and error positions;

[0129] The error value is calculated from the number of error positions, thereby obtaining an error pattern (the error pattern refers to the error value. The correct value can be obtained based on the error value and the received value to complete the error correction);

[0130] Error correction completed.

[0131] Among them, (3) is generally implemented by substitution detection, that is, Qian search, and (4) can be implemented using the Forney formula.

[0132] Step 3.2: Error status judgment

[0133] The type of error can be determined based on the number of error positions and the error location. The maximum number of error symbols that can be corrected by the RS (255, 223) codeword is 16. If the number of error positions is greater than 16, it is an uncorrectable error; if it is less than or equal to 16, it is a correctable error.

[0134] Step 3.3: Update the encoding address

[0135] If there is an error after decoding, the FLASH encoding and decoding address remains unchanged; if there is no error, it is necessary to determine whether all data has been decoded and corrected. If all data decoding is not completed, the FLASH encoding address + 223; the decoding address + 32, and the new information segment and check segment data are decoded; if all data encoding is completed, the FLASH encoding and decoding address will be reset, that is, the FLASH encoding address 0x0000000, the decoding address 0x1BE0000, and a new round of decoding will begin.

[0136] Step 4: If there is an error, different error correction methods are used according to different error types.

[0137] Step 4.1: Correctable Errors

[0138] When the number of error characters is not greater than 16, the error-corrected codeword can be obtained by decoding. At this time, after erasing the stored error data according to the FLASH encoding address, the error-corrected codeword can be written to the corresponding address.

[0139] Step 4.2: Uncorrectable Error

[0140] When the number of error characters is greater than 16, the error codewords need to be corrected in a similar way to breakpoint resuming. The specific steps are as follows:

[0141] Step 4.21: Send error information to the external processor via the on-chip bus, requesting the external processor to resend the information segment data;

[0142] Step 4.22: Receive the retransmitted information segment data through the on-chip bus;

[0143] Step 4.23: Perform RS encoding on the information segment data to obtain the check segment data;

[0144] Step 4.24: Write the data of the information segment and the check segment into FLASH.

[0145] This solution improves the online error correction capability of the FLASH software by applying a coding method with stronger error correction capability and completing error correction by retransmission when the error exceeds the error correction capability of the coding.

[0146] An embodiment of the present invention further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.

[0147] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0148] An embodiment of the present invention further provides an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0149] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0150] Through the description of the above implementation methods, technical personnel in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0151] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of modules or units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0152] The units described as separate components may or may not be physically separated, and the components shown as units may be one physical unit or multiple physical units, that is, they may be located in one place or distributed in multiple different places. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0153] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0154] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of the embodiment of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium, including several instructions to enable a device (which can be a single-chip microcomputer, chip, etc.) or a processor (processor) to perform all or part of the steps of the various embodiments of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read only memory (ROM), random access memory (RAM), disk or optical disk and other media that can store program code.

[0155] The above contents are only specific implementation methods of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application shall be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A method for online error correction of a FLASH system for laser communication, characterized in that: include: Performing initialization processing on the FLASH system, wherein the initialization processing includes initializing coding information and parameters in a preset finite field based on a preset first coding scheme; Segmenting the initial data in the FLASH system after the initialization processing according to a preset byte amount to obtain first information segment data of a second byte amount after the segmentation, and performing a first encoding processing on the first information segment data to obtain second information segment data of a second byte amount and first check segment data of a first byte amount; Decoding the second information segment data and the first check segment data; A decoding correction strategy is determined according to the decoding processing result, and decoding online correction processing is performed on the second information segment data according to the decoding correction strategy to restore it to the first information segment data.

2. The method according to claim 1, characterized in that The performing a first encoding process on the first information segment data includes: Reading a second byte of data in the first information segment data, and performing RS encoding processing on the read data through a preset first encoder to obtain the second information segment data and verification data; The FLASH decoding address contained in the encoding information is written into the verification data as the first address to obtain the first verification segment data.

3. The method according to claim 1, characterized in that After obtaining the second information segment data and the first verification segment data, the method further includes: Performing encoding and completion detection on all the second information segment data; When the encoding detection result shows that the encoding of all the second information segment data is completed, resetting the preset FLASH encoding address; When the encoding detection result is that all the second information segment data have not been encoded, the preset FLASH encoding address is first processed to obtain the third information segment data, and the first encoding process is performed on the third information segment data to obtain the second verification segment data; and the preset FLASH decoding address is second processed to store the second verification segment data, wherein the encoding information includes the FLASH encoding address and the FLASH decoding address.

4. The method according to claim 1, characterized in that Determining a decoding correction strategy according to a decoding processing result, and performing decoding online correction processing on the first data according to the decoding correction strategy includes: In the case where the decoding result is a first error type, erasing the stored target error data according to a preset FLASH encoding address, and filling the corrected data into the location of the target error data, wherein the encoding information includes the FLASH encoding address; When the decoding processing result is a second error type, a data request is sent to an external processor through an on-chip bus to retrieve the first information segment data; the first encoding processing is performed on the retrieved first information segment data to obtain third check segment data; and the third check segment data and the retrieved first information segment data are written into the location where the target error data is located.

5. A FLASH system online error correction device for laser communication, characterized in that: include: An initialization module, used for performing initialization processing on the FLASH system, wherein the initialization processing includes initializing coding information and parameters in a preset finite field based on a preset first coding scheme; A first encoding module is used to segment the initial data in the FLASH system after the initialization processing according to a preset byte amount to obtain first information segment data of a second byte amount after the segmentation, and perform a first encoding processing on the first information segment data to obtain second information segment data of a second byte amount and a first check segment number of the first byte amount; A decoding module, used for decoding the second information segment data and the first check segment data; The error correction module is used to determine a decoding correction strategy according to the decoding processing result, and perform decoding online correction processing on the second information segment data according to the decoding correction strategy to restore it to the first information segment data.

6. The device according to claim 5, characterized in that The first encoding process of the information segment data comprises: Reading a second byte of data in the first information segment data, and performing RS encoding processing on the read data through a preset first encoder to obtain the second information segment data and verification data; The FLASH decoding address contained in the encoding information is written into the verification segment data as the first address to obtain the first verification segment data.

7. The device according to claim 5, characterized in that The device also includes: an encoding completion detection module, configured to perform encoding completion detection on all the second information segment data after obtaining the second information segment data and the first verification segment data; A reset module, configured to reset a preset FLASH encoding address when the encoding detection result indicates that the encoding of all the second information segment data has been completed; A reprocessing module is used to, when the encoding detection result is that all the second information segment data have not been encoded, first process the preset FLASH encoding address to obtain the third information segment data, and perform the first encoding process on the third information segment data to obtain the second verification segment data; and perform a second process on the preset FLASH decoding address to store the second verification segment data, wherein the encoding information includes the FLASH encoding address and the FLASH decoding address.

8. The device according to claim 5, characterized in that Determining a decoding correction strategy according to a decoding processing result, and performing decoding online correction processing on the first data according to the decoding correction strategy includes: In the case where the decoding result is a first error type, erasing the stored target error data according to a preset FLASH encoding address, and filling the corrected data into the location of the target error data, wherein the encoding information includes the FLASH encoding address; When the decoding processing result is a second error type, a data request is sent to an external processor through an on-chip bus to retrieve the first information segment data; the first encoding processing is performed on the retrieved first information segment data to obtain third check segment data; and the third check segment data and the retrieved first information segment data are written into the location where the target error data is located.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program is configured to execute the method according to any one of claims 1 to 4 when executed.

10. An electronic device comprising a memory and a processor, characterized in that: A computer program is stored in the memory, and the processor is configured to run the computer program to perform the method according to any one of claims 1 to 4.

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