Communication interface circuit and communication method thereof

Abstract

The invention discloses a communication interface circuit and a communication method thereof, and relates to the technical field of communication interfaces. The communication interface circuit includes: each counting sub-circuit of a master counting circuit records a master counting time required to complete execution of a previous request instruction of a corresponding master device. Each of the slave count circuits records a slave count time required to execute a previous response instruction of a completion corresponding slave device. The first determination circuit generates a first determination result when it is determined that the source primary end counting circuit has a counting sub-circuit in an idle state. The second determination circuit generates a second determination result when determining that the absolute difference between the master end counting time recorded by each counting sub-circuit in the non-idle state of the source master end counting circuit and the slave end counting time recorded by the target slave end counting circuit is not less than the burst duration. And the control circuit sends the current request instruction to the arbitration circuit for arbitration according to the first and second determination results.

Description

Technical Field

[0001] The present invention relates to the technical field of communication interfaces, and in particular to a communication interface circuit and a communication method thereof. Background Art

[0002] In some electronic systems such as system-on-chip, multiple master devices and multiple slave devices are often provided, and these devices need communication interface circuits such as router circuits to communicate with each other so that commands and data can be transmitted between different devices.

[0003] When the master device reads data from the slave device, due to the limited number of channels, conflicts may occur between request commands sent by the master device, so that the slave device cannot correctly send data back to the master device. Summary of the invention

[0004] Based on the problems of the prior art, one of the purposes of the present application is to provide a communication interface circuit and a communication method thereof to improve the prior art.

[0005] The present invention includes a communication interface circuit, which is applied to a network system. The network system includes multiple master-end devices and multiple slave-end devices. The communication interface circuit includes: multiple master-end counting circuits, multiple slave-end counting circuits, a control circuit, a first determination circuit, and a second determination circuit. Each of the master-end counting circuits corresponds to a corresponding master-end device among the master-end devices, and each includes multiple counting subcircuits, each counting subcircuit records the master-end counting time required to complete the execution of the previous request instruction of the corresponding master-end device. Each of the slave-end counting circuits corresponds to a corresponding slave-end device among the multiple slave-end devices, and records the slave-end counting time required to complete the execution of the previous response instruction of the corresponding slave-end device. The control circuit confirms the source master-end counting circuit and the target slave-end counting circuit corresponding to the current request instruction received, the source master-end counting circuit is one of the master-end counting circuits, and the target slave-end counting circuit is one of the slave-end counting circuits. The first determination circuit generates a first determination result when it is determined that there is a counting subcircuit in an idle state among the counting subcircuits included in the source master-end counting circuit. The second determination circuit generates a second determination result when determining that the absolute difference between the source master end counting time recorded by each counting subcircuit in a non-idle state in the counting subcircuit included in the source master end counting circuit and the target slave end counting time recorded by the target slave end counting circuit is not less than the burst duration. The control circuit sends the current request instruction to the arbitration circuit for arbitration according to the first determination result and the second determination result.

[0006] The present invention also includes a communication method, which is applied to a communication interface circuit in a network system. The network system includes a plurality of master-end devices and a plurality of slave-end devices. The communication method includes: each of the plurality of master-end counting circuits corresponds to a corresponding master-end device in the master-end devices, and each of the plurality of counting subcircuits included in each of the master-end counting circuits records the master-end counting time required to execute and complete a previous request instruction of the corresponding master-end device; each of the plurality of slave-end counting circuits corresponds to a corresponding slave-end device in the slave-end devices, and each of the slave-end counting circuits records the slave-end counting time required to execute and complete a previous response instruction of the corresponding slave-end device; and the control circuit confirms that the source master-end counting circuit corresponding to the current request instruction received a first determining circuit generates a first determining result when it is determined that there is a counting sub-circuit in an idle state among the counting sub-circuits included in the source master-end counting circuit; a second determining circuit generates a second determining result when it is determined that the absolute difference between the source master-end counting time recorded by each counting sub-circuit in a non-idle state in the counting sub-circuit included in the source master-end counting circuit and the target slave-end counting time recorded by the target slave-end counting circuit is not less than the burst duration; and the control circuit sends the current request instruction to the arbitration circuit for arbitration according to the first determining result and the second determining result.

[0007] The features, implementation and effects of the present application are described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 A block diagram showing a network system according to an embodiment of the present invention;

[0009] Figure 2 A more detailed block diagram showing a communication interface circuit in one embodiment of the present invention;

[0010] Figure 3 A timing diagram showing the execution of a first request instruction and a second request instruction received by a communication interface circuit in one embodiment of the present invention;

[0011] Figure 4 A flow chart showing a communication method in one embodiment of the present invention; and

[0012] Figure 5 A flow chart of a communication method according to an embodiment of the present invention is shown.

[0013] 130: communication interface circuit;

[0014] 200A~200D: main end counting circuit;

[0015] 210A~210D: slave end counting circuit;

[0016] 220: control circuit;

[0017] 230: first determination circuit;

[0018] 240: second determination circuit;

[0019] 250: arbitration circuit;

[0020] 260: counting value updating circuit;

[0021] 270A-270D: counting sub-circuit;

[0022] AR: feedback signal;

[0023] BUL: burst duration;

[0024] CLK: clock signal;

[0025] CMD: current request command;

[0026] MA~MD: master end counting time;

[0027] SA~SD: Slave end counting time. DETAILED DESCRIPTION

[0028] The technical terms used in the following descriptions refer to the customary terms in the technical field. If some of the terms are explained or defined in this specification, the interpretation of the terms shall be based on the explanation or definition in this specification.

[0029] One object of the present invention is to provide a communication interface circuit and a communication method thereof, wherein a master-end counting circuit records the time required for a corresponding master-end device to execute and complete a previous request instruction, and a slave-end counting circuit records the time required for a corresponding slave-end device to execute and complete a previous request instruction, so as to confirm whether a current request instruction with a burst duration will not conflict with a previous request instruction to determine whether to allow the current request instruction to enter arbitration. In this way, the communication interface circuit will greatly reduce the probability of a current request instruction conflicting with a previous request instruction.

[0030] Please refer to Figure 1 . Figure 1 A block diagram of a network system 100 according to an embodiment of the present invention is shown. The network system 100 includes a plurality of master devices 110A-110D, a plurality of slave devices 120A-120D, and a communication interface circuit 130.

[0031] In one embodiment, the network system 100 is a system on a chip (SoC). The master devices 110A-110D and the slave devices 120A-120D are functional circuits in the SoC and perform communication behaviors including data transmission and request instruction transmission through the communication interface circuit 130 .

[0032] The following will take data transmission as a specific example of the above-mentioned communication behavior to illustrate the operation of the communication interface circuit 130. For example, the master device 110A can transmit a current request command CMD, and after arbitration and transmission by the communication interface circuit 130, the slave device 120C receives the current request command CMD and accordingly returns data DA through the communication interface circuit 130.

[0033] Since the number of channels of the communication interface circuit 130 is limited, in order to avoid conflicts between multiple request instructions successively transmitted by multiple host devices 110A-110D, the communication interface circuit 130 may be provided with a conflict reduction mechanism to reduce the possibility of conflicts between request instructions.

[0034] Figure 2 The detailed block diagram of the communication interface circuit 130 in one embodiment of the present invention is shown. The communication interface circuit 130 includes: a plurality of master-end counting circuits 200A-200D, a plurality of slave-end counting circuits 210A-210D, a control circuit 220, a first determination circuit 230, a second determination circuit 240, an arbitration circuit 250, and a count value update circuit 260.

[0035] Each circuit of the communication interface circuit 130 can operate according to a clock signal CLK. Figure 2 In FIG. 2 , only the clock signal CLK fed to the count value updating circuit 260 is representatively shown.

[0036] The main end counting circuits 200A to 200D are respectively connected to Figure 1 The master devices 110A to 110D are arranged one by one. Each of the master counting circuits 200A to 200D includes a plurality of preset number of counting subcircuits, each counting subcircuit recording the master counting time of a corresponding master device. The preset number is the maximum number of request instructions that the corresponding master device can send within a time interval, and the time interval refers to the time period from the corresponding master device sending the first request instruction to receiving its response instruction. Figure 2 In the example shown, the master-side counting circuit 200A includes four counting sub-circuits 270A-270D to respectively record the corresponding master-side counting times MA-MD, that is, the maximum request number of the master-side counting circuit 200A is four.

[0037] In one embodiment, each master-end counting time MA-MD is the time required to execute the previous request instruction of the master-end device 110A. Taking the master-end counting time MA (which is the time recorded by the counting subcircuit 270A (corresponding to the master-end device 110A)) as an example, when the master-end counting time MA is a non-zero value, it means that the master-end device 110A has a previous request instruction that has not been executed, and this request instruction requires the time represented by the value to be completed. In the embodiment of the present case, the required time can be represented by a non-zero value quantized by "data transmission unit time", and one data transmission unit time corresponds to one clock signal CLK. When the master-end counting time MA is 0, it means that the master-end device 110A has no previous request instruction that has not been executed.

[0038] The slave counting circuits 210A to 210D are respectively connected to Figure 1 The slave devices 120A-120D are arranged in a one-to-one correspondence. Each of the slave counting circuits 210A-210D records a slave counting time SA-SD of a corresponding slave device.

[0039] In one embodiment, each slave counting time SA-SD is the time required to execute the previous response instruction of the corresponding slave device, and is greater than or equal to a threshold. The response instruction is the instruction of the slave device to respond to the received request instruction to transmit the requested data back to the corresponding master device. Taking the slave counting time SC (which is the time recorded by the slave counting circuit 210C (corresponding to the slave device 120C)) as an example, when the slave counting time SC is greater than the threshold, the slave device 120C has a previous response instruction that has not been executed, and this response instruction requires the time recorded by the slave counting time SC to be completed. When the slave counting time SC is the threshold, it means that the slave device 120C has no previous response instruction that has not been executed, that is, the slave device 120C has not received the request instruction or the received request instructions have been executed. In one embodiment, the above threshold is the minimum time required to read a piece of data from the corresponding slave device. For example, when the slave device 120A needs at least 8 data transmission units to read back a piece of data, the threshold corresponding to the slave counting time SC is 8. It is not difficult to understand that the threshold is related to the delay of the network system 100 , for example, the minimum delay of the network system 100 .

[0040] The control circuit 220 determines the source master-end counting circuit and the target slave-end counting circuit corresponding to the current request command CMD received by the communication interface circuit 130 .

[0041] In one embodiment, the current request command CMD includes source master device information, target slave device information, and requested data volume. The control circuit 220 determines the source master device corresponding to the current request command CMD among the master devices 110A-110D, and further determines the source master counting circuit corresponding to the source master device. Similarly, the control circuit 220 determines the target slave device corresponding to the current request command CMD among the slave devices 120A-120D, and further determines the target slave counting circuit corresponding to the target slave device. For example, the current request command CMD includes information of the master device 110A and the slave device 120C, such as the media access address (MAC), and the control circuit 220 determines that the source master device is the master device 110A and the target slave device is the slave device 120C, and further determines that the source master counting circuit is the master counting circuit 200A and the target slave counting circuit is the slave counting circuit 210C.

[0042] The control circuit 220 determines the burst duration BUL according to the amount of requested data included in the request instruction CMD. The burst duration BUL is the time required for the target slave device to transmit the amount of data required by the current request instruction CMD. The burst duration BUL can also be quantified by "data transmission unit time" to indicate how much time is required to transmit the required amount of data. It is understandable that when the amount of data requested by each request instruction is the same, that is, the burst duration is a fixed duration, then the data amount can be set in the configuration file of the network system 100, and subsequent request instructions do not need to include the data amount.

[0043] The first determination circuit 230 is used to determine whether there is at least one counting sub-circuit in an idle state among the plurality of counting sub-circuits included in the source master end counting circuit. If there is, the first determination circuit 230 generates a first determination result.

[0044] In one embodiment, the first determination circuit 230 determines that there is a counting subcircuit in the source master-end counting circuit in an idle state, and the master-end counting time recorded by the counting subcircuit in the idle state is the preset time, when the master-end counting time recorded by the counting subcircuit included in the source master-end counting circuit includes a preset time (e.g., 0). The first determination circuit 230 determines that there is no counting subcircuit in the source master-end counting circuit in an idle state, when the master-end counting time recorded by the counting subcircuit included in the source master-end counting circuit does not include the preset time.

[0045] In one embodiment, the control circuit 220 can inform the first determination circuit 230 that the source of the current request command CMD is the master counting circuit 200A, so that the first determination circuit 230 determines the status of the counting sub-circuits 270A-270D accordingly.

[0046] For example, when the master end counting time MA recorded by the counting subcircuit 270A is 0, and the master end counting times MB-MD recorded by the other counting subcircuits 270B-270D are not 0, the first determination circuit 230 determines that the counting subcircuit 270A is in an idle state, and determines that the counting subcircuits 270B-270D are in a non-idle state. At this time, since there is a counting subcircuit 270A in an idle state, the first determination circuit 230 generates a first determination result.

[0047] The second determination circuit 240 is used to determine whether the absolute difference between the source master end counting time recorded by each counting sub-circuit in the non-idle state in the source master end counting circuit and the target slave end counting time recorded by the target slave end counting circuit is less than the burst time length BUL. If they are not less than the burst time length BUL, the second determination circuit 240 generates a second determination result.

[0048] Continuing with the above example, the second determination circuit 240 can learn from the control circuit 220 that the source master-end counting circuit is the master-end counting circuit 200A, the counting sub-circuit in the master-end counting circuit 200A that is in a non-idle state is the counting sub-circuit 270B-270D, and the target slave-end counting circuit is the slave-end counting circuit 210C, so as to obtain the master-end counting times MB-MD recorded by the counting sub-circuits 270B-270D and the slave-end counting time SC recorded by the slave-end counting circuit 210C and calculate their absolute differences to determine whether each absolute difference is less than the burst duration BUL.

[0049] When each absolute difference is not less than the burst duration BUL, it indicates that the return time of the data requested by the current request command CMD will not overlap with the return time of the data requested by these previous request commands. In other words, for the host device, sending the current request command CMD will not conflict with the previous request command it has sent. The second determination circuit 240 will generate a second determination result accordingly.

[0050] When any absolute difference is less than the burst duration BUL, it indicates that the return time of the data requested by the current request command CMD will overlap with the return time of the data requested by at least one previous request command. In other words, for the host device, sending the current request command CMD will conflict with at least one previous request command, so that the communication interface circuit 130 cannot return the data requested by the current request command CMD to the host device.

[0051] The control circuit 220 sends the current request instruction CMD to the arbitration circuit 250 for arbitration according to the first determination result generated by the first determination circuit 230 and the second determination result generated by the second determination circuit 240. The detailed process of arbitration can be referred to the existing arbitration technology, so it is not described in detail.

[0052] When the control circuit 220 receives the feedback signal AR returned by the arbitration circuit 250 indicating successful arbitration for the current request command CMD, the control circuit 220 controls the count value update circuit 260 to update the master end count time recorded by the count sub-circuit in the idle state, such as the count sub-circuit 270A, to the slave end count time SC recorded by the target slave end count circuit corresponding to the current request command CMD, such as the slave end count circuit 210C. At this time, the count sub-circuit in the idle state enters a non-idle state. In this way, the communication interface circuit 130 can know when the master end device can receive the data requested by the current request command CMD from the slave end count time (non-0) recorded by the count sub-circuit. In one embodiment, the slave end count time recorded by the count sub-circuit in the non-idle state is an interval value, the slave end count time SC is the starting point of the interval value, and the sum of the slave end count time SC and the burst duration BUL is the end point of the interval value.

[0053] After receiving the feedback signal AR, the control circuit 220 also calculates the sum of the slave counting time recorded by the target slave counting circuit and the burst duration BUL, and controls the count value update circuit 260 to update the slave counting time recorded by the target slave counting circuit to the calculated sum, indicating when (after the slave counting time) the slave device corresponding to the slave counting circuit can respond to another new request.

[0054] In addition, the count value update circuit 260 can update the master count time recorded by each counting sub-circuit in a non-idle state and the slave count time recorded by each slave count circuit based on each data transmission unit time (for example, according to each clock signal CLK). For example, each master count time and each slave count time are updated by decreasing the value by 1 for each data transmission unit time.

[0055] In one embodiment, taking the slave counting time SA of the slave counting circuit 210A as an example, when the slave counting time SA recorded by the slave counting circuit 210A is equal to the threshold, the count value update circuit 260 stops updating the slave counting time SA recorded by the slave counting circuit 210A. At this time, the slave counting circuit 210A returns to the initial state.

[0056] In one embodiment, the control circuit 220 does not send the current request instruction CMD to the arbitration circuit 250 and does not perform arbitration when the first determination circuit 230 determines that there is no counting sub-circuit in an idle state in the master-end counting circuit corresponding to the current request instruction CMD or when the second determination circuit 240 determines that the absolute difference between the source master-end counting time and the target slave-end counting time of the target slave-end counting circuit of at least one counting sub-circuit in a non-idle state in the corresponding master-end counting circuit is less than the burst duration BUL.

[0057] At this time, according to different hardware designs, the current request instruction CMD can be selectively temporarily stored in the source master device such as the master device 110A, or temporarily stored in the temporary storage circuit (not shown) of the communication interface circuit 130, until the first determination circuit 230 determines that there is a counting sub-circuit in the master counting circuit that is in an idle state and the second determination circuit 240 determines that the absolute difference between the master counting time of each counting sub-circuit in the master counting circuit that is in a non-idle state and the slave counting time of the target slave counting circuit is not less than the burst duration BUL, the current request instruction CMD is sent to the arbitration circuit 250 for arbitration.

[0058] Please refer to Figure 3 . Figure 3 The execution timing diagram of the first request command CM1 and the second request command CM2 received by the communication interface circuit 130 in one embodiment of the present invention is shown. The first request command CM1 is sent by the master device 110A to request to read 4 units of data from the slave device 120A, and the second request command CM2 is sent by the master device 110A to request to read 4 units of data from a slave device.

[0059] In this example, it is assumed that in the initial state, the slave device 120A has no unexecuted request instruction. At this time, the slave counting time SA recorded by the slave counting circuit 210A corresponding to the slave device 120A is a threshold value such as 8.

[0060] When the communication interface circuit 130 receives the first request instruction CM1 sent by the master device 110A, the first determination circuit 230 determines that the master counting circuit 200A corresponding to the master device 110A has a counting sub-circuit in an idle state, such as the counting sub-circuit 270A, and the second determination circuit 240 determines that the absolute difference between the master counting time and the slave counting time SA recorded by the counting sub-circuit in the non-idle state in the master counting circuit 200A is not less than the burst duration BUL, the control circuit 220 sends the first request instruction CM1 to the arbitration circuit 250 for arbitration.

[0061] After receiving the feedback signal AR indicating the successful arbitration of the first request instruction CM1 sent by the arbitration circuit 250, the control circuit 220 controls the count value update circuit 260 to update the master end count time MA recorded by the counting subcircuit 270A to the slave end count time SA (8) recorded by the slave end count circuit 210A, and calculates the sum of the slave end count time SA and the burst duration BUL (4) to update the slave end count time SA recorded by the slave end count circuit 210A to this sum. At this time, the master end count time MA recorded by the counting subcircuit 270A is 8, the slave end count time SA1 recorded by the slave end count circuit 210A is 12, and the counting subcircuit 270A is in a non-idle state. Further, the control circuit 220 determines that the running time window of the first request instruction CM1 is [8,12] according to the burst duration BUL, so the master end count time MA recorded by the counting subcircuit 270A is updated to the interval value [8,12].

[0062] When the communication interface circuit 130 receives the second request instruction CM2 sent by the master device 110A to read data from a slave device, and the burst duration BUL of the second request instruction CM2 is still 4, the first determination circuit 230 determines that the master counting circuit 200A has a counting subcircuit in an idle state, such as the counting subcircuit 270B. The second determination circuit 240 further determines whether the absolute difference between the master counting time (such as the master counting time MA of the counting subcircuit 270A) and the slave counting time of the counting subcircuit in the master counting circuit 200A in a non-idle state is not less than the burst duration BUL. Several possible usage scenarios of the second request instruction CM2 are described below.

[0063] In the first usage scenario, assuming that the second request instruction CM2 (in Figure 3 The target slave device indicated as the second request instruction CM2 (1)) is still the slave device 120A. The second determination circuit 240 determines that the absolute difference |8-12|=4 between the master counting time MA recorded by the counting subcircuit 270A in the non-idle state and the slave counting time SA recorded by the slave counting circuit 210A is not less than the burst duration BUL of 4. At this time, the control circuit 220 sends the second request instruction CM2 to the arbitration circuit 250 for arbitration.

[0064] After receiving the feedback signal AR indicating the successful arbitration of the second request instruction CM2 sent by the arbitration circuit 250, the control circuit 220 controls the count value update circuit 260 to update the master end count time MB recorded by the counting subcircuit 270B to the slave end count time SA, and calculates the sum of the slave end count time SA and the burst duration BUL (which is 4), so as to update the slave end count time SA recorded by the slave end counting circuit 210A to this sum. Therefore, the master end count time MB recorded by the counting subcircuit 270B is 12, and the slave end count time SA recorded by the slave end counting circuit 210A is 12+4=16, and the counting subcircuit 270B is in a non-idle state. Further, the control circuit 220 determines that the running time window of the second request instruction CM2 is [12,16] according to the burst duration BUL, so the master end count time MB recorded by the counting subcircuit 270B is updated to the interval value [12,16].

[0065] In the second usage scenario, assuming that the second request instruction CM2 (in Figure 3 The target slave device of the second request instruction CM2 (2) is the slave device 120B, and the slave counting time SB recorded by the corresponding slave counting circuit 210B is 9. The second determination circuit 240 determines that the absolute difference between the master counting time MA recorded by the counting subcircuit 270A in the non-idle state and the slave counting time SB |8-9|=1 is less than the burst duration BUL of 4. Based on this, the control circuit 220 determines that the second request instruction CM2 will conflict with the first request instruction CM1 (as indicated by the three data transmission unit times marked by the oblique lines in the figure). The control circuit 220 does not send the second request instruction CM2 to the arbitration circuit 250 and does not arbitrate it.

[0066] In the third usage scenario, assuming that the second request instruction CM2 (in Figure 3 The target slave device of the second request instruction CM2 (3) is the slave device 120C, and the slave counting time SC recorded by the corresponding slave counting circuit 210C is 8. The second determination circuit 240 determines that the absolute difference between the master counting time MA recorded by the counting subcircuit 270A in the non-idle state and the slave counting time SC |8-8|=0 is less than the burst duration BUL of 4. Based on this, the control circuit 220 determines that the second request instruction CM2 will conflict with the first request instruction CM1 (as indicated by the four data transmission unit times marked by the oblique lines in the figure). The control circuit 220 does not send the second request instruction CM2 to the arbitration circuit 250 and does not arbitrate it.

[0067] In the fourth usage scenario, it is assumed that the second request instruction CM2 (in Figure 3The target slave device indicated as the second request instruction CM2 (4)) is the slave device 120D, and the slave counting time SD recorded by the corresponding slave counting circuit 210D is 16. The second determination circuit 240 determines that the absolute difference between the master counting time MA recorded by the counting subcircuit 270A in the non-idle state and the slave counting time SD |8-16|=6 is not less than the burst duration BUL of 4. At this time, the control circuit 220 determines that there is no conflict between the second request instruction CM2 and the first request instruction CM1, and sends the second request instruction CM2 to the arbitration circuit 250 for arbitration.

[0068] After receiving the feedback signal AR indicating the successful arbitration of the second request instruction CM2 sent by the arbitration circuit 250, the control circuit 220 controls the count value update circuit 260 to update the master end count time MB recorded by the counting subcircuit 270B to the slave end count time SD, and calculates the sum of the slave end count time SD and the burst duration BUL (which is 4), so as to update the slave end count time SD recorded by the slave end counting circuit 210D to this sum. Therefore, the master end count time MB recorded by the counting subcircuit 270B is 16, and the slave end count time SD recorded by the slave end counting circuit 210D is 16+4=20, and the counting subcircuit 270B is in a non-idle state. Further, the control circuit 220 determines that the running time window of the second request instruction CM2 is [16,20] according to the burst duration BUL, so the master end count time MB recorded by the counting subcircuit 270B is updated to the interval value [16,20].

[0069] It is understandable that when the master end counting time recorded by the counting subcircuit is an interval value, the control circuit 220 selects the minimum value in the interval value by default when determining the absolute difference between the master end counting time and the slave end counting time recorded by the counting subcircuit in the non-idle state.

[0070] Please refer to Figure 4 , which is a flow chart of a communication method 400 in an embodiment of the present invention. The communication method 400 can be applied to the communication interface circuit 130, and includes the following steps.

[0071] In step S410 , the control circuit 220 determines the source master counting circuit and the target slave counting circuit corresponding to the received current request command CMD.

[0072] In step S420, the first determination circuit 230 determines whether there is an idle counting sub-circuit in the counting sub-circuit of the source master counting circuit. If yes, the process proceeds to step S430; if no, the process proceeds to step S490.

[0073] In step S430 , when the first determination circuit 230 determines that there is a counting sub-circuit in the counting sub-circuit of the source master-end counting circuit that is in an idle state, a first determination result is generated.

[0074] In step S440, the second determination circuit 240 determines whether the absolute difference between the source master end counting time recorded by each counting sub-circuit in the non-idle state in the source master end counting circuit and the target slave end counting time recorded by the target slave end counting circuit is not less than the burst duration BUL. If so, the process proceeds to step S450; if not, the process proceeds to step S490.

[0075] In step S450 , the second determination circuit 240 generates a second determination result.

[0076] In step S460 , the control circuit 220 sends the current request command CMD to the arbitration circuit 250 for arbitration according to the first determination result and the second determination result.

[0077] In step S470 , the control circuit 220 determines whether it has received a feedback signal AR from the arbitration circuit 250 indicating successful arbitration of the current request command CMD. If so, the process proceeds to step S480 ; if not, the process proceeds to step S470 .

[0078] In step S480, the count value update circuit 260 updates the master end count time MA recorded by the idle state count subcircuit, such as the count subcircuit 270A, to the slave end count time SC recorded by the target slave end count circuit, such as the slave end count circuit 210C. In addition, the count value update circuit 260 calculates the sum of the target slave end count time SC and the burst duration BUL to update the slave end count time SC recorded by the target slave end count circuit 210C to the sum.

[0079] In step S490, when the first determination circuit 230 determines in step S430 that there is no counting sub-circuit in the idle state in the counting sub-circuit of the source master-end counting circuit, or when the second determination circuit 240 determines in step S440 that the absolute difference between the master-end counting time of any counting sub-circuit in the non-idle state and the slave-end counting time of the target slave-end counting circuit is less than the burst duration BUL, the control circuit 220 does not send the current request instruction CMD to the arbitration circuit 250 and does not arbitrate it.

[0080] In addition to performing the above-mentioned operation of determining the current request command CMD to determine whether arbitration is performed, the communication interface circuit 130 can also continuously update the master end counting time and the slave end counting time according to each data transmission unit time.

[0081] Please refer to Figure 5 . Figure 5The flowchart of a communication method 500 in one embodiment of the present invention is shown. The communication method 500 describes the communication interface circuit 130 updating the value of the master end counting time recorded by the counting subcircuit in the non-idle state and the slave end counting time recorded by each slave end counting circuit corresponding to each data transmission unit time. In this embodiment, the following steps of the communication method 500 are performed by the count value update circuit 260.

[0082] In step S510, a clock signal is received.

[0083] In step S520, the master-side counting time recorded by each counting subcircuit in the master-side counting circuit that is in a non-idle state is updated decrementally.

[0084] In step S530, it is determined whether the slave counting time recorded by the slave counting circuit is equal to the threshold value. If not, the process proceeds to step S540; if yes, the process proceeds to step S550.

[0085] In step S540, the slave counting time recorded by the slave counting circuit is updated decrementally.

[0086] In step S550, the counting time of the slave end is stopped from being decremented.

[0087] It is understandable that step S520 and steps S530 to S550 may be performed simultaneously.

[0088] In summary, the communication interface circuit and the communication method of the present invention record the time required for the corresponding master device to complete the execution of the previous request instruction through the master counting circuit, and then record the time required for the corresponding slave device to complete the execution of the previous request instruction through the slave counting circuit, so as to confirm whether the current request instruction conflicts with the previous request instruction and decide whether to allow the current request instruction to enter arbitration. In this way, the communication interface circuit will greatly reduce the probability of the current request instruction conflicting with the previous request instruction.

[0089] Although the embodiments of the present application are described above, these embodiments are not intended to limit the present application. Technicians in this technical field may change the technical features of the present application based on the explicit or implicit contents of the present application. All these changes may fall within the scope of patent protection sought by the present application. The scope of patent protection of the present application shall be based on the scope of the patent application of this specification.

Claims

1. A communication interface circuit, characterized in that: Applied to a network system, the network system includes a plurality of master-end devices and a plurality of slave-end devices, the communication interface circuit includes: A plurality of master-end counting circuits, each of which corresponds to a corresponding master-end device among the plurality of master-end devices, and each of which comprises a plurality of counting sub-circuits, each counting sub-circuit recording a master-end counting time required to execute and complete a previous request instruction of the corresponding master-end device; A plurality of slave counting circuits, each of which corresponds to a corresponding slave device among the plurality of slave devices and records a slave counting time required to complete a previous response instruction of the corresponding slave device; a control circuit, confirming a source master-end counting circuit and a target slave-end counting circuit corresponding to a received current request instruction, wherein the source master-end counting circuit is one of the plurality of master-end counting circuits, and the target slave-end counting circuit is one of the plurality of slave-end counting circuits; a first determination circuit, which generates a first determination result when determining that there is a counting sub-circuit in an idle state among the plurality of counting sub-circuits included in the source master-end counting circuit; and a second determination circuit, generating a second determination result when determining that an absolute difference between a source master end counting time recorded by each counting subcircuit in a non-idle state among the plurality of counting subcircuits included in the source master end counting circuit and a target slave end counting time recorded by the target slave end counting circuit is not less than a burst duration; The control circuit sends the current request instruction to an arbitration circuit for arbitration according to the first determination result and the second determination result.

2. The communication interface circuit according to claim 1, characterized in that: It also includes a count value update circuit, which updates the source master end count time recorded by the counting subcircuit in the idle state to the target slave end count time, and calculates the sum of the target slave end count time and the burst duration to update the target slave end count time recorded by the target slave end counting circuit to the sum.

3. The communication interface circuit according to claim 2, characterized in that: The count value updating circuit updates the master counting time recorded by each of the counting subcircuits in the master counting circuit in a non-idle state and the slave counting time recorded by each of the slave counting circuits according to a clock signal.

4. The communication interface circuit according to claim 3, characterized in that: The counting value updating circuit stops decrementing the slave counting time recorded by at least one slave counting circuit that returns to an initial state when at least one slave counting time recorded by the slave counting circuit is equal to a threshold value, and the slave counting time recorded by the slave counting circuit that returns to an initial state is equal to the threshold value, and the threshold value is related to the delay of the network system.

5. The communication interface circuit according to claim 1, characterized in that: The request instruction includes a source master device information, a target slave device information and a requested data amount. The control circuit determines the source master counting circuit according to the source master device information, determines the target slave counting circuit according to the target slave device information and determines the burst duration according to the requested data amount.

6. The communication interface circuit according to claim 1, characterized in that: The first determination circuit determines that there is a counting subcircuit in an idle state in the source master-end counting circuit, and the source master-end counting time recorded by the counting subcircuit in the idle state is the preset time when a preset time is included in the multiple source master-end counting times recorded by the counting subcircuit included in the source master-end counting circuit.

7. The communication interface circuit according to claim 1, characterized in that: When the first determination circuit determines that there is no counting sub-circuit in the idle state or the second determination circuit determines that the absolute difference between the source master end counting time and the target slave end counting time of at least one counting sub-circuit in the non-idle state is less than the burst duration, the control circuit does not send the current request instruction to the arbitration circuit and does not perform arbitration.

8. The communication interface circuit according to claim 1, characterized in that: Each of the plurality of master-end counting circuits includes a preset number of counting sub-circuits, where the preset number is the maximum number of request instructions that can be sent by the corresponding master-end device within a time period from sending a first request instruction to receiving its response instruction.

9. A communication method, characterized in that: In a communication interface circuit applied to a network system, the network system includes a plurality of master devices and a plurality of slave devices, and the communication method includes: Each of the plurality of master counting circuits corresponds to a corresponding master device among the plurality of master devices, and uses each of the plurality of counting subcircuits included in each of the plurality of master counting circuits to record a master counting time required to complete a previous request instruction of the corresponding master device; Each of the plurality of slave counting circuits corresponds to a corresponding slave device among the plurality of slave devices, so that each of the plurality of slave counting circuits records a slave counting time required for executing and completing a previous response instruction of the corresponding slave device; A control circuit confirms a source master end counting circuit and a target slave end counting circuit corresponding to a current request instruction received, wherein the source master end counting circuit is one of the plurality of master end counting circuits, and the target slave end counting circuit is one of the plurality of slave end counting circuits; A first determination circuit generates a first determination result when determining that there is a counting sub-circuit in an idle state among the plurality of counting sub-circuits included in the source master-end counting circuit; A second determination circuit generates a second determination result when determining that an absolute difference between a source master end counting time recorded by each counting subcircuit in a non-idle state among the plurality of counting subcircuits included in the source master end counting circuit and a target slave end counting time recorded by the target slave end counting circuit is not less than a burst duration; and The control circuit sends the current request instruction to an arbitration circuit for arbitration according to the first determination result and the second determination result.

10. The communication method according to claim 9, characterized in that: Also includes: A count value update circuit updates the master end count time recorded by the counting subcircuit in the idle state to the target slave end count time, and calculates a sum of the target slave end count time and the burst duration to update the target slave end count time recorded by the target slave end counting circuit to the sum.

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