On-chip cache sharing method and switching chip
By setting up multiple queue management units and free cache computing units on the switching chip, the cache shared network is realized, which solves the problem of unreasonable cache space utilization when the switching chip processes a large number of messages, improves processing power and cache utilization, and reduces the risk of network blockage and data loss.
Patent Information
- Application Number
- CN202411884707.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-20
- Publication Date
- 2025-04-04
- Estimated Expiration
- 2044-12-20
AI Technical Summary
When the switching chip processes a large number of messages, due to the unreasonable utilization of the cache space, the queue management unit performs a large number of read and write operations in a short time, making it difficult to process a large number of message descriptors, which may cause network blockage and data loss.
Set up multiple queue management units and free cache computing units on the switching chip. Through the switching mechanism of priority and free pointers, a cache-sharing network is realized, and a large number of message descriptors are not poured into a queue management unit in a short time.
By caching and sharing network, the queue management unit can process a large number of message descriptors in a short time, reducing the probability of network blockage and data loss, and improving the utilization and access rate of on-chip caches.
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Figure CN119342014B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of chip technology, and in particular to an on-chip cache sharing method and a switching chip. Background Art
[0002] When the switching chip processes and forwards messages, it will store the messages in different buffer spaces. In the queue entry process, the switching chip will store the message content and message descriptor in the message separately, and the message descriptor will be stored in the queue management unit. In the queue exit process, when the switching chip performs different scheduling processing on the message according to different scheduling algorithms, it needs to read out the message descriptor and message content at the same time.
[0003] However, with the increasing number of communication services, the requirements for the switch chip to handle traffic are increasing. Due to the unreasonable use of the cache space on the switch chip, only one queue management unit is set. When there is a large amount of traffic, a large number of message descriptors will flow into the queue management unit in a short time, and then the queue management unit will perform a large number of read and write operations in a short time. The queue management unit is difficult to process a large number of message descriptors in a short time, which easily causes network congestion and data loss. Summary of the invention
[0004] The purpose of the embodiment of the present application is to provide an on-chip cache sharing method and a switching chip to achieve reasonable utilization of the cache space on the switching chip, so as to process a large number of message descriptors in a short time, thereby reducing the probability of network congestion and data loss. The specific technical solution is as follows:
[0005] In a first aspect, an embodiment of the present application provides an on-chip cache sharing method, the method being applied to a switching chip, the switching chip comprising a first number of queue management units and a first number of free cache calculation units, each queue management unit being connected to an free cache calculation unit, adjacent free cache calculation units being connected to each other, and a local cache space of each queue management unit being used to cache a message descriptor, the method comprising:
[0006] Any first queue management unit among the queue management units determines a first priority according to the capacity of the local free cache space, and sends the first priority to the connected first free cache calculation unit, wherein the size of the first priority is inversely proportional to the size of the local free cache space of the queue management unit;
[0007] The first free cache calculation unit receives the second priority sent by the adjacent second free cache calculation unit, and determines the third priority based on the maximum value of the second priority; if the first priority is greater than the third priority, obtains the first free pointer from the second free cache calculation unit, and after receiving the free pointer acquisition request sent by the first queue management unit, sends the first free pointer to the first queue management unit; if the first priority is less than or equal to the third priority, obtains the second free pointer from the first queue management unit, and sends the obtained free pointer to the second free cache calculation unit;
[0008] Among them, the second priority of the second free cache calculation unit is equal to the first priority of the connected second queue management unit, the first free pointer is used to indicate the address of the local free cache space in the corresponding queue management unit, and the second free pointer is used to indicate the address of the local free cache space in the first queue management unit.
[0009] In one embodiment of the present application, the obtaining the first free pointer from the second free cache calculation unit includes:
[0010] Acquire a first free pointer from a second free cache calculation unit whose second priority is less than the first priority;
[0011] and / or
[0012] The sending the acquired free pointer to the second free cache calculation unit includes:
[0013] The obtained free pointer is sent to the second free cache calculation unit with the highest second priority.
[0014] In one embodiment of the present application, each queue management unit and each free cache calculation unit include a temporary cache subunit, and obtaining a first free pointer from the second free cache calculation unit, and after receiving the free pointer acquisition request sent by the first queue management unit, sending the first free pointer to the first queue management unit includes:
[0015] Obtaining a first free pointer from the second temporary cache sub-unit, and storing the first free pointer in the first temporary cache sub-unit until the free space capacity of the first temporary cache sub-unit is less than or equal to a first preset threshold; after receiving the free pointer acquisition request sent by the first queue management unit, sending the first free pointer to the third temporary cache sub-unit;
[0016] The first temporary cache subunit is a temporary cache subunit of the first free cache calculation unit, the second temporary cache subunit is a temporary cache subunit of the second free cache calculation unit, and the third temporary cache subunit is a temporary cache subunit of the first queue management unit.
[0017] The acquiring the second idle pointer from the first queue management unit and sending the acquired idle pointer to the second idle cache calculation unit includes:
[0018] A second free pointer is obtained from the third temporary cache sub-unit, and the second free pointer is stored in the first temporary cache sub-unit, and the obtained free pointer is sent to the second temporary cache sub-unit.
[0019] In one embodiment of the present application, the idle pointer acquisition request is sent when the local idle cache space capacity of the first queue management unit is less than or equal to a second preset threshold;
[0020] and / or
[0021] The second idle pointer is an idle pointer selected from the local idle cache space by the first queue management unit and stored in the third temporary cache sub-unit when the local idle cache space capacity of the first queue management unit is greater than a third preset threshold.
[0022] In one embodiment of the present application, determining the first priority according to the local free cache space capacity includes:
[0023] When the local free cache space capacity of the first queue management unit is zero, determining the first priority to be a preset maximum value;
[0024] When the local free cache space capacity of the first queue management unit is not zero, the local used cache space capacity of the first queue management unit is determined based on the local free cache space capacity of the first queue management unit, and the quotient of the local used cache space capacity and a first preset parameter is calculated to determine the first priority.
[0025] In a second aspect, an embodiment of the present application provides a switching chip, the switching chip comprising a first number of queue management units and a first number of free cache calculation units, each queue management unit is connected to a free cache calculation unit, adjacent free cache calculation units are connected to each other, and the local cache space of the queue management unit is used to cache message descriptors;
[0026] Any first queue management unit of the queue management units is used to determine a first priority according to the capacity of the local free cache space, and send the first priority to the connected first free cache calculation unit, wherein the size of the first priority is inversely proportional to the size of the local free cache space capacity of the queue management unit;
[0027] The first free cache calculation unit is used to receive the second priority sent by the adjacent second free cache calculation unit, and determine the third priority based on the maximum value of the second priority; if the first priority is greater than the third priority, obtain the first free pointer from the second free cache calculation unit, and after receiving the free pointer acquisition request sent by the first queue management unit, send the first free pointer to the first queue management unit; if the first priority is less than or equal to the third priority, obtain the second free pointer from the first queue management unit, and send the obtained free pointer to the second free cache calculation unit;
[0028] Among them, the second priority of the second free cache calculation unit is equal to the first priority of the connected second queue management unit, the first free pointer is used to indicate the address of the local free cache space in the corresponding queue management unit, and the second free pointer is used to indicate the address of the local free cache space in the first queue management unit.
[0029] In one embodiment of the present application, the first free cache calculation unit is specifically used to obtain a first free pointer from a second free cache calculation unit whose second priority is lower than the first priority; and / or send the obtained free pointer to the second free cache calculation unit whose second priority is the highest.
[0030] In one embodiment of the present application, each queue management unit and each free buffer calculation unit includes a temporary buffer subunit, wherein the first free buffer calculation unit,
[0031] Specifically used for obtaining a first free pointer from the second temporary cache sub-unit, and storing the first free pointer in the first temporary cache sub-unit until the free space capacity of the first temporary cache sub-unit is less than or equal to a first preset threshold; after receiving the free pointer acquisition request sent by the first queue management unit, sending the first free pointer to the third temporary cache sub-unit; wherein the first temporary cache sub-unit is: a temporary cache sub-unit of the first free cache calculation unit, the second temporary cache sub-unit is: a temporary cache sub-unit of the second free cache calculation unit, and the third temporary cache sub-unit is: a temporary cache sub-unit of the first queue management unit;
[0032] A second free pointer is obtained from the third temporary cache sub-unit, and the second free pointer is stored in the first temporary cache sub-unit, and the obtained free pointer is sent to the second temporary cache sub-unit.
[0033] In one embodiment of the present application, the free pointer acquisition request is sent when the local free cache space capacity of the first queue management unit is less than a second preset threshold; and / or the second free pointer is an free pointer selected by the first queue management unit from the local free cache space and stored in the third temporary cache sub-unit when the local free cache space capacity of the first queue management unit is greater than a third preset threshold.
[0034] In one embodiment of the present application, any first queue management unit among the queue management units is specifically used to determine that the first priority is a preset maximum value when the local free cache space capacity of the first queue management unit is zero; when the local free cache space capacity of the first queue management unit is not zero, based on the local free cache space capacity of the first queue management unit, determine the local used cache space capacity of the first queue management unit, and calculate the quotient of the local used cache space capacity and the first preset parameter to determine the first priority.
[0035] The embodiment of the present application also provides an electronic device, including a switching chip, a communication interface, a memory and a communication bus, wherein the switching chip, the communication interface and the memory communicate with each other through the communication bus;
[0036] Memory, used to store computer programs;
[0037] The switching chip is used to implement any of the above-mentioned on-chip cache sharing methods when executing a program stored in the memory.
[0038] An embodiment of the present application further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a switching chip, any of the above-mentioned on-chip cache sharing methods is implemented.
[0039] An embodiment of the present application also provides a computer program product comprising instructions, which, when executed on a computer, enables the computer to execute any of the above-mentioned on-chip cache sharing methods.
[0040] Beneficial effects of the embodiments of the present application:
[0041] The technical solution provided by the embodiment of the present application is to set up multiple queue management units on the switching chip to cache message descriptors. When large traffic comes, the message descriptors are distributed and stored in multiple queue management units, so as to avoid a large number of message descriptors from rushing into one queue management unit in a short time, thereby reducing network congestion and data loss.
[0042] In addition, each queue management unit on the switching chip is connected to an idle cache computing unit, and adjacent idle cache computing units are connected to each other, that is, a cache sharing network is formed. Based on the cache sharing network, any first queue management unit in the queue management unit diffuses its first priority to the first idle cache computing unit connected to it, and at the same time, the first idle cache computing unit will also receive the second priority sent by the second idle cache computing unit adjacent to it. Correspondingly, the first idle cache computing unit will also send its second priority to the second idle cache computing unit, and the second priority of the second idle cache computing unit is equal to the first priority of the second queue management unit connected to it, and the second priority of the first idle cache computing unit is equal to the first priority of the first queue management unit. That is, based on the cache sharing network, any first free cache computing unit among the free cache computing units can indirectly obtain the first priority of the second queue management unit connected to the second adjacent free cache computing unit, and the size of the first priority of the queue management unit is inversely proportional to the size of the local free cache space capacity of the queue management unit. That is, based on the cache sharing network, any first free cache computing unit among the free cache computing units can indirectly obtain the local free cache space capacity of the first queue management unit connected to it, and the local free cache space capacity of the second queue management unit connected to the second adjacent free cache computing unit.
[0043] Furthermore, any first free cache calculation unit among the free cache calculation units determines a third priority based on the maximum value of the second priorities of the second free cache calculation units adjacent thereto, and compares the first priority of the first queue management unit connected thereto with the third priority. If the first priority is greater than the third priority, it means that the capacity of the local free cache space contained in the first queue management unit is smaller than the capacity of the free cache space contained in the second queue management unit. Then the first free cache calculation unit obtains a first free pointer from the second free cache calculation unit and provides it to the first queue management unit, so that the first queue management unit can use the free pointers of other queue management units to store message descriptors when the local free cache capacity is smaller. On the contrary, if the first priority is less than or equal to the third priority, it means that the capacity of the local free cache space contained in the first queue management unit is larger than the capacity of the free cache space contained in the second queue management unit. Then the first free cache calculation unit pulls the address of the local free cache space from the first queue management unit, and then donates the obtained free pointer to the second free cache calculation unit, and provides it to the second queue management unit, so that the second queue management unit with a smaller free cache capacity can use the free pointers of other queue management units to store message descriptors. This enables the sharing of cache space between queue management units. In most cases, the queue management unit has sufficient storage space to store message descriptors, so that a large number of message descriptors can be processed in a short time, thereby reducing the probability of network congestion and data loss and improving the utilization and access rate of the on-chip cache.
[0044] Of course, implementing any product or method of the present application does not necessarily require achieving all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS
[0045] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other embodiments can also be obtained based on these drawings.
[0046] Figure 1 A schematic diagram of a cache sharing network provided in an embodiment of the present application;
[0047] Figure 2 A schematic diagram of the internal structure of a queue management unit provided in an embodiment of the present application;
[0048] Figure 3 A schematic diagram of the internal structure of an idle cache calculation unit provided in an embodiment of the present application;
[0049] Figure 4 A schematic flow chart of a first on-chip cache sharing method provided in an embodiment of the present application;
[0050] Figure 5 A schematic diagram of a flow chart of a second on-chip cache sharing method provided in an embodiment of the present application;
[0051] Figure 6 A schematic flow chart of a third on-chip cache sharing method provided in an embodiment of the present application;
[0052] Figure 7 A schematic diagram of the structure of a switching chip provided in an embodiment of the present application;
[0053] Figure 8 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0054] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field based on the present application belong to the scope of protection of the present application.
[0055] When the switching chip processes and forwards messages, it will store the messages in different buffer spaces. In the queue entry process, the switching chip will store the message content and message descriptor in the message separately, and the message descriptor will be stored in the queue management unit. In the queue exit process, when the switching chip performs different scheduling processing on the message according to different scheduling algorithms, it needs to read out the message descriptor and message content at the same time.
[0056] However, with the increasing number of communication services, the requirements for the switch chip to handle traffic are increasing. Due to the unreasonable use of the cache space on the switch chip, only one queue management unit is set. When there is a large amount of traffic, a large number of message descriptors will flow into the queue management unit in a short time, and then the queue management unit will perform a large number of read and write operations in a short time. The queue management unit is difficult to process a large number of message descriptors in a short time, which easily causes network congestion and data loss.
[0057] In order to solve the above problems, an embodiment of the present application provides an on-chip cache sharing method and a switching chip.
[0058] First, combine Figure 1-Figure 3 , the settings of the queue management unit and the free cache calculation unit on the switching chip provided in the embodiment of the present application, the connection relationship between the queue management unit and the free cache calculation unit, and the internal structure of the queue management unit and the free cache calculation unit are exemplified.
[0059] See also Figure 1 , is a schematic diagram of a cache sharing network provided in an embodiment of the present application, such as Figure 1 As shown, 4 rows x 4 columns of queue management units 11 and 4 rows x 4 columns of free cache calculation units 12 are set on the switching chip, that is, 16 queue management units 11 and 16 free cache calculation units 12 are set, each queue management unit 11 is connected to a free cache calculation unit 12, and adjacent free cache calculation units 12 are connected to each other. These 16 queue management units 11 and 16 free cache calculation units 12, based on the above connection relationship, constitute a cache sharing network. Among them, Figure 1 The number of queue management units 11 and free cache calculation units shown in the figure is 16, which is not limiting.
[0060] See also Figure 2 , a schematic diagram of the internal structure of a queue management unit provided in an embodiment of the present application. The queue management unit may also be referred to as a control management unit (CU). The queue management unit 11 may include an idle cache calculation management subunit 21, a priority calculation subunit A22, a temporary cache subunit A23 and a local cache subunit 24. The idle cache calculation management subunit 21 is used to maintain the temporary cache subunit A23, specifically, to manage the interaction of idle pointers between the idle cache calculation unit 12 and the temporary cache subunit A23 connected thereto. The priority calculation subunit A22 is used to determine the first priority of the queue management unit 11 according to the local idle cache space capacity of the queue management unit 11. The temporary cache subunit A23 is used to temporarily store idle pointers. The local cache subunit 24 may also be referred to as a local cache space, which is used to store message descriptors.
[0061] In another embodiment of the present application, the queue management unit 11 may not set the priority calculation subunit A22. The queue management unit 11 sends its own local free cache space capacity to the free cache calculation unit 12 connected to it, and the free cache calculation unit 12 calculates the first priority of the queue management unit 11 according to the local free cache capacity of the queue management unit 11.
[0062] See also Figure 3, which is a schematic diagram of the internal structure of an idle cache calculation unit provided in an embodiment of the present application. The idle cache calculation unit may also be referred to as an idle cache threshold calculation unit (Buffer Calculate, BC). A priority calculation subunit B31 and a temporary cache subunit B32 may be provided inside the idle cache calculation unit 12. The priority calculation subunit B31 is used to receive a second priority sent by a second idle cache calculation unit 12 adjacent to the idle cache calculation unit 12, determine a third priority based on the maximum value of the second priority, and compare the first priority and the third priority. The temporary cache subunit B32 is used to temporarily store an idle pointer.
[0063] It should be noted that the priority calculation subunit A, priority calculation subunit B, temporary cache subunit A and temporary cache subunit B mentioned here are only for distinguishing the temporary cache subunit and priority calculation subunit of the queue management unit and the free cache calculation unit. A and B have no specific meanings.
[0064] In combination with the above Figure 1-Figure 3 Description of Figure 4 A flow chart of the first on-chip cache sharing method is provided, and the on-chip cache sharing method provided by the embodiment of the present application is described in detail. The on-chip cache sharing method is applied to a switching chip, and the switching chip includes a first number of queue management units and a first number of free cache calculation units. Each queue management unit is connected to a free cache calculation unit, and adjacent free cache calculation units are connected to each other. The local cache space of each queue management unit is used to cache message descriptors. The value of the first number is generally greater than or equal to 2. The specific value of the first number can be set according to actual needs. The on-chip cache sharing method includes steps S41-step S42.
[0065] S41, any first queue management unit among the queue management units determines a first priority according to a local free cache space capacity, and sends the first priority to a connected first free cache calculation unit.
[0066] In the embodiment of the present application, since a first number of first queue management units and free cache calculation units are set on the switching chip, and each queue management unit and each free cache calculation unit will execute the corresponding method steps shown in the embodiment of the present application, for the convenience of description, any queue management unit in the first number of queue management units is called a first queue management unit, the free cache calculation unit connected to the first queue management unit is called a first free cache calculation unit, the free cache calculation unit adjacent to the first free cache calculation unit is called a second free cache calculation unit, and the queue management unit connected to the second free cache calculation unit is called a second queue management unit.
[0067] With the above Figure 1 For example, if the queue management unit located in the first row and the first column is determined as the first queue management unit, the free cache calculation unit located in the first row and the first column is the first free cache calculation unit, the free cache calculation unit located in the second row and the first column and the free cache calculation unit located in the first row and the second column are a second free cache calculation unit, and the queue management unit located in the second row and the first column and the queue management unit located in the first row and the second column are a second queue management unit.
[0068] The above-mentioned local free cache space capacity represents the cache space capacity of the local free cache space of the queue management unit that has not been cached message descriptors. The cache space capacity can generally be represented by the cache depth, and the cache depth determines how much data the memory can store. Then, the local free cache space capacity of the queue management unit can be further understood as: the number of message descriptors that the queue management unit can also store. The queue management unit can directly obtain its own local free cache space capacity, or it can indirectly obtain its own local free cache space capacity, that is, based on the total space capacity of the local cache and the local used cache space capacity, calculate the local free cache space capacity. The total space capacity of the local cache of the queue management unit has been set at the factory. For example, the local cache space capacity of the queue management unit is generally set to: 128, indicating that the queue management unit can store a maximum of 128 message descriptors.
[0069] The size of the above-mentioned first priority is inversely proportional to the size of the local free cache space capacity of the queue management unit, that is, the first priority of the queue management unit can indirectly reflect the size of the local free cache space capacity of the queue management unit. The larger the value of the first priority, the smaller the local free cache space capacity of the queue management unit, and the greater the probability of using the free pointers of other queue management units to store message descriptors. On the contrary, the smaller the value of the first priority, the larger the local free cache space capacity of the queue management unit, and the greater the probability of providing free pointers for the second queue management unit with smaller free cache capacity to store message descriptors.
[0070] In the embodiment of the present application, the first queue management unit can obtain its own local free cache space capacity, and determine its own first priority according to the empty local free cache space capacity. Specifically, the first queue management unit can directly obtain its own local free cache space capacity, or indirectly obtain its own local free cache space capacity, that is, determine the local free cache space capacity based on its own local cache total space capacity and the local used cache space capacity.
[0071] In addition, since the message descriptor is continuously stored in the first queue management unit and is continuously read out from the first queue management unit, that is, the free capacity of the local free cache of the first queue management unit is constantly changing, therefore, in one embodiment of the present application, when the first queue management unit detects that a message descriptor is stored or a message descriptor is read out, the local free cache space capacity is obtained, and the first priority is updated according to the local free cache space capacity. In this way, the local free cache space capacity of the first queue management unit can be updated in time, and the calculated first priority is more accurate, providing an accurate basis for the subsequent first free cache calculation unit to pull and donate free pointers based on the size of the first priority and the third priority.
[0072] In another embodiment of the present application, the first queue management unit may obtain the local free cache space capacity according to a preset period, and determine the first priority according to the local free cache space capacity, so as to reduce the computing resources on the first queue management unit.
[0073] Next, the manner in which the first queue management unit determines the first priority according to the capacity of the local free cache space is described.
[0074] In one embodiment of the present application, the first queue management unit takes the following steps 1 to 2 to determine the first priority.
[0075] Step 1: When the local free cache space capacity of the first queue management unit is zero, determine the first priority as a preset maximum value.
[0076] When the local free cache space capacity of the first queue management unit is zero, it indicates that the local cache space of the first queue management unit is full of message descriptors and other queue management units are required to share the cache space. Then, the first queue management unit directly determines the first priority as the preset maximum value. The above preset maximum value can be understood as the maximum value within the value range of the first priority. For example, the value range of the first priority is 0-31. When the local free cache space capacity of the first queue management unit is zero, the first priority is directly determined to be 31.
[0077] Step 2: When the local free cache space capacity of the first queue management unit is not zero, the local used cache space capacity of the first queue management unit is determined based on the local free cache space capacity of the first queue management unit, and the quotient of the local used cache space capacity and the first preset parameter is calculated to determine the first priority.
[0078] When the local free cache space capacity of the first queue management unit is not zero, the first queue management unit obtains its own local free cache space capacity, and obtains the local used cache space capacity of the first queue management unit by subtracting the total space capacity of the local cache from the local free cache space capacity. Alternatively, the first queue management unit may also directly obtain its own local used cache space capacity. After determining the local used cache space capacity, the first queue management unit calculates the quotient of the local used cache space capacity and the first preset parameter to determine the first priority. When the quotient value is not an integer, the above quotient value may be further rounded up or down to obtain the first priority.
[0079] Among them, the above-mentioned first preset parameter can be determined based on the local cache space capacity of the first queue management unit and the number of values of the first priority. Specifically, the local cache space capacity of the first queue management unit and the number of values of the first priority are divided to obtain the first preset parameter. When the quotient value is not an integer, the above-mentioned quotient value can be further rounded up or down to obtain the first preset parameter.
[0080] The above description can be simplified into the following formula (1):
[0081] Priority_1 = floor(UsedBuffers / n) (1)
[0082] Among them, Priority_1 represents the first priority, floor represents the floor function, UsedBuffers represents the local used cache space capacity, and n represents the first preset parameter.
[0083] Of course, the floor function in the above formula (1) can also be replaced by a ceiling function, which will not be described here.
[0084] For ease of understanding, the manner in which the first queue management unit determines the first priority is described with an example.
[0085] For example, if the local cache space capacity of the first queue management unit is 128, the value range of the first priority is 0-31, that is, the number of values of the first priority value is 32, then it can be determined that the value of the first preset parameter is 128 / 32=4.
[0086] When the local free cache space capacity of the first queue management unit is 0, the first queue management unit directly determines the first priority value to be a preset maximum value, that is, 31.
[0087] When the local free cache space capacity of the first queue management unit is 32, the first queue management unit determines that the local used cache space capacity is 128-32=96 based on the local free cache space capacity and the total space capacity of the local cache, and then calculates the quotient of the local used cache space capacity and the first preset parameter to determine that the value of the first priority is floor(96 / 4)=24.
[0088] It can be seen from the above embodiments that in the embodiments of the present application, when the first queue management unit determines the first priority according to the local free cache space capacity, when the local free cache space capacity is zero, the first priority is directly determined as the preset maximum value, which omits the calculation step and can determine the first priority more quickly. When the local free cache space capacity is not zero, the local used cache space capacity and the first preset parameter are divided by the quotient to determine the first priority. In this way, the determined first priority is within the preset value range, which provides a basis for the subsequent first free cache calculation unit to pull and donate free pointers based on the size of the first priority and the third priority.
[0089] In another embodiment of the present application, the first queue management unit takes the following step three to determine the first priority.
[0090] Step three: based on the local free cache space capacity of the first queue management unit, determine the local used cache space capacity of the first queue management unit, and take the local used cache space capacity as the first priority.
[0091] The first queue management unit obtains its own local free cache space capacity, and obtains the local used cache space capacity of the first queue management unit by subtracting the total space capacity of the local cache from the local free cache space capacity. Alternatively, the first queue management unit may also directly obtain its own local used cache space capacity. After determining the local used cache space capacity, the first queue management unit directly takes the local used cache space capacity as the first priority.
[0092] For ease of understanding, the manner in which the first queue management unit determines the first priority is described with an example.
[0093] For example, if the local cache space capacity of the first queue management unit is 128, the value of the local used cache space capacity is 0-128, and accordingly, the value range of the first priority is 0-128.
[0094] When the local free cache space capacity of the first queue management unit is 32, the first queue management unit determines that the local used cache space capacity is 128-32=96 according to the local free cache space capacity and the total space capacity of the local cache, and then directly determines the value of the first priority to be 96.
[0095] It can be seen from the above embodiments that in the embodiments of the present application, when the first queue management unit determines the first priority based on the local free cache space capacity, the local used cache space capacity is directly used as the first priority, eliminating the process of the first queue management unit calculating the first priority, thereby saving computing resources on the first queue management unit.
[0096] In another embodiment of the present application, the first queue management unit may also send the local free cache space capacity to the first free cache calculation unit, and the first free cache calculation unit calculates the first priority using the above method.
[0097] The embodiment of the present application does not specifically limit the method for determining the first priority, as long as the size of the first priority is inversely proportional to the size of the local free cache space capacity of the queue management unit.
[0098] In the embodiment of the present application, after the first queue management unit determines the first priority, it sends the first priority to the first free cache calculation unit connected thereto.
[0099] S42, the first free cache calculation unit receives the second priority sent by the adjacent second free cache calculation unit, and determines the third priority based on the maximum value of the second priority; if the first priority is greater than the third priority, obtains the first free pointer from the second free cache calculation unit, and after receiving the free pointer acquisition request sent by the first queue management unit, sends the first free pointer to the first queue management unit; if the first priority is less than or equal to the third priority, obtains the second free pointer from the first queue management unit, and sends the obtained free pointer to the second free cache calculation unit.
[0100] Among them, the second priority of the second free cache calculation unit is equal to the first priority of the connected second queue management unit, the first free pointer is used to indicate the address of the local free cache space in the corresponding queue management unit, and the second free pointer is used to indicate the address of the local free cache space in the first queue management unit.
[0101] Specifically, the priority of the free cache calculation unit is equal to the priority of the queue management unit connected to it, the free pointer is used to indicate the address of the local free cache space in the queue management unit, and the first free pointer and the second free pointer are only used to distinguish the addresses of the local free cache space in different queue management units.
[0102] In the embodiment of the present application, the first free cache calculation unit receives the first priority sent by the first queue management unit, and receives the second priority sent by the adjacent second free cache calculation unit, and then determines the third priority based on the maximum value of the second priorities. Correspondingly, the first free cache calculation unit also sends its own second priority to the second free cache calculation unit.
[0103] In one embodiment of the present application, when the first free cache calculation unit determines the third priority based on the maximum value of the second priority, the maximum value of the second priority is directly determined as the third priority.
[0104] In another embodiment of the present application, when the first free cache calculation unit determines the third priority based on the maximum value of the second priority, the third priority is determined based on the maximum value of the second priority and the second preset parameter. Specifically, the first free cache calculation unit subtracts the maximum value of the second priority from the second preset parameter to obtain the third priority, wherein the second preset parameter is a natural number, and the value range of the second preset parameter can be configured according to actual needs, for example, the value range of the second preset parameter is 0-10. By adjusting the size of the second preset parameter, the probability of donating and pulling free pointers by the first free cache calculation unit can be controlled. Here, the behavior of the first free cache calculation unit obtaining the first free pointer from the second free cache calculation unit and providing it to the first queue management unit is called the pulling of free pointers, and the behavior of the first free cache calculation unit obtaining the address of the local free cache space from the first queue management unit and then donating the obtained free pointer to the second free cache calculation unit is called the donation of free pointers. Specifically, when the value of the second preset parameter is large, the value of the third priority determined will be smaller than the maximum value of the second priority, and the probability that the first priority is greater than the third priority will be higher, and the probability that the first idle pointer pulls the idle pointer will be faster. Conversely, when the value of the second preset parameter is small, the value of the third priority determined will be close to the maximum value of the second priority, and the probability that the first priority is less than or equal to the third priority will be higher, and the probability that the first idle pointer donates the idle pointer will be higher.
[0105] Specifically, the first free buffer calculation unit may use the following formula (2) to determine the third priority:
[0106] Priority_3= max(Priority_2)-n(2)
[0107] Among them, Priority_3 represents the third priority, max (Priority_2) represents the maximum value in the second priority, and n represents the second preset parameter.
[0108] In an embodiment of the present application, after the first free cache calculation unit receives the first priority and determines the third priority, it compares the first priority with the third priority. Based on the size of the first priority and the third priority, the first free cache calculation unit decides whether to donate or pull the free address.
[0109] Specifically, when the first priority is greater than the third priority, it means that the capacity of the local free cache space contained in the first queue management unit is smaller than the capacity of the free cache space contained in the second queue management unit, then the first free cache calculation unit obtains the first free pointer from the second free cache calculation unit, and after receiving the free pointer acquisition request sent by the first queue management unit, provides the first free pointer to the first queue management unit, so that the first queue management unit can use the free pointers of other queue management units to store message descriptors when the local free cache capacity is small. Here, the first free pointer of the second free cache calculation unit may include free pointers obtained from the second queue management unit connected to the second free cache calculation unit, and free pointers obtained from other management units except the first queue management unit.
[0110] In an embodiment of the present application, when the first free cache calculation unit provides the first free pointer to the first queue management unit, a preset number of first free pointers can be selected according to actual needs to be provided to the first queue management unit. For example, when the first priority is much greater than the third priority, it means that the capacity of the local free cache space contained in the first queue management unit is much smaller than the capacity of the free cache space contained in the second queue management unit, and the first free cache calculation unit can provide all the first free pointers to the first queue management unit. When the first priority is slightly greater than the third priority, it means that the capacity of the local free cache space contained in the first queue management unit is only slightly smaller than the capacity of the free cache space contained in the second queue management unit, and the first free cache calculation unit can provide a smaller number of first free pointers to the first queue management unit.
[0111] When the first priority is less than or equal to the third priority, it means that the capacity of the local free cache space contained in the first queue management unit is larger than the capacity of the free cache space contained in the second queue management unit, and the first free cache calculation unit pulls the address of the local free cache space from the first queue management unit, that is, the second free pointer. Then donate the obtained free pointer to the second free cache calculation unit. Here, the free pointer obtained in the second free cache calculation unit may include the second free pointer obtained from the first queue management unit, and the free pointer obtained from other queue management units except the second queue management unit. Correspondingly, after receiving the free pointer acquisition request sent by the corresponding second queue management unit, the second free cache calculation unit provides the obtained free pointer to the second queue management unit, so that the second queue management unit with a smaller free cache capacity can use the free pointers of other queue management units with larger free cache capacity to store message descriptors.
[0112] In the embodiment of the present application, when the first free cache calculation unit obtains the second free pointer from the first queue management unit, a preset number of second free pointers can be obtained from the first queue management unit according to actual needs. For example, when the first priority is much smaller than the third priority, it means that the capacity of the local free cache space contained in the first queue management unit is much larger than the capacity of the free cache space contained in the second queue management unit, and the first free cache calculation unit can obtain all the second free pointers in the first queue management unit. When the first priority is slightly smaller than the third priority, it means that the capacity of the local free cache space contained in the first queue management unit is only slightly larger than the capacity of the free cache space contained in the second queue management unit, and the first free cache calculation unit can obtain a smaller number of second free pointers in the first queue management unit.
[0113] In one embodiment of the present application, when the first free cache calculation unit obtains the first free pointer from the second free cache calculation unit, the first free pointer can be obtained from the second free cache calculation unit whose second priority is less than the first priority. When the second priority is less than the first priority, it means that the local free cache space capacity of the second queue management unit connected to the second free cache calculation unit corresponding to the second priority is greater than the local free cache space capacity of the first queue management unit. In this way, it can be ensured that the free address obtained by the first queue management unit is donated by the queue management unit with a larger free cache capacity, thereby ensuring the balance of free cache space on each queue management unit on the switching chip.
[0114] It can be seen from the above embodiments that in the embodiments of the present application, the first free cache calculation unit obtains the first free pointer from the second free cache calculation unit whose second priority is less than the first priority and provides it to the first queue management unit, so that when the local free cache capacity of the first queue management unit is small, it can use the free pointer of the queue management unit with a larger local free cache capacity to store the message descriptor, thereby ensuring the balance of the free cache space on each queue management unit on the switching chip.
[0115] In one embodiment of the present application, when the first free cache calculation unit sends the obtained free pointer to the second free cache calculation unit, the obtained free pointer may be sent to the second free cache calculation unit with the highest second priority. The second free cache calculation unit has the highest second priority, which means that in the second queue management unit, the free cache space capacity of the second queue management unit to which the second free cache calculation unit is connected is the smallest. The more the second queue management unit needs to be donated free pointers, the more the first free cache calculation unit sends the obtained free pointer to the second free cache calculation unit with the highest second priority. Then, the second free cache calculation unit can promptly provide the free pointer to the second queue management unit connected thereto, so that the second queue management unit with a smaller free cache capacity can promptly use the free pointer of the first queue management unit to store the message descriptor.
[0116] It can be seen from the above embodiments that in the embodiments of the present application, the first free cache calculation unit sends the obtained free pointer to the second free cache calculation unit with the highest second priority, which can ensure that the queue management unit with a smaller free cache can promptly obtain the free addresses donated by other queue management units with larger free caches, so that the queue management unit has sufficient storage space for storing message descriptors, so that a large number of message descriptors can be processed in a short time, thereby reducing the probability of network congestion and data loss, and making the storage on the entire chip more balanced to prevent local hotspots.
[0117] The technical solution provided by the embodiment of the present application is to set up multiple queue management units on the switching chip to cache message descriptors. When large traffic comes, the message descriptors are distributed and stored in multiple queue management units, so as to avoid a large number of message descriptors from rushing into one queue management unit in a short time, thereby reducing network congestion and data loss.
[0118] In addition, each queue management unit on the switching chip is connected to an idle cache computing unit, and adjacent idle cache computing units are connected to each other, that is, a cache sharing network is formed. Based on the cache sharing network, any first queue management unit in the queue management unit diffuses its first priority to the first idle cache computing unit connected to it, and at the same time, the first idle cache computing unit will also receive the second priority sent by the second idle cache computing unit adjacent to it. Correspondingly, the first idle cache computing unit will also send its second priority to the second idle cache computing unit, and the second priority of the second idle cache computing unit is equal to the first priority of the second queue management unit connected to it, and the second priority of the first idle cache computing unit is equal to the first priority of the first queue management unit. That is, based on the cache sharing network, any first free cache computing unit among the free cache computing units can indirectly obtain the first priority of the second queue management unit connected to the second adjacent free cache computing unit, and the size of the first priority of the queue management unit is inversely proportional to the size of the local free cache space capacity of the queue management unit. That is, based on the cache sharing network, any first free cache computing unit among the free cache computing units can indirectly obtain the local free cache space capacity of the first queue management unit connected to it, and the local free cache space capacity of the second queue management unit connected to the second adjacent free cache computing unit.
[0119] Furthermore, any first free cache calculation unit among the free cache calculation units determines a third priority based on the maximum value of the second priorities of the second free cache calculation units adjacent thereto, and compares the first priority of the first queue management unit connected thereto with the third priority. If the first priority is greater than the third priority, it means that the capacity of the local free cache space contained in the first queue management unit is smaller than the capacity of the free cache space contained in the second queue management unit. Then the first free cache calculation unit obtains a first free pointer from the second free cache calculation unit and provides it to the first queue management unit, so that the first queue management unit can use the free pointers of other queue management units to store message descriptors when the local free cache capacity is smaller. On the contrary, if the first priority is less than or equal to the third priority, it means that the capacity of the local free cache space contained in the first queue management unit is larger than the capacity of the free cache space contained in the second queue management unit. Then the first free cache calculation unit pulls the address of the local free cache space from the first queue management unit, and then donates the obtained free pointer to the second free cache calculation unit, and provides it to the second queue management unit, so that the second queue management unit with a smaller free cache capacity can use the free pointers of other queue management units to store message descriptors. This enables the sharing of cache space between queue management units. In most cases, the queue management unit has sufficient storage space to store message descriptors, so that a large number of message descriptors can be processed in a short time, thereby reducing the probability of network congestion and data loss and improving the utilization and access rate of the on-chip cache.
[0120] See also Figure 5 , is a flow chart of a second on-chip cache sharing method provided in an embodiment of the present application, including steps S51-S52, and Figure 4 Compared with the embodiment shown, each queue management unit and each free cache calculation unit on the switching chip may include a temporary cache subunit, step S51 is the same as the above step S41, and step S52 is a further refinement of the above step S42.
[0121] S52, the first free cache calculation unit receives the second priority sent by the adjacent second free cache calculation unit, and determines the third priority based on the maximum value of the second priority; if the first priority is greater than the third priority, obtains the first free pointer from the second temporary cache sub-unit, and stores the first free pointer to the first temporary cache sub-unit until the free space capacity of the first temporary cache sub-unit is less than or equal to the first preset threshold; after receiving the free pointer acquisition request sent by the first queue management unit, sends the first free pointer to the third temporary cache sub-unit; if the first priority is less than or equal to the third priority, obtains the second free pointer from the third temporary cache sub-unit, stores the second free pointer to the first temporary cache sub-unit, and sends the acquired free pointer to the second temporary cache sub-unit.
[0122] Among them, the first temporary cache subunit is: the temporary cache subunit of the first free cache calculation unit, the second temporary cache subunit is: the temporary cache subunit of the second free cache calculation unit, and the third temporary cache subunit is: the temporary cache subunit of the first queue management unit.
[0123] Specifically, the temporary cache subunit is used to temporarily cache free pointers. The space capacity of the temporary cache subunit can represent how many free pointers the temporary cache subunit can cache. For example, the space capacity of the temporary cache subunit is 4, indicating that the temporary cache subunit can cache 4 free pointers. Each queue management unit and each free cache calculation unit can include a temporary cache subunit. For ease of description, the temporary cache subunit of the first free cache calculation unit is recorded as the first temporary cache subunit, the temporary cache subunit of the second free cache calculation unit is recorded as the second temporary cache subunit, and the temporary cache subunit of the first queue management unit is recorded as the third temporary cache subunit.
[0124] In the embodiment of the present application, when the first priority is greater than the third priority, the first free pointer is obtained from the second temporary cache subunit, and the first free pointer is stored in the first temporary cache subunit until the free space capacity of the first temporary cache subunit is less than or equal to the first preset threshold. Specifically, the above-mentioned first preset threshold can be set according to actual needs. If it is necessary to fully utilize the space capacity of the first temporary cache subunit, the first preset threshold can be set to 0. Then, when the free space capacity of the first temporary cache subunit is greater than 0, the first free cache calculation unit will obtain the first free pointer from the second temporary cache subunit and store the first free pointer in the first temporary cache subunit. When the free space capacity of the first temporary cache subunit is equal to 0, it means that the space of the first temporary cache subunit is full of free pointers. At this time, the first free cache calculation unit stops obtaining the first free pointer from the second temporary cache subunit. After receiving the free pointer acquisition request sent by the first queue management unit, the first free cache calculation unit sends the first free pointer to the third temporary cache subunit. Then, the first queue management unit can store the message descriptor based on the first free pointer in the third temporary cache subunit.
[0125] In one embodiment of the present application, the above-mentioned idle pointer request may be sent when the capacity of the local idle cache space of the first queue management unit is less than or equal to the second preset threshold. Specifically, the second preset threshold can be set according to actual needs. For example, if congestion of shared network messages on the switching chip is to be prevented, the frequency of idle pointer transmission needs to be reduced, and the second preset threshold can be set to 0, that is, when the local cache space of the first queue management unit is full, the first queue management unit sends an idle pointer acquisition request to the first idle cache calculation unit. If it is to be ensured that each queue management unit has sufficient storage space for storing message descriptors, thereby reducing the probability of network congestion and data loss, it is necessary to increase the frequency of idle pointer transmission, and the second preset threshold can be set to half of the capacity of the local cache space of the first queue management unit, that is, when half of the local cache space of the first queue management unit is full, the first queue management unit sends an idle pointer acquisition request to the first idle cache calculation unit.
[0126] It can be seen from the above embodiments that in the embodiments of the present application, when the local free cache space capacity of the first queue management unit is less than or equal to the second preset threshold, an idle pointer acquisition request is sent to the first queue management unit, thereby achieving the purpose of controlling the transmission speed of the idle pointer.
[0127] In an embodiment of the present application, when the first priority is less than or equal to the third priority, the first free cache calculation unit obtains the second free pointer from the third temporary cache subunit, stores the second free pointer to the first temporary cache subunit, and sends the obtained free pointer to the second temporary cache subunit.
[0128] In one embodiment of the present application, when the capacity of the local free cache space of the first queue management unit is greater than the third preset threshold, the second free pointer is selected from the local free cache space by the first queue management unit and stored in the third temporary cache sub-unit. Specifically, the value of the third preset threshold can be set according to actual needs. If it is necessary to ensure that each queue management unit has sufficient storage space to store message descriptors, the third preset threshold can be set to half of the capacity of the local cache space of the first queue management unit. In this way, when the free cache space of the first queue management unit is large, a certain number of free pointers can be selected to be pre-stored in its own third temporary cache sub-unit. When the free cache space of other queue management units is insufficient, free pointers can be donated to the corresponding queue management units in a timely manner.
[0129] It can be seen from the above embodiments that in the embodiments of the present application, the queue management unit and the free cache calculation unit both include a temporary cache sub-unit, and pre-store excess free pointers in the corresponding temporary cache sub-unit. In this way, when there is a queue management unit with insufficient free cache space on the switching chip, the free cache calculation unit directly obtains the free pointer from its own temporary cache sub-unit and the temporary cache sub-unit with a larger free cache space, and provides the obtained free pointer to the queue management unit with insufficient free cache space, thereby improving the turnover efficiency of the free pointer and ensuring that the queue management unit has sufficient storage space for storing message descriptors in most cases.
[0130] See also Figure 6 , is a flow chart of a third on-chip cache sharing method provided in an embodiment of the present application, the method comprising steps S61 to S69.
[0131] S61, Start
[0132] S62, the switching chip determines whether the queue management unit has completed initialization and whether the connection between the units has been completed.
[0133] In the embodiment of the present application, the essence of the queue management unit is a memory. Accordingly, the queue management unit initialization is to set the queue management unit to an initial state, which is used to ensure that the queue management unit does not store any data after startup or reconfiguration. At the same time, the connection status between the queue management unit and the idle cache computing unit should be detected. Only when the connection status between the queue management unit and the idle cache computing unit is good can the normal operation of the cache sharing network built on the switching chip be guaranteed.
[0134] When both determination results are yes, step S63 is executed, and when either determination result is no, the process jumps to step S69.
[0135] S63, the switching chip determines whether there is a message descriptor stored in or read from the queue management unit.
[0136] In the embodiment of the present application, messages are continuously queued and dequeued on the switching chip, that is, message descriptors are stored in the queue management unit on the switching chip, and message descriptors are read out from the queue management unit.
[0137] If the above determination result is yes, then execute step S64, if the above determination result is no, then jump to step S69.
[0138] S64: Any first queue management unit among the queue management units updates its own local free cache space capacity and sends it to the first free cache calculation unit connected thereto.
[0139] In the embodiment of the present application, the first queue management unit sends its own local free cache space capacity to the first free cache calculation unit, and the first free cache calculation unit calculates the first priority. The first queue management unit may also determine the first priority according to the local free cache space capacity.
[0140] S65, the first free cache calculation unit calculates the first priority based on the local free cache space capacity sent by the first queue management unit, receives the second priority sent by the adjacent second free cache calculation unit, and determines the third priority based on the maximum value of the second priorities.
[0141] S66: The first free buffer calculation unit determines whether the first priority is greater than the third priority.
[0142] If yes, go to step S67, if no, go to step S68.
[0143] S67, the first free cache calculation unit obtains the first free pointer from the second free cache calculation unit and stores it in the first temporary cache sub-unit until the space capacity of the first temporary cache sub-unit reaches the maximum value, and sends the first free pointer to the first queue management unit.
[0144] S68: The first free buffer calculation unit obtains a second free pointer from the first queue management unit, and sends the obtained free pointer to the second free buffer calculation unit with the highest priority.
[0145] Since the above steps S63 to S67 are similar to the above-mentioned embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the above-mentioned embodiment.
[0146] S69, end.
[0147] The technical solution provided by the embodiment of the present application is to set up multiple queue management units on the switching chip to cache message descriptors. When large traffic comes, the message descriptors are distributed and stored in multiple queue management units, so as to avoid a large number of message descriptors from rushing into one queue management unit in a short time, thereby reducing network congestion and data loss.
[0148] In addition, each queue management unit on the switching chip is connected to an idle cache computing unit, and adjacent idle cache computing units are connected to each other, that is, a cache sharing network is formed. Based on the cache sharing network, any first queue management unit in the queue management unit diffuses its first priority to the first idle cache computing unit connected to it, and at the same time, the first idle cache computing unit will also receive the second priority sent by the second idle cache computing unit adjacent to it. Correspondingly, the first idle cache computing unit will also send its second priority to the second idle cache computing unit, and the second priority of the second idle cache computing unit is equal to the first priority of the second queue management unit connected to it, and the second priority of the first idle cache computing unit is equal to the first priority of the first queue management unit. That is, based on the cache sharing network, any first free cache computing unit among the free cache computing units can indirectly obtain the first priority of the second queue management unit connected to the second adjacent free cache computing unit, and the size of the first priority of the queue management unit is inversely proportional to the size of the local free cache space capacity of the queue management unit. That is, based on the cache sharing network, any first free cache computing unit among the free cache computing units can indirectly obtain the local free cache space capacity of the first queue management unit connected to it, and the local free cache space capacity of the second queue management unit connected to the second adjacent free cache computing unit.
[0149] Furthermore, any first free cache calculation unit among the free cache calculation units determines a third priority based on the maximum value of the second priorities of the second free cache calculation units adjacent thereto, and compares the first priority of the first queue management unit connected thereto with the third priority. If the first priority is greater than the third priority, it means that the capacity of the local free cache space contained in the first queue management unit is smaller than the capacity of the free cache space contained in the second queue management unit. Then the first free cache calculation unit obtains a first free pointer from the second free cache calculation unit and provides it to the first queue management unit, so that the first queue management unit can use the free pointers of other queue management units to store message descriptors when the local free cache capacity is smaller. On the contrary, if the first priority is less than or equal to the third priority, it means that the capacity of the local free cache space contained in the first queue management unit is larger than the capacity of the free cache space contained in the second queue management unit. Then the first free cache calculation unit pulls the address of the local free cache space from the first queue management unit, and then donates the obtained free pointer to the second free cache calculation unit, and provides it to the second queue management unit, so that the second queue management unit with a smaller free cache capacity can use the free pointer of the first queue management unit to store message descriptors. This enables the sharing of cache space between queue management units. In most cases, the queue management unit has sufficient storage space to store message descriptors, so that a large number of message descriptors can be processed in a short time, thereby reducing the probability of network congestion and data loss and improving the utilization and access rate of the on-chip cache.
[0150] The on-chip cache sharing method provided in an embodiment of the present application is described below in conjunction with a specific scenario.
[0151] Continue to see Figure 1 , Figure 1 For a 4x4 cache sharing network, there are 4 rows x 4 columns of queue management units and 4 rows x 4 columns of free cache computing units. In order to distinguish different queue management units and free cache computing units, an index is set for each queue management unit according to the position of the row and column where the queue management unit and the free cache computing unit are located. For example, the queue management unit located in the upper left corner is in the first row and the first column, so the index is set to (0, 0) for the queue management unit, which is hereinafter referred to as queue management unit (0, 0). The free cache computing unit located in the lower right corner is in the fourth row and the fourth column, so the index is set to (3, 3) for the free cache computing unit, which is hereinafter referred to as free cache computing unit (3, 3). At the same time, the priority value range is set to 0-31.
[0152] At this time, the local free cache space capacity of the queue management unit (0, 0) is 0, so the queue management unit (0, 0) determines its first priority as 31, indicating that the free address needs to be donated. As shown in Table 1 below, Table 1 is a schematic diagram of the first priorities of 16 queue management units.
[0153] Table 1
[0154]
[0155] Assume an extreme case where only the queue management unit (0, 0) is caching the message descriptor, and the local cache space of the queue management unit (0, 0) is full, and other queue idle management units are required to donate idle pointers to store the message descriptors based on the idle pointers.
[0156] At this time, the queue management unit (3, 0) is regarded as the first queue management unit, whose first priority is 16, and the idle cache calculation unit (3, 0) connected to it is the first idle cache calculation unit, whose second priority is also 16. The idle cache calculation unit (2, 0) and the idle cache calculation unit (3, 1) adjacent to the idle cache calculation unit (3, 0) are the second idle cache calculation units, and their second priorities are equal to the first priorities of the second queue management units connected to it, which are 21 and 11 respectively.
[0157] The idle cache calculation unit (3, 0) determines the third priority as 21 based on the maximum value of the second priorities of the idle cache calculation unit (2, 0) and the idle cache calculation unit (3, 1) (here the maximum value of the second priorities is directly determined as the third priority, that is, the second preset parameter is 0), and then compares the first priority and the third priority of the queue management unit (3, 0). If the first priority is less than or equal to the third priority, the idle cache calculation unit (3, 0) obtains an idle pointer from the queue management unit (3, 0) and sends the obtained idle pointer to the idle cache calculation unit (2, 0) with the largest second priority.
[0158] The queue management unit (2, 0) is regarded as the first queue management unit, whose first priority is 21. The idle cache computing unit (1, 0) connected to it is the first idle cache computing unit, whose second priority is also 16. The idle cache computing unit (1, 0), the idle cache computing unit (3, 0) and the idle cache computing unit (2, 1) adjacent to the idle cache computing unit (2, 0) are the second idle cache computing units, whose second priorities are 26, 16 and 16 respectively.
[0159] The idle cache calculation unit (2,0) determines the third priority as 26 based on the maximum value of the second priorities of the idle cache calculation unit (3,0), the idle cache calculation unit (1,0) and the idle cache calculation unit (2,1) (here the maximum value of the second priorities is directly determined as the third priority, i.e. the second preset parameter is 0), and by comparing the first priority and the third priority of the queue management unit (2,0), if the first priority is less than or equal to the third priority, the idle cache calculation unit (2,0) obtains an idle pointer from the queue management unit (2,0) and sends the obtained idle pointer to the idle cache management unit (1,0) with the largest second priority. Here, the obtained idle pointer includes the idle pointer obtained from the queue management unit (2,0) and the queue management unit (3,0).
[0160] The queue management unit (1, 0) is regarded as the first queue management unit, whose first priority is 26. The idle cache computing unit (1, 0) connected to it is the first idle cache computing unit, whose second priority is also 26. The idle cache computing unit (0, 0), the idle cache computing unit (2, 0) and the idle cache computing unit (1, 1) adjacent to the idle cache computing unit (1, 0) are the second idle cache computing units, and their second priorities are 31, 21 and 21 respectively.
[0161] The free cache calculation unit (1, 0) determines the third priority as 31 based on the maximum value of the second priorities of the free cache calculation unit (0, 0), the free cache calculation unit (2, 0) and the free cache calculation unit (1, 1) (here the maximum value of the second priorities is directly determined as the third priority, i.e. the second preset parameter is 0). By comparing the first priority and the third priority of the queue management unit (1, 0), if the first priority is less than or equal to the third priority, the free cache calculation unit (1, 0) obtains the free pointer from the queue management unit (1, 0) and sends the obtained free pointer to the free cache calculation unit (0, 0) with the largest second priority. Here, the obtained free pointer includes the free pointers obtained from the queue management unit (1, 0), the queue management unit (2, 0) and the queue management unit (3, 0). The free cache calculation unit (0, 0) provides the free pointer to the queue management unit (0, 0).
[0162] The above description is merely an exemplary description of the process in which the queue management unit in the first row donates free pointers to the queue management unit (0, 0), and the situations in other rows and columns can be deduced in the same way.
[0163] It can be seen that the other 15 queue management units on the switch chip have donated free addresses to the queue management unit (0, 0). The free pointer is sent to the queue management unit (0, 0) through the cache sharing network, so that the queue management unit (0, 0) with a smaller free cache space capacity can use the free pointers of other queue management units to store message descriptors, thereby realizing the sharing of cache space between queue management units on the switch chip.
[0164] Based on the same application concept, the present application embodiment also provides a switching chip, see Figure 7 , is a schematic diagram of the structure of a switching chip provided in an embodiment of the present application, the switching chip comprising: a first number of queue management units 71 and a first number of free cache calculation units 72, each queue management unit 71 is connected to a free cache calculation unit 72, adjacent free cache calculation units 72 are connected to each other, and the local cache space of the queue management unit 71 is used to cache message descriptors;
[0165] Any first queue management unit 71 of the queue management units is used to determine a first priority according to the capacity of the local free cache space, and send the first priority to the connected first free cache calculation unit, wherein the size of the first priority is inversely proportional to the size of the local free cache space of the queue management unit;
[0166] The first free cache calculation unit 72 is configured to receive the second priority sent by the adjacent second free cache calculation unit, and determine the third priority based on the maximum value of the second priority; if the first priority is greater than the third priority, obtain the first free pointer from the second free cache calculation unit, and after receiving the free pointer acquisition request sent by the first queue management unit, send the first free pointer to the first queue management unit; if the first priority is less than or equal to the third priority, obtain the second free pointer from the first queue management unit, and send the obtained free pointer to the second free cache calculation unit;
[0167] Among them, the second priority of the second free cache calculation unit is equal to the first priority of the connected second queue management unit, the first free pointer is used to indicate the address of the local free cache space in the corresponding queue management unit, and the second free pointer is used to indicate the address of the local free cache space in the first queue management unit.
[0168] The technical solution provided by the embodiment of the present application is to set up multiple queue management units on the switching chip to cache message descriptors. When large traffic comes, the message descriptors are distributed and stored in multiple queue management units, so as to avoid a large number of message descriptors from rushing into one queue management unit in a short time, thereby reducing network congestion and data loss.
[0169] In addition, each queue management unit on the switching chip is connected to an idle cache computing unit, and adjacent idle cache computing units are connected to each other, that is, a cache sharing network is formed. Based on the cache sharing network, any first queue management unit in the queue management unit diffuses its first priority to the first idle cache computing unit connected to it, and at the same time, the first idle cache computing unit will also receive the second priority sent by the second idle cache computing unit adjacent to it. Correspondingly, the first idle cache computing unit will also send its second priority to the second idle cache computing unit, and the second priority of the second idle cache computing unit is equal to the first priority of the second queue management unit connected to it, and the second priority of the first idle cache computing unit is equal to the first priority of the first queue management unit. That is, based on the cache sharing network, any first free cache computing unit among the free cache computing units can indirectly obtain the first priority of the second queue management unit connected to the second adjacent free cache computing unit, and the size of the first priority of the queue management unit is inversely proportional to the size of the local free cache space capacity of the queue management unit. That is, based on the cache sharing network, any first free cache computing unit among the free cache computing units can indirectly obtain the local free cache space capacity of the first queue management unit connected to it, and the local free cache space capacity of the second queue management unit connected to the second adjacent free cache computing unit.
[0170] Furthermore, any first free cache calculation unit among the free cache calculation units determines a third priority based on the maximum value of the second priorities of the second free cache calculation units adjacent thereto, and compares the first priority of the first queue management unit connected thereto with the third priority. If the first priority is greater than the third priority, it means that the capacity of the local free cache space contained in the first queue management unit is smaller than the capacity of the free cache space contained in the second queue management unit. Then the first free cache calculation unit obtains a first free pointer from the second free cache calculation unit and provides it to the first queue management unit, so that the first queue management unit can use the free pointers of other queue management units to store message descriptors when the local free cache capacity is smaller. On the contrary, if the first priority is less than or equal to the third priority, it means that the capacity of the local free cache space contained in the first queue management unit is larger than the capacity of the free cache space contained in the second queue management unit. Then the first free cache calculation unit pulls the address of the local free cache space from the first queue management unit, and then donates the obtained free pointer to the second free cache calculation unit, and provides it to the second queue management unit, so that the second queue management unit with a smaller free cache capacity can use the free pointer of the first queue management unit to store message descriptors. This enables the sharing of cache space between queue management units. In most cases, the queue management unit has sufficient storage space to store message descriptors, so that a large number of message descriptors can be processed in a short time, thereby reducing the probability of network congestion and data loss and improving the utilization and access rate of the on-chip cache.
[0171] In one embodiment of the present application, the first free cache calculation unit is specifically used to obtain a first free pointer from a second free cache calculation unit whose second priority is lower than the first priority; and / or send the obtained free pointer to the second free cache calculation unit whose second priority is the highest.
[0172] In one embodiment of the present application, each queue management unit and each free buffer calculation unit includes a temporary buffer subunit, wherein the first free buffer calculation unit,
[0173] Specifically used for obtaining a first free pointer from the second temporary cache sub-unit, and storing the first free pointer in the first temporary cache sub-unit until the free space capacity of the first temporary cache sub-unit is less than or equal to a first preset threshold; after receiving the free pointer acquisition request sent by the first queue management unit, sending the first free pointer to the third temporary cache sub-unit; wherein the first temporary cache sub-unit is: a temporary cache sub-unit of the first free cache calculation unit, the second temporary cache sub-unit is: a temporary cache sub-unit of the second free cache calculation unit, and the third temporary cache sub-unit is: a temporary cache sub-unit of the first queue management unit;
[0174] A second free pointer is obtained from the third temporary cache sub-unit, and the second free pointer is stored in the first temporary cache sub-unit, and the obtained free pointer is sent to the second temporary cache sub-unit.
[0175] In one embodiment of the present application, the free pointer acquisition request is sent when the local free cache space capacity of the first queue management unit is less than a second preset threshold; and / or the second free pointer is an free pointer selected by the first queue management unit from the local free cache space and stored in the third temporary cache sub-unit when the local free cache space capacity of the first queue management unit is greater than a third preset threshold.
[0176] In one embodiment of the present application, any first queue management unit among the queue management units is specifically used to determine that the first priority is a preset maximum value when the local free cache space capacity of the first queue management unit is zero; when the local free cache space capacity of the first queue management unit is not zero, based on the local free cache space capacity of the first queue management unit, determine the local used cache space capacity of the first queue management unit, and calculate the quotient of the local used cache space capacity and the first preset parameter to determine the first priority.
[0177] The present application also provides an electronic device, such as Figure 8 As shown, it includes a switching chip 81 , a communication interface 82 , a memory 83 and a communication bus 84 , wherein the switching chip 81 , the communication interface 82 , and the memory 83 communicate with each other via the communication bus 84 .
[0178] A memory 83, for storing computer programs;
[0179] The switching chip 81 is used to implement the steps of any of the above-mentioned on-chip cache sharing methods when executing the program stored in the memory 83.
[0180] The communication bus mentioned in the above electronic device can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The communication bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, only one thick line is used in the figure, but it does not mean that there is only one bus or one type of bus.
[0181] The communication interface is used for communication between the above electronic device and other devices.
[0182] The memory may include a random access memory (RAM) or a non-volatile memory (NVM), such as at least one disk memory. Optionally, the memory may also be at least one storage device located away from the aforementioned switching chip.
[0183] The above-mentioned switching chip can be a general switching chip, including a central switching chip (Central Processing Unit, CPU), a network switching chip (Network Processor, NP), etc.; it can also be a digital signal switching chip (Digital Signal Processor, DSP), an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), a field programmable gate array (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components.
[0184] In another embodiment provided in the present application, a computer-readable storage medium is provided, in which a computer program is stored. When the computer program is executed by a switching chip, the steps of any of the above-mentioned on-chip cache sharing methods are implemented.
[0185] In another embodiment provided by the present application, a computer program product including instructions is also provided, which, when executed on a computer, enables the computer to execute any on-chip cache sharing method in the above embodiments.
[0186] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from a website site, a computer, a server or a data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or a data center that includes one or more available media integrated. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive Solid State Disk (SSD)), etc.
[0187] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.
[0188] Each embodiment in this specification is described in a related manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the switching chip embodiment, the electronic device embodiment, and the computer storage medium embodiment, since they are basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.
[0189] The above description is only a preferred embodiment of the present application and is not intended to limit the protection scope of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application are included in the protection scope of the present application.
Claims
1. An on-chip cache sharing method, characterized in that: The method is applied to a switching chip, the switching chip includes a first number of queue management units and a first number of free cache calculation units, each queue management unit is connected to a free cache calculation unit, adjacent free cache calculation units are connected to each other, and the local cache space of each queue management unit is used to cache message descriptors. The method includes: Any first queue management unit among the queue management units determines a first priority according to the capacity of the local free cache space, and sends the first priority to the connected first free cache calculation unit, wherein the size of the first priority is inversely proportional to the size of the local free cache space of the queue management unit; The first free cache calculation unit receives the second priority sent by the adjacent second free cache calculation unit, and determines the third priority based on the maximum value of the second priority; if the first priority is greater than the third priority, obtains the first free pointer from the second free cache calculation unit, and after receiving the free pointer acquisition request sent by the first queue management unit, sends the first free pointer to the first queue management unit; if the first priority is less than or equal to the third priority, obtains the second free pointer from the first queue management unit, and sends the obtained free pointer to the second free cache calculation unit; Among them, the second priority of the second free cache calculation unit is equal to the first priority of the connected second queue management unit, the first free pointer is used to indicate the address of the local free cache space in the corresponding queue management unit, and the second free pointer is used to indicate the address of the local free cache space in the first queue management unit.
2. The method according to claim 1, characterized in that The obtaining the first free pointer from the second free cache calculation unit includes: Acquire a first free pointer from a second free cache calculation unit whose second priority is less than the first priority; and / or The sending the acquired free pointer to the second free cache calculation unit includes: The obtained free pointer is sent to the second free cache calculation unit with the highest second priority.
3. The method according to claim 1, characterized in that Each queue management unit and each free cache calculation unit include a temporary cache subunit, and obtaining a first free pointer from the second free cache calculation unit, and after receiving the free pointer acquisition request sent by the first queue management unit, sending the first free pointer to the first queue management unit, includes: Obtaining a first free pointer from the second temporary cache sub-unit, and storing the first free pointer in the first temporary cache sub-unit until the free space capacity of the first temporary cache sub-unit is less than or equal to a first preset threshold; after receiving the free pointer acquisition request sent by the first queue management unit, sending the first free pointer to the third temporary cache sub-unit; The first temporary cache subunit is a temporary cache subunit of the first free cache calculation unit, the second temporary cache subunit is a temporary cache subunit of the second free cache calculation unit, and the third temporary cache subunit is a temporary cache subunit of the first queue management unit. The acquiring the second idle pointer from the first queue management unit and sending the acquired idle pointer to the second idle cache calculation unit includes: A second free pointer is obtained from the third temporary cache sub-unit, and the second free pointer is stored in the first temporary cache sub-unit, and the obtained free pointer is sent to the second temporary cache sub-unit.
4. The method according to claim 3, characterized in that The idle pointer acquisition request is sent when the local idle cache space capacity of the first queue management unit is less than or equal to a second preset threshold; and / or The second idle pointer is an idle pointer selected from the local idle cache space by the first queue management unit and stored in the third temporary cache sub-unit when the local idle cache space capacity of the first queue management unit is greater than a third preset threshold.
5. The method according to any one of claims 1 to 4, characterized in that: The determining the first priority according to the local free cache space capacity includes: When the local free cache space capacity of the first queue management unit is zero, determining the first priority to be a preset maximum value; When the local free cache space capacity of the first queue management unit is not zero, the local used cache space capacity of the first queue management unit is determined based on the local free cache space capacity of the first queue management unit, and the quotient of the local used cache space capacity and a first preset parameter is calculated to determine the first priority.
6. A switching chip, characterized in that: The switching chip includes a first number of queue management units and a first number of free cache calculation units, each queue management unit is connected to a free cache calculation unit, adjacent free cache calculation units are connected to each other, and the local cache space of the queue management unit is used to cache the message descriptor; Any first queue management unit of the queue management units is used to determine a first priority according to the capacity of the local free cache space, and send the first priority to the connected first free cache calculation unit, wherein the size of the first priority is inversely proportional to the size of the local free cache space capacity of the queue management unit; The first free cache calculation unit is configured to receive a second priority sent by an adjacent second free cache calculation unit, determine a third priority based on a maximum value of the second priorities; if the first priority is greater than the third priority, obtain a first free pointer from the second free cache calculation unit, and after receiving a free pointer acquisition request sent by the first queue management unit, send the first free pointer to the first queue management unit; If the first priority is less than or equal to the third priority, obtaining a second idle pointer from the first queue management unit, and sending the obtained idle pointer to the second idle cache calculation unit; Among them, the second priority of the second free cache calculation unit is equal to the first priority of the connected second queue management unit, the first free pointer is used to indicate the address of the local free cache space in the corresponding queue management unit, and the second free pointer is used to indicate the address of the local free cache space in the first queue management unit.
7. The switching chip according to claim 6, characterized in that: The first free cache calculation unit, Specifically used for obtaining a first free pointer from a second free cache calculation unit whose second priority is lower than the first priority; and / or sending the obtained free pointer to a second free cache calculation unit whose second priority is the highest.
8. The switching chip according to claim 6, characterized in that: Each queue management unit and each free buffer calculation unit includes a temporary buffer subunit, wherein the first free buffer calculation unit, Specifically used to obtain a first free pointer from the second temporary cache subunit, and store the first free pointer in the first temporary cache subunit until the free space capacity of the first temporary cache subunit is less than or equal to a first preset threshold; After receiving the idle pointer acquisition request sent by the first queue management unit, sending the first idle pointer to the third temporary cache sub-unit; The first temporary cache subunit is a temporary cache subunit of the first free cache calculation unit, the second temporary cache subunit is a temporary cache subunit of the second free cache calculation unit, and the third temporary cache subunit is a temporary cache subunit of the first queue management unit. A second free pointer is obtained from the third temporary cache sub-unit, and the second free pointer is stored in the first temporary cache sub-unit, and the obtained free pointer is sent to the second temporary cache sub-unit.
9. An electronic device, characterized in that: It includes a switching chip, a communication interface, a memory and a communication bus, wherein the switching chip, the communication interface and the memory communicate with each other through the communication bus; Memory, used to store computer programs; The switching chip is used to implement the method steps described in any one of claims 1-5 when executing the program stored in the memory.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by the switching chip, the method steps described in any one of claims 1-5 are implemented.
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