Printed circuit board, method of manufacturing the same, and electronic device

Abstract

The application relates to the technical field of circuit boards, and discloses a printed circuit board, a manufacturing method thereof and electronic equipment, which comprise a signal trace layer and a signal reference layer adjacent to the signal trace layer; wherein the signal trace layer comprises a trace width mutation area; the signal reference layer comprises a clearance area; and part of the clearance area is located at the projection of the trace width mutation area on the signal reference layer. The design of adding the clearance area in the signal reference layer can prolong the distance of characteristic impedance change, adjust the impedance change rate of the trace, make the electric field distribution between the trace and the reference ground more uniform, realize smooth transition of the trace characteristic impedance, improve the continuity of the trace characteristic impedance, reduce signal reflection caused by the trace characteristic impedance, maintain the integrity and quality of the signal, and reduce electromagnetic radiation and interference, and improve the electromagnetic compatibility of the system.

Description

Technical Field

[0001] This invention relates to the field of circuit board technology, and in particular to a printed circuit board and its manufacturing method, as well as electronic devices. Background Technology

[0002] As electronic products continue to upgrade, the requirements for printed circuit board (PCB) traces and designs are becoming increasingly stringent, particularly the impedance matching requirements for high-speed signals entering and exiting the chip. However, with the trend towards product miniaturization, chips are also becoming smaller, necessitating wider traces at the high-speed signal exit points to meet the required characteristic impedance. Sudden widening or narrowing of high-speed signal traces can cause abrupt changes in characteristic impedance, easily leading to impedance mismatch. When signals encounter impedance mismatch during transmission, it results in signal reflection and attenuation, further impacting signal transmission quality.

[0003] Therefore, the sudden change in characteristic impedance of high-speed signal traces is a technical problem that urgently needs to be solved by those in this field. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide a printed circuit board and its manufacturing method, and an electronic device, which can adjust the impedance change rate, improve the continuity of the trace characteristic impedance, and reduce signal reflection and signal quality degradation caused by it.

[0005] To solve the above-mentioned technical problems, the present invention provides a printed circuit board, including: a signal routing layer and a signal reference layer adjacent to the signal routing layer;

[0006] The signal trace layer includes a trace width abrupt change region;

[0007] The signal reference layer includes a clearance area; a portion of the clearance area is located at the projection of the trace width abrupt change region onto the signal reference layer.

[0008] In a first aspect, in the printed circuit board provided by the present invention, the trace width abrupt change region is the region where the trace changes from the first width to the second width or the region where the trace changes from the second width to the first width.

[0009] Wherein, the first width is greater than the second width;

[0010] The width of the clearance area is less than the first width but greater than the second width.

[0011] On the other hand, in the printed circuit board provided by the present invention, the length of the clearance area along the trace extension direction is greater than the length of the trace width abrupt change area.

[0012] On the other hand, in the printed circuit board provided by the present invention, the length of the clearance area along the trace extension direction is less than or equal to twice the length of the trace width abrupt change area.

[0013] On the other hand, in the printed circuit board provided by the present invention, the cross-sectional shape of the clearance area along the plane direction where the signal reference layer is located is a regular geometric pattern.

[0014] The regular geometric shape includes at least one of rhombus, ellipse, and hexagon.

[0015] On the other hand, in the printed circuit board provided by the present invention, when the cross-sectional shape of the clearance area along the plane direction where the signal reference layer is located is rhomboid, the first diagonal of the rhomboid is parallel to the trace extension direction, and the second diagonal is perpendicular to the trace extension direction.

[0016] The length of the second diagonal is less than the first width but greater than the second width;

[0017] The length of the first diagonal is greater than the length of the trace width abrupt change region and less than or equal to twice the length of the trace width abrupt change region.

[0018] On the other hand, in the printed circuit board provided by the present invention, the signal reference layer is located directly above the signal trace layer;

[0019] Alternatively, the signal reference layer may be located directly below the signal trace.

[0020] On the other hand, in the printed circuit board provided by the present invention, the signal reference layer includes a first signal reference layer and a second signal reference layer;

[0021] The signal routing layer includes a first signal routing layer, a second signal routing layer, and a third signal routing layer;

[0022] The first signal reference layer is located between the first signal routing layer and the second signal routing layer;

[0023] The second signal reference layer is located between the second signal routing layer and the third signal routing layer;

[0024] The distance between the first signal reference layer and the second signal reference layer ranges from 4 mil to 10 mil;

[0025] The dielectric constant of the dielectric material between the first signal reference layer and the second signal reference layer ranges from 4.0 to 4.8;

[0026] Both the first signal reference layer and the second signal reference layer are planar layers made of conductive materials;

[0027] The first signal reference layer and / or the second signal reference layer include the clearance area.

[0028] To address the aforementioned technical problems, the present invention also provides a method for manufacturing a printed circuit board, comprising:

[0029] Set a sudden change area in trace width on the signal trace layer;

[0030] A clearance region is formed on a signal reference layer adjacent to the signal trace layer; a portion of the clearance region is located at the projection of the trace width abrupt change region onto the signal reference layer.

[0031] To address the aforementioned technical problems, the present invention also provides an electronic device, including the printed circuit board provided by the present invention.

[0032] As can be seen from the above technical solution, the printed circuit board provided by the present invention includes: a signal trace layer and a signal reference layer adjacent to the signal trace layer; wherein, the signal trace layer includes a trace width abrupt change region; the signal reference layer includes a clearance region; and a portion of the clearance region is located at the projection of the trace width abrupt change region onto the signal reference layer.

[0033] The beneficial effects of this invention are as follows: the printed circuit board provided by this invention has a clearance area in the signal reference layer, and part of the clearance area is located at the projection of the trace width abrupt change region on the signal reference layer. This design, by increasing the clearance area in the signal reference layer, can extend the distance of characteristic impedance change, adjust the impedance change rate of the trace, and make the electric field distribution between the trace and the reference ground more uniform. This achieves a smooth transition of the trace characteristic impedance, improves the continuity of the trace characteristic impedance, reduces signal reflection caused by it, effectively improves the performance of the trace, maintains signal integrity, and ensures high signal quality during transmission. It solves the problem of sudden changes in characteristic impedance of high-speed signal traces affecting signal transmission quality. Furthermore, reducing signal reflection can reduce electromagnetic radiation and interference, and improve the electromagnetic compatibility of the system.

[0034] Furthermore, the present invention also provides a corresponding manufacturing method and electronic device for printed circuit boards, which have the same or corresponding technical features as the printed circuit boards mentioned above, further making the printed circuit boards more practical. The manufacturing method and electronic device have corresponding advantages. Attached Figure Description

[0035] To more clearly illustrate the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0036] Figure 1 This is a schematic diagram of the signal trace layer in a printed circuit board provided in an embodiment of the present invention;

[0037] Figure 2 This is a schematic diagram of the structure of the abrupt change region in the trace width of the signal trace layer provided in an embodiment of the present invention;

[0038] Figure 3 This is a schematic diagram of the structure of the clearance region in the signal reference layer provided in an embodiment of the present invention;

[0039] Figure 4 This is a flowchart illustrating a method for manufacturing a printed circuit board according to an embodiment of the present invention.

[0040] Wherein, 1 represents the trace in the signal trace layer, 2 represents the trace width abrupt change area in the signal trace layer, and 3 represents the clearance area in the signal reference layer. Detailed Implementation

[0041] With the advent of the big data era, electronic products (such as servers) have experienced rapid development. The performance of these products is constantly improving, and signal transmission efficiency is increasing. Consequently, the design requirements for printed circuit boards (PCBs) for signal routing are also becoming increasingly stringent, particularly the impedance matching requirements for high-speed signals entering and exiting the chip. However, with the trend towards product miniaturization, chips are becoming smaller. Sometimes, due to space constraints around the chip, the traces exiting the chip must be thinner, resulting in higher characteristic impedance. Once the signal exits the chip area, the trace width becomes more important due to signal requirements, leading to a lower characteristic impedance.

[0042] Characteristic impedance, also known as "specific impedance," is not DC resistance but a concept specific to long-distance signal transmission. In the high-frequency range, during signal transmission, a momentary current is generated between the signal line and the reference plane (power or ground plane) due to the establishment of an electric field at the point where the signal arrives. If the trace is isotropic, then a current I will always exist as long as the signal is transmitting. If the signal output level is V, the trace will be equivalent to a resistor with a magnitude of V / I during signal transmission. This equivalent resistance is called the characteristic impedance Z of the trace. If the characteristic impedance changes along the transmission path during signal transmission, the signal will be reflected at the junction of impedance discontinuities.

[0043] Characteristic impedance refers to the impedance determined by the inherent characteristics of a circuit, as detailed below: Circuit impedance is determined by several factors: trace width, copper thickness, and dielectric layer thickness. Once a printed circuit board (PCB) is designed, theoretically, the impedance of each trace is fixed because the aforementioned factors are already determined. However, due to manufacturing processes, variations in trace width, copper thickness, and dielectric layer thickness can all lead to changes in impedance. At the high-speed signal output chip, the trace width is typically widened to meet the required impedance characteristics, for example, changing from 4 mil to 8 mil. The characteristic impedance change of high-speed signal traces is abrupt, easily causing signal reflection and impedance mismatch. Narrowing the trace will also cause changes in characteristic impedance, leading to impedance mismatch during signal transmission. This will cause signal reflection and attenuation, further affecting signal transmission quality.

[0044] To address the aforementioned technical problem of abrupt changes in characteristic impedance of high-speed signal traces, this invention provides a printed circuit board that can extend the distance of characteristic impedance changes, adjust the impedance change rate of the traces, improve the continuity of characteristic impedance, and reduce signal reflection and signal quality degradation caused by these changes.

[0045] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present invention.

[0046] To enable those skilled in the art to better understand the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. An embodiment of the present invention provides a printed circuit board, which may include: a signal trace layer and a signal reference layer adjacent to the signal trace layer; wherein, the signal trace layer includes a trace width abrupt change region; the signal reference layer includes a clearance region; a portion of the clearance region is located at the projection of the trace width abrupt change region onto the signal reference layer.

[0047] Figure 1 This is a schematic diagram of the signal trace layer in a printed circuit board provided in an embodiment of the present invention, as shown below. Figure 1 As shown, the printed circuit board includes a signal routing layer, which is a conductive layer used for routing traces. The signal routing layer may include multiple traces 1. Figure 1 Two traces 1 are shown. Trace 1 is used to connect the pins of electronic components, enabling electrical signals to be transmitted between the various electronic components, and is a key part of realizing the circuit function.

[0048] Figure 2 This is a schematic diagram of the structure of the abrupt change region in the trace width of the signal trace layer provided in an embodiment of the present invention, as shown below. Figure 2 As shown, the signal trace layer includes a trace width abrupt change region 2. Trace width abrupt change region 2 refers to the area where the width of trace 1 changes abruptly. It can also be understood as a sudden change in the width of trace 1 at the coupling point, resulting in a significant difference in trace 1 width. This leads to severe impedance mismatch at this point, and consequently, more severe signal attenuation or degradation observed at the receiver. Normally, trace 1 maintains a certain width for signal transmission, but in some locations, due to design requirements or other factors, the width of trace 1 may change. For example, to connect different types of electronic components with varying pin pitches and required trace widths, abrupt changes in trace width occur when connecting a component with wider pins to one with narrower pins. Similarly, connecting a power amplifier chip (with thicker pins requiring wider traces to carry high current) and a small signal processing chip (with thinner pins requiring narrower traces) creates a region of varying trace width. When wiring space on a printed circuit board is limited, trace widths may need to be adjusted to avoid other components or traces. In high-density wiring on printed circuit boards, to complete all signal connections within a limited space, trace widths sometimes must be changed, creating a trace width abrupt change region 2. This region 2 can lead to signal integrity and electromagnetic compatibility issues.

[0049] Figure 3 This is a schematic diagram of the clearance region in the signal reference layer provided in an embodiment of the present invention. Figure 3 As shown, a clearance area 3 is provided in the signal reference layer. The signal reference layer is a conductive layer that provides a reference potential for signal transmission and is an important component of the circuit signal loop. It is usually a ground (GND) layer or a power (POWER) layer and plays a key role in multilayer circuit boards. The clearance area 3 of this invention refers to a specific area in the signal reference layer of the circuit board where no obstructions such as components, traces, or vias are placed.

[0050] In the printed circuit board provided in this embodiment of the invention, a clearance area is provided in the signal reference layer, and part of the clearance area is located at the projection of the trace width abrupt change region 2 on the signal reference layer. This design of adding a clearance area in the signal reference layer can extend the distance of characteristic impedance change, adjust the impedance change rate of trace 1, and make the electric field distribution between trace 1 and reference ground more uniform. This achieves a smooth transition of characteristic impedance of trace 1, improves the continuity of characteristic impedance of trace 1, reduces signal reflection caused by it, effectively improves the performance of the trace, maintains signal integrity, and ensures that the signal maintains high quality during transmission. It solves the problem that the sudden change of characteristic impedance of high-speed signal traces affects the signal transmission quality. Furthermore, reducing signal reflection can reduce electromagnetic radiation and interference, and improve the electromagnetic compatibility of the system.

[0051] It should be noted that when a signal is emitted from the signal source and propagates along trace 1, if the characteristic impedance of trace 1 changes at a certain point (impedance mismatch point), the signal will be reflected at that point. The degree of reflection depends on the magnitude of the impedance change and the frequency of the signal, while the direction of the reflected wave depends on the position of the signal source relative to the impedance change point. Impedance discontinuities cause signal reflection, leading to signal integrity issues. This effect can be explained through the following aspects:

[0052] The first aspect is the reflection coefficient. This reflection coefficient is determined by the input impedance and the load impedance, and its calculation formula is as follows:

[0053] Γ = (Zl - Zi) / (Zl + Zi);

[0054] Where Γ represents the reflection coefficient, Zi represents the input impedance, and Zl represents the load impedance.

[0055] When the impedance increases, the reflection coefficient also increases, resulting in more noticeable reflection.

[0056] When there is an impedance change on trace 1, the longer the smooth transition region of this impedance change—that is, the longer the physical length required for the impedance value to gradually and smoothly transition from one state to another—the less impedance mismatch the signal experiences within this transition region, and therefore the less reflection and loss will occur. This is especially true in high-frequency applications, where signals are more sensitive to impedance discontinuities due to their shorter wavelengths. Therefore, this invention, by designing a longer smooth transition region—that is, a smoother impedance change—can more effectively reduce high-frequency signal reflection and loss, thereby improving signal transmission performance. Smooth transition region: This refers to the gradual and smooth change of impedance value during the transition process, avoiding sudden jumps or abrupt changes.

[0057] The second aspect is sensitivity to high-frequency signals. Because high-frequency signals have shorter wavelengths, they are more susceptible to minute changes on trace 1, including impedance discontinuities. Therefore, in high-frequency applications, this invention focuses on the smoothness and continuity of impedance variations.

[0058] The third aspect is improved transmission performance. This invention, by designing a longer, smoother transition region, reduces signal reflection and loss during transmission, thereby improving signal integrity and quality. This is particularly important for high-frequency applications such as high-speed data transmission and wireless communication.

[0059] Furthermore, in a specific implementation, in the printed circuit board provided in the embodiments of the present invention, the trace width abrupt change region 2 can be the region where the trace 1 changes from a first width to a second width or from a second width to a first width; wherein, the first width can be greater than the second width. The width of the clearance area can be less than the first width and greater than the second width.

[0060] In implementation, the trace width abrupt change zone 2 can be the area where trace 1 changes from thick to thin, or the area where trace 1 changes from thin to thick. For example... Figure 1 As shown, the characteristic impedance of trace 1 changes from 50 ohms to 75 ohms as it tapers from thick to thin. Figure 2 As shown, trace 1 changes from a first width 'a' to a second width 'b'. The trace width abrupt change zone 2 is the area where trace 1 changes from its first width 'a' to its second width 'b'. The first width 'a' is greater than the second width 'b'. (As shown...) Figure 3 As shown, the width c of the clearance area 3 can be less than the first width a and greater than the second width b, i.e., b < c < a.

[0061] Furthermore, in a specific implementation, in the printed circuit board provided in the embodiments of the present invention, the length e of the clearance area 3 along the extension direction of the trace 1 can be greater than the length d of the trace width abrupt change area 2.

[0062] In implementation, such as Figure 2 As shown, the length d of the trace width abrupt change region 2 can be understood as the distance of change in the characteristic impedance of trace 1, representing the distance range in which the characteristic impedance changes. When the length d of the trace width abrupt change region 2 is small, the characteristic impedance changes relatively quickly, meaning that the characteristic impedance undergoes a large change within a shorter length. Conversely, when the length d of the trace width abrupt change region 2 is long, the characteristic impedance changes relatively slowly because the characteristic impedance gradually transitions over a longer length.

[0063] To optimize the performance of trace 1, this invention aims to smooth the change in characteristic impedance as much as possible to reduce signal reflection and loss during transmission. Therefore, this invention smooths the characteristic impedance of trace 1 by extending the length d of the trace width abrupt change region 2. This allows the characteristic impedance to gradually transition over a longer distance, thereby avoiding sudden impedance jumps and reducing signal discontinuities.

[0064] In practice, the impedance change may occur in the abrupt width change region 2 of the signal trace layer, with the impedance change distance being... Figure 2As shown in the figure, the present invention adds a clearance region 3 in the signal reference layer at the projection of the trace width abrupt change region 2 to optimize the impedance change of trace 1. This extends the impedance change distance d by adding a clearance region 3 to the reference ground. This method not only effectively improves the performance of trace 1 but also enhances signal integrity and quality.

[0065] It is important to note that while extending the length of 'd' can smooth the characteristic impedance, an excessively long 'd' may also cause the transmission line to occupy more space. Therefore, in practical designs, this invention can weigh the relationship between the length of 'd' and the performance of trace 1 according to the specific application scenario and requirements.

[0066] The distance 'd' represents the distance of its characteristic impedance change. The smaller 'd' is, the faster the characteristic impedance changes; the longer 'd' is, the slower the characteristic impedance changes. Therefore, this invention smooths the characteristic impedance of the trace by extending 'd'. It is understood that the characteristic impedance of a trace is related to many factors, including trace thickness, trace width, material, ground plane, etc. Here, this invention extends the distance 'd' by designing a clearance region 3 in the signal reference layer. For example... Figure 3 As shown, the length e of the clearance region 3 along the extension direction of the trace 1 can be greater than the length d of the trace width abrupt change region 2, i.e., e > d. This can effectively control the characteristic impedance of the trace 1.

[0067] Furthermore, in a specific implementation, in the printed circuit board provided in the embodiments of the present invention, the length e of the clearance area 3 along the extension direction of the trace 1 can be less than or equal to twice the length d of the trace width abrupt change area 2.

[0068] In practice, since the length e of the clearance area 3 along the extension direction of the trace 1 cannot be too large, otherwise it will affect the signal quality of the trace, the length e of the clearance area 3 along the extension direction of the trace 1 can be set to be less than or equal to twice the length d of the trace width abrupt change area 2, that is, e≤2d.

[0069] Furthermore, in a specific implementation, in the printed circuit board provided in the embodiments of the present invention, the cross-sectional shape of the clearance area 3 along the plane where the signal reference layer is located can be a regular geometric shape. The regular geometric shape can include at least one of rhombus, ellipse, and hexagon.

[0070] In practice, the present invention can adjust the layout or shape of the signal reference layer by changing the shape of the clearance area 3 in the signal reference layer, thereby making the electric field distribution between the trace and the reference ground more uniform, thus achieving a smooth transition of characteristic impedance and ensuring the integrity and quality of the signal.

[0071] The cross-sectional shape of the clearance area 3 along the plane of the signal reference layer in this invention can be designed as a regular geometric shape. This regular geometric shape can be a rhombus, an ellipse, a hexagon, etc. That is, the cross-sectional shape of the clearance area 3 along the plane of the signal reference layer can be a rhombus, an ellipse, or a hexagon, etc. When the cross-sectional shape of the clearance area 3 along the plane of the signal reference layer is rhombus, during the manufacturing process, the two sides of the rhombus can be shaped to form a similar rhombus shape. When infinitely divided, it can form a similar ellipse shape.

[0072] Furthermore, in a specific implementation, in the printed circuit board provided in the embodiments of the present invention, when the cross-sectional shape of the clearance area 3 along the plane where the signal reference layer is located is rhomboid, the first diagonal of the rhombus can be parallel to the trace extension direction, and the second diagonal can be perpendicular to the trace extension direction; the length of the second diagonal can be less than the first width and greater than the second width; the length of the first diagonal is greater than the length of the trace width abrupt change region 2 and less than or equal to twice the length of the trace width abrupt change region 2.

[0073] In implementation, such as Figure 3 As shown, the cross-sectional shape of the clearance region 3 along the plane of the signal reference layer is rhomboid. This rhombus has a first diagonal and a second diagonal. The first diagonal of the rhombus can be parallel to the extension direction of the trace 1, and the second diagonal can be perpendicular to the extension direction of the trace 1. The length of the second diagonal can be less than the first width a and greater than the second width b; the length of the first diagonal is greater than the length d of the trace width abrupt change region 2 and less than or equal to twice the length d of the trace width abrupt change region 2.

[0074] When the cross-sectional shape of the clearance region 3 along the plane of the signal reference layer is elliptical, the ellipse has a major axis and a minor axis. The major axis of the ellipse can be parallel to the extension direction of the trace 1, and the minor axis can be perpendicular to the extension direction of the trace 1. The length of the minor axis can be less than the first width a and greater than the second width b; the length of the major axis is greater than the length d of the trace width abrupt change region 2 and less than or equal to twice the length d of the trace width abrupt change region 2.

[0075] When the cross-sectional shape of the clearance region 3 along the plane of the signal reference layer is hexagonal, the hexagon has a first axis of symmetry and a second axis of symmetry that are perpendicular to each other. The first axis of symmetry of the hexagon can be parallel to the extension direction of the trace 1, and the second axis of symmetry can be perpendicular to the extension direction of the trace 1. The length of the second axis of symmetry can be less than the first width a and greater than the second width b; the length of the first axis of symmetry is greater than the length d of the trace width abrupt change region 2 and less than or equal to twice the length d of the trace width abrupt change region 2.

[0076] Furthermore, in a specific implementation, in the printed circuit board provided in the embodiments of the present invention, the signal reference layer may be located directly above the signal trace layer; or, the signal reference layer may be located directly below the signal trace.

[0077] In practice, the signal reference layer can be located directly above or below the signal trace layer, as long as the signal reference layer is adjacent to the signal trace layer. There are no restrictions on this.

[0078] Furthermore, in a specific implementation, in the printed circuit board provided in the embodiments of the present invention, the signal reference layer may include a first signal reference layer and a second signal reference layer; the signal routing layer may include a first signal routing layer, a second signal routing layer, and a third signal routing layer; the first signal reference layer is located between the first signal routing layer and the second signal routing layer; the second signal reference layer is located between the second signal routing layer and the third signal routing layer; the distance between the first signal reference layer and the second signal reference layer ranges from 4 mil to 10 mil; the dielectric constant of the dielectric material between the first signal reference layer and the second signal reference layer ranges from 4.0 to 4.8; both the first signal reference layer and the second signal reference layer are planar layers made of conductive material; the first signal reference layer and / or the second signal reference layer includes the clearance area.

[0079] In implementation, there can be multiple signal reference layers and multiple signal routing layers. Assuming that the signal reference layers include a first signal reference layer and a second signal reference layer, and the signal routing layers include a first signal routing layer, a second signal routing layer, and a third signal routing layer, the first signal reference layer can be located between the first signal routing layer and the second signal routing layer; the second signal reference layer is located between the second signal routing layer and the third signal routing layer. This spacing ensures that the signal reference layers and the signal routing layers are adjacent.

[0080] The distance between two adjacent signal reference layers can be set between 4 mil and 10 mil; the dielectric material between two adjacent signal reference layers can be FR4 (glass fiber epoxy resin), with a dielectric constant set between 4.0 and 4.8. This invention, by designing the distance between these adjacent signal reference layers, the dielectric constant of the dielectric material, and the geometric dimensions (such as length, width, or curvature) of the clearance area at trace changes, can precisely control the characteristic impedance value. This method ensures more stable signal transmission on the circuit board, improving the overall circuit performance and reliability.

[0081] Furthermore, both the first and second signal reference layers of this invention can be planar layers made of conductive materials. In practice, all signal reference layers can specifically be planar layers made of copper foil. The first and / or second signal reference layers may include a clearance region 3. That is, all signal reference layers of this invention can have a clearance region 3, or only some signal reference layers can have a clearance region 3. This clearance region can be drawn in the signal reference layer during the drawing process, with the desired cross-sectional shape of the clearance region drawn and assigned an empty property. This is equivalent to removing the clearance region shape from the copper foil, making the impedance change more gradual, thereby reducing signal reflection and lowering signal noise.

[0082] Assume the printed circuit board provided by this invention has 12 layers, stacked as L1, L2, ..., L12, where L1 is the first signal routing layer, L2 is the first signal reference layer, L3 is the second signal routing layer, L4 is the first power layer, L5 is the second signal reference layer, L6 is the third signal routing layer, L7 is the third signal reference layer, L8 is the second power layer, L9 is the fourth signal reference layer, L10 is the fourth signal routing layer, L11 is the fifth signal reference layer, and L12 is the fifth signal routing layer. The traces can be placed on the aforementioned signal routing layers, and each signal routing layer must have an adjacent signal reference layer. This invention can add a clearance area on the signal reference layer at the projection of the impedance variation region. By changing the shape of the clearance area, the variation of the trace impedance can be optimized.

[0083] Furthermore, in a specific implementation, in the printed circuit board provided in the embodiments of the present invention, an impedance matching device is installed on the surface layer of the printed circuit board. One end of the impedance matching device is connected to a trace of a first width a, and the other end of the impedance matching device is connected to a trace of a second width b. This setting of the impedance matching device can ensure that the energy of the signal source is efficiently transmitted to the load end, further reducing the reflection and loss of the signal during transmission, enabling the load to obtain maximum power, and effectively avoiding signal distortion, overshoot and ringing caused by the superposition of reflected waves and the original signal. It also reduces signal fluctuations and interference caused by impedance mismatch, reduces system noise, and further ensures the accuracy and stability of the signal.

[0084] In the above embodiments, the printed circuit board has been described in detail. Based on the same inventive concept, the embodiments of the present invention also provide embodiments corresponding to the manufacturing method of the printed circuit board.

[0085] Figure 4 This is a flowchart illustrating a method for manufacturing a printed circuit board according to an embodiment of the present invention. The method for manufacturing a printed circuit board provided in this embodiment is as follows: Figure 4 As shown, the specific steps include:

[0086] S401. Set a trace width abrupt change area on the signal trace layer.

[0087] S402. A clearance area is formed on a signal reference layer adjacent to the signal trace layer; a portion of the clearance area is located at the projection of the trace width abrupt change region onto the signal reference layer.

[0088] In the printed circuit board manufacturing method provided in the embodiments of the present invention, by executing the above steps S401 and S402, a clearance area is formed in the signal reference layer, and part of the clearance area is located at the projection of the trace width abrupt change region on the signal reference layer. In this way, by adding a clearance area in the signal reference layer, the distance of characteristic impedance change can be extended, the impedance change rate of the trace can be adjusted, and the electric field distribution between the trace and the reference ground can be made more uniform. This achieves a smooth transition of the trace characteristic impedance, improves the continuity of the trace characteristic impedance, reduces the signal reflection caused by it, effectively improves the performance of the trace, maintains the integrity of the signal, and ensures that the signal maintains high quality during transmission. It solves the problem that the sudden change of characteristic impedance of high-speed signal traces affects the signal transmission quality. Furthermore, reducing signal reflection can reduce electromagnetic radiation and interference, and improve the electromagnetic compatibility of the system.

[0089] Since the embodiments of the manufacturing method section correspond to the embodiments of the printed circuit board section, please refer to the description of the embodiments of the printed circuit board section for the embodiments of the manufacturing method section, and will not be repeated here. Furthermore, it has the same beneficial effects as the printed circuit board mentioned above.

[0090] Furthermore, in a specific implementation, in the printed circuit board manufacturing method provided in the embodiments of the present invention, step S402, forming a clearance area on the signal reference layer adjacent to the signal trace layer, may specifically include: forming a clearance area on the signal reference layer adjacent to the signal trace layer with a regular geometric shape along the plane of the signal reference layer. This regular geometric shape may include at least one of a rhombus, an ellipse, and a hexagon.

[0091] For more detailed information on the working process of each of the above steps, please refer to the relevant content disclosed in the foregoing embodiments, which will not be repeated here.

[0092] Based on the same inventive concept, embodiments of the present invention also provide an electronic device, including the aforementioned printed circuit board. Since the principle by which this electronic device solves the problem is similar to that of the aforementioned printed circuit board, the implementation of this electronic device can refer to the implementation of the printed circuit board, and repeated details will not be elaborated further.

[0093] The various embodiments in this specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0094] Finally, it should be noted that, unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used herein in the specification of the application is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms "comprising," "including," and "having," and any other variations thereof, are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element. In this application, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations.

[0095] For the foregoing embodiments, in order to simplify the description, they are all described as a series of actions. However, those skilled in the art should understand that the present invention is not limited to the described order of actions, because according to the present invention, some steps may be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to the present invention.

[0096] Obviously, the described embodiments are merely some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on these embodiments without inventive effort are within the scope of protection of the present invention. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art can still combine, add to, delete from, or otherwise adjust the features of the various embodiments of the present invention as appropriate without conflict or inventive effort, thereby obtaining different technical solutions that do not fundamentally depart from the concept of the present invention. These technical solutions are also within the scope of protection of the present invention.

[0097] The printed circuit board, its manufacturing method, and electronic device provided by this invention have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of this invention, and are not intended to limit the scope of protection of the invention. Furthermore, those skilled in the art will recognize that, based on the ideas of this invention, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this invention.

Claims

1. A printed circuit board, characterized by, The signal trace layer and the signal reference layer adjacent to the signal trace layer are provided. The signal trace layer comprises a trace width mutation region; the trace width mutation region is a region where the trace width changes from a first width to a second width or a region where the trace width changes from the second width to the first width; the first width is greater than the second width. The signal reference layer comprises a clearance region; part of the clearance region is located at the projection of the trace width mutation region on the signal reference layer. The width of the clearance region is less than the first width and greater than the second width. The length of the clearance region along the trace extension direction is greater than the length of the trace width mutation region; the length of the clearance region along the trace extension direction is less than or equal to twice the length of the trace width mutation region. The cross-sectional shape of the clearance region along the plane direction of the signal reference layer is a regular geometric shape.

2. The printed circuit board of claim 1, wherein, The regular geometric shape comprises at least one of a rhombus, an ellipse, and a hexagon. When the cross-sectional shape of the clearance region along the plane direction of the signal reference layer is a rhombus, a first diagonal line of the rhombus is parallel to the trace extension direction, and a second diagonal line of the rhombus is perpendicular to the trace extension direction.

3. The printed circuit board of claim 2, wherein, The length of the second diagonal line is less than the first width and greater than the second width. The length of the first diagonal line is greater than the length of the trace width mutation region and less than or equal to twice the length of the trace width mutation region. The signal reference layer is located directly above the signal trace layer.

4. The printed circuit board of claim 1, wherein, Or, the signal reference layer is located directly below the signal trace layer. The signal reference layer comprises a first signal reference layer and a second signal reference layer.

5. The printed circuit board of claim 1, wherein, The signal trace layer comprises a first signal trace layer, a second signal trace layer, and a third signal trace layer. The first signal reference layer is located between the first signal trace layer and the second signal trace layer. The second signal reference layer is located between the second signal trace layer and the third signal trace layer. The distance between the first signal reference layer and the second signal reference layer ranges from 4 mil to 10 mil. The dielectric constant of the medium material between the first signal reference layer and the second signal reference layer ranges from 4.0 to 4.

8. The first signal reference layer and the second signal reference layer are both planar layers composed of conductive materials. The first signal reference layer and / or the second signal reference layer comprise the clearance region. The trace width mutation region is provided on the signal trace layer; the trace width mutation region is a region where the trace width changes from a first width to a second width or a region where the trace width changes from the second width to the first width; the first width is greater than the second width.

6. A method of manufacturing a printed circuit board, characterized by, ​ ​ forming a clearance area on a signal reference layer adjacent to the signal trace layer; part of the clearance area is located at a projection of the trace width mutation area on the signal reference layer; the width of the clearance area is less than the first width and greater than the second width; the length of the clearance area along the trace extending direction is greater than the length of the trace width mutation area; the length of the clearance area along the trace extending direction is less than or equal to twice the length of the trace width mutation area.

7. An electronic device, comprising: A printed circuit board comprising a printed circuit board as claimed in any of claims 1 to 5.

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