Ultra-wideband radio frequency cancellation circuit and method

Abstract

The invention discloses an ultra-wideband radio frequency cancellation circuit, the circuit comprises an FPGA module, a transmitting module, a cancellation module and a receiving module, the FPGA module is used for completing radar signal generation and adaptive cancellation functions, the transmitting module comprises a high-speed DAC and a power amplifier, the cancellation module comprises a high-speed DAC and a subtracter, and the receiving module comprises a high-speed DAC and a power amplifier. The receiving module comprises a down-conversion circuit, a low-pass filter, a power amplifier and an intermediate-frequency ADC which are connected in sequence; one path of a radar signal generated by the FPGA module directly outputs an ultra-wideband radio frequency signal through a high-speed DAC chip of the transmitting module, and the other path of the radar signal is processed by an adaptive module in the FPGA module and then is used as a pre-estimated cancellation signal to be sent to the cancellation module, and the pre-estimated cancellation signal is subtracted from a receiving antenna echo with self-interference in the receiving module to obtain a high-quality radar echo. The invention further discloses a cancellation method of the ultra-wideband radio frequency cancellation circuit. The method is implemented based on the circuit. The invention has the advantages of simple structure, lower cost, simplicity and convenience in debugging, good cancellation effect and the like.

Description

Technical Field

[0001] The present invention mainly relates to the field of radar technology, and in particular to an ultra-wideband radio frequency cancellation circuit and method. Background Art

[0002] Radar receivers are inevitably affected by various interference signals, which are injected into the receiver through the coupling of transmitting antennas and space radiation. A radar transceiver needs to consider anti-interference capabilities from system architecture to circuit structure, from software design to hardware implementation. A typical type of interference signal in a wireless receiver comes from the system's own transmitter.

[0003] In recent years, wireless communication and sensor technology have developed rapidly. As the demands for various applications continue to increase, become more complex and diversified, RF self-interference in wireless transceivers is becoming more and more common. Specifically, wireless devices are showing a trend of miniaturization, hardware design dimensions are becoming more and more compact, and miniaturized devices tend to share antennas for both transmission and reception. These factors make it increasingly difficult to achieve high transmission and reception isolation.

[0004] In a typical digital receiver, if no targeted measures are taken, interference signals will affect the receiver performance in the following three aspects:

[0005] 1. The interference signal and the received signal are mixed. If not suppressed, the signal-to-noise ratio (SNR) will be directly deteriorated, thereby reducing the sensitivity of the receiver.

[0006] 2. Since the dynamic range of some circuit modules in the receiver is limited (for example, the dynamic range of the ADC is determined by its effective number of bits), when a strong interference signal is injected into these circuits, the detection of weak useful signals is limited.

[0007] 3. In order to reduce the additional noise of the receiver, the first-stage circuit of the receiving link needs to have a low noise figure and provide a certain RF gain. When operating in a large signal state under the stimulation of strong interference, such circuits often have poor linearity and show obvious noise performance degradation, which in turn deteriorates the receiving signal-to-noise ratio. In extreme cases, the receiving link will be pushed to saturation by strong interference, making the receiver unable to work properly.

[0008] However, it is worth noting that in some scenarios, interference suppression in the RF domain is indispensable. In situations where strong interference may exist, in order to avoid deterioration or even saturation of the circuit performance of the receiving link, the interference must be suppressed to a certain extent before it enters the receiving link.

[0009] The RF cancellation circuit in the prior art is mainly used to solve the problem of insufficient isolation between continuous wave radar transmission and reception. RF cancellation can be divided into analog and digital types. The basic principle is to use the superposition of vectors with equal amplitude and opposite phase to cancel each other out and suppress interference signals.

[0010] At present, some practitioners have proposed some RF cancellation solutions:

[0011] 1. Use passive components to build high-order RF tunable filters.

[0012] This structure is not only difficult to design, but also has fewer signal operation functions that can be implemented in the RF circuit. Since wireless transceiver systems with self-interference basically have restrictions on hardware size and system power consumption, the RF tunable filter structure is required to be as simple as possible, and complex control operation circuits and control algorithms are not used. It should be pointed out that although the circuit topology is relatively simple, it is very difficult to design an interference cancellation system in the microwave and millimeter wave frequency bands, and there are many parameters that need to be fine-tuned.

[0013] 2. Use the design structure of phase shifter + attenuator for RF cancellation.

[0014] Compared with the previous solution, this structure is simpler, but limited by the performance of the phase shifter chip, 360° phase modulation can only be achieved by connecting multiple phase shifters in series. Although the performance can be improved, using multiple phase shifters in series will increase the cost and accumulate errors between the phase shifters, making debugging more difficult.

[0015] In summary, both of the above two conventional technical methods have some technical defects:

[0016] (1) Both structures are analog circuit structures, and the large number of devices will bring problems such as spurious and interference;

[0017] (2) In the process of processing increased bandwidth, analog circuits are prone to insufficient flatness within the passband, and there are certain difficulties in building ultra-wideband RF circuits using analog devices.

[0018] (3) Analog circuits have group delay. Due to different frequency characteristics, different frequency components may have different delays, which will cause signal distortion, especially for broadband signals, the impact is greater.

[0019] The reasons for the above defects are that the characteristics of analog devices themselves make debugging difficult, especially when faced with complex circuits. Summary of the invention

[0020] The technical problem to be solved by the present invention is: in view of the technical problems existing in the prior art, the present invention provides an ultra-wideband radio frequency cancellation circuit with simple structure, low cost, easy debugging and good cancellation effect.

[0021] In order to solve the above technical problems, the present invention adopts the following technical solutions:

[0022] An ultra-wideband radio frequency cancellation circuit comprises an FPGA module, a transmitting module, a cancellation module and a receiving module, wherein the FPGA module is used to complete radar signal generation and adaptive cancellation functions, the transmitting module comprises a high-speed DAC and a power amplifier, the cancellation module comprises a high-speed DAC and a subtractor, and the receiving module comprises a down-conversion circuit, a low-pass filter, a power amplifier and an intermediate frequency ADC connected in sequence; the radar signal generated by the FPGA module directly outputs an ultra-wideband radio frequency signal through a high-speed DAC chip of the transmitting module on one path, and is sent to the cancellation module as an estimated cancellation signal after being processed by an adaptive module in the FPGA module on the other path, and is subtracted from a receiving antenna echo of a receiving module with self-interference to obtain a high-quality radar echo.

[0023] As a further improvement of the circuit of the present invention: the FPGA module generates a radar transmission signal with known and controllable amplitude, frequency and phase, one of which is sent to the transmission module and directly transmitted through the antenna, and the other is sent to the cancellation module for corresponding operation with the error signal e[n] to generate the cancellation signal s b [n].

[0024] As a further improvement of the circuit of the present invention: a part of the transmission signal will be directly coupled into the receiving antenna of the receiving module to form a self-interference signal, namely s d [n], the other part of the transmitted signal is reflected by the target to form a target echo and also enters the receiving antenna of the receiving module, that is, s c [n].

[0025] As a further improvement of the circuit of the present invention, the cancellation module is divided into two modes: a training mode and an operating mode. In the training mode, a preset broadband white noise is used to train the adaptive filter parameters. When the error signal e[n] decreases below a certain value, the training is considered to be completed. The adaptive filter coefficients at this time are locked and switched to the operating mode to cancel the signal whose frequency is within the broadband white noise spectrum.

[0026] The present invention further provides a cancellation method based on any one of the above ultra-wideband radio frequency cancellation circuits, wherein the original radar signal is transmitted; the original signal is directly given by the FPGA module, and a digital signal is converted by a high-speed DAC in the transmitting module to output a radio frequency signal without mixing. a(t); the other path is sent to the adaptive module to perform adaptive calculation with the error signal e[n] at this moment to generate the cancellation signal s b [n], converted to s by the high-speed DAC in the cancellation module b (t).

[0027] As a further improvement of the method of the present invention: the cancellation work is divided into two parts: training mode and working mode; in the training mode, broadband white noise is sent to obtain appropriate filter coefficients, and when the coefficients of the adaptive cancellation filter are determined, only near-end self-interference is cancelled and the echo signal is retained.

[0028] As a further improvement of the method of the present invention: including echo signal acquisition and delay alignment; assuming that the cancellation signal to be transmitted after FPGA processing is the reference signal, and the signal received by the ADC at the same time is the error signal, the most obvious correlation peak is obtained after cross-correlation operation is performed on the two sequences, and the time offset τ corresponding to the maximum correlation value is the delay between the two, and the reference signal and the error signal can be aligned according to the τ value.

[0029] As a further improvement of the method of the present invention: an adaptive cancellation module is adopted, which is composed of an improved algorithm DLMS based on LMS, and the influence of noise on the received signal is eliminated by calculating the minimum mean square error.

[0030] Compared with the prior art, the advantages of the present invention are:

[0031] 1. The ultra-wideband RF cancellation circuit and method of the present invention have a simple structure, low cost, easy debugging, and good cancellation effect. The structure uses FPGA + high-speed DAC to directly output the RF cancellation signal, avoiding the problems of group delay, spurious, interference, etc. caused by passive devices and mixing. In the actual application process of the present invention, the working bandwidth is large and the corresponding parameters can be directly obtained from the DAC chip manual, and the debugging difficulty is lower than that of a pure analog circuit. The structure of the present invention further uses a combination mode of adaptive algorithm + broadband white noise training to generate a cancellation signal, which is particularly suitable for canceling ultra-wideband radar signals.

[0032] 2. The ultra-wideband RF cancellation circuit and method of the present invention directly outputs ultra-wideband RF signals by using a high-speed DAC chip. One path is transmitted as a detection signal, and the other path is processed by an adaptive module as an estimated cancellation signal to be subtracted from the receiving antenna echo with self-interference to obtain a high-quality radar echo.

[0033] 3. The ultra-wideband RF cancellation circuit and method of the present invention replaces the analog circuit with a digital circuit, which reduces the spurious and interference problems caused by PLL and mixing, and reduces the system volume, with the advantages of light weight and low power consumption. The RF digital cancellation solution can also solve the problem of narrow analog cancellation bandwidth. At the same time, there is no group delay in the digital circuit, and its error can be obtained from the corresponding chip manual. The debugging difficulty is reduced compared with the analog circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 It is a structural principle diagram of the present invention in a specific embodiment.

[0035] Figure 2 It is a schematic diagram of the internal structure principle of the transmitting module in a specific embodiment of the present invention.

[0036] Figure 3 It is a schematic diagram of the internal structure principle of the cancellation module in a specific embodiment of the present invention.

[0037] Figure 4 It is a schematic diagram of the internal structure principle of the receiving module in a specific embodiment of the present invention.

[0038] Figure 5 It is a schematic diagram of the comparison before and after radio frequency cancellation in a specific embodiment of the present invention.

[0039] Figure 6 It is a schematic diagram of the time-frequency domain results of LMS simulation in a specific embodiment of the present invention. DETAILED DESCRIPTION

[0040] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0041] In order to facilitate the description of the technical solution of the present invention, some technical terms in the description of this application are first defined as follows:

[0042] RF: radio frequency;

[0043] IF; intermediate frequency;

[0044] ADC: analog to digital signal conversion chip;

[0045] DAC: digital to analog signal conversion chip;

[0046] FPGA: Field Programmable Gate Array, a type of microcontroller;

[0047] Dynamic Range: The range of signal strengths a system can handle, from the smallest detectable signal to the largest undistorted signal;

[0048] LMS: Least Mean Square Algorithm, is an adaptive algorithm that adjusts its filter coefficients by minimizing the mean square value of the error signal.

[0049] DLMS: An optimized LMS algorithm that introduces delay variables to facilitate the alignment of the delays of the transmitted and received signals.

[0050] like Figure 1-Figure 4 As shown, an ultra-wideband radio frequency cancellation circuit of the present invention includes an FPGA module, a transmitting module, a cancellation module, a receiving module and some necessary peripheral circuits, wherein the FPGA module is used to complete radar signal generation and adaptive cancellation functions, the transmitting module includes a high-speed DAC and a power amplifier, the cancellation module includes a high-speed DAC and a subtractor, and the receiving module includes a down-conversion circuit, a low-pass filter, a power amplifier and an intermediate frequency ADC connected in sequence. The radar signal generated by the FPGA module directly outputs an ultra-wideband radio frequency signal through the high-speed DAC chip of the transmitting module on one path, and is sent to the cancellation module as an estimated cancellation signal after being processed by the adaptive module in the FPGA module on the other path, and is subtracted from the receiving antenna echo of the receiving module with self-interference to obtain a high-quality radar echo.

[0051] That is to say, the FPGA module generates a radar transmission signal with known and controllable amplitude, frequency and phase. One path is sent to the transmission module and directly transmitted through the antenna, and the other path is sent to the cancellation module to perform corresponding operations with the error signal e[n] to generate the cancellation signal s. b [n]. Among them, part of the transmitted signal will directly couple into the receiving antenna of the receiving module to form a self-interference signal, namely s d [n], the other part of the transmitted signal is reflected by the target to form a target echo and also enters the receiving antenna of the receiving module, that is, s c [n].

[0052] The radar transmission signal is calculated in the adaptive module, which is responsible for generating a digital domain cancellation signal. The cancellation module is responsible for converting the digital domain cancellation signal into an analog signal and subtracting it from the echo signal.

[0053] Furthermore, in order to ensure that only near-end self-interference is cancelled and normal echo signals are retained, the present invention divides the cancellation module into two modes: training mode and working mode. That is, in the training mode, preset broadband white noise is used to train the adaptive filter parameters, and after the error signal e[n] converges, the parameters are locked and switched to the working mode to normally receive and transmit radar signals. Specifically:

[0054] First, enter the training mode, in which a set of preset broadband white noise signals are emitted. In this mode, the training is considered completed when the error signal e[n] drops below a certain value. The adaptive filter coefficients at this time are locked and switched to the working mode to cancel the signals whose frequencies are within the broadband white noise spectrum without adjusting the system.

[0055] In the scheme of the present invention, an FPGA module is used to cooperate with the high-speed DAC chip in the transmitting module. First, the proportion of digital circuits is increased, programmability and flexibility are increased, and the integration is improved to reduce the product size; second, when facing ultra-wideband signals, the digital RF circuit can provide higher flexibility and processing capabilities; third, software radio technology is used to use FPGA to build a negative feedback control circuit to achieve good adaptive cancellation performance; fourth, the cancellation circuit is moved to the radio frequency, so that the cancellation signal with reduced power enters the subsequent circuit, which improves the dynamic range of the radar system that transmits and receives at the same time; fifth, broadband white noise is used to pre-train the system. This method has the advantage of a wide range of adaptability. As long as the signal frequency is still in the white noise frequency, there is no need to retrain the adaptive filter coefficients, and only one training is required, achieving the purpose of simultaneous transmission and reception.

[0056] The present invention further provides a cancellation method based on the ultra-wideband radio frequency cancellation circuit, which comprises: transmitting the original radar signal; the original signal is directly given by the FPGA module, and a digital signal is converted by the high-speed DAC in the transmitting module to output the radio frequency signal s without mixing. a (t); the other path is sent to the adaptive module to perform adaptive calculation with the error signal e[n] at this moment to generate the cancellation signal s b [n], converted to s by the high-speed DAC in the cancellation module b (t).

[0057] In specific application examples, such as Figure 1 As shown, assuming that the signal at point A is:

[0058] s a (t) = A a (t)cos(ω a t+θ a ) (3)

[0059] Among them A a (t) represents the signal amplitude at point A, ω a is the angular frequency of the signal at point A, θ a is the phase of point A, t is the time parameter, and the amplitude, frequency, and phase are all controlled by the FPGA module. a (t) After being transmitted by the antenna, two parts of the signal are received at the receiving antenna: Figure 1The normal target echo signal at the midpoint C and the self-interference signal at point D are expressed as:

[0060] s c (t) = A c (t)cos(ω c t+θ c ) (4)

[0061] s d (t) = A d (t)cos(ω d t+θ d ) (5)

[0062] Among them, A c (t) represents the signal amplitude at point C, ω c is the angular frequency of the signal at point C, θ c is the phase at point C; A d (t) represents the signal amplitude at point D, ω d is the angular frequency of the signal at point D, θ d is the phase at point D.

[0063] Different from theoretical simulation, when the cancellation is actually realized, there is a transmission delay in the interference channel, an algorithm delay in the algorithm module, and the transmission delay is relatively larger. For real-time cancellation, both delays must be aligned, and slight delay differences will destroy the balance of the entire system after accumulation. The delay can be obtained through circuit debugging, instrument measurement, or cross-correlation operation of the received signal and the transmitted signal, and the accuracy is enhanced from front to back. To this end, as a preferred embodiment, the present invention further includes echo signal acquisition and delay alignment; assuming that the cancellation signal to be transmitted after FPGA processing is a reference signal, and the signal received by the ADC at the same time is an error signal, the most obvious correlation peak is obtained after the cross-correlation operation of the two sequences, and the time offset τ corresponding to the maximum correlation value is the delay between the two. The reference signal and the error signal can be aligned according to the τ value.

[0064] It is worth noting that the present invention adopts the structure of radio frequency cancellation and intermediate frequency sampling in order to increase the input dynamic range. The time delay of this part is determined by the circuit structure and can be obtained by the first two methods.

[0065] In the above scheme of the present invention, the adaptive module is essentially a filter with self-determined length and precision. Under multiple negative feedback iterations, this set of adaptive filter coefficients can be equivalently regarded as an actual self-interference channel. The F point signal can be expressed as:

[0066] s f (t) = s e (t)-s b (t) = e(t) (6)

[0067] e(t) is the cancellation residual signal. The cancellation residual e(t) generated after the cancellation module combiner enters the receiving module for down-conversion, amplification and filtering, and then is collected by the intermediate frequency ADC chip to become a digital domain signal e[n] and enter the adaptive module in the FPGA to form negative feedback control. After configuring the appropriate parameters for the adaptive module, the error signal e[n] will be reduced to an acceptable range after a period of time, and the cancellation training can be considered completed at this time.

[0068] In the above scheme of the present invention, the present invention adopts an adaptive cancellation module, which is based on the improved algorithm DLMS of LMS. The performance of the DLMS algorithm is the same as that of the LMS algorithm. The difference is that DLMS takes into account the delay of the algorithm implementation and is very suitable for FPGA. Otherwise, the two are the same, so the LMS algorithm is mainly introduced.

[0069] The LMS-based adaptive cancellation algorithm eliminates the influence of noise on the received signal by calculating the minimum mean square error. Assuming that the input signal is u K [n], length is K; adaptive filter coefficient is w K [n], the order is K-1, the filter output result is v[n], the received signal is d[n], and the cancellation residual is e[n]; K represents a specific number. The larger it is, the better the effect, but the resource consumption and processing time will be longer. The filter processes data by convolving the signal and the filter coefficient. It is the result of multiplying and summing K signal values ​​and K filter coefficients at the same time, so both are K. The order is defined as the number of filter coefficients - 1; n is the basic unit of time in the digital domain, which is equivalent to t in the analog domain. The specific meaning is the moment of the nth sampling, and there is no specific unit. e[n] represents the data obtained by ADC sampling at the nth moment; then the mean square error function of e[n] is as follows:

[0070] E(e[n] 2 )=E[(d[n]-v[n]) 2 ] (7)

[0071] in:

[0072] v[n]=u K [n] T w K [n] = w K [n] T u K [n] (8)

[0073] e[n]=d[n]-v[n]=d[n]-w K [n] T u K[n] (9)

[0074] Writing formula (7) in matrix form gives formula (10):

[0075] E[e[n] 2 ]=E[d[n] 2 ]-2P T W+W T RW (10)

[0076] Where P is the time u at n K [n] and d K The cross-correlation matrix of [n], R is u K The autocorrelation matrix of [n] is processed according to the gradient descent principle. Formula (10) can be used to obtain the adaptive process of the filter coefficient:

[0077]

[0078] The LMS algorithm needs to follow the small step size theory and minimize the impact of gradient noise by setting a sufficiently small step size. The LMS simulation results in the time-frequency domain are as follows: Figure 5 , Figure 6 As shown, the sampling clock is 1.2 GHz, the reference signal center frequency is 300 MHz, and the bandwidth is 200 MHz.

[0079] In the entire adaptive filtering process, the essential role of the adaptive cancellation module is to estimate the entire channel and find a set of filter coefficients that, when multiplied by a reference signal, equal the self-interference signal received by the receiving antenna.

[0080] During the simulation, it was found that when using a single-frequency signal, the obtained filter coefficients are only applicable to this single-frequency signal, not to ultra-wideband signals. At the same time, the adaptive filter coefficients obtained by estimating the channel using broadband Gaussian white noise are also applicable to single-frequency signals, and the larger the bandwidth of the Gaussian white noise used for training, the more the estimated filter coefficients conform to the channel characteristics of the system, and the better the result of adaptive system cancellation.

[0081] Theoretically, as long as the channel through which the self-interference signal at this time passes is the same channel as the channel through which the self-interference signal formed by the training mode Gaussian white noise passes, any self-interference signal can be canceled out.

[0082] Therefore, when the cancellation system is used, it will be divided into two steps: training mode and working mode; that is, in the training mode, the preset broadband white noise is used to train the adaptive filter parameters, and after the error signal e[n] converges, the parameters are locked and switched to the working mode to normally receive and send radar signals.

[0083] In summary, the ultra-wideband radio frequency cancellation circuit and method of the present invention can realize the radio frequency cancellation function of ultra-wideband signals; due to the adoption of a new structure, a high-speed DAC chip is used to replace the traditional PLL+mixing+filtering analog structure, and the estimated cancellation signal is provided by the FPGA adaptive interference module trained with broadband white noise. After the cancellation signal passes through the high-speed DAC, it is subtracted from the self-interference signal received by the antenna to obtain a high-quality echo signal. The present invention increases the proportion of digital circuits in the circuit structure, eliminates some of the spurious and interference problems existing in the transmission of analog radio frequency circuits, and the digital circuit can better adapt to signals of different frequencies and bandwidths, and is suitable for ultra-wideband signal applications. The present invention is highly flexible, and its digital circuit can adapt to different interference conditions by changing the software configuration and algorithm, without physically changing the circuit; in comparison, the analog cancellation circuit often has limited processing capabilities for broadband signals, and requires precise adjustment and calibration to adapt to different interference conditions. The present invention performs cancellation in the radio frequency domain, isolates the interference before the power amplifier, and can improve the dynamic range of the effective signal.

[0084] Furthermore, the present invention uses a pre-training method to ensure the performance and flexibility of the system in view of the characteristics of ultra-wideband signals. The specific method is: artificially generate a broadband white noise signal with the same frequency as the working frequency band, run the algorithm to cancel it to a certain value, lock the system parameters at this time and switch to the working mode to work normally. As long as the frequency of the transmitted signal falls within the white noise bandwidth, the cancellation function can be achieved without windowing processing, thereby improving the working efficiency of the radar system.

[0085] The above are only preferred embodiments of the present invention, and the protection scope of the present invention is not limited to the above embodiments. All technical solutions under the concept of the present invention belong to the protection scope of the present invention. It should be pointed out that for ordinary technicians in this technical field, some improvements and modifications without departing from the principle of the present invention should be regarded as the protection scope of the present invention.

Claims

1. An ultra-wideband radio frequency cancellation circuit, characterized in that: The invention comprises an FPGA module, a transmitting module, a cancellation module and a receiving module. The FPGA module is used to complete radar signal generation and adaptive cancellation functions. The transmitting module comprises a high-speed DAC and a power amplifier. The cancellation module comprises a high-speed DAC and a subtractor. The receiving module comprises a down-conversion circuit, a low-pass filter, a power amplifier and an intermediate frequency ADC which are connected in sequence. The radar signal generated by the FPGA module directly outputs an ultra-wideband radio frequency signal through a high-speed DAC chip of the transmitting module on one path, and is sent to the cancellation module as an estimated cancellation signal after being processed by an adaptive module in the FPGA module on the other path, and is subtracted from the receiving antenna echo of the receiving module with self-interference to obtain a high-quality radar echo.

2. The ultra-wideband radio frequency cancellation circuit according to claim 1, characterized in that: The FPGA module generates a radar transmission signal with known and controllable amplitude, frequency and phase. One path is sent to the transmission module and directly transmitted through the antenna. The other path is sent to the adaptive module for corresponding calculation with the error signal e[n] to generate the cancellation signal s. b [n].

3. The ultra-wideband radio frequency cancellation circuit according to any one of claims 1 to 2, characterized in that: The cancellation module is divided into two modes: training mode and working mode. In the training mode, preset broadband white noise is used to train the adaptive filter parameters. After the error signal e[n] converges, the parameters are locked and the system switches to the working mode to receive and transmit radar signals normally.

4. The ultra-wideband radio frequency cancellation circuit according to claim 3, characterized in that: First enter the training mode and transmit a set of preset broadband white noise signals. In this mode, when the error signal e[n] drops below a certain value, the training is considered completed. The adaptive filter coefficients at this time are locked and switched to the working mode to cancel the signal whose frequency is within the broadband white noise spectrum.

5. A cancellation method based on the ultra-wideband radio frequency cancellation circuit according to any one of claims 1 to 4, characterized in that: The original radar signal is transmitted; the original signal is directly given by the FPGA module, and the digital signal is converted by the high-speed DAC in the transmitting module to output the RF signal without mixing. a (t); the other path is sent to the adaptive module to perform adaptive calculation with the error signal e[n] at this moment to generate the cancellation signal s b [n], and then converted to s by the high-speed DAC in the cancellation module b (t).

6. The cancellation method according to claim 5, characterized in that: The cancellation work is divided into two parts: training mode and working mode. In the training mode, a broadband white noise signal is sent to determine the coefficients of the adaptive cancellation filter. After the coefficients are determined, only the near-end self-interference is cancelled and the echo signal is retained.

7. The cancellation method according to claim 5 or 6, characterized in that: It includes echo signal acquisition and delay alignment; assuming that the cancellation signal processed by FPGA is the reference signal, and the signal received by ADC at the same time is the error signal, the most obvious correlation peak is obtained after cross-correlation operation on these two sequences. The time offset τ corresponding to this maximum correlation value is the delay between the two. The reference signal and the error signal are aligned according to the τ value.

8. The cancellation method according to claim 5 or 6, characterized in that: Adopting adaptive cancellation module, based on the improved algorithm DLMS of LMS, it can eliminate the influence of noise on the received signal by calculating the minimum mean square error.

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