Nanolithography method based on focused ion beam-scanning electron microscope dual beam system

Abstract

The present application relates to a nanolithography method based on a focused ion beam-scanning electron microscope dual beam system, and relates to the field of etching process technology. The method comprises: providing a substrate; forming a glue layer on the substrate; forming a conductor layer on the glue layer; placing the substrate in a focused ion beam-scanning electron microscope dual beam system, determining a graphic window setting area by a scanning electron microscope, etching the conductor layer by a focused ion beam in the graphic window setting area to form a graphic window; performing an etching process with the conductor layer as a mask, etching the glue layer through the graphic window until the substrate is exposed to form a first etching opening. Thus, the accuracy of the graphic is improved.

Description

Technical Field

[0001] The present application relates to the technical field of etching process, and in particular to a nano-lithography method based on a focused ion beam-scanning electron microscope dual beam system. Background Art

[0002] The Focused Ion Beam-Scanning Electron Microscope (FIB-SEM) dual beam system refers to a vacuum system that has both the Focused Ion Beam (FIB) and Scanning Electron Microscope (SEM) functions. In the SEM system, the electrons emitted from the electron gun are accelerated by a strong electric field and focused into a beam spot with a diameter of nanometers (usually 1nm-3nm) through a series of electron lenses. The electrons are irradiated to the sample surface to generate secondary electrons and backscattered electrons. The secondary electrons or backscattered electrons are collected by the electron detector to form an image and obtain the morphology or composition information of the sample. In the FIB system, the ion beam is focused by an electrostatic lens and refocused into a beam spot with a diameter of nanometers (up to 7nm) through a variable aperture diaphragm to bombard the sample surface, using physical collision to achieve high-precision cutting or etching of materials and other micro-processing. Please refer to Figure 1 and Figure 2 The FIB-SEM dual-beam system specifically includes a SEM system, a FIB system, a gas injection system, and a laser workbench; the gas injection system is used to combine with an ion beam for auxiliary material deposition and ion beam etching. The FIB system and the SEM system are assembled at a certain angle. When working, the laser workbench where the sample is placed is adjusted to the concentric (or confocal) height position of the two systems. This allows the surface of the laser workbench to be perpendicular to the electron beam or ion beam by tilting the laser workbench, thereby achieving fine processing and microscopic analysis of the sample. Due to the large mass of ions, atoms on the surface of the solid can be sputtered. At present, the field generally uses a dual-beam system to directly write nanoscale graphics on the sample surface to form grooves or three-dimensional structures. However, the samples obtained by this method may have problems such as surface contamination and structural damage. Summary of the invention

[0003] In view of this, an embodiment of the present application provides a nanolithography method based on a focused ion beam-scanning electron microscope dual beam system to solve at least one problem existing in the background technology.

[0004] In a first aspect, an embodiment of the present application provides a nanolithography method based on a focused ion beam-scanning electron microscope dual beam system, the method comprising:

[0005] providing a substrate;

[0006] forming a glue layer on the substrate;

[0007] forming a conductor layer on the adhesive layer;

[0008] Placing the substrate in the focused ion beam-scanning electron microscope dual beam system, determining a pattern window setting area by scanning electron microscope, and etching the conductor layer in the pattern window setting area by focused ion beam to form a pattern window;

[0009] An etching process is performed using the conductor layer as a mask, and the glue layer is etched through the pattern window until the substrate is exposed to form a first etching opening.

[0010] In conjunction with the first aspect of the present application, in an optional implementation manner, the material of the glue layer includes photoresist;

[0011] After placing the substrate in the focused ion beam-scanning electron microscope dual beam system, the method further comprises: determining an exposure area by scanning electron microscope, and exposing the glue layer by penetrating the conductor layer in the exposure area using an electron beam;

[0012] After performing the etching process using the conductor layer as a mask and etching the glue layer through the graphic window until the substrate is exposed to form a first etching opening, the method further includes: removing the conductor layer; developing the glue layer to remove the exposed portion of the glue layer to form a second etching opening; wherein, in the thickness direction of the substrate, the projection of the first etching opening and the projection of the second etching opening are separated from each other.

[0013] In combination with the first aspect of the present application, in an optional implementation manner, the first etching openings and the second etching openings are arranged alternately.

[0014] In conjunction with the first aspect of the present application, in an optional implementation manner, placing the substrate in the focused ion beam-scanning electron microscope dual beam system, determining a graphic window setting area by a scanning electron microscope, etching the conductor layer by a focused ion beam in the graphic window setting area to form a graphic window; determining an exposure area by a scanning electron microscope, and exposing the glue layer by using an electron beam to penetrate the conductor layer in the exposure area, comprises:

[0015] placing the substrate in the focused ion beam-scanning electron microscope dual beam system;

[0016] First, an exposure area is determined by a scanning electron microscope, and an electron beam is used to penetrate the conductor layer in the exposure area to expose the glue layer; this step is repeated until the exposure of the glue layer in all the exposure areas is completed;

[0017] The graphic window setting area is then determined by a scanning electron microscope, and the conductor layer is etched in the graphic window setting area by a focused ion beam to form a graphic window; this step is repeated until the etching of the conductor layer in all the graphic window setting areas is completed.

[0018] In combination with the first aspect of the present application, in an optional implementation, the etching process includes an anisotropic etching process; wherein, in the thickness direction of the substrate, the projection of the graphic window completely overlaps with the projection of the first etching opening.

[0019] In combination with the first aspect of the present application, in an optional implementation, the anisotropic etching process includes a plasma etching process.

[0020] In combination with the first aspect of the present application, in an optional implementation, the material of the conductor layer includes metal.

[0021] In combination with the first aspect of the present application, in an optional implementation, the material of the conductor layer includes at least one of Al, Ni, Ti, Cr, and Cu.

[0022] In combination with the first aspect of the present application, in an optional implementation manner, the thickness of the conductor layer is in the range of 10 nm-50 nm.

[0023] In conjunction with the first aspect of the present application, in an optional implementation manner, the method further includes:

[0024] A local processing process is performed on the substrate using the glue layer after the first etching opening is formed as a mask; or, a dielectric layer is deposited, the dielectric layer includes a first part and a second part, the first part covers the top surface of the conductor layer, and the second part covers the top surface of the part of the substrate corresponding to the first etching opening; a stripping process is performed to remove the glue layer, the conductor layer and the first part, and retain the second part; a local processing process is performed on the substrate using the second part as a mask.

[0025] The nanolithography method based on the focused ion beam-scanning electron microscope dual beam system provided in the embodiment of the present application forms a double-layer structure through a glue layer and a conductor layer, and the focused ion beam performs pattern processing on the conductor layer, and uses the conductor layer as a mask to transfer the pattern to the glue layer, thereby avoiding the pollution and structural damage caused by directly using the focused ion beam to etch the substrate or the single-layer structure on the substrate. In addition, the conductor layer provides better conductivity, avoiding the charging effect after the electron beam is incident, affecting the accuracy of the image generated by the SEM system, and further affecting the accuracy of ion beam etching. The glue layer is less difficult to remove, and residues on the substrate can be avoided. Therefore, under the synergistic effect of the conductor layer and the glue layer, it is beneficial to improve the accuracy of the pattern finally formed on the substrate.

[0026] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0028] Figure 1 to Figure 2 It is a schematic diagram of the structure of a focused ion beam-scanning electron microscope dual beam system;

[0029] Figure 3 A schematic flow chart of a nanolithography method based on a focused ion beam-scanning electron microscope dual beam system provided in Example 1;

[0030] Figures 4 to 6 A schematic cross-sectional structure diagram of a nanolithography method during execution provided by an optional specific implementation method in Example 1;

[0031] Figures 7 and 8 A schematic cross-sectional structure diagram of a nanolithography method during execution provided as an optional specific example in Embodiment 1;

[0032] Fig. 9 A schematic cross-sectional structure diagram of a nanolithography method during execution provided by another optional specific implementation method in Example 1;

[0033] Fig.10 A schematic flow chart of a nanolithography method based on a focused ion beam-scanning electron microscope dual beam system provided in Example 2;

[0034] Figures 11 to 15 This is a schematic diagram of the cross-sectional structure of the nanolithography method provided in Example 2 during execution.

[0035] Description of reference numerals:

[0036] 100, substrate; 200, glue layer; 300, conductor layer; 310, graphic window; 21a, graphic window setting area; 22a, exposure area; 201, exposed part of the glue layer; 210, first etching opening; 220, second etching opening; 400, dielectric layer; 410, first part; 420, second part. DETAILED DESCRIPTION

[0037] The exemplary embodiments disclosed in the present application will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present application are shown in the accompanying drawings, it should be understood that the present application can be implemented in various forms and should not be limited by the specific embodiments described herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present application and to fully convey the scope disclosed in the present application to those skilled in the art.

[0038] In the following description, a large number of specific details are given to provide a more thorough understanding of the present application. However, it is obvious to those skilled in the art that the present application can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present application, some technical features known in the art are not described; that is, all features of the actual embodiments are not described here, and well-known functions and structures are not described in detail.

[0039] In the drawings, the sizes of layers, regions, elements and their relative sizes may be exaggerated for clarity. Like reference numerals denote like elements throughout.

[0040] When an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. Although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present application, the first element, component, region, layer or part discussed below may be represented as the second element, component, region, layer or part. And when the second element, component, region, layer or part is discussed, it does not indicate that the present application necessarily has the first element, component, region, layer or part.

[0041] Spatial relationship terms such as "under", "below", "below", "under", "above", "above", etc., may be used here for convenience of description to describe the relationship between an element or feature shown in the figure and other elements or features. In addition to the orientation shown in the figure, the spatial relationship terms are intended to also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is turned over, then the elements or features described as "under other elements" or "under it" or "under it" will be oriented as "on" other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device can be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0042] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present application. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0043] In order to thoroughly understand the present application, detailed steps and detailed structures will be presented in the following description to illustrate the technical solution of the present application. The preferred embodiments of the present application are described in detail below, but in addition to these detailed descriptions, the present application may also have other implementation methods. Example 1

[0044] Figure 3 A schematic flow chart of a nanolithography method based on a focused ion beam-scanning electron microscope dual beam system provided in an embodiment of the present application. As shown in the figure, the method includes:

[0045] Step S101: providing a substrate;

[0046] Step S102: forming a glue layer on the substrate;

[0047] Step S103: forming a conductor layer on the adhesive layer;

[0048] Step S104: placing the substrate in a focused ion beam-scanning electron microscope dual beam system, determining a pattern window setting area by scanning electron microscope, and etching the conductor layer in the pattern window setting area by focused ion beam to form a pattern window;

[0049] Step S105: performing an etching process using the conductive layer as a mask, etching the glue layer through the pattern window until the substrate is exposed, so as to form a first etching opening.

[0050] It should be noted that "photolithography" in a narrow sense refers to the process of exposing a thin film coated with photoresist through a mask with a pattern using light emitted by a photolithography machine. The photoresist will change its properties after being exposed to light, and then the photoresist is developed to transfer the pattern on the mask to the thin film. The "photolithography method" provided in the embodiment of the present application has a broader meaning. The "photolithography" here is understood in a broad sense, a process of pattern transfer.

[0051] It can be understood that the glue layer and the conductor layer form a double-layer structure, and the conductor layer is patterned by a focused ion beam, and the pattern transfer is achieved by performing an etching process on the glue layer using the conductor layer as a mask, thereby avoiding the pollution and structural damage caused by directly etching the substrate or the single-layer structure on the substrate with a focused ion beam. In addition, the conductor layer provides better conductivity, avoiding the charging effect after the electron beam is incident, affecting the accuracy of the image generated by the SEM system, and further affecting the accuracy of ion beam etching. The glue layer is less difficult to remove, and residues on the substrate can be avoided. Therefore, under the synergistic effect of the conductor layer and the glue layer, it is beneficial to improve the accuracy of the pattern finally formed on the substrate.

[0052] First, please refer to Figure 4 , step S101: providing a substrate 100.

[0053] The substrate 100 may be any suitable semiconductor substrate, such as a bulk silicon substrate, and may also be at least one of the following materials: SiGe, SiC, SiGeC, TnAs, GaAs, InP or other III-group and V-group compound semiconductors, including multilayer structures formed by these semiconductors, or silicon on insulator (SOI), silicon germanium on insulator (SiGeOI) and germanium on insulator (GeOI), or may also be double-side polished silicon wafers (DSP), or may also be ceramic substrates such as aluminum oxide, quartz or glass substrates, sapphire substrates, etc. This embodiment does not limit this.

[0054] Before executing step S102, the method may further include: forming an overlay mark on the substrate 100. Thus, in subsequent processes, the SEM can find the overlay mark formed on the substrate 100 to determine the FIB processing area and improve the processing accuracy.

[0055] Specifically, forming an etching mark on the substrate 100 may include: forming a photoresist layer on the substrate 100; exposing the photoresist layer through a patterned mask plate; developing the photoresist layer to remove the exposed portion of the photoresist layer to form a mark window; forming a metal layer on the top surface of the substrate corresponding to the mark window and the top surface of the photoresist layer; performing a stripping process to remove the portion of the metal layer located on the top surface of the photoresist layer, and the portion of the metal layer located on the top surface of the substrate corresponding to the mark window is formed as an overlay mark; or, forming a dielectric layer on the substrate 100; forming a photoresist layer on the dielectric layer; exposing the photoresist layer through a patterned mask plate; developing the photoresist layer to remove the unexposed portion of the photoresist layer; etching the dielectric layer using the remaining portion of the photoresist layer as a mask to form an overlay mark; and removing the remaining portion of the photoresist layer.

[0056] Next, continue to refer to Figure 4 , perform step S102: forming a glue layer 200 on the substrate 100. It can be understood that, in the art, a dielectric material layer is often formed on the substrate 100, but it is difficult to remove the dielectric material. In the subsequent etching process, it is very likely that residue will be generated on the substrate 100, making the pattern formed therein inaccurate, which will affect the processing accuracy of the substrate 100 in the subsequent process and the accuracy of the pattern finally formed on the substrate 100; while the removal of the colloid is less difficult, the process is more mature and the cost is lower, which can reduce the production cost while improving the process accuracy.

[0057] The material of the adhesive layer 200 may include photoresist, non-photosensitive adhesive or PI (Polyimide). The photoresist may include electron beam photoresist, such as PMMA (polymethyl methacrylate), P (MMA-MAA) copolymer, ZEP 520A, UVIII, UV6 and CSAR (AR-P6200); the non-photosensitive adhesive may include LOR series stripping adhesive or PMGI series stripping adhesive. In this embodiment, the material of the adhesive layer 200 may include photoresist, which has lower cost and better process compatibility.

[0058] Specifically, forming the adhesive layer 200 on the substrate 100 includes: placing the substrate 100 in a glue spreader; spin coating the colloid on the substrate 100 by the glue spreader; baking the substrate 100 on a hot plate or in an oven at a certain temperature for a certain time to obtain the adhesive layer 200. In this way, a stable thin film adhesive layer can be obtained. For example, PMMA, P (MMA-MAA) copolymer and ZEP 520A need to be baked on a hot plate at 160°C to 190°C for about 5 minutes, or baked in an oven for about 30 minutes.

[0059] The thickness of the adhesive layer 200 may range from 100 nm to 1000 nm. In actual preparation, a suitable thickness may be selected according to the resolution of the pattern and the compatibility of the process. It is not difficult to understand that the smaller the thickness of the adhesive layer 200, the higher the resolution of the pattern that can be prepared. This embodiment does not limit this.

[0060] Please continue to refer to Figure 4 , perform step S103: forming a conductor layer 300 on the glue layer 200. In the FIB-SEM dual beam system, when the electron beam emitted in the SEM system reaches the surface of the sample, secondary electrons and backscattered electrons are generated. The electron detector collects the secondary electrons or backscattered electrons for imaging, and obtains the morphology or composition information of the sample. Please refer to Figure 1 Before FIB etching, the laser table is set to be perpendicular to the electron beam direction. The SEM system can obtain the sample morphology through the electron beam, find the overlay mark, and determine the working area of ​​the focused ion beam; please refer to Figure 2 When performing FIB etching, the laser workbench is set to be perpendicular to the direction of the ion beam. Since the laser workbench is at the concentric point of the electron beam and the ion beam, the SEM system can obtain the three-dimensional morphology of the sample and the structure inside the cross section through the electron beam, and realize real-time monitoring of FIB etching. Therefore, it is not difficult to understand that if the conductivity of the material layer on the top layer of the sample is poor at this time, the incident electrons accumulate in the material layer, forming an electrostatic field, distorting the secondary electrons and backscattered electrons, and generating charged-like electronic signals, but these signals do not contain morphological information, thereby causing the image finally generated by the SEM system to be distorted. Therefore, the present application prepares a conductor layer 300 on the glue layer 200. Compared with semiconductors and insulators, the conductivity of conductors is undoubtedly better. Using the conductor layer 300 as the top structure can greatly reduce the charging effect, improve the accuracy of the image obtained by the SEM system, and then help improve the FIB processing accuracy.

[0061] Optionally, the material of the conductor layer 300 includes metal or metal nitride. Further, the material of the conductor layer 300 can be metal. Compared with metal nitride, metal has better conductivity, lower cost and simpler process.

[0062] The material of the conductor layer 300 may include at least one of Al, Au, Ni, Ti, Cr and Cu. Specifically, the conductor layer 300 may be a double-layer structure or alloy structure of the above two metals, such as Ni / Au film, Ti / Au film, Ni-Cr alloy and Au-Pd alloy.

[0063] The material of the conductor layer 300 may include TiN.

[0064] The process of forming the conductor layer 300 on the glue layer 200 may include an ion beam sputtering deposition process, a thermal evaporation process, an electron beam evaporation process, a magnetron sputtering process, or a pulsed laser deposition process.

[0065] The thickness of the conductor layer 300 may range from 20 nm to 100 nm. In actual preparation, a suitable thickness may be selected according to the resolution of the pattern etched by FIB and the compatibility of the process. It is not difficult to understand that the smaller the thickness of the conductor layer 300, the higher the resolution of the pattern that can be prepared. This embodiment does not limit this.

[0066] Please refer to Figure 5 , execute step S104: place the substrate 100 in a focused ion beam-scanning electron microscope dual beam system, determine the graphic window setting area 21a by scanning electron microscope, and etch the conductor layer 300 in the graphic window setting area 21a by focused ion beam to form a graphic window 310.

[0067] It can be understood that after providing the substrate 100, an overlay mark is formed on the substrate 100, and the SEM system can find the position of the overlay mark, and then determine the graphic window setting area 21a on the surface of the conductor layer 300 to achieve precise positioning.

[0068] The FIB system is equipped with a pattern generator, which can complete functions such as pattern cutting, generating pattern coordinates, signal processing, and digital-to-analog conversion, and can coordinate ion beam shutoff, deflection scanning, and pattern splicing of the sample laser workbench to complete pattern etching. Therefore, the pattern to be etched is input into the pattern generator in advance, and the various etching parameters of the FIB system are set, so that the corresponding pattern window 310 can be formed on the conductor layer 300.

[0069] The ions in the focused ion beam may include Ga ions, He / Ne ions or Xe ions. Different ion sources have different etching rates and pattern resolutions. In the actual preparation process, appropriate ions can be selected according to actual needs, and this embodiment does not limit this.

[0070] Please refer to Figure 2The focused ion beam-scanning electron microscope dual beam system also includes a gas injection system. The gas injection system (GIS) can be combined with the ion beam to assist in material deposition and ion beam etching. For example, it can assist in the deposition of materials such as Pt, W, and C; it can inject H2O to enhance the ion beam etching rate of PMMA (PolymethylMethacrylate) by 10 to 20 times, but it will significantly reduce the ion beam etching rate of Al; it can inject XeF2 to enhance the ion beam etching rate of Si, SiO2, and W by 5 to 100 times, which can improve the flatness of the cut surface.

[0071] In some other embodiments, before executing step S104, the method may further include: providing a test substrate; forming a test conductor layer on the test substrate; placing the test substrate in a focused ion beam-scanning electron microscope dual beam system, etching the test conductor layer by a focused ion beam to form a test pattern window; detecting the test pattern window and adjusting the dual beam system parameters. Thus, before the actual process is performed, FIB etching is performed on the conductor layer for testing in advance, and the etching parameters of the FIB system are calibrated and optimized to improve the processing accuracy in order to obtain the pattern of the window formed after etching. The etching parameters may include extraction voltage, ion beam current, beam spot diameter, working distance, etching dwell time, and ion beam scanning speed.

[0072] In some other embodiments, before executing step S104, the method may further include: placing the substrate 100 in a focused ion beam-scanning electron microscope dual beam system, determining the test area by scanning electron microscope, and etching the conductor layer 300 by focused ion beam in the test area to form a test pattern window. Thus, before the actual process is performed, FIB etching is performed in the test area of ​​the sample in advance, and the etching parameters of the FIB system are calibrated and optimized according to the pattern of the window formed after etching to improve the processing accuracy, and the test is directly performed on the sample that needs to be etched by FIB, which is more conducive to ensuring the accuracy of the test results. The test area can be some edge areas or unimportant areas, such as cutting road areas.

[0073] Optionally, the etching of the conductor layer 300 by a focused ion beam to form the pattern window 310 includes: over-etching the conductor layer 300 by a focused ion beam to form the pattern window 310, wherein the pattern window 310 penetrates the conductor layer 300 and extends into the glue layer 200. Thus, by over-etching the conductor layer 300, it is ensured that the conductor layer 300 is etched through by the focused ion beam, and it is avoided that the conductor layer 300 remains on the portion of the glue layer 200 corresponding to the pattern window setting area 21a, which affects the subsequent etching; and the portion of the glue layer 200 corresponding to the pattern window setting area 21a is not completely etched away, so that when the focused ion beam etches to the substrate 100, contamination and damage to the substrate 100 is avoided, and the influence on the pattern size accuracy is reduced.

[0074] Please refer to Figure 6 , perform step S105: perform an etching process using the conductor layer 300 as a mask, and etch the glue layer 200 through the pattern window 310 until the substrate 100 is exposed to form a first etching opening 210. It can be understood that when the substrate 100 is directly etched by a focused ion beam, it may cause pollution and structural damage to the substrate 100. When only a single-layer structure is set on the substrate 100, the focused ion beam will still directly reach the surface of the substrate 100 when the single-layer structure is etched by the focused ion beam, and the substrate 100 will still be damaged. Therefore, in the nano-etching method provided in this embodiment, the glue layer 200 and the conductor layer 300 constitute a double-layer thin film structure, the focused ion beam performs pattern processing on the top structure conductor layer 300, and then the top structure conductor layer 300 is used as a mask to transfer the pattern to the intermediate structure glue layer 200. The focused ion beam is isolated from the substrate 100, which can avoid pollution and structural damage to the substrate 100, and is conducive to protecting the substrate 100 while achieving accurate pattern transfer.

[0075] In an optional specific implementation, please refer to Figure 6 , the etching process includes an anisotropic etching process; wherein, in the thickness direction of the substrate, the projection of the graphic window 310 completely overlaps with the projection of the first etching opening 210. This can achieve accurate transfer of the graphics of the image window and improve etching accuracy. Further, the etching process can include plasma etching. It can be understood that the ion beam is focused by an electrostatic lens, and is secondary focused into a beam spot with a nanometer diameter through a variable aperture diaphragm, which can etch a nanometer-level graphic. The FIB etching process can be understood as a nanometer-level etching process. When anisotropic etching is performed using the conductor layer 300 with a nanometer-level graphic as a mask, the resolution of plasma etching is higher, and accurate transfer of the nanometer-level graphic can be achieved, improving processing accuracy. In addition, the plasma etching process has a higher process maturity and better compatibility, which is conducive to reducing process difficulty.

[0076] In actual preparation, plasma etching is achieved by a plasma etcher. Plasma etcher can include plasma strippers, reactive ion etcher, inductively coupled plasma etcher and electron cyclotron resonance plasma etcher. Among them, plasma strippers and reactive ion etcher generate reactive gas plasma based on the electric field of capacitors; inductively coupled plasma etcher uses the electric field induced by the magnetic field change of the inductor coil to generate high-density plasma; electron cyclotron resonance plasma etcher uses the cyclotron resonance (increased collision probability) of electrons under the action of microwave electric field and vertical magnetic field to generate high-density plasma. The aforementioned plasma etcher mainly uses radio frequency (13.56 MHz) signals to generate plasma, while some more advanced equipment uses two frequencies to control plasma density and ion energy respectively to achieve better anisotropic etching. Plasma is composed of electrons, neutral atoms, molecules, ions and free radicals, among which the chemical reaction of free radicals with the etched material is the basic etching process, and the bombardment of ions with a certain energy can promote this reaction and have anisotropic etching effect.

[0077] When the material of the glue layer 200 is photoresist, the plasma may be O2 plasma or Ar / O2 plasma; when the material of the glue layer 200 is polyimide, the plasma may be O2 and CHF3 mixed plasma. In actual preparation, a suitable plasma etching gas may be selected according to the material of the glue layer 200, which is not limited in this embodiment.

[0078] In another optional specific embodiment, the etching process includes a wet etching process. Thus, the damage to the substrate 100 during the etching of the glue layer 200 can be reduced; and the wet etching process is an isotropic etching process, please refer to Fig. 9 The first etching opening 210 has an undercut structure, and in the substrate thickness direction, the projection of the first etching opening 210 is larger than the projection of the pattern window 310. Thus, a first etching opening 210 with a larger size can be prepared through a pattern window 310 with a smaller size. In the actual preparation process, the size of the first etching opening 210 can be adjusted by controlling the conditions of the wet etching process.

[0079] In this embodiment, when the material of the adhesive layer 200 is a LOR series stripping adhesive or a PMGI series stripping adhesive, the wet etching etchant may be a diluted tetramethylammonium hydroxide (TMAH) solution, MF CD26 (2.38% TMAH) developer or MF319 (2.45% TMAH) developer. In addition, it can be understood that in order to ensure that the conductor layer 300 does not deform when etching the adhesive layer 200 and to ensure the accuracy of the pattern, the wet etching etchant cannot etch the conductor layer 300. Therefore, in actual preparation, a suitable etchant may be selected according to the material of the adhesive layer 200 and the material of the conductor layer 300, and this embodiment does not limit this.

[0080] As an optional specific example, after executing step S105, please refer to Figures 7 and 8 The method may further include: depositing a dielectric layer 400, the dielectric layer 400 including a first portion 410 and a second portion 420, the first portion 410 covering the top surface of the conductor layer 300, and the second portion 420 covering the top surface of the portion of the substrate 100 corresponding to the first etching opening 210; performing a stripping process to remove the glue layer 200, the conductor layer 300 and the first portion 410, and retaining the second portion 420; and performing a local processing process on the substrate 100 using the second portion 420 as a mask.

[0081] It can be understood that "positive lithography" is achieved through the previous process, and "negative lithography" can be achieved by depositing the dielectric layer 400. The so-called "positive lithography" refers to the area where the anti-etching layer is irradiated by light or other high-energy particles and then developed and removed; the so-called "negative lithography" refers to the area where the anti-etching layer is irradiated by light or other high-energy particles and then developed and retained. However, the "positive" and "negative" referred to here have a broader meaning. "Positive" means that in the process of graphic transfer, the area that is processed (such as exposure, etching, etc.) is removed or changed in the subsequent steps, thereby leaving the pattern of the unprocessed area; while "negative" means that in the process of graphic transfer, the unprocessed area is removed or changed in the subsequent steps, while the processed area is retained in the subsequent steps.

[0082] In this embodiment, since FIB can only perform etching processing, it is equivalent to removing the area treated by the ion beam. When etching the conductor layer 300, the area treated by the etching is removed. It can be seen that in the previous step, the film (i.e., the double-layer film structure composed of the glue layer 200 and the conductor layer 300) acting as the "anti-etching layer" is removed from the treated area while the other parts are retained, realizing "positive photolithography" and obtaining a positive photolithography mask pattern. Then, in this specific example, by depositing the dielectric layer 400 and performing the stripping process, the pattern inversion can be achieved. At this time, the mask becomes the retained deposited dielectric layer, i.e., the second part 420. At this time, the pattern of the dielectric layer is exactly complementary to the aforementioned positive photolithography mask pattern, "inverting" the positive photolithography film pattern.

[0083] Optionally, the material of the dielectric layer 400 includes SiO2 or SiN x .SiO2 or SiN x The hardness is good, which can prevent deformation from affecting the pattern accuracy when the substrate 100 is locally processed using the second portion 420 as a mask.

[0084] Optionally, the thickness of the dielectric layer 400 is less than 2 / 3 of the thickness of the adhesive layer 200. Since the first portion 410 located on the top surface of the conductor layer 300 needs to be removed, if the first portion 410 is connected to the second portion 420, the second portion 420 may also be removed together when performing the stripping process, affecting the accuracy of the mask pattern. Therefore, when forming the dielectric layer 400, the thickness of the dielectric layer 400 is controlled to be less than 2 / 3 of the thickness of the adhesive layer 200, which can ensure that the first portion 410 and the second portion 420 are independent of each other. Further, the thickness of the dielectric layer 400 is less than 1 / 2 of the thickness of the adhesive layer 200, thereby more conducive to ensuring that the first portion 410 and the second portion 420 are independent of each other.

[0085] Optionally, the process of depositing the dielectric layer 400 includes an electron beam evaporation process. It is understandable that when performing the stripping process, the first part 410 of the dielectric layer 400 is removed and the second part 420 is retained. If the first part 410 and the second part 420 are connected, the second part 420 may be removed together. Therefore, when depositing the dielectric layer 400, the dielectric layer 400 finally prepared should be non-conformal. The so-called conformality means that the film can be well and completely covered on the surface with steps or three-dimensional structures during deposition to form a continuous and uniform film, but in the embodiment of the present application, the first part 410 and the second part 420 need to be independent of each other, and the dielectric layer 400 does not have conformality. Electron beam evaporation is to melt the deposition material by heating it with a high-energy electron beam, and the liquid material will evaporate into a gaseous state. In the ultra-high vacuum chamber, the molecular mean free path is very large, so the evaporated atomic movement has a high directional directionality and is deposited on the substrate 100. Thus, the dielectric layer 400 without conformal properties is prepared by utilizing the directional directionality of electron beam evaporation.

[0086] Furthermore, when the dielectric layer 400 is deposited, the temperature of the substrate 100 is less than or equal to 150° C. Thus, the adhesive layer 200 is prevented from being deformed at a high temperature, which may affect the pattern accuracy.

[0087] Specifically, a stripping process is performed to remove the adhesive layer 200, the conductor layer 300 and the first part 410, and retain the second part 420, including: placing the substrate 100 in an etching solution, the etching solution corrodes the adhesive layer 200, and removing the conductor layer 300 and the first part 410 while removing the adhesive layer 200, and retaining the second part 420. In this embodiment, when the material of the adhesive layer 200 is PMMA, P (MMA-MAA) copolymer, ZEP 520A, UVIII or UV6, acetone or N-methylpyrrolidone (NMP) or Microposit Remover 1165 can be used as an etching solution to remove the adhesive layer 200 in a water bath at 80°C; when the material of the adhesive layer 200 is a LOR series stripping adhesive or a PMGI series stripping adhesive, an MFCD26 developer containing 2.38% TMAH (tetramethylammonium hydroxide) or an MF319 developer containing 2.45% TMAH can be used to remove the adhesive layer 200 at room temperature, or NMP can be used to remove the adhesive layer 200 in a water bath at 80°C; when the material of the adhesive layer 200 is polyimide, NMP can be used to remove the adhesive layer 200 at a temperature of 200°C-300°C. It is understandable that while the corrosive liquid corrodes the adhesive layer 200, it is also necessary to ensure that the corrosive liquid has no corrosive effect on the dielectric layer 400 to avoid affecting the morphology of the second part 420. Therefore, in actual preparation, suitable corrosive liquid and process conditions can be selected according to the materials of the adhesive layer 200 and the dielectric layer 400, and this embodiment does not limit this.

[0088] The stripping process may further include: performing an ultrasonic operation while the etching solution is etching the adhesive layer 200, thereby achieving a better stripping effect and removing the adhesive layer 200 more thoroughly.

[0089] As another optional specific example, after executing step S105, the method may further include: performing a local processing process on the substrate 100 using the glue layer 200 after forming the first etching opening 210 as a mask. Thus, after positive photolithography is implemented, the patterned glue layer 200 may be used as a mask to perform subsequent processes. In some embodiments, before performing the local processing process, the conductor layer 300 may be removed so that the patterned glue layer 200 may be used as a mask. In some other embodiments, the double-layer thin film structure composed of the glue layer 200 and the conductor layer 300 may be directly used as a mask to perform subsequent processes without the need to perform an additional process of removing the conductor layer 300.

[0090] Local processing processes may include etching, thin film deposition or ion implantation. Etching processes include ion beam etching, plasma etching (capacitive coupled plasma etching and inductively coupled plasma etching) or wet etching; thin film deposition processes include physical vapor deposition (thermal evaporation, electron beam evaporation, ion beam sputtering deposition, magnetron sputtering and pulsed laser deposition) or chemical vapor deposition (plasma enhanced chemical vapor deposition, inductively coupled plasma chemical vapor deposition and atomic layer deposition); ion implantation processes mainly refer to processes for doping or modifying materials. Example 2

[0091] Based on the nanolithography method based on the focused ion beam-scanning electron microscope dual beam system provided in Example 1, this embodiment further provides a nanolithography method based on the focused ion beam-scanning electron microscope dual beam system. In this embodiment, the focused ion beam-scanning electron microscope dual beam system also has the function of electron beam lithography. Specifically, the SEM system can be equipped with an electron beam lithography mode by adding a high-speed beam gate, a high-precision electron deflector, a pattern generator, and an extremely high-precision laser interference workpiece system to the SEM system to achieve direct writing exposure of nanometer-level graphics. Among them, the high-speed beam gate is used to quickly open and close the electron beam so that the electron beam can only reach the exposure surface when exposure is required; the high-precision electron deflector is used to control the scanning path of the electron beam to ensure that the electron beam accurately scans the sample surface according to a predetermined pattern to achieve direct writing exposure of the graphics; the pattern generator is used to generate coordinate values ​​for the input design layout, which are converted into corresponding analog quantities through digital-to-analog conversion, and drive the deflection amplifier to achieve deflection and interruption of the electron beam and write field splicing of large-area graphics; the extremely high-precision laser interference workpiece system is used to monitor and correct the position of the laser workbench in real time to ensure accurate alignment during the exposure process.

[0092] Please refer to Fig.10 , the method comprising:

[0093] Step S201: providing a substrate;

[0094] Step S202: forming a glue layer on the substrate, wherein the material of the glue layer includes photoresist;

[0095] Step S203: forming a conductor layer on the adhesive layer;

[0096] Step S204: placing the substrate in a focused ion beam-scanning electron microscope dual beam system, determining a pattern window setting area by scanning electron microscope, etching the conductor layer by focused ion beam in the pattern window setting area to form a pattern window; determining an exposure area by scanning electron microscope, and exposing the glue layer by using electron beam to penetrate the conductor layer in the exposure area;

[0097] Step S205: performing an etching process using the conductor layer as a mask, etching the glue layer through the pattern window until the substrate is exposed, so as to form a first etching opening;

[0098] Step S206: removing the conductor layer;

[0099] Step S207: developing the glue layer to remove the exposed portion of the glue layer to form a second etching opening; wherein, in the thickness direction of the substrate, the projection of the first etching opening and the projection of the second etching opening are separated from each other.

[0100] It can be understood that the present embodiment combines the electron beam lithography process with the ion beam etching process, which can reduce the amount of electron accumulation in the non-exposed area of ​​the glue layer during electron beam lithography, avoid mistakenly removing the glue layer in the non-exposed area during development, and improve the accuracy of the graphics; the electron beam lithography process can realize nanoscale pattern direct writing exposure, and the ion beam etching process can realize nanoscale direct writing etching. Using these two processes, the preparation of nanoscale graphics can be completed; and the two processes can be completed in the FIB-SEM dual beam system, thereby improving production efficiency. It can be understood that the glue layer, the conductor layer, and the focused ion beam etching method in the nanolithography method provided in this embodiment are the same as those in Example 1, so this embodiment also has the beneficial effects of the nanolithography method provided in Example 1. The specific content can be referred to Example 1, and no further details are given here.

[0101] Steps S201 to S203 of the nanolithography method provided in this embodiment can be referred to Figure 4 , and the specific analysis contents of steps S101 to S103 in Example 1.

[0102] First, please refer to Figure 4 , perform step S201: provide a substrate 100.

[0103] Before executing step S202, the method may further include: forming an overlay mark on the substrate 100. Thus, in the subsequent process, the SEM can find the overlay mark formed on the substrate 100, thereby determining the electron beam and ion beam processing area, and improving the processing accuracy. The method of forming the overlay mark on the substrate 100 can refer to the specific analysis in Example 1, and will not be repeated here.

[0104] Execute step S202: Form a glue layer 200 on the substrate 100, and the material of the glue layer 200 includes photoresist. It can be understood that the glue layer 200 needs to be exposed in the subsequent process, and the material of the glue layer 200 needs to be photoresist, specifically, the material of the glue layer 200 is electron beam photoresist. Electron beam photoresist is a high molecular polymer, and electron beam irradiation can cause it to undergo chemical changes (chemical bond breaking or cross-linking), and the electron beam photoresist in the irradiated area (positive photoresist) or the unirradiated area (negative photoresist) can be dissolved in a specific solvent. In this embodiment, the exposed area of ​​the glue layer needs to be removed in the subsequent process, so the material of the glue layer 200 is specifically positive photoresist for electron beam lithography.

[0105] Execute step S203 : forming a conductor layer 300 on the adhesive layer 200 .

[0106] Optionally, the material of the conductor layer 300 includes metal. Metal has good conductivity, which can more effectively reduce the charging effect, improve the accuracy of the image acquired by the SEM system, and is conducive to reducing the difficulty of electron beam penetration, ensuring the exposure effect of the electron beam on the glue layer 200, and then is conducive to improving the accuracy of the pattern finally formed on the substrate 100; and the high hardness of metal is more conducive to avoiding deformation in the subsequent etching process.

[0107] Furthermore, the material of the conductor layer 300 may include at least one of Al, Ni, Ti, Cr, and Cu. It is understandable that the larger the atomic number of the metal of the conductor layer 300, the more serious the scattering of the incident electrons, and the smaller the number and energy of the electrons that can reach the glue layer 200, which will seriously affect the exposure accuracy of the glue layer 200. Among them, the atomic number of Al is 13, the atomic number of Ni is 28, the atomic number of Ti is 22, the atomic number of Cr is 24, and the atomic number of Cu is 29. The atomic numbers of these metal materials are relatively small, which can effectively reduce the difficulty of electron beam penetration and is conducive to the preparation of graphics with higher resolution requirements. Of course, the conductor layer 300 can also be a double-layer structure or alloy structure composed of any two metals among the above metal materials.

[0108] Optionally, the thickness of the conductor layer 300 is in the range of 10nm-50nm. It is understandable that the greater the thickness of the conductor layer 300, the more serious the scattering of the incident electrons, and the fewer the number and energy of the electrons that can reach the glue layer 200, which will seriously affect the exposure accuracy of the glue layer 200. Therefore, controlling the thickness of the conductor layer 300 within this range can ensure the exposure effect of the electron beam and is conducive to preparing patterns with higher resolution requirements.

[0109] Next, please refer to Figure 11 to Figure 12 , perform step S204: place the substrate 100 in a focused ion beam-scanning electron microscope dual beam system, determine the pattern window setting area 21a by scanning electron microscope, and etch the conductor layer 300 in the pattern window setting area 21a by focused ion beam to form a pattern window 310; determine the exposure area 22a by scanning electron microscope, and use electron beam to penetrate the conductor layer 300 in the exposure area 22a to expose the glue layer 200. Therefore, by combining the electron beam lithography process with the ion beam etching process, the accumulation of electrons in the glue layer 200 in the non-exposure area can be reduced, and the glue layer 200 in the non-exposure area can be avoided from being mistakenly removed during development, thereby improving the accuracy of the pattern; the electron beam lithography process can realize nano-scale pattern direct writing exposure, and the ion beam etching process can realize nano-scale direct writing etching. By using these two processes, the preparation of nano-scale patterns can be completed; and the two processes can be completed in the FIB-SEM dual beam system, thereby improving production efficiency. It can be understood that in this embodiment, the glue layer 200 is exposed by using an electron beam, so the exposure area can also be called an electron beam exposure area.

[0110] It can be understood that when the material of the substrate 100 is some fragile two-dimensional electronic material, the electron beam will irradiate the substrate 100 when exposing the glue layer 200, which may cause the properties of the material to change. Therefore, a hybrid nanolithography method that combines electron beam lithography and focused ion beam etching can reduce the probability of material degeneration of the substrate 100.

[0111] When the glue layer 200 is exposed, the incident electrons are forward scattered in the glue layer 200 and back scattered on the surface of the substrate 100. The scattered electrons overlap in the glue layer 200 between adjacent exposure areas (non-exposure areas). When the total dose of the superposition reaches the exposure threshold, the glue layer 200 corresponding to the non-exposure area is equivalent to being exposed, and will be removed together in the subsequent development process, affecting the accuracy of the pattern. It can be seen that if only the electron beam lithography process is used to prepare the etched opening in the glue layer 200, the "neighbor effect" mentioned above will occur. Therefore, combining the electron beam lithography process with the focused ion beam etching process, so that part of the etched opening is prepared by the electron beam lithography process and the other part of the etched opening is prepared by the focused ion beam etching process, can effectively reduce the "neighbor effect".

[0112] Since an overlay mark is formed on the substrate 100 after providing the substrate 100, the SEM can find the position of the overlay mark, and then determine the exposure area 22a and the pattern window setting area 21a on the surface of the conductor layer 300 to achieve precise positioning. It can be understood that in this embodiment, two etching processes are performed on the same layer of glue 200, and the overlay mark can effectively ensure that the pattern prepared by focused ion beam etching and the pattern prepared by electron beam lithography have a high overlay accuracy.

[0113] Please refer to Figure 1 , first set the laser workbench to be perpendicular to the direction of the electron beam. The SEM system can obtain the sample morphology through the electron beam and determine the exposure area 22a; then the SEM system switches to the electron beam lithography mode, inputs the graphic file into the graphic generator installed in the SEM system, sets the various parameters of the electron beam lithography process, and then the graphic exposure can be realized in the glue layer 200. The main parameters of the electron beam lithography process include acceleration voltage, electron beam current, exposure dose and write field size. Taking into account the scattering effect of the conductor layer 300, in order to achieve complete exposure of the glue layer 200, the acceleration voltage is generally as large as possible, which can not only ensure that there are enough electrons to penetrate the metal layer, but also achieve high-resolution exposure. Specifically, the acceleration voltage ranges from 30kV to 100kV. The exposure dose ranges from 100 uC / cm 2 ~1000 uC / cm 2 In actual preparation, the appropriate exposure dose can be set according to the photoresist type, acceleration voltage, and development conditions.

[0114] Please refer to Figure 1 , first set the laser workbench to be perpendicular to the electron beam direction, the SEM system can obtain the sample morphology through the electron beam, and determine the graphic window setting area 21a; in the reference Figure 2 Since the laser workbench is at the concentric point of the electron beam and the ion beam, the laser workbench is rotated at a certain angle (generally 52°) so that the laser workbench is perpendicular to the ion beam direction, and the graphic file is input into the graphic generator of the FIB system. After the various etching parameters of the FIB system are set, the corresponding graphic window 310 can be formed on the conductor layer 300. The ions in the focused ion beam can include Ga ions, He / Ne ions or Xe ions. Different ion sources have different etching rates, and the graphic resolution varies greatly. In the actual preparation process, suitable ions can be selected according to actual needs, and this embodiment does not limit this. It can be seen that in the FIB-SEM dual-beam system, by rotating the laser workbench, two etching processes can be completed and used in combination, which greatly improves efficiency.

[0115] In some other embodiments, before executing step S204, the method may further include: providing a test substrate; forming a test conductor layer on the test substrate; placing the test substrate in a focused ion beam-scanning electron microscope dual beam system, etching the test conductor layer by a focused ion beam to form a test pattern window; detecting the test pattern window and adjusting the dual beam system parameters. Thus, before the actual process is performed, FIB etching is performed on the conductor layer for testing in advance, and the etching parameters of the FIB system are calibrated and optimized to improve the processing accuracy based on the pattern of the window formed after etching. The etching parameters may include extraction voltage, ion beam current, beam spot diameter, working distance, etching residence time, and ion beam scanning speed.

[0116] In some other embodiments, before executing step S204, the method may further include: placing the substrate 100 in a focused ion beam-scanning electron microscope dual beam system, determining the test area by scanning electron microscope, and etching the conductor layer 300 by focused ion beam in the test area to form a test pattern window. Thus, before the actual process is performed, FIB etching is performed in the test area of ​​the sample in advance, and the etching parameters of the FIB system are calibrated and optimized according to the pattern of the window formed after etching to improve the processing accuracy, and the test is directly performed on the sample that needs to be etched by FIB, which is more conducive to ensuring the accuracy of the test results. The test area can be some edge areas or unimportant areas, such as the cutting road area.

[0117] Optionally, the etching of the conductor layer 300 by a focused ion beam to form the pattern window 310 includes: over-etching the conductor layer 300 by a focused ion beam to form the pattern window 310, wherein the pattern window 310 penetrates the conductor layer 300 and extends into the glue layer 200. Thus, by over-etching the conductor layer 300, it is ensured that the conductor layer 300 is etched through by the focused ion beam, and it is avoided that the conductor layer 300 remains on the portion of the glue layer 200 corresponding to the pattern window setting area 21a, which affects the subsequent etching; and the portion of the glue layer 200 corresponding to the pattern window setting area 21a is not completely etched away, so that when the focused ion beam etches to the substrate 100, contamination and damage to the substrate 100 is avoided, and the influence on the pattern size accuracy is reduced.

[0118] Step S204 may specifically include:

[0119] The substrate 100 is placed in a focused ion beam-scanning electron microscope dual beam system;

[0120] First, an exposure area 22a is determined by a scanning electron microscope, and an electron beam is used to penetrate the conductor layer 300 in the exposure area 22a to expose the glue layer 200; this step is repeated until the exposure of the glue layer 200 in all exposure areas 22a is completed;

[0121] The graphic window setting area 21a is then determined by a scanning electron microscope, and the conductor layer 300 is etched in the graphic window setting area 21a by a focused ion beam to form a graphic window 310; this step is repeated until the etching of the conductor layer 300 in all graphic window setting areas 21a is completed.

[0122] It is understandable that after ion beam etching is performed, a graphic window 310 is formed on the conductor layer 300. If electron beam exposure is performed at this time, when determining the exposure area 22a, the incident electrons may accumulate at the portion of the conductor layer 300 located at the edge of the graphic window 310, resulting in a charging effect, affecting the accuracy of the graphics generated by the scanning electron microscope, and then affecting the subsequent electron beam exposure accuracy. In addition, after ion beam etching is performed, there may be particle contamination caused by etching on the surface of the conductor layer, thereby causing additional scattering of the subsequent electron beam. Therefore, when the conductor layer 300 is relatively complete and clean, first complete the electron beam exposure of all exposure areas 22a, and then perform ion beam etching, which can more effectively ensure the exposure accuracy and improve the accuracy of the graphics.

[0123] Please refer to Fig.13 , executing step S205 : performing an etching process with the conductive layer 300 as a mask, etching the glue layer 200 through the pattern window 310 until the substrate 100 is exposed, so as to form a first etching opening 210 .

[0124] Optionally, the etching process includes an anisotropic etching process; wherein, in the thickness direction of the substrate 100, the projection of the pattern window 310 completely overlaps with the projection of the first etching opening 210. It can be understood that if the first etching opening 210 with an undercut structure is formed in the glue layer 200 due to lateral etching, the second etching opening formed in the subsequent development process may be connected or overlapped with the first etching opening, and the etching pattern may be seriously offset, thereby affecting the accuracy of the pattern finally formed on the substrate 100. Therefore, the anisotropic etching process can achieve accurate transfer of the pattern of the image window, and effectively ensure that the prepared first etching opening and the second etching opening are independent of each other.

[0125] Furthermore, the etching process may include plasma etching. It can be understood that the ion beam is focused by an electrostatic lens, and is refocused into a beam spot with a nanometer diameter through a variable aperture diaphragm, and a nanometer-level pattern can be etched. The FIB etching process can be understood as a nanometer-level etching process. When anisotropic etching is performed using the conductor layer 300 with nanometer-level patterns as a mask, the resolution of plasma etching is higher, and the precise transfer of nanometer-level patterns can be achieved, thereby improving the processing accuracy. In addition, the plasma etching process has a higher process maturity and better compatibility, which is conducive to reducing the process difficulty.

[0126] Please refer to Fig.14 , execute step S206: remove the conductor layer 300. This is to facilitate the subsequent process of developing the adhesive layer 200. Specifically, the conductor layer 300 can be removed by an etching solution, which has a selectivity ratio between the adhesive layer 200 and the conductor layer 300, and can remove the conductor layer 300, but does not corrode the adhesive layer 200. For example, when the material of the adhesive layer 200 is PMMA or a P (MMA-MAA) copolymer combination, and the material of the conductor layer 300 is Al, the etching solution can be MF CD26 (2.38% TMAH) or its dilution. The TMAH-based organic alkaline solution has no corrosive effect on PMMA or P (MMA-MAA) copolymer. If the thickness of the Al layer is 40nm, MF CD26 can be completely removed by etching for 3min-4min; when the material of the conductor layer 300 is Au, the etching solution can be KI solution; when the material of the conductor layer 300 is Ni, the etching solution can be dilute HCl; when the material of the conductor layer 300 is Cr, the etching solution can be Cr etching solution (a mixture of ammonium cerium nitrate and perchloric acid). During actual preparation, a suitable etching solution may be selected according to the material of the adhesive layer 200 and the material of the conductor layer 300, and this embodiment does not limit this.

[0127] Please refer to Fig.15 , perform step S207: develop the glue layer 200, remove the exposed portion 201 of the glue layer, and form a second etching opening 220; wherein, in the thickness direction of the substrate 100, the projection of the first etching opening 210 and the projection of the second etching opening 220 are separated from each other. Thus, after performing step S207, only the patterned glue layer 200 remains on the substrate 100, and the pattern is the sum of the electron beam lithography pattern and the ion beam etching pattern. It can be understood that in this embodiment, the glue layer 200 is exposed by an electron beam, and therefore, the exposed portion 201 of the glue layer can also be referred to as the portion of the glue layer exposed by the electron beam.

[0128] Specifically, the glue layer 200 can be developed with a developer. When the material of the glue layer 200 is PMMA or P (MMA-MAA) copolymer, the developer can be MIBK:IPA (1:3); when the material of the glue layer 200 is ZEP 520A, the developer can be ZED-N50; when the material of the glue layer 200 is UVIII or UV6, the developer can be 2.38% TMAH solution or MF CD26; when the material of the glue layer 200 is CSAR (AR-P6200), the developer can be AR 600-546 or amyl acetate. In actual preparation, a suitable developer can be selected according to the material of the glue layer 200, and this embodiment does not limit this. The development time ranges from 60s to 90s. After development, fixing is required to terminate the development process. For example, after developing the glue layer 200 with MIBK:IPA (1:3), isopropyl alcohol (IPA) can be used for fixing for 10s to 30s, and the developer can be diluted to terminate the development process.

[0129] In some other embodiments, step S206 and step S207 can be performed in the same process. Specifically, a solution that can etch the conductor layer 300 and develop the exposed portion of the adhesive layer 200 can be selected to process the adhesive layer 200. For example, when the material of the conductor layer 300 is Al and the material of the adhesive layer 200 is a combination of UVIII / UV6, MF CD26 developer can be used to etch the Al layer and develop the UVIII / UV6 electron beam exposed portion at the same time.

[0130] Optionally, the first etching opening 210 and the second etching opening 220 are arranged alternately. It can be understood that when the step S204 is performed in the previous order, the exposure area 22a and the pattern window setting area 21a can be controlled to be alternate, so that the two exposure areas 22a are separated by a pattern window setting area 21a, so that the distance between the exposed parts of the glue layer 200 is increased, which is more conducive to reducing the amount of electron accumulation in the unexposed part of the glue layer 200, and more effectively eliminating the "near neighbor effect".

[0131] In this embodiment, the first etching opening 210 and the second etching opening 220 can be completely the same. Specifically, the first etching opening 210 and the second etching opening 220 have the same shape and size. It can be understood that at present, the common nanolithography in this field mainly includes deep ultraviolet (DUV) lithography, extreme ultraviolet (EUV) lithography and nanoimprinting. DUV lithography uses deep ultraviolet light as the exposure light source, and its wavelength is 193nm. It is suitable for processes of 28nm and above process nodes and processes with larger feature sizes; EUV lithography uses extreme ultraviolet light as the exposure light source, and its wavelength is 13.5nm. It can achieve higher resolution than DUV and can be applied to processes of slightly smaller process nodes, but it is more complex and delicate in the process, and the technical cost is high; the cost of the imprint mold of nanoimprinting is high, and there are technical bottlenecks that are difficult to break through, such as overlay accuracy problems and damage and stability problems caused by mechanical contact. Since the electron beam in the electron beam lithography process can form a nanometer-scale beam spot (usually with a diameter of 1nm-3nm), no photolithography mask is required, and direct writing exposure of nanometer-scale patterns can be completed. Compared with conventional optical lithography technologies such as DUV lithography and EUV lithography, which require the preparation of additional masks and are suitable for exposure of relatively large-sized patterns, the hybrid nanolithography method provided in this embodiment has low process difficulty, and can make the etched patterns prepared by the two processes completely the same nanometer-scale patterns, and can obtain smaller-sized patterns; there is no need to prepare a photolithography mask, thereby reducing production costs; and it can be completed in a focused ion beam-scanning electron microscope dual-beam system. If optical lithography is used, optical exposure must be performed in an optical lithography machine, which reduces production efficiency.

[0132] As an optional specific example, after executing step S207, the method may further include: depositing a dielectric layer, the dielectric layer including a first portion and a second portion, the first portion covering the top surface of the conductor layer, and the second portion covering the top surface of the portion of the substrate corresponding to the first etching opening 210 and the second etching opening 220; performing a stripping process to remove the glue layer 200 and the first portion, and retaining the second portion; and performing a local processing process on the substrate 100 using the second portion as a mask. It can be understood that the "positive photolithography" is completed through the previous process, and through the dielectric layer, the mask pattern can be reversed to achieve "negative photolithography".

[0133] Optionally, the material of the dielectric layer includes SiO2 or SiN x .

[0134] Optionally, the thickness of the dielectric layer is less than 2 / 3 of the thickness of the adhesive layer 200. Further, the thickness of the dielectric layer is less than 1 / 2 of the thickness of the adhesive layer 200, thereby being more conducive to ensuring that the first part and the second part are independent of each other.

[0135] As another optional specific example, after executing step S207, the method may further include: performing a local processing process on the substrate 100 using the glue layer 200 after forming the first etching opening 210 and the second etching opening 220 as a mask. Thus, after positive photolithography is performed, the patterned glue layer 200 may be used as a mask to perform subsequent processes.

[0136] Local processing processes may include etching, thin film deposition or ion implantation. Etching processes include ion beam etching, plasma etching (capacitive coupled plasma etching and inductively coupled plasma etching) or wet etching; thin film deposition processes include physical vapor deposition (thermal evaporation, electron beam evaporation, ion beam sputtering deposition, magnetron sputtering and pulsed laser deposition) or chemical vapor deposition (plasma enhanced chemical vapor deposition, inductively coupled plasma chemical vapor deposition and atomic layer deposition); ion implantation processes mainly refer to processes for doping or modifying materials.

[0137] It should be understood that the above embodiments are exemplary and are not intended to include all possible implementations included in the claims. Various modifications and changes may be made on the basis of the above embodiments without departing from the scope of the present disclosure. Similarly, the various technical features of the above embodiments may be arbitrarily combined to form other embodiments of the present application that may not be explicitly described. Therefore, the above embodiments only express several implementations of the present application and do not limit the scope of protection of the patent of this application.

Claims

1. A nanolithography method based on a focused ion beam-scanning electron microscope dual beam system, characterized in that: The method comprises: providing a substrate; forming a glue layer on the substrate, wherein the material of the glue layer includes photoresist; forming a conductor layer on the adhesive layer; The substrate is placed in the focused ion beam-scanning electron microscope dual beam system, a pattern window setting area is determined by a scanning electron microscope, and the conductor layer is etched in the pattern window setting area by a focused ion beam to form a pattern window; an exposure area is determined by a scanning electron microscope, and an electron beam is used to penetrate the conductor layer in the exposure area to expose the glue layer; Performing an etching process using the conductor layer as a mask, etching the glue layer through the pattern window until the substrate is exposed, so as to form a first etching opening; removing the conductor layer; The glue layer is developed to remove the exposed portion of the glue layer to form a second etching opening; wherein in the thickness direction of the substrate, the projection of the first etching opening and the projection of the second etching opening are separated from each other.

2. The nanolithography method based on a focused ion beam-scanning electron microscope dual beam system according to claim 1, characterized in that: The first etching openings and the second etching openings are arranged alternately.

3. The nanolithography method based on a focused ion beam-scanning electron microscope dual beam system according to claim 1, characterized in that: Placing the substrate in the focused ion beam-scanning electron microscope dual beam system, determining a pattern window setting area by a scanning electron microscope, and etching the conductor layer in the pattern window setting area by a focused ion beam to form a pattern window; Determine an exposure area by a scanning electron microscope, and expose the adhesive layer in the exposure area by penetrating the conductor layer with an electron beam, including: placing the substrate in the focused ion beam-scanning electron microscope dual beam system; First, an exposure area is determined by a scanning electron microscope, and an electron beam is used to penetrate the conductor layer in the exposure area to expose the glue layer; this step is repeated until the exposure of the glue layer in all the exposure areas is completed; The graphic window setting area is then determined by a scanning electron microscope, and the conductor layer is etched in the graphic window setting area by a focused ion beam to form a graphic window; this step is repeated until the etching of the conductor layer in all the graphic window setting areas is completed.

4. The nanolithography method based on a focused ion beam-scanning electron microscope dual beam system according to claim 1, characterized in that: The etching process includes an anisotropic etching process; wherein, in the thickness direction of the substrate, the projection of the graphic window completely overlaps with the projection of the first etching opening.

5. The nanolithography method based on a focused ion beam-scanning electron microscope dual beam system according to claim 4, characterized in that: The anisotropic etching process includes a plasma etching process.

6. The nanolithography method based on a focused ion beam-scanning electron microscope dual beam system according to claim 1, characterized in that: The material of the conductor layer includes metal.

7. The nanolithography method based on a focused ion beam-scanning electron microscope dual beam system according to claim 6, characterized in that: The material of the conductor layer includes at least one of Al, Ni, Ti, Cr, and Cu.

8. The nanolithography method based on a focused ion beam-scanning electron microscope dual beam system according to claim 1, characterized in that: The thickness of the conductor layer is in the range of 10 nm to 50 nm.

9. The nanolithography method based on a focused ion beam-scanning electron microscope dual beam system according to claim 1, characterized in that: The method further comprises: A local processing process is performed on the substrate using the glue layer after forming the first etching opening and the second etching opening as a mask; or, a dielectric layer is deposited, the dielectric layer includes a first part and a second part, the first part covers the top surface of the glue layer, and the second part covers the top surface of the part of the substrate corresponding to the first etching opening and the second etching opening; a stripping process is performed to remove the glue layer and the first part, and the second part is retained; and a local processing process is performed on the substrate using the second part as a mask.

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