Multi-power-supply power-on and power-off time sequence control system, method, equipment and medium

Abstract

The invention provides a multi-power-supply power-on and power-off time sequence control system, method and equipment and a medium, and in the multi-power-supply power-on and power-off time sequence control system provided by the invention, a time sequence processing unit in each power supply module is used for processing the power-on and power-off time sequence of the corresponding power supply module. In the time sequence control process, the power-on and power-off control of each power supply is completely controlled by an OR logic result formed by the power-on and power-off signals of the previous time sequence power supply module in the determined power-on and power-off time sequence, and the power-on and power-off control of the multi-power supply module does not need to be completed through a specific chip any more. The control cost of the power-on and power-off time sequence is low, the time sequence control of each power supply is determined by the power-on and power-off signal of the power supply of the previous time sequence, and the control stability of the power-on and power-off time sequence of the multiple power supplies is improved.

Description

Technical Field

[0001] The present application relates to the field of electronic circuit technology, and in particular to a power-on and power-off timing control system, method, device and medium for multiple power supplies. Background Art

[0002] With the development of automotive electronic technology, the development direction of integrated chips has begun to develop in the direction of high density and multi-function. In a complex circuit system, a large number of chips are often placed to complete the work of the circuit system. Each chip has its corresponding control power supply. Along with the specific circuit system function, the control power supplies corresponding to each chip require a specific power-on and power-off sequence to achieve a specific function. In a circuit system with multiple power supplies, it is particularly important to control the power-on and power-off sequence between the power supplies within the system.

[0003] In the current power-on and power-off control scheme for multiple power supplies, control is often performed through a specific power chip for controlling the power-on and power-off timing of the power supplies. This type of power chip has multiple power outputs and can control their power-on and power-off sequence through internal firmware. Although a specific power chip can effectively control the power-on and power-off timing of multiple power supplies in a circuit system, the power chip often requires a high cost of use. At the same time, the power resources provided by the power chip sometimes cannot fully adapt to the power supply requirements of the circuit system, and its control stability for the power-on and power-off timing of multiple power supplies is poor.

[0004] Therefore, how to solve the problems of high control cost and poor control stability faced by the prior art in controlling the power-on and power-off timing of multiple power supplies has become a technical problem that technical personnel in this field need to solve urgently. Summary of the invention

[0005] Based on the above problems, in order to solve the problems of high control cost and poor control stability faced by the prior art when controlling the power-on and power-off timing of multiple power supplies, the present application provides a multi-power supply power-on and power-off timing control system, method, device and medium.

[0006] The embodiments of the present application disclose the following technical solutions:

[0007] In a first aspect, the present application discloses a power-on and power-off timing control system for multiple power supplies, characterized in that it comprises: a plurality of power modules and a timing determination module; each of the power modules comprises a corresponding timing processing unit;

[0008] The timing determination module is used to determine the power-on and power-off timing of the multiple power modules in response to the power-on and power-off timing setting request; each of the power modules has a corresponding timing control power module in the power-on and power-off timing; the timing control power module is the power module of the previous timing of the power module in the power-on and power-off timing;

[0009] The timing processing unit is used to perform power-on and power-off timing control on the power module according to the OR logic result generated by the timing control power module; the output signal includes: a power-on signal and a power-off signal; the power-on signal and the power-off signal are used to indicate the power-on state and the power-off state of the power module respectively.

[0010] Optionally, the power-on and power-off sequence includes: a power-on sequence and a power-off sequence; in the power-on sequence, the power-on operation of the first power module to be powered on is controlled by an external power-on signal; in the power-off sequence, the power-off operation of the first power module to be powered off is controlled by an external power-off signal; the external power-on signal and the external power-off signal are used to control the power-on and power-off of the power-on and power-off timing control system of the multi-power supply.

[0011] Optionally, the multiple power modules include: a first power module; the power-on sequence of the power module controlled by the first power module in the power-off sequence is greater than the power-on sequence of the power module controlled by the first power module in the power-on sequence;

[0012] The power-on operation of the first power module is controlled based on a power-on signal of the power module and a power-off signal of the first power module in the power-off sequence.

[0013] Optionally, the multiple power supplies include: a second power supply module; the power-down sequence position of the power supply module controlled by the second power supply module in the power-on sequence is lower than the power-down sequence position of the power supply module controlled by the second power supply module in the power-off sequence;

[0014] The power-off operation of the second power module is controlled based on a power-off signal of the power module controlled by the timing of the second power module in the power-off timing sequence and the external power-off signal.

[0015] The power-on and power-off timing control system of multiple power supplies further includes: a timing interval adjustment module; the timing interval adjustment module is specifically used to:

[0016] In response to the timing adjustment instruction, the time interval between powering on and powering off of each power module in the power-on and power-off timing sequence is determined by a preset RC circuit.

[0017] In a second aspect, the present application discloses a method for controlling power-on and power-off timing of multiple power supplies, which is applied to a multiple power supply system including multiple power supply modules; each of the power supply modules includes a separate corresponding timing processing unit; the method includes:

[0018] In response to a power-on and power-off sequence setting request, determine the power-on and power-off sequence of the multiple power modules; each of the power modules has a corresponding timing control power module in the power-on and power-off sequence; the timing control power module is the power module of the previous timing of the power module in the power-on and power-off sequence;

[0019] The timing processing unit is controlled to perform power-on and power-off timing control on the power module according to the OR logic result generated by the timing control power module; the output signal includes: a power-on signal and a power-off signal; the power-on signal and the power-off signal are used to indicate the power-on state and the power-off state of the power module respectively.

[0020] Optionally, the power-on and power-off sequence includes: a power-on sequence and a power-off sequence; in the power-on sequence, the power-on operation of the first power module to be powered on is controlled by an external power-on signal; in the power-off sequence, the power-off operation of the first power module to be powered off is controlled by an external power-off signal; the external power-on signal and the external power-off signal are used to control the power-on and power-off of the power-on and power-off timing control system of the multi-power supply.

[0021] Optionally, the multiple power modules include: a first power module; the power-on sequence of the power module controlled by the first power module in the power-off sequence is greater than the power-on sequence of the power module controlled by the first power module in the power-on sequence;

[0022] The power-on operation of the first power module is controlled based on a power-on signal of the power module and a power-off signal of the first power module in the power-off sequence.

[0023] In a third aspect, the present application discloses an electronic device, the device comprising: a processor, a memory, and a system bus;

[0024] The processor and the memory are connected via the system bus;

[0025] The memory is used to store one or more programs, and the one or more programs include instructions. When the instructions are executed by the processor, the processor executes the power-on and power-off timing control method of multiple power supplies.

[0026] In a fourth aspect, the present application discloses a computer-readable storage medium having a computer program stored thereon, characterized in that when the program is executed by a processor, the method for controlling power-on and power-off timings of multiple power supplies is described.

[0027] Compared with the prior art, the present application has the following beneficial effects: the present application provides a multi-power power-on and power-off timing control system, method, device and medium. In the multi-power power-on and power-off timing control system provided by the present application, multiple power modules and a timing determination module are included; each of the power modules includes a corresponding timing processing unit; the timing determination module is used to determine the power-on and power-off timing of the multiple power modules in response to the power-on and power-off timing setting request; each of the power modules has a corresponding timing control power module in the power-on and power-off timing; the timing control power module is the power module of the previous timing of the power module in the power-on and power-off timing; the timing processing unit is used to control the power-on and power-off timing of the power module according to the or logic result generated by the timing control power module; the output signal includes: a power-on signal and a power-off signal; the power-on signal and the power-off signal are used to indicate the power-on state and the power-off state of the power module respectively. In the above-mentioned multi-power system, each power module has a built-in corresponding timing processing unit, and the internal timing processing unit is used to process the power-on and power-off timing of its corresponding power module. In the process of timing control of multiple power modules, it is first necessary to determine the power-on and power-off timing between each power module. After determining the specific power-on and power-off timing, the timing processing unit in each power module will perform power-on and power-off timing control on the power module to which it belongs based on the output signal of the power module of the previous timing in the power-on and power-off timing of its own power module or the logical result generated by the output signal of the power module of the previous timing in the power-on and power-off timing. Under such control logic, the power-on and power-off control of each power supply is completely controlled by the power-on and power-off signals of the power module of the previous timing in the determined power-on and power-off timing. The power-on and power-off control of multiple power modules no longer needs to be completed through a specific chip. The control cost of the power-on and power-off timing is low, and the timing control of each power supply is determined by the power-on and power-off signals of the power supply of the previous timing, and the control stability of the power-on and power-off timing of multiple power supplies is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0029] Figure 1 A schematic diagram of the structure of a multi-power supply power-on and power-off timing control system provided in an embodiment of the present application;

[0030] Figure 2 A schematic diagram of the circuit structure of a multi-power supply control system provided in an embodiment of the present application;

[0031] Figure 3 A schematic diagram of the structure of a preset RC circuit provided in an embodiment of the present application;

[0032] Figure 4 A flowchart of a method for controlling power-on and power-off timing of multiple power supplies provided in an embodiment of the present application;

[0033] Figure 5 A schematic diagram of the structure of an electronic device for controlling power-on and power-off timings of multiple power supplies provided in an embodiment of the present application. DETAILED DESCRIPTION

[0034] As described above, with the development of automotive electronic technology, the development direction of integrated chips has begun to develop in the direction of high density and multi-function. In a complex circuit system, a large number of chips are often placed to complete the work of the circuit system. Each chip has its corresponding control power supply. Along with the specific circuit system function, the control power supplies corresponding to each chip require a specific power-on and power-off sequence to achieve a specific function. In a circuit system with multiple power supplies, it is particularly important to control the power-on and power-off sequence between the power supplies within the system.

[0035] In the current power-on and power-off control scheme for multiple power supplies, control is often performed through a specific power chip for controlling the power-on and power-off timing of the power supplies. This type of power chip has multiple power outputs and can control their power-on and power-off sequence through internal firmware. Although a specific power chip can effectively control the power-on and power-off timing of multiple power supplies in a circuit system, the power chip often requires a high cost of use. At the same time, the power resources provided by the power chip sometimes cannot fully adapt to the power supply requirements of the circuit system, and its control stability for the power-on and power-off timing of multiple power supplies is poor.

[0036] Therefore, how to solve the problems of high control cost and poor control stability faced by the prior art in controlling the power-on and power-off timing of multiple power supplies has become a technical problem that technical personnel in this field need to solve urgently.

[0037] In order to solve the above problems, the present application provides a multi-power power-on and power-off timing control system, method, device and medium. In the multi-power power-on and power-off timing control system provided in the present application, multiple power modules and a timing determination module are included; each of the power modules includes a separate corresponding timing processing unit; the timing determination module is used to determine the power-on and power-off timing of the multiple power modules in response to the power-on and power-off timing setting request; each of the power modules has a corresponding timing control power module in the power-on and power-off timing; the timing control power module is the power module of the previous timing of the power module in the power-on and power-off timing; the timing processing unit is used to control the power-on and power-off timing of the power module according to the or logic result generated by the timing control power module; the output signal includes: a power-on signal and a power-off signal; the power-on signal and the power-off signal are used to indicate the power-on state and the power-off state of the power module respectively. In the above-mentioned multi-power system, each power module has a built-in separate corresponding timing processing unit, and the internal timing processing unit is used to process the power-on and power-off timing of its corresponding power module. In the process of timing control of multiple power modules, it is first necessary to determine the power-on and power-off timing between each power module. After determining the specific power-on and power-off timing, the timing processing unit in each power module will perform power-on and power-off timing control on the power module to which it belongs based on the output signal of the power module of the previous timing in the power-on and power-off timing of its own power module or the logical result generated by the output signal of the power module of the previous timing in the power-on and power-off timing. Under such control logic, the power-on and power-off control of each power supply is completely controlled by the power-on and power-off signals of the power module of the previous timing in the determined power-on and power-off timing. The power-on and power-off control of multiple power modules no longer needs to be completed through a specific chip. The control cost of the power-on and power-off timing is low, and the timing control of each power supply is determined by the power-on and power-off signals of the power supply of the previous timing, and the control stability of the power-on and power-off timing of multiple power supplies is improved.

[0038] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0039] See also Figure 1 , this figure is a structural schematic diagram of a multi-power supply power-on and power-off timing control system provided in an embodiment of the present application, including multiple power supply modules 100 and a timing determination module 200, and a separate corresponding timing processing unit 300 is built in each power supply module.

[0040] The timing determination module 200 is used to determine the power-on and power-off timing of the multiple power modules in response to the power-on and power-off timing setting request; each of the power modules has a corresponding timing control power module in the power-on and power-off timing; the timing control power module is the power module of the previous timing of the power module in the power-on and power-off timing.

[0041] The power-on and power-off timing control of multiple power modules needs to be performed based on the determined power-on and power-off timing. The timing determination module will respond to the power-on and power-off timing setting request from outside the system, and determine the power-on and power-off timing of multiple power modules from the request. In particular, each power module contains a corresponding timing control power module in the power-on and power-off timing, and the timing control power module is the power module of the previous timing of each power module in the power-on and power-off timing. In the subsequent process of power-on and power-off timing control of the power modules, the power-on and power-off timing control of each power module will be completed based on its own timing control power module. This power-on and power-off timing control method is different from the method of using a specific integrated chip to perform power-on and power-off control in the prior art. The power-on and power-off timing control of the power module can be completed on the basis of other power modules, which greatly reduces the cost of multi-power timing control.

[0042] The timing processing unit is used to perform power-on and power-off timing control on the power module according to the OR logic result generated by the timing control power module; the output signal includes: a power-on signal and a power-off signal; the power-on signal and the power-off signal are used to indicate the power-on state and the power-off state of the power module respectively.

[0043] After determining the power-on and power-off timing of each power module, the timing processing unit set in each power module controls the power-on and power-off operations of the power module to which it belongs. In the process of power-on and power-off control, the power-on and power-off control will be performed according to the output signal of the previous power module in the power-on timing and the output signal of the previous power module in the power-off timing composed of the OR logic result. Among them, the input signals are respectively a power-on signal and a power-off signal, and the power-on signal is recorded as 1 and the power-off signal is recorded as 0. When there is a power-on signal in the two signals received by the power module, the corresponding OR logic result is 1. At this time, the timing processing unit will control the power module to which it belongs to perform a power-on operation and output the power-on signal to the outside. When both signals are power-off signals, the corresponding OR logic result is 0. At this time, the timing processing unit will control the power module to perform a power-off operation and output the power-off signal to the outside.

[0044] Under such control logic, the power-on and power-off control of each power module is completed based on its output signal in the power-on and power-off sequence. When a power module is powered on, since the output signal of the previous power module is 0 when it is powered off, the power-on of its own power is completely controlled by the previous power module in the power-on sequence. Similarly, when it is powered off, since the output signal of the previous power module in the power-on sequence is 0, the power-off of its own power is completely controlled by the output signal of the previous power module.

[0045] In particular, the power-on of the first power module to be powered on needs to be controlled by the external power-on signal in the external control signal. The external control signal is used to control the power on and off of the entire multi-power system. Correspondingly, the first power module to be powered off also needs to be controlled by the external power-off signal. When the first power module to be powered off is not the first power module to be powered on, it is necessary to perform a logical operation on the external power-off signal and the AND gate to ensure that the first power module to be powered off can be powered off normally.

[0046] Next, the control process of the power-on and power-off timing of multiple power supplies in this application will be further explained in conjunction with specific drawings. Figure 2 , which is a schematic diagram of the circuit structure of a multi-power supply control system provided by an embodiment of the present application. Figure 2 There are 5 power modules in the circuit, and the numbers of each power module are POWER1-POWER5. In this circuit structure, the power-on sequence is 1-2-3-4-5, and the power-off sequence is 4-1-3-5-2. Among them, EN represents the enable pin of the power module, and Vout represents the output pin of the power module. Figure 2 Since POWER4 is the first power module to be powered off and not the first to be powered on, the power off of POWER4 needs to be completed in combination with an external power off control signal and an AND gate. It should be noted that, corresponding to different power on and off timings, in order to ensure that the circuit structure can comply with the power on and off control logic in this application, the circuit structure will also be different under different power on and off timings. Therefore, Figure 2 The circuit structure in the embodiment focuses on embodying the control logic for powering on and off of multiple power modules in this application, and this embodiment does not specifically limit the circuit structure to be implemented.

[0047] Next, Figure 2 Take the power-on and power-off control logic of each power module in the above-mentioned specific power-on and power-off timing sequence in this application as an example to explain, and the power-on signal is recorded as 1 and the power-off signal is recorded as 0 for explanation.

[0048] Before power-on, the external control signal is 0, and all power modules and corresponding pins are 0. When the external control signal is 1, switch 1 is turned on, and at the same time, the OR1 gate before the EN of POWER has a power-on signal of 1, so POWER1 will also receive the power-on signal of 1, and POWER1 enters the power-on state and outputs the power-on signal through Vout. At this time, since switch 2 is in the off state, the corresponding switch 3 is also in the off state, POWER5 is 0, the output of the OR2 gate is 1, and POWER2 enters the power-on state. Similarly, under this progressive logic control, when there is a power-on signal, the next power module will enter the power-on state, and the corresponding POWER3 will be powered on and output a 1 signal, thus completing all power-on operations.

[0049] In particular, in the power-on and power-off logic control of the present application, there are two special power-on and power-off timing conditions, which will cause power-on and power-off timing confusion in multiple power supplies. Therefore, in the present application, the first power supply module and the second power supply module are used as the power supply modules corresponding to the two special timing conditions. Figure 2 The power-on and power-off timing sequences set above explain in detail the special timing sequences represented by the first power module and the second power module respectively:

[0050] First, the first power module, the power-on sequence of the power module controlled by the first power module in the power-off sequence is greater than the power-on sequence of the power module controlled by the first power module in the power-on sequence. In layman's terms, the power-on sequence of the power module preceding the first power module in the power-off sequence is greater than the power module preceding the first power module in the power-on sequence.

[0051] Corresponds to Figure 2The power modules in the power module, POWER3 is the state summarized by the first power module. For the power-on sequence: 1-2-3-4-5, the power-off sequence: 4-1-3-5-2. The previous power supply of POWER3 in the power-off sequence is POWER1, and the previous power supply in the power-on sequence is POWER2, ​​and the power-on sequence of POWER1 is before POWER2. Under such timing conditions, if the power-on of POWER3 is controlled by the output signals of POWER2 and POWER1, POWER1 will enable POWER3 at the same time and enter the power-on state when it is powered on, thereby disrupting the set power-on sequence. Therefore, in order to solve this problem, the present application adds a switch to the power-off control signal of POWER3, namely switch 2, and switch 2 is controlled by the output signal of POWER itself. When POWER3 is not powered on, the power output is 0, the switch is disconnected, and the previous power supply will not affect the enable state of POWER3 when it is powered off. After the system is powered on, the external control signal is 1, switch 2 is turned on, and when the system is powered off, POWER1 can smoothly control the power off of POWER3.

[0052] Next, the second power module is explained in detail. The power-down sequence position of the power module controlled by the timing control of the second power module in the power-on sequence is lower than the power-down sequence position of the power module controlled by the timing control of the second power module in the power-off sequence. Similarly, the power-down sequence position of the power module preceding the second power module in the power-on sequence is lower than the power module preceding the second power module in the power-off sequence.

[0053] Corresponds to Figure 2 The power module in the circuit, POWER3 is also in this situation. In POWER3, the previous power supply in the power-off sequence is POWER1, and the previous power supply in the power-on sequence is POWER2. The power-off sequence of POWER2 is smaller than that of POWER1. Under this timing condition, if the power-off of POWER3 is controlled only by the calculation logic of the OR gate, when POWER1 is powered off, the power-on state of POWER2 needs to be maintained synchronously, so POWER3 will maintain the power-on state synchronously, thereby disrupting the proper power-off sequence. Therefore, for such special cases, the present application adds a control switch to the power-on control signal of POWER3, and the control switch is controlled by an external control signal, corresponding to switch 1 in the figure. When the multi-power system is powered on, the external control signal is 1, switch 1 is turned on, and POWER3 is powered on. When powered off, the external control signal is 0, switch 1 is turned off, and the output signal of POWER2 will not affect the power-off of POWER3. At the same time, the power-off signal of POWER1 will be input to POWER3 from switch 2 that has not been disconnected, thereby controlling POWER3 to power off. After powering on, POWER3 can be smoothly controlled to power off by the power-off signal of POWER1, thereby following the set power-on and power-off timing.

[0054] Based on the first power module and the second power module, continue to combine Figure 2 The power-off process under the power-on and power-off timing control logic of this application is explained.

[0055] When powering off, the external control signal is 0, the switch 1 controlled by it is turned off, and the AND gate outputs 0, thereby controlling POWER4 to power off for the first time. Before POWER4 is powered off, since the OR1 gate before the EN of POWER1 has an input POWER4 of 1, its output is 1, and POWER1 remains powered on. After POWER4 is powered off, the OR1 inputs are all 0 and the output is 0, thereby powering off POWER1. After POWER4 is powered off, since the OR4 gate before the EN of POWER5 has an input POWER3 of 1 due to the conduction of switch 3, its output is 1, and POWER5 remains powered on. Although POWER2 is 1, switch 1 is turned off, the OR3 inputs are all 0, the output is 0, POWER3 is powered off, switch 2 is turned off, the OR3 output is still 0, and POWER3 remains off. The OR4 inputs are all 0, the output is 0, POWER5 is powered off, switch 3 is turned off, the OR4 output is still 0, and POWER5 remains off. The inputs of OR2 are all 0, the output is 0, and POWER2 is powered off. The entire power-off process is completed.

[0056] As an optional implementation, the power-on and power-off timing control system of multiple power supplies further includes: a timing interval adjustment module; the timing interval adjustment module is specifically used to:

[0057] In response to the timing adjustment instruction, the time interval between powering on and powering off of each power module in the power-on and power-off timing sequence is determined by a preset RC circuit.

[0058] See also Figure 3 , which is a schematic diagram of a structure of a preset RC circuit provided in an embodiment of the present application. In actual application scenarios, the time interval between powering on and powering off of each power module can be adjusted by a preset RC circuit.

[0059] Specifically, in the process of pre-setting the RC circuit, you first need to know the specifications or time requirements for powering on and off each module. For example, the first power module may need to stabilize before starting the second power module, and such a time interval may be specified as tens of milliseconds or hundreds of milliseconds. After that, design the RC circuit according to the time interval requirements. Choose appropriate resistance and capacitance values ​​so that the time constant of capacitor charging and discharging meets the power-on and power-off time intervals between modules. To achieve adjustable delays, you can use variable resistors or include multiple capacitors and switches in the design to change the total capacitance.

[0060] The embodiment of the present application provides a power-on and power-off timing control system for multiple power supplies. In the power-on and power-off timing control system for multiple power supplies provided in the present application, multiple power supply modules and a timing determination module are included; each of the power supply modules includes a corresponding timing processing unit; the timing determination module is used to determine the power-on and power-off timing of the multiple power supply modules in response to the power-on and power-off timing setting request; each of the power supply modules has a corresponding timing control power supply module in the power-on and power-off timing; the timing control power supply module is the power supply module of the previous timing of the power supply module in the power-on and power-off timing; the timing processing unit is used to control the power-on and power-off timing of the power supply module according to the OR logic result generated by the timing control power supply module; the output signal includes: a power-on signal and a power-off signal; the power-on signal and the power-off signal are used to indicate the power-on state and the power-off state of the power supply module respectively. In the above-mentioned multi-power supply system, each power supply module has a built-in corresponding timing processing unit, and the internal timing processing unit is used to process the power-on and power-off timing of its corresponding power supply module. In the process of timing control of multiple power modules, it is first necessary to determine the power-on and power-off timing between each power module. After determining the specific power-on and power-off timing, the timing processing unit in each power module will perform power-on and power-off timing control on the power module to which it belongs based on the output signal of the power module of the previous timing in the power-on and power-off timing of its own power module or the logical result generated by the output signal of the power module of the previous timing in the power-on and power-off timing. Under such control logic, the power-on and power-off control of each power supply is completely controlled by the power-on and power-off signals of the power module of the previous timing in the determined power-on and power-off timing. The power-on and power-off control of multiple power modules no longer needs to be completed through a specific chip. The control cost of the power-on and power-off timing is low, and the timing control of each power supply is determined by the power-on and power-off signals of the power supply of the previous timing, and the control stability of the power-on and power-off timing of multiple power supplies is improved.

[0061] A method for controlling power-on and power-off sequences of multiple power supplies provided in an embodiment of the present application is introduced below. The method for controlling power-on and power-off sequences of multiple power supplies described below and the control system for controlling power-on and power-off sequences of multiple power supplies described above can refer to each other.

[0062] See also Figure 4 , this figure is a flow chart of a method for controlling power-on and power-off timing of multiple power supplies provided in an embodiment of the present application, which is applied to a multiple power supply system including multiple power supply modules; each of the power supply modules includes a corresponding timing processing unit; the method includes the following steps:

[0063] S101: In response to a power-on and power-off sequence setting request, determine the power-on and power-off sequence of the multiple power modules; each of the power modules has a corresponding timing control power module in the power-on and power-off sequence; the timing control power module is the power module of the previous timing of the power module in the power-on and power-off sequence;

[0064] S102: Control the timing processing unit to perform power-on and power-off timing control on the power module according to the OR logic result generated by the timing control power module; the output signal includes: a power-on signal and a power-off signal; the power-on signal and the power-off signal are used to indicate the power-on state and the power-off state of the power module, respectively.

[0065] Optionally, the power-on and power-off sequence includes: a power-on sequence and a power-off sequence; in the power-on sequence, the power-on operation of the first power module to be powered on is controlled by an external power-on signal; in the power-off sequence, the power-off operation of the first power module to be powered off is controlled by an external power-off signal; the external power-on signal and the external power-off signal are used to control the power-on and power-off of the power-on and power-off timing control system of the multi-power supply.

[0066] Optionally, the multiple power modules include: a first power module; the power-on sequence of the power module controlled by the first power module in the power-off sequence is greater than the power-on sequence of the power module controlled by the first power module in the power-on sequence;

[0067] The power-on operation of the first power module is controlled based on a power-on signal of the power module and a power-off signal of the first power module in the power-off sequence.

[0068] Optionally, the multiple power supplies include: a second power supply module; the power-down sequence position of the power supply module controlled by the second power supply module in the power-on sequence is lower than the power-down sequence position of the power supply module controlled by the second power supply module in the power-off sequence;

[0069] The power-off operation of the second power module is controlled based on a power-off signal of the power module controlled by the timing of the second power module in the power-off timing sequence and the external power-off signal.

[0070] Optionally, after step S101, the method further includes:

[0071] In response to the timing adjustment instruction, the time interval between powering on and powering off of each power module in the power-on and power-off timing sequence is determined by a preset RC circuit.

[0072] See Figure 5, which is a schematic diagram of the structure of an electronic device for controlling power-on and power-off timing of multiple power supplies provided in an embodiment of the present application, including:

[0073] A memory 11, used for storing computer programs;

[0074] The processor 12 is used to implement the steps of the method for controlling power-on and power-off timing sequences of multiple power supplies described in any of the above method embodiments when executing the computer program.

[0075] In this embodiment, the device may be a vehicle-mounted computer, a PC (Personal Computer), or a terminal device such as a smart phone, a tablet computer, a PDA, or a portable computer.

[0076] The device may include a memory 11 , a processor 12 , and a bus 13 .

[0077] Among them, the memory 11 includes at least one type of readable storage medium, and the readable storage medium includes flash memory, hard disk, multimedia card, card-type memory (for example, SD or DX memory, etc.), magnetic memory, disk, optical disk, etc. In some embodiments, the memory 11 can be an internal storage unit of the device, such as a hard disk of the device. In other embodiments, the memory 11 can also be an external storage device of the device, such as a plug-in hard disk equipped on the device, a smart memory card (SmartMedia Card, SMC), a secure digital (Secure Digital, SD) card, a flash card (Flash Card), etc. Further, the memory 11 can also include both an internal storage unit of the device and an external storage device. The memory 11 can not only be used to store application software and various types of data installed in the device, such as program codes for executing fault prediction methods, etc., but can also be used to temporarily store data that has been output or is to be output. The processor 12 can be a central processing unit (CPU) in some embodiments.

[0078] In some embodiments, the processor 12 may be a central processing unit (CPU), a controller, a microcontroller, a microprocessor or other data processing chip, and is used to run program codes or process data stored in the memory 11, such as program codes for executing a fault prediction method.

[0079] The bus 13 may be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 5 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0080] Furthermore, the device may also include a network interface 14, which may optionally include a wired interface and / or a wireless interface (such as a WI-FI interface, a Bluetooth interface, etc.), which is generally used to establish a communication connection between the device and other electronic devices.

[0081] Optionally, the device may further include a user interface 15, which may include a display (Display), an input unit such as a keyboard (Keyboard), and the optional user interface 15 may also include a standard wired interface and a wireless interface. Optionally, in some embodiments, the display may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, and an OLED (Organic Light-Emitting Diode) touch device, etc. The display may also be appropriately referred to as a display screen or a display unit, which is used to display information processed in the device and to display a visual user interface.

[0082] Figure 5 Only the device with components 11-15 is shown, and it can be understood by those skilled in the art that Figure 5 The structure shown does not constitute a limitation of the device, and may include fewer or more components than shown, or combine certain components, or arrange the components differently.

[0083] It should be noted that each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for methods, systems, electronic devices and media, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiments. The methods, systems, electronic devices and media described above are merely schematic, wherein the units described as separate components may or may not be physically separated, and the components indicated as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0084] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A power-on and power-off timing control system for multiple power supplies, characterized in that: include: A plurality of power supply modules and a timing determination module; each of the power supply modules comprises a corresponding timing processing unit; The timing determination module is used to determine the power-on and power-off timing of the multiple power modules in response to the power-on and power-off timing setting request; each of the power modules has a corresponding timing control power module in the power-on and power-off timing; the timing control power module is the power module of the previous timing of the power module in the power-on and power-off timing; The timing processing unit is used to perform power-on and power-off timing control on the power module according to the OR logic result generated by the timing control power module; The output signal includes: a power-on signal and a power-off signal; The power-on signal and the power-off signal are used to indicate a power-on state and a power-off state of the power module, respectively.

2. The system according to claim 1, characterized in that The power-on and power-off sequence includes: a power-on sequence and a power-off sequence; in the power-on sequence, the power-on operation of the first power module that is powered on is controlled by an external power-on signal; in the power-off sequence, the power-off operation of the first power module that is powered off is controlled by an external power-off signal; the external power-on signal and the external power-off signal are used to control the power-on and power-off of the power-on and power-off sequence control system of the multi-power supply.

3. The system according to claim 2, characterized in that The multiple power modules include: a first power module; the power-on sequence of the first power module in the power-off sequence is greater than the power-on sequence of the first power module in the power-on sequence; The power-on operation of the first power module is controlled based on a power-on signal of the power module and a power-off signal of the first power module in the power-off sequence.

4. The system according to claim 2, characterized in that The multiple power supplies include: a second power supply module; the power-down sequence position of the second power supply module in the power-on sequence is lower than the power-down sequence position of the second power supply module in the power-off sequence; The power-off operation of the second power module is controlled based on a power-off signal of the power module controlled by the timing of the second power module in the power-off timing sequence and the external power-off signal.

5. The system according to claim 1, characterized in that Also includes: Timing interval adjustment module; the timing interval adjustment module is specifically used to: In response to the timing adjustment instruction, the time interval between powering on and powering off of each power module in the power-on and power-off timing sequence is determined by a preset RC circuit.

6. A method for controlling power-on and power-off timing of multiple power supplies, characterized in that: Applicable to a multi-power system including a plurality of power modules; each of the power modules includes a corresponding timing processing unit; the method includes: In response to a power-on and power-off sequence setting request, determine the power-on and power-off sequence of the multiple power modules; each of the power modules has a corresponding timing control power module in the power-on and power-off sequence; the timing control power module is the power module of the previous timing of the power module in the power-on and power-off sequence; The timing processing unit is controlled to perform power-on and power-off timing control on the power module according to the OR logic result generated by the timing control power module; the output signal includes: a power-on signal and a power-off signal; the power-on signal and the power-off signal are used to indicate the power-on state and the power-off state of the power module respectively.

7. The method according to claim 6, characterized in that The power-on and power-off sequence includes: a power-on sequence and a power-off sequence; in the power-on sequence, the power-on operation of the first power module that is powered on is controlled by an external power-on signal; in the power-off sequence, the power-off operation of the first power module that is powered off is controlled by an external power-off signal; the external power-on signal and the external power-off signal are used to control the power-on and power-off of the power-on and power-off sequence control system of the multi-power supply.

8. The method according to claim 7, characterized in that The multiple power modules include: a first power module; the power-on sequence of the first power module in the power-off sequence is greater than the power-on sequence of the first power module in the power-on sequence; The power-on operation of the first power module is controlled based on a power-on signal of the power module and a power-off signal of the first power module in the power-off sequence.

9. An electronic device, characterized in that: The device comprises: a processor, a memory and a system bus; The processor and the memory are connected via the system bus; The memory is used to store one or more programs, and the one or more programs include instructions. When the instructions are executed by the processor, the processor executes the power-on and power-off timing control method for multiple power supplies according to any one of claims 6 to 8.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the method for controlling power-on and power-off timing of multiple power supplies described in any one of claims 6 to 8 is implemented.

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